drivers/scsi/ufs/unipro.h

   1 /*
   2  * drivers/scsi/ufs/unipro.h
   3  *
   4  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #ifndef _UNIPRO_H_
  13 #define _UNIPRO_H_
  14
  15 /*
  16  * M-TX Configuration Attributes
  17  */
  18 #define TX_MODE                                 0x0021
  19 #define TX_HSRATE_SERIES                        0x0022
  20 #define TX_HSGEAR                               0x0023
  21 #define TX_PWMGEAR                              0x0024
  22 #define TX_AMPLITUDE                            0x0025
  23 #define TX_HS_SLEWRATE                          0x0026
  24 #define TX_SYNC_SOURCE                          0x0027
  25 #define TX_HS_SYNC_LENGTH                       0x0028
  26 #define TX_HS_PREPARE_LENGTH                    0x0029
  27 #define TX_LS_PREPARE_LENGTH                    0x002A
  28 #define TX_HIBERN8_CONTROL                      0x002B
  29 #define TX_LCC_ENABLE                           0x002C
  30 #define TX_PWM_BURST_CLOSURE_EXTENSION          0x002D
  31 #define TX_BYPASS_8B10B_ENABLE                  0x002E
  32 #define TX_DRIVER_POLARITY                      0x002F
  33 #define TX_HS_UNTERMINATED_LINE_DRIVE_ENABLE    0x0030
  34 #define TX_LS_TERMINATED_LINE_DRIVE_ENABLE      0x0031
  35 #define TX_LCC_SEQUENCER                        0x0032
  36 #define TX_MIN_ACTIVATETIME                     0x0033
  37 #define TX_PWM_G6_G7_SYNC_LENGTH                0x0034
  38
  39 /*
  40  * M-RX Configuration Attributes
  41  */
  42 #define RX_MODE                                 0x00A1
  43 #define RX_HSRATE_SERIES                        0x00A2
  44 #define RX_HSGEAR                               0x00A3
  45 #define RX_PWMGEAR                              0x00A4
  46 #define RX_LS_TERMINATED_ENABLE                 0x00A5
  47 #define RX_HS_UNTERMINATED_ENABLE               0x00A6
  48 #define RX_ENTER_HIBERN8                        0x00A7
  49 #define RX_BYPASS_8B10B_ENABLE                  0x00A8
  50 #define RX_TERMINATION_FORCE_ENABLE             0x0089
  51
  52 #define is_mphy_tx_attr(attr)                   (attr < RX_MODE)
  53 /*
  54  * PHY Adpater attributes
  55  */
  56 #define PA_ACTIVETXDATALANES    0x1560
  57 #define PA_ACTIVERXDATALANES    0x1580
  58 #define PA_TXTRAILINGCLOCKS     0x1564
  59 #define PA_PHY_TYPE             0x1500
  60 #define PA_AVAILTXDATALANES     0x1520
  61 #define PA_AVAILRXDATALANES     0x1540
  62 #define PA_MINRXTRAILINGCLOCKS  0x1543
  63 #define PA_TXPWRSTATUS          0x1567
  64 #define PA_RXPWRSTATUS          0x1582
  65 #define PA_TXFORCECLOCK         0x1562
  66 #define PA_TXPWRMODE            0x1563
  67 #define PA_LEGACYDPHYESCDL      0x1570
  68 #define PA_MAXTXSPEEDFAST       0x1521
  69 #define PA_MAXTXSPEEDSLOW       0x1522
  70 #define PA_MAXRXSPEEDFAST       0x1541
  71 #define PA_MAXRXSPEEDSLOW       0x1542
  72 #define PA_TXLINKSTARTUPHS      0x1544
  73 #define PA_TXSPEEDFAST          0x1565
  74 #define PA_TXSPEEDSLOW          0x1566
  75 #define PA_REMOTEVERINFO        0x15A0
  76 #define PA_TXGEAR               0x1568
  77 #define PA_TXTERMINATION        0x1569
  78 #define PA_HSSERIES             0x156A
  79 #define PA_PWRMODE              0x1571
  80 #define PA_RXGEAR               0x1583
  81 #define PA_RXTERMINATION        0x1584
  82 #define PA_MAXRXPWMGEAR         0x1586
  83 #define PA_MAXRXHSGEAR          0x1587
  84 #define PA_RXHSUNTERMCAP        0x15A5
  85 #define PA_RXLSTERMCAP          0x15A6
  86 #define PA_PACPREQTIMEOUT       0x1590
  87 #define PA_PACPREQEOBTIMEOUT    0x1591
  88 #define PA_HIBERN8TIME          0x15A7
  89 #define PA_LOCALVERINFO         0x15A9
  90 #define PA_TACTIVATE            0x15A8
  91 #define PA_PACPFRAMECOUNT       0x15C0
  92 #define PA_PACPERRORCOUNT       0x15C1
  93 #define PA_PHYTESTCONTROL       0x15C2
  94 #define PA_PWRMODEUSERDATA0     0x15B0
  95 #define PA_PWRMODEUSERDATA1     0x15B1
  96 #define PA_PWRMODEUSERDATA2     0x15B2
  97 #define PA_PWRMODEUSERDATA3     0x15B3
  98 #define PA_PWRMODEUSERDATA4     0x15B4
  99 #define PA_PWRMODEUSERDATA5     0x15B5
 100 #define PA_PWRMODEUSERDATA6     0x15B6
 101 #define PA_PWRMODEUSERDATA7     0x15B7
 102 #define PA_PWRMODEUSERDATA8     0x15B8
 103 #define PA_PWRMODEUSERDATA9     0x15B9
 104 #define PA_PWRMODEUSERDATA10    0x15BA
 105 #define PA_PWRMODEUSERDATA11    0x15BB
 106 #define PA_CONNECTEDTXDATALANES 0x1561
 107 #define PA_CONNECTEDRXDATALANES 0x1581
 108 #define PA_LOGICALLANEMAP       0x15A1
 109 #define PA_SLEEPNOCONFIGTIME    0x15A2
 110 #define PA_STALLNOCONFIGTIME    0x15A3
 111 #define PA_SAVECONFIGTIME       0x15A4
 112
 113 /* PA power modes */
 114 enum {
 115         FAST_MODE       = 1,
 116         SLOW_MODE       = 2,
 117         FASTAUTO_MODE   = 4,
 118         SLOWAUTO_MODE   = 5,
 119         UNCHANGED       = 7,
 120 };
 121
 122 /* PA TX/RX Frequency Series */
 123 enum {
 124         PA_HS_MODE_A    = 1,
 125         PA_HS_MODE_B    = 2,
 126 };
 127
 128 enum ufs_pwm_gear_tag {
 129         UFS_PWM_DONT_CHANGE,    /* Don't change Gear */
 130         UFS_PWM_G1,             /* PWM Gear 1 (default for reset) */
 131         UFS_PWM_G2,             /* PWM Gear 2 */
 132         UFS_PWM_G3,             /* PWM Gear 3 */
 133         UFS_PWM_G4,             /* PWM Gear 4 */
 134         UFS_PWM_G5,             /* PWM Gear 5 */
 135         UFS_PWM_G6,             /* PWM Gear 6 */
 136         UFS_PWM_G7,             /* PWM Gear 7 */
 137 };
 138
 139 enum ufs_hs_gear_tag {
 140         UFS_HS_DONT_CHANGE,     /* Don't change Gear */
 141         UFS_HS_G1,              /* HS Gear 1 (default for reset) */
 142         UFS_HS_G2,              /* HS Gear 2 */
 143         UFS_HS_G3,              /* HS Gear 3 */
 144 };
 145
 146 /*
 147  * Data Link Layer Attributes
 148  */
 149 #define DL_TC0TXFCTHRESHOLD     0x2040
 150 #define DL_FC0PROTTIMEOUTVAL    0x2041
 151 #define DL_TC0REPLAYTIMEOUTVAL  0x2042
 152 #define DL_AFC0REQTIMEOUTVAL    0x2043
 153 #define DL_AFC0CREDITTHRESHOLD  0x2044
 154 #define DL_TC0OUTACKTHRESHOLD   0x2045
 155 #define DL_TC1TXFCTHRESHOLD     0x2060
 156 #define DL_FC1PROTTIMEOUTVAL    0x2061
 157 #define DL_TC1REPLAYTIMEOUTVAL  0x2062
 158 #define DL_AFC1REQTIMEOUTVAL    0x2063
 159 #define DL_AFC1CREDITTHRESHOLD  0x2064
 160 #define DL_TC1OUTACKTHRESHOLD   0x2065
 161 #define DL_TXPREEMPTIONCAP      0x2000
 162 #define DL_TC0TXMAXSDUSIZE      0x2001
 163 #define DL_TC0RXINITCREDITVAL   0x2002
 164 #define DL_TC0TXBUFFERSIZE      0x2005
 165 #define DL_PEERTC0PRESENT       0x2046
 166 #define DL_PEERTC0RXINITCREVAL  0x2047
 167 #define DL_TC1TXMAXSDUSIZE      0x2003
 168 #define DL_TC1RXINITCREDITVAL   0x2004
 169 #define DL_TC1TXBUFFERSIZE      0x2006
 170 #define DL_PEERTC1PRESENT       0x2066
 171 #define DL_PEERTC1RXINITCREVAL  0x2067
 172
 173 /*
 174  * Network Layer Attributes
 175  */
 176 #define N_DEVICEID              0x3000
 177 #define N_DEVICEID_VALID        0x3001
 178 #define N_TC0TXMAXSDUSIZE       0x3020
 179 #define N_TC1TXMAXSDUSIZE       0x3021
 180
 181 /*
 182  * Transport Layer Attributes
 183  */
 184 #define T_NUMCPORTS             0x4000
 185 #define T_NUMTESTFEATURES       0x4001
 186 #define T_CONNECTIONSTATE       0x4020
 187 #define T_PEERDEVICEID          0x4021
 188 #define T_PEERCPORTID           0x4022
 189 #define T_TRAFFICCLASS          0x4023
 190 #define T_PROTOCOLID            0x4024
 191 #define T_CPORTFLAGS            0x4025
 192 #define T_TXTOKENVALUE          0x4026
 193 #define T_RXTOKENVALUE          0x4027
 194 #define T_LOCALBUFFERSPACE      0x4028
 195 #define T_PEERBUFFERSPACE       0x4029
 196 #define T_CREDITSTOSEND         0x402A
 197 #define T_CPORTMODE             0x402B
 198 #define T_TC0TXMAXSDUSIZE       0x4060
 199 #define T_TC1TXMAXSDUSIZE       0x4061
 200
 201 /* Boolean attribute values */
 202 enum {
 203         FALSE = 0,
 204         TRUE,
 205 };
 206
 207 #endif /* _UNIPRO_H_ */