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1 /*
2 * UART driver for 68360 CPM SCC or SMC
3 * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6 *
7 * I used the serial.c driver as the framework for this driver.
8 * Give credit to those guys.
9 * The original code was written for the MBX860 board. I tried to make
10 * it generic, but there may be some assumptions in the structures that
11 * have to be fixed later.
12 * To save porting time, I did not bother to change any object names
13 * that are not accessed outside of this file.
14 * It still needs lots of work........When it was easy, I included code
15 * to support the SCCs, but this has never been tested, nor is it complete.
16 * Only the SCCs support modem control, so that is not complete either.
17 *
18 * This module exports the following rs232 io functions:
19 *
20 * int rs_360_init(void);
21 */
22
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/serialP.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/mm.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <asm/irq.h>
42 #include <asm/m68360.h>
43 #include <asm/commproc.h>
44
45
46 #ifdef CONFIG_KGDB
47 extern void breakpoint(void);
48 extern void set_debug_traps(void);
49 extern int kgdb_output_string (const char* s, unsigned int count);
50 #endif
51
52
53 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
54 #include <linux/console.h>
55
56 /* this defines the index into rs_table for the port to use
57 */
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
62
63 #if 0
64 /* SCC2 for console
65 */
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT 2
68 #endif
69
70
71 #define TX_WAKEUP ASYNC_SHARE_IRQ
72
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
75
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
78
79 /*
80 * Serial driver configuration section. Here are the various options:
81 */
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
85
86 /* Set of debugging defines */
87
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92
93 #define _INLINE_ inline
94
95 #define DBG_CNT(s)
96
97 /* We overload some of the items in the data structure to meet our
98 * needs. For example, the port address is the CPM parameter ram
99 * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
100 * 2 SMCs. The "hub6" field is used to indicate the channel number, with
101 * a flag indicating SCC or SMC, and the number is used as an index into
102 * the CPM parameter area for this device.
103 * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
104 * not currently used. I should probably use it to indicate the port
105 * type of SMC or SCC.
106 * The SMCs do not support any modem control signals.
107 */
108 #define smc_scc_num hub6
109 #define NUM_IS_SCC ((int)0x00010000)
110 #define PORT_NUM(P) ((P) & 0x0000ffff)
111
112
113 #if defined (CONFIG_UCQUICC)
114
115 volatile extern void *_periph_base;
116 /* sipex transceiver
117 * mode bits for are on pins
118 *
119 * SCC2 d16..19
120 * SCC3 d20..23
121 * SCC4 d24..27
122 */
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124
125 static uint sipex_mode_bits = 0x00000000;
126
127 #endif
128
129 /* There is no `serial_state' defined back here in 2.0.
130 * Try to get by with serial_struct
131 */
132 /* #define serial_state serial_struct */
133
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135 * extras: */
136
137 #if 0
138 struct async_icount_24 {
139 __u32 cts, dsr, rng, dcd, tx, rx;
140 __u32 frame, parity, overrun, brk;
141 __u32 buf_overrun;
142 } icount;
143 #endif
144
145 #if 0
146
147 struct serial_state {
148 int magic;
149 int baud_base;
150 unsigned long port;
151 int irq;
152 int flags;
153 int hub6;
154 int type;
155 int line;
156 int revision; /* Chip revision (950) */
157 int xmit_fifo_size;
158 int custom_divisor;
159 int count;
160 u8 *iomem_base;
161 u16 iomem_reg_shift;
162 unsigned short close_delay;
163 unsigned short closing_wait; /* time to wait before closing */
164 struct async_icount_24 icount;
165 int io_type;
166 struct async_struct *info;
167 };
168 #endif
169
170 #define SSTATE_MAGIC 0x5302
171
172
173
174 /* SMC2 is sometimes used for low performance TDM interfaces. Define
175 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176 * Define this as 0 if you wish to use SMC2 for something else.
177 */
178 #define USE_SMC2 1
179
180 #if 0
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
183
184 /* Define which SCC is the first one to use for a serial port. These
185 * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186 * for Ethernet, and the first available SCC for serial UART is SCC2.
187 * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188 * interrupt vectors in the table below to match.
189 */
190 #define SCC_IDX_BASE 1 /* table index */
191 #endif
192
193
194 /* Processors other than the 860 only get SMCs configured by default.
195 * Either they don't have SCCs or they are allocated somewhere else.
196 * Of course, there are now 860s without some SCCs, so we will need to
197 * address that someday.
198 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199 * stereo codec parts, and we use SMC2 to help support that.
200 */
201 static struct serial_state rs_table[] = {
202 /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
203 { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
204 #if USE_SMC2
205 ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
206 #endif
207
208 #if defined(CONFIG_SERIAL_68360_SCC)
209 ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
210 ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
211 ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
212 #endif
213 };
214
215 #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
216
217 /* The number of buffer descriptors and their sizes.
218 */
219 #define RX_NUM_FIFO 4
220 #define RX_BUF_SIZE 32
221 #define TX_NUM_FIFO 4
222 #define TX_BUF_SIZE 32
223
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
226
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228
229 /* The async_struct in serial.h does not really give us what we
230 * need, so define our own here.
231 */
232 typedef struct serial_info {
233 int magic;
234 int flags;
235
236 struct serial_state *state;
237 /* struct serial_struct *state; */
238 /* struct async_struct *state; */
239
240 struct tty_struct *tty;
241 int read_status_mask;
242 int ignore_status_mask;
243 int timeout;
244 int line;
245 int x_char; /* xon/xoff character */
246 int close_delay;
247 unsigned short closing_wait;
248 unsigned short closing_wait2;
249 unsigned long event;
250 unsigned long last_active;
251 int blocked_open; /* # of blocked opens */
252 struct work_struct tqueue;
253 struct work_struct tqueue_hangup;
254 wait_queue_head_t open_wait;
255 wait_queue_head_t close_wait;
256
257
258 /* CPM Buffer Descriptor pointers.
259 */
260 QUICC_BD *rx_bd_base;
261 QUICC_BD *rx_cur;
262 QUICC_BD *tx_bd_base;
263 QUICC_BD *tx_cur;
264 } ser_info_t;
265
266
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274
275 static inline int serial_paranoia_check(ser_info_t *info,
276 char *name, const char *routine)
277 {
278 #ifdef SERIAL_PARANOIA_CHECK
279 static const char *badmagic =
280 "Warning: bad magic number for serial struct (%s) in %s\n";
281 static const char *badinfo =
282 "Warning: null async_struct for (%s) in %s\n";
283
284 if (!info) {
285 printk(badinfo, name, routine);
286 return 1;
287 }
288 if (info->magic != SERIAL_MAGIC) {
289 printk(badmagic, name, routine);
290 return 1;
291 }
292 #endif
293 return 0;
294 }
295
296 /*
297 * This is used to figure out the divisor speeds and the timeouts,
298 * indexed by the termio value. The generic CPM functions are responsible
299 * for setting and assigning baud rate generators for us.
300 */
301 static int baud_table[] = {
302 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307 #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309 #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311 #define CONSOLE_BAUDRATE 115200
312 #else
313 #warning "console baud rate undefined"
314 #define CONSOLE_BAUDRATE 9600
315 #endif
316
317 /*
318 * ------------------------------------------------------------
319 * rs_stop() and rs_start()
320 *
321 * This routines are called before setting or resetting tty->stopped.
322 * They enable or disable transmitter interrupts, as necessary.
323 * ------------------------------------------------------------
324 */
325 static void rs_360_stop(struct tty_struct *tty)
326 {
327 ser_info_t *info = (ser_info_t *)tty->driver_data;
328 int idx;
329 unsigned long flags;
330 volatile struct scc_regs *sccp;
331 volatile struct smc_regs *smcp;
332
333 if (serial_paranoia_check(info, tty->name, "rs_stop"))
334 return;
335
336 local_irq_save(flags);
337 idx = PORT_NUM(info->state->smc_scc_num);
338 if (info->state->smc_scc_num & NUM_IS_SCC) {
339 sccp = &pquicc->scc_regs[idx];
340 sccp->scc_sccm &= ~UART_SCCM_TX;
341 } else {
342 /* smcp = &cpmp->cp_smc[idx]; */
343 smcp = &pquicc->smc_regs[idx];
344 smcp->smc_smcm &= ~SMCM_TX;
345 }
346 local_irq_restore(flags);
347 }
348
349
350 static void rs_360_start(struct tty_struct *tty)
351 {
352 ser_info_t *info = (ser_info_t *)tty->driver_data;
353 int idx;
354 unsigned long flags;
355 volatile struct scc_regs *sccp;
356 volatile struct smc_regs *smcp;
357
358 if (serial_paranoia_check(info, tty->name, "rs_stop"))
359 return;
360
361 local_irq_save(flags);
362 idx = PORT_NUM(info->state->smc_scc_num);
363 if (info->state->smc_scc_num & NUM_IS_SCC) {
364 sccp = &pquicc->scc_regs[idx];
365 sccp->scc_sccm |= UART_SCCM_TX;
366 } else {
367 smcp = &pquicc->smc_regs[idx];
368 smcp->smc_smcm |= SMCM_TX;
369 }
370 local_irq_restore(flags);
371 }
372
373 /*
374 * ----------------------------------------------------------------------
375 *
376 * Here starts the interrupt handling routines. All of the following
377 * subroutines are declared as inline and are folded into
378 * rs_interrupt(). They were separated out for readability's sake.
379 *
380 * Note: rs_interrupt() is a "fast" interrupt, which means that it
381 * runs with interrupts turned off. People who may want to modify
382 * rs_interrupt() should try to keep the interrupt handler as fast as
383 * possible. After you are done making modifications, it is not a bad
384 * idea to do:
385 *
386 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
387 *
388 * and look at the resulting assemble code in serial.s.
389 *
390 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391 * -----------------------------------------------------------------------
392 */
393
394 static _INLINE_ void receive_chars(ser_info_t *info)
395 {
396 struct tty_struct *tty = info->tty;
397 unsigned char ch, flag, *cp;
398 /*int ignored = 0;*/
399 int i;
400 ushort status;
401 struct async_icount *icount;
402 /* struct async_icount_24 *icount; */
403 volatile QUICC_BD *bdp;
404
405 icount = &info->state->icount;
406
407 /* Just loop through the closed BDs and copy the characters into
408 * the buffer.
409 */
410 bdp = info->rx_cur;
411 for (;;) {
412 if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
413 break; /* we are all done */
414
415 /* The read status mask tell us what we should do with
416 * incoming characters, especially if errors occur.
417 * One special case is the use of BD_SC_EMPTY. If
418 * this is not set, we are supposed to be ignoring
419 * inputs. In this case, just mark the buffer empty and
420 * continue.
421 */
422 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423 bdp->status |= BD_SC_EMPTY;
424 bdp->status &=
425 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426
427 if (bdp->status & BD_SC_WRAP)
428 bdp = info->rx_bd_base;
429 else
430 bdp++;
431 continue;
432 }
433
434 /* Get the number of characters and the buffer pointer.
435 */
436 i = bdp->length;
437 /* cp = (unsigned char *)__va(bdp->buf); */
438 cp = (char *)bdp->buf;
439 status = bdp->status;
440
441 while (i-- > 0) {
442 ch = *cp++;
443 icount->rx++;
444
445 #ifdef SERIAL_DEBUG_INTR
446 printk("DR%02x:%02x...", ch, status);
447 #endif
448 flag = TTY_NORMAL;
449
450 if (status & (BD_SC_BR | BD_SC_FR |
451 BD_SC_PR | BD_SC_OV)) {
452 /*
453 * For statistics only
454 */
455 if (status & BD_SC_BR)
456 icount->brk++;
457 else if (status & BD_SC_PR)
458 icount->parity++;
459 else if (status & BD_SC_FR)
460 icount->frame++;
461 if (status & BD_SC_OV)
462 icount->overrun++;
463
464 /*
465 * Now check to see if character should be
466 * ignored, and mask off conditions which
467 * should be ignored.
468 if (status & info->ignore_status_mask) {
469 if (++ignored > 100)
470 break;
471 continue;
472 }
473 */
474 status &= info->read_status_mask;
475
476 if (status & (BD_SC_BR)) {
477 #ifdef SERIAL_DEBUG_INTR
478 printk("handling break....");
479 #endif
480 *tty->flip.flag_buf_ptr = TTY_BREAK;
481 if (info->flags & ASYNC_SAK)
482 do_SAK(tty);
483 } else if (status & BD_SC_PR)
484 flag = TTY_PARITY;
485 else if (status & BD_SC_FR)
486 flag = TTY_FRAME;
487 }
488 tty_insert_flip_char(tty, ch, flag);
489 if (status & BD_SC_OV)
490 /*
491 * Overrun is special, since it's
492 * reported immediately, and doesn't
493 * affect the current character
494 */
495 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
496 }
497
498 /* This BD is ready to be used again. Clear status.
499 * Get next BD.
500 */
501 bdp->status |= BD_SC_EMPTY;
502 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
503
504 if (bdp->status & BD_SC_WRAP)
505 bdp = info->rx_bd_base;
506 else
507 bdp++;
508 }
509
510 info->rx_cur = (QUICC_BD *)bdp;
511
512 tty_schedule_flip(tty);
513 }
514
515 static _INLINE_ void receive_break(ser_info_t *info)
516 {
517 struct tty_struct *tty = info->tty;
518
519 info->state->icount.brk++;
520 /* Check to see if there is room in the tty buffer for
521 * the break. If not, we exit now, losing the break. FIXME
522 */
523 tty_insert_flip_char(tty, 0, TTY_BREAK);
524 tty_schedule_flip(tty);
525 }
526
527 static _INLINE_ void transmit_chars(ser_info_t *info)
528 {
529
530 if ((info->flags & TX_WAKEUP) ||
531 (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
532 schedule_work(&info->tqueue);
533 }
534
535 #ifdef SERIAL_DEBUG_INTR
536 printk("THRE...");
537 #endif
538 }
539
540 #ifdef notdef
541 /* I need to do this for the SCCs, so it is left as a reminder.
542 */
543 static _INLINE_ void check_modem_status(struct async_struct *info)
544 {
545 int status;
546 /* struct async_icount *icount; */
547 struct async_icount_24 *icount;
548
549 status = serial_in(info, UART_MSR);
550
551 if (status & UART_MSR_ANY_DELTA) {
552 icount = &info->state->icount;
553 /* update input line counters */
554 if (status & UART_MSR_TERI)
555 icount->rng++;
556 if (status & UART_MSR_DDSR)
557 icount->dsr++;
558 if (status & UART_MSR_DDCD) {
559 icount->dcd++;
560 #ifdef CONFIG_HARD_PPS
561 if ((info->flags & ASYNC_HARDPPS_CD) &&
562 (status & UART_MSR_DCD))
563 hardpps();
564 #endif
565 }
566 if (status & UART_MSR_DCTS)
567 icount->cts++;
568 wake_up_interruptible(&info->delta_msr_wait);
569 }
570
571 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
572 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
573 printk("ttys%d CD now %s...", info->line,
574 (status & UART_MSR_DCD) ? "on" : "off");
575 #endif
576 if (status & UART_MSR_DCD)
577 wake_up_interruptible(&info->open_wait);
578 else {
579 #ifdef SERIAL_DEBUG_OPEN
580 printk("scheduling hangup...");
581 #endif
582 queue_task(&info->tqueue_hangup,
583 &tq_scheduler);
584 }
585 }
586 if (info->flags & ASYNC_CTS_FLOW) {
587 if (info->tty->hw_stopped) {
588 if (status & UART_MSR_CTS) {
589 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
590 printk("CTS tx start...");
591 #endif
592 info->tty->hw_stopped = 0;
593 info->IER |= UART_IER_THRI;
594 serial_out(info, UART_IER, info->IER);
595 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
596 return;
597 }
598 } else {
599 if (!(status & UART_MSR_CTS)) {
600 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
601 printk("CTS tx stop...");
602 #endif
603 info->tty->hw_stopped = 1;
604 info->IER &= ~UART_IER_THRI;
605 serial_out(info, UART_IER, info->IER);
606 }
607 }
608 }
609 }
610 #endif
611
612 /*
613 * This is the serial driver's interrupt routine for a single port
614 */
615 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
616 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
617 {
618 u_char events;
619 int idx;
620 ser_info_t *info;
621 volatile struct smc_regs *smcp;
622 volatile struct scc_regs *sccp;
623
624 info = (ser_info_t *)dev_id;
625
626 idx = PORT_NUM(info->state->smc_scc_num);
627 if (info->state->smc_scc_num & NUM_IS_SCC) {
628 sccp = &pquicc->scc_regs[idx];
629 events = sccp->scc_scce;
630 if (events & SCCM_RX)
631 receive_chars(info);
632 if (events & SCCM_TX)
633 transmit_chars(info);
634 sccp->scc_scce = events;
635 } else {
636 smcp = &pquicc->smc_regs[idx];
637 events = smcp->smc_smce;
638 if (events & SMCM_BRKE)
639 receive_break(info);
640 if (events & SMCM_RX)
641 receive_chars(info);
642 if (events & SMCM_TX)
643 transmit_chars(info);
644 smcp->smc_smce = events;
645 }
646
647 #ifdef SERIAL_DEBUG_INTR
648 printk("rs_interrupt_single(%d, %x)...",
649 info->state->smc_scc_num, events);
650 #endif
651 #ifdef modem_control
652 check_modem_status(info);
653 #endif
654 info->last_active = jiffies;
655 #ifdef SERIAL_DEBUG_INTR
656 printk("end.\n");
657 #endif
658 }
659
660
661 /*
662 * -------------------------------------------------------------------
663 * Here ends the serial interrupt routines.
664 * -------------------------------------------------------------------
665 */
666
667
668 static void do_softint(void *private_)
669 {
670 ser_info_t *info = (ser_info_t *) private_;
671 struct tty_struct *tty;
672
673 tty = info->tty;
674 if (!tty)
675 return;
676
677 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
678 tty_wakeup(tty);
679 }
680
681
682 /*
683 * This routine is called from the scheduler tqueue when the interrupt
684 * routine has signalled that a hangup has occurred. The path of
685 * hangup processing is:
686 *
687 * serial interrupt routine -> (scheduler tqueue) ->
688 * do_serial_hangup() -> tty->hangup() -> rs_hangup()
689 *
690 */
691 static void do_serial_hangup(void *private_)
692 {
693 struct async_struct *info = (struct async_struct *) private_;
694 struct tty_struct *tty;
695
696 tty = info->tty;
697 if (!tty)
698 return;
699
700 tty_hangup(tty);
701 }
702
703
704 static int startup(ser_info_t *info)
705 {
706 unsigned long flags;
707 int retval=0;
708 int idx;
709 /*struct serial_state *state = info->state;*/
710 volatile struct smc_regs *smcp;
711 volatile struct scc_regs *sccp;
712 volatile struct smc_uart_pram *up;
713 volatile struct uart_pram *scup;
714
715
716 local_irq_save(flags);
717
718 if (info->flags & ASYNC_INITIALIZED) {
719 goto errout;
720 }
721
722 #ifdef maybe
723 if (!state->port || !state->type) {
724 if (info->tty)
725 set_bit(TTY_IO_ERROR, &info->tty->flags);
726 goto errout;
727 }
728 #endif
729
730 #ifdef SERIAL_DEBUG_OPEN
731 printk("starting up ttys%d (irq %d)...", info->line, state->irq);
732 #endif
733
734
735 #ifdef modem_control
736 info->MCR = 0;
737 if (info->tty->termios->c_cflag & CBAUD)
738 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
739 #endif
740
741 if (info->tty)
742 clear_bit(TTY_IO_ERROR, &info->tty->flags);
743
744 /*
745 * and set the speed of the serial port
746 */
747 change_speed(info);
748
749 idx = PORT_NUM(info->state->smc_scc_num);
750 if (info->state->smc_scc_num & NUM_IS_SCC) {
751 sccp = &pquicc->scc_regs[idx];
752 scup = &pquicc->pram[info->state->port].scc.pscc.u;
753
754 scup->mrblr = RX_BUF_SIZE;
755 scup->max_idl = RX_BUF_SIZE;
756
757 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
758 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
759
760 } else {
761 smcp = &pquicc->smc_regs[idx];
762
763 /* Enable interrupts and I/O.
764 */
765 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
766 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
767
768 /* We can tune the buffer length and idle characters
769 * to take advantage of the entire incoming buffer size.
770 * If mrblr is something other than 1, maxidl has to be
771 * non-zero or we never get an interrupt. The maxidl
772 * is the number of character times we wait after reception
773 * of the last character before we decide no more characters
774 * are coming.
775 */
776 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
777 /* holy unionized structures, Batman: */
778 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
779
780 up->mrblr = RX_BUF_SIZE;
781 up->max_idl = RX_BUF_SIZE;
782
783 up->brkcr = 1; /* number of break chars */
784 }
785
786 info->flags |= ASYNC_INITIALIZED;
787 local_irq_restore(flags);
788 return 0;
789
790 errout:
791 local_irq_restore(flags);
792 return retval;
793 }
794
795 /*
796 * This routine will shutdown a serial port; interrupts are disabled, and
797 * DTR is dropped if the hangup on close termio flag is on.
798 */
799 static void shutdown(ser_info_t *info)
800 {
801 unsigned long flags;
802 struct serial_state *state;
803 int idx;
804 volatile struct smc_regs *smcp;
805 volatile struct scc_regs *sccp;
806
807 if (!(info->flags & ASYNC_INITIALIZED))
808 return;
809
810 state = info->state;
811
812 #ifdef SERIAL_DEBUG_OPEN
813 printk("Shutting down serial port %d (irq %d)....", info->line,
814 state->irq);
815 #endif
816
817 local_irq_save(flags);
818
819 idx = PORT_NUM(state->smc_scc_num);
820 if (state->smc_scc_num & NUM_IS_SCC) {
821 sccp = &pquicc->scc_regs[idx];
822 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
823 #ifdef CONFIG_SERIAL_CONSOLE
824 /* We can't disable the transmitter if this is the
825 * system console.
826 */
827 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
828 #endif
829 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
830 } else {
831 smcp = &pquicc->smc_regs[idx];
832
833 /* Disable interrupts and I/O.
834 */
835 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
836 #ifdef CONFIG_SERIAL_CONSOLE
837 /* We can't disable the transmitter if this is the
838 * system console.
839 */
840 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
841 #endif
842 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
843 }
844
845 if (info->tty)
846 set_bit(TTY_IO_ERROR, &info->tty->flags);
847
848 info->flags &= ~ASYNC_INITIALIZED;
849 local_irq_restore(flags);
850 }
851
852 /*
853 * This routine is called to set the UART divisor registers to match
854 * the specified baud rate for a serial port.
855 */
856 static void change_speed(ser_info_t *info)
857 {
858 int baud_rate;
859 unsigned cflag, cval, scval, prev_mode;
860 int i, bits, sbits, idx;
861 unsigned long flags;
862 struct serial_state *state;
863 volatile struct smc_regs *smcp;
864 volatile struct scc_regs *sccp;
865
866 if (!info->tty || !info->tty->termios)
867 return;
868 cflag = info->tty->termios->c_cflag;
869
870 state = info->state;
871
872 /* Character length programmed into the mode register is the
873 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
874 * 1 or 2 stop bits, minus 1.
875 * The value 'bits' counts this for us.
876 */
877 cval = 0;
878 scval = 0;
879
880 /* byte size and parity */
881 switch (cflag & CSIZE) {
882 case CS5: bits = 5; break;
883 case CS6: bits = 6; break;
884 case CS7: bits = 7; break;
885 case CS8: bits = 8; break;
886 /* Never happens, but GCC is too dumb to figure it out */
887 default: bits = 8; break;
888 }
889 sbits = bits - 5;
890
891 if (cflag & CSTOPB) {
892 cval |= SMCMR_SL; /* Two stops */
893 scval |= SCU_PMSR_SL;
894 bits++;
895 }
896 if (cflag & PARENB) {
897 cval |= SMCMR_PEN;
898 scval |= SCU_PMSR_PEN;
899 bits++;
900 }
901 if (!(cflag & PARODD)) {
902 cval |= SMCMR_PM_EVEN;
903 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
904 }
905
906 /* Determine divisor based on baud rate */
907 i = cflag & CBAUD;
908 if (i >= (sizeof(baud_table)/sizeof(int)))
909 baud_rate = 9600;
910 else
911 baud_rate = baud_table[i];
912
913 info->timeout = (TX_BUF_SIZE*HZ*bits);
914 info->timeout += HZ/50; /* Add .02 seconds of slop */
915
916 #ifdef modem_control
917 /* CTS flow control flag and modem status interrupts */
918 info->IER &= ~UART_IER_MSI;
919 if (info->flags & ASYNC_HARDPPS_CD)
920 info->IER |= UART_IER_MSI;
921 if (cflag & CRTSCTS) {
922 info->flags |= ASYNC_CTS_FLOW;
923 info->IER |= UART_IER_MSI;
924 } else
925 info->flags &= ~ASYNC_CTS_FLOW;
926 if (cflag & CLOCAL)
927 info->flags &= ~ASYNC_CHECK_CD;
928 else {
929 info->flags |= ASYNC_CHECK_CD;
930 info->IER |= UART_IER_MSI;
931 }
932 serial_out(info, UART_IER, info->IER);
933 #endif
934
935 /*
936 * Set up parity check flag
937 */
938 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
939
940 info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
941 if (I_INPCK(info->tty))
942 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
943 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
944 info->read_status_mask |= BD_SC_BR;
945
946 /*
947 * Characters to ignore
948 */
949 info->ignore_status_mask = 0;
950 if (I_IGNPAR(info->tty))
951 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
952 if (I_IGNBRK(info->tty)) {
953 info->ignore_status_mask |= BD_SC_BR;
954 /*
955 * If we're ignore parity and break indicators, ignore
956 * overruns too. (For real raw support).
957 */
958 if (I_IGNPAR(info->tty))
959 info->ignore_status_mask |= BD_SC_OV;
960 }
961 /*
962 * !!! ignore all characters if CREAD is not set
963 */
964 if ((cflag & CREAD) == 0)
965 info->read_status_mask &= ~BD_SC_EMPTY;
966 local_irq_save(flags);
967
968 /* Start bit has not been added (so don't, because we would just
969 * subtract it later), and we need to add one for the number of
970 * stops bits (there is always at least one).
971 */
972 bits++;
973 idx = PORT_NUM(state->smc_scc_num);
974 if (state->smc_scc_num & NUM_IS_SCC) {
975 sccp = &pquicc->scc_regs[idx];
976 sccp->scc_psmr = (sbits << 12) | scval;
977 } else {
978 smcp = &pquicc->smc_regs[idx];
979
980 /* Set the mode register. We want to keep a copy of the
981 * enables, because we want to put them back if they were
982 * present.
983 */
984 prev_mode = smcp->smc_smcmr;
985 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
986 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
987 }
988
989 m360_cpm_setbrg((state - rs_table), baud_rate);
990
991 local_irq_restore(flags);
992 }
993
994 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
995 {
996 ser_info_t *info = (ser_info_t *)tty->driver_data;
997 volatile QUICC_BD *bdp;
998
999 if (serial_paranoia_check(info, tty->name, "rs_put_char"))
1000 return;
1001
1002 if (!tty)
1003 return;
1004
1005 bdp = info->tx_cur;
1006 while (bdp->status & BD_SC_READY);
1007
1008 /* *((char *)__va(bdp->buf)) = ch; */
1009 *((char *)bdp->buf) = ch;
1010 bdp->length = 1;
1011 bdp->status |= BD_SC_READY;
1012
1013 /* Get next BD.
1014 */
1015 if (bdp->status & BD_SC_WRAP)
1016 bdp = info->tx_bd_base;
1017 else
1018 bdp++;
1019
1020 info->tx_cur = (QUICC_BD *)bdp;
1021
1022 }
1023
1024 static int rs_360_write(struct tty_struct * tty,
1025 const unsigned char *buf, int count)
1026 {
1027 int c, ret = 0;
1028 ser_info_t *info = (ser_info_t *)tty->driver_data;
1029 volatile QUICC_BD *bdp;
1030
1031 #ifdef CONFIG_KGDB
1032 /* Try to let stub handle output. Returns true if it did. */
1033 if (kgdb_output_string(buf, count))
1034 return ret;
1035 #endif
1036
1037 if (serial_paranoia_check(info, tty->name, "rs_write"))
1038 return 0;
1039
1040 if (!tty)
1041 return 0;
1042
1043 bdp = info->tx_cur;
1044
1045 while (1) {
1046 c = min(count, TX_BUF_SIZE);
1047
1048 if (c <= 0)
1049 break;
1050
1051 if (bdp->status & BD_SC_READY) {
1052 info->flags |= TX_WAKEUP;
1053 break;
1054 }
1055
1056 /* memcpy(__va(bdp->buf), buf, c); */
1057 memcpy((void *)bdp->buf, buf, c);
1058
1059 bdp->length = c;
1060 bdp->status |= BD_SC_READY;
1061
1062 buf += c;
1063 count -= c;
1064 ret += c;
1065
1066 /* Get next BD.
1067 */
1068 if (bdp->status & BD_SC_WRAP)
1069 bdp = info->tx_bd_base;
1070 else
1071 bdp++;
1072 info->tx_cur = (QUICC_BD *)bdp;
1073 }
1074 return ret;
1075 }
1076
1077 static int rs_360_write_room(struct tty_struct *tty)
1078 {
1079 ser_info_t *info = (ser_info_t *)tty->driver_data;
1080 int ret;
1081
1082 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1083 return 0;
1084
1085 if ((info->tx_cur->status & BD_SC_READY) == 0) {
1086 info->flags &= ~TX_WAKEUP;
1087 ret = TX_BUF_SIZE;
1088 }
1089 else {
1090 info->flags |= TX_WAKEUP;
1091 ret = 0;
1092 }
1093 return ret;
1094 }
1095
1096 /* I could track this with transmit counters....maybe later.
1097 */
1098 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1099 {
1100 ser_info_t *info = (ser_info_t *)tty->driver_data;
1101
1102 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1103 return 0;
1104 return 0;
1105 }
1106
1107 static void rs_360_flush_buffer(struct tty_struct *tty)
1108 {
1109 ser_info_t *info = (ser_info_t *)tty->driver_data;
1110
1111 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1112 return;
1113
1114 /* There is nothing to "flush", whatever we gave the CPM
1115 * is on its way out.
1116 */
1117 tty_wakeup(tty);
1118 info->flags &= ~TX_WAKEUP;
1119 }
1120
1121 /*
1122 * This function is used to send a high-priority XON/XOFF character to
1123 * the device
1124 */
1125 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1126 {
1127 volatile QUICC_BD *bdp;
1128
1129 ser_info_t *info = (ser_info_t *)tty->driver_data;
1130
1131 if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1132 return;
1133
1134 bdp = info->tx_cur;
1135 while (bdp->status & BD_SC_READY);
1136
1137 /* *((char *)__va(bdp->buf)) = ch; */
1138 *((char *)bdp->buf) = ch;
1139 bdp->length = 1;
1140 bdp->status |= BD_SC_READY;
1141
1142 /* Get next BD.
1143 */
1144 if (bdp->status & BD_SC_WRAP)
1145 bdp = info->tx_bd_base;
1146 else
1147 bdp++;
1148
1149 info->tx_cur = (QUICC_BD *)bdp;
1150 }
1151
1152 /*
1153 * ------------------------------------------------------------
1154 * rs_throttle()
1155 *
1156 * This routine is called by the upper-layer tty layer to signal that
1157 * incoming characters should be throttled.
1158 * ------------------------------------------------------------
1159 */
1160 static void rs_360_throttle(struct tty_struct * tty)
1161 {
1162 ser_info_t *info = (ser_info_t *)tty->driver_data;
1163 #ifdef SERIAL_DEBUG_THROTTLE
1164 char buf[64];
1165
1166 printk("throttle %s: %d....\n", _tty_name(tty, buf),
1167 tty->ldisc.chars_in_buffer(tty));
1168 #endif
1169
1170 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1171 return;
1172
1173 if (I_IXOFF(tty))
1174 rs_360_send_xchar(tty, STOP_CHAR(tty));
1175
1176 #ifdef modem_control
1177 if (tty->termios->c_cflag & CRTSCTS)
1178 info->MCR &= ~UART_MCR_RTS;
1179
1180 local_irq_disable();
1181 serial_out(info, UART_MCR, info->MCR);
1182 local_irq_enable();
1183 #endif
1184 }
1185
1186 static void rs_360_unthrottle(struct tty_struct * tty)
1187 {
1188 ser_info_t *info = (ser_info_t *)tty->driver_data;
1189 #ifdef SERIAL_DEBUG_THROTTLE
1190 char buf[64];
1191
1192 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1193 tty->ldisc.chars_in_buffer(tty));
1194 #endif
1195
1196 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1197 return;
1198
1199 if (I_IXOFF(tty)) {
1200 if (info->x_char)
1201 info->x_char = 0;
1202 else
1203 rs_360_send_xchar(tty, START_CHAR(tty));
1204 }
1205 #ifdef modem_control
1206 if (tty->termios->c_cflag & CRTSCTS)
1207 info->MCR |= UART_MCR_RTS;
1208 local_irq_disable();
1209 serial_out(info, UART_MCR, info->MCR);
1210 local_irq_enable();
1211 #endif
1212 }
1213
1214 /*
1215 * ------------------------------------------------------------
1216 * rs_ioctl() and friends
1217 * ------------------------------------------------------------
1218 */
1219
1220 #ifdef maybe
1221 /*
1222 * get_lsr_info - get line status register info
1223 *
1224 * Purpose: Let user call ioctl() to get info when the UART physically
1225 * is emptied. On bus types like RS485, the transmitter must
1226 * release the bus after transmitting. This must be done when
1227 * the transmit shift register is empty, not be done when the
1228 * transmit holding register is empty. This functionality
1229 * allows an RS485 driver to be written in user space.
1230 */
1231 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1232 {
1233 unsigned char status;
1234 unsigned int result;
1235
1236 local_irq_disable();
1237 status = serial_in(info, UART_LSR);
1238 local_irq_enable();
1239 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1240 return put_user(result,value);
1241 }
1242 #endif
1243
1244 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1245 {
1246 ser_info_t *info = (ser_info_t *)tty->driver_data;
1247 unsigned int result = 0;
1248 #ifdef modem_control
1249 unsigned char control, status;
1250
1251 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1252 return -ENODEV;
1253
1254 if (tty->flags & (1 << TTY_IO_ERROR))
1255 return -EIO;
1256
1257 control = info->MCR;
1258 local_irq_disable();
1259 status = serial_in(info, UART_MSR);
1260 local_irq_enable();
1261 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1262 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1263 #ifdef TIOCM_OUT1
1264 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1265 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1266 #endif
1267 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
1268 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
1269 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
1270 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1271 #endif
1272 return result;
1273 }
1274
1275 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1276 unsigned int set, unsigned int clear)
1277 {
1278 #ifdef modem_control
1279 ser_info_t *info = (ser_info_t *)tty->driver_data;
1280 unsigned int arg;
1281
1282 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1283 return -ENODEV;
1284
1285 if (tty->flags & (1 << TTY_IO_ERROR))
1286 return -EIO;
1287
1288 if (set & TIOCM_RTS)
1289 info->mcr |= UART_MCR_RTS;
1290 if (set & TIOCM_DTR)
1291 info->mcr |= UART_MCR_DTR;
1292 if (clear & TIOCM_RTS)
1293 info->MCR &= ~UART_MCR_RTS;
1294 if (clear & TIOCM_DTR)
1295 info->MCR &= ~UART_MCR_DTR;
1296
1297 #ifdef TIOCM_OUT1
1298 if (set & TIOCM_OUT1)
1299 info->MCR |= UART_MCR_OUT1;
1300 if (set & TIOCM_OUT2)
1301 info->MCR |= UART_MCR_OUT2;
1302 if (clear & TIOCM_OUT1)
1303 info->MCR &= ~UART_MCR_OUT1;
1304 if (clear & TIOCM_OUT2)
1305 info->MCR &= ~UART_MCR_OUT2;
1306 #endif
1307
1308 local_irq_disable();
1309 serial_out(info, UART_MCR, info->MCR);
1310 local_irq_enable();
1311 #endif
1312 return 0;
1313 }
1314
1315 /* Sending a break is a two step process on the SMC/SCC. It is accomplished
1316 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1317 * command. We take advantage of the begin/end functions to make this
1318 * happen.
1319 */
1320 static ushort smc_chan_map[] = {
1321 CPM_CR_CH_SMC1,
1322 CPM_CR_CH_SMC2
1323 };
1324
1325 static ushort scc_chan_map[] = {
1326 CPM_CR_CH_SCC1,
1327 CPM_CR_CH_SCC2,
1328 CPM_CR_CH_SCC3,
1329 CPM_CR_CH_SCC4
1330 };
1331
1332 static void begin_break(ser_info_t *info)
1333 {
1334 volatile QUICC *cp;
1335 ushort chan;
1336 int idx;
1337
1338 cp = pquicc;
1339
1340 idx = PORT_NUM(info->state->smc_scc_num);
1341 if (info->state->smc_scc_num & NUM_IS_SCC)
1342 chan = scc_chan_map[idx];
1343 else
1344 chan = smc_chan_map[idx];
1345
1346 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1347 while (cp->cp_cr & CPM_CR_FLG);
1348 }
1349
1350 static void end_break(ser_info_t *info)
1351 {
1352 volatile QUICC *cp;
1353 ushort chan;
1354 int idx;
1355
1356 cp = pquicc;
1357
1358 idx = PORT_NUM(info->state->smc_scc_num);
1359 if (info->state->smc_scc_num & NUM_IS_SCC)
1360 chan = scc_chan_map[idx];
1361 else
1362 chan = smc_chan_map[idx];
1363
1364 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1365 while (cp->cp_cr & CPM_CR_FLG);
1366 }
1367
1368 /*
1369 * This routine sends a break character out the serial port.
1370 */
1371 static void send_break(ser_info_t *info, unsigned int duration)
1372 {
1373 #ifdef SERIAL_DEBUG_SEND_BREAK
1374 printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1375 #endif
1376 begin_break(info);
1377 msleep_interruptible(duration);
1378 end_break(info);
1379 #ifdef SERIAL_DEBUG_SEND_BREAK
1380 printk("done jiffies=%lu\n", jiffies);
1381 #endif
1382 }
1383
1384
1385 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1386 unsigned int cmd, unsigned long arg)
1387 {
1388 int error;
1389 ser_info_t *info = (ser_info_t *)tty->driver_data;
1390 int retval;
1391 struct async_icount cnow;
1392 /* struct async_icount_24 cnow;*/ /* kernel counter temps */
1393 struct serial_icounter_struct *p_cuser; /* user space */
1394
1395 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1396 return -ENODEV;
1397
1398 if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1399 if (tty->flags & (1 << TTY_IO_ERROR))
1400 return -EIO;
1401 }
1402
1403 switch (cmd) {
1404 case TCSBRK: /* SVID version: non-zero arg --> no break */
1405 retval = tty_check_change(tty);
1406 if (retval)
1407 return retval;
1408 tty_wait_until_sent(tty, 0);
1409 if (signal_pending(current))
1410 return -EINTR;
1411 if (!arg) {
1412 send_break(info, 250); /* 1/4 second */
1413 if (signal_pending(current))
1414 return -EINTR;
1415 }
1416 return 0;
1417 case TCSBRKP: /* support for POSIX tcsendbreak() */
1418 retval = tty_check_change(tty);
1419 if (retval)
1420 return retval;
1421 tty_wait_until_sent(tty, 0);
1422 if (signal_pending(current))
1423 return -EINTR;
1424 send_break(info, arg ? arg*100 : 250);
1425 if (signal_pending(current))
1426 return -EINTR;
1427 return 0;
1428 case TIOCSBRK:
1429 retval = tty_check_change(tty);
1430 if (retval)
1431 return retval;
1432 tty_wait_until_sent(tty, 0);
1433 begin_break(info);
1434 return 0;
1435 case TIOCCBRK:
1436 retval = tty_check_change(tty);
1437 if (retval)
1438 return retval;
1439 end_break(info);
1440 return 0;
1441 case TIOCGSOFTCAR:
1442 /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1443 put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1444 return 0;
1445 case TIOCSSOFTCAR:
1446 error = get_user(arg, (unsigned int *) arg);
1447 if (error)
1448 return error;
1449 tty->termios->c_cflag =
1450 ((tty->termios->c_cflag & ~CLOCAL) |
1451 (arg ? CLOCAL : 0));
1452 return 0;
1453 #ifdef maybe
1454 case TIOCSERGETLSR: /* Get line status register */
1455 return get_lsr_info(info, (unsigned int *) arg);
1456 #endif
1457 /*
1458 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1459 * - mask passed in arg for lines of interest
1460 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1461 * Caller should use TIOCGICOUNT to see which one it was
1462 */
1463 case TIOCMIWAIT:
1464 #ifdef modem_control
1465 local_irq_disable();
1466 /* note the counters on entry */
1467 cprev = info->state->icount;
1468 local_irq_enable();
1469 while (1) {
1470 interruptible_sleep_on(&info->delta_msr_wait);
1471 /* see if a signal did it */
1472 if (signal_pending(current))
1473 return -ERESTARTSYS;
1474 local_irq_disable();
1475 cnow = info->state->icount; /* atomic copy */
1476 local_irq_enable();
1477 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1478 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1479 return -EIO; /* no change => error */
1480 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1481 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1482 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1483 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1484 return 0;
1485 }
1486 cprev = cnow;
1487 }
1488 /* NOTREACHED */
1489 #else
1490 return 0;
1491 #endif
1492
1493 /*
1494 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1495 * Return: write counters to the user passed counter struct
1496 * NB: both 1->0 and 0->1 transitions are counted except for
1497 * RI where only 0->1 is counted.
1498 */
1499 case TIOCGICOUNT:
1500 local_irq_disable();
1501 cnow = info->state->icount;
1502 local_irq_enable();
1503 p_cuser = (struct serial_icounter_struct *) arg;
1504 /* error = put_user(cnow.cts, &p_cuser->cts); */
1505 /* if (error) return error; */
1506 /* error = put_user(cnow.dsr, &p_cuser->dsr); */
1507 /* if (error) return error; */
1508 /* error = put_user(cnow.rng, &p_cuser->rng); */
1509 /* if (error) return error; */
1510 /* error = put_user(cnow.dcd, &p_cuser->dcd); */
1511 /* if (error) return error; */
1512
1513 put_user(cnow.cts, &p_cuser->cts);
1514 put_user(cnow.dsr, &p_cuser->dsr);
1515 put_user(cnow.rng, &p_cuser->rng);
1516 put_user(cnow.dcd, &p_cuser->dcd);
1517 return 0;
1518
1519 default:
1520 return -ENOIOCTLCMD;
1521 }
1522 return 0;
1523 }
1524
1525 /* FIX UP modem control here someday......
1526 */
1527 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1528 {
1529 ser_info_t *info = (ser_info_t *)tty->driver_data;
1530
1531 if ( (tty->termios->c_cflag == old_termios->c_cflag)
1532 && ( RELEVANT_IFLAG(tty->termios->c_iflag)
1533 == RELEVANT_IFLAG(old_termios->c_iflag)))
1534 return;
1535
1536 change_speed(info);
1537
1538 #ifdef modem_control
1539 /* Handle transition to B0 status */
1540 if ((old_termios->c_cflag & CBAUD) &&
1541 !(tty->termios->c_cflag & CBAUD)) {
1542 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1543 local_irq_disable();
1544 serial_out(info, UART_MCR, info->MCR);
1545 local_irq_enable();
1546 }
1547
1548 /* Handle transition away from B0 status */
1549 if (!(old_termios->c_cflag & CBAUD) &&
1550 (tty->termios->c_cflag & CBAUD)) {
1551 info->MCR |= UART_MCR_DTR;
1552 if (!tty->hw_stopped ||
1553 !(tty->termios->c_cflag & CRTSCTS)) {
1554 info->MCR |= UART_MCR_RTS;
1555 }
1556 local_irq_disable();
1557 serial_out(info, UART_MCR, info->MCR);
1558 local_irq_enable();
1559 }
1560
1561 /* Handle turning off CRTSCTS */
1562 if ((old_termios->c_cflag & CRTSCTS) &&
1563 !(tty->termios->c_cflag & CRTSCTS)) {
1564 tty->hw_stopped = 0;
1565 rs_360_start(tty);
1566 }
1567 #endif
1568
1569 #if 0
1570 /*
1571 * No need to wake up processes in open wait, since they
1572 * sample the CLOCAL flag once, and don't recheck it.
1573 * XXX It's not clear whether the current behavior is correct
1574 * or not. Hence, this may change.....
1575 */
1576 if (!(old_termios->c_cflag & CLOCAL) &&
1577 (tty->termios->c_cflag & CLOCAL))
1578 wake_up_interruptible(&info->open_wait);
1579 #endif
1580 }
1581
1582 /*
1583 * ------------------------------------------------------------
1584 * rs_close()
1585 *
1586 * This routine is called when the serial port gets closed. First, we
1587 * wait for the last remaining data to be sent. Then, we unlink its
1588 * async structure from the interrupt chain if necessary, and we free
1589 * that IRQ if nothing is left in the chain.
1590 * ------------------------------------------------------------
1591 */
1592 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1593 {
1594 ser_info_t *info = (ser_info_t *)tty->driver_data;
1595 /* struct async_state *state; */
1596 struct serial_state *state;
1597 unsigned long flags;
1598 int idx;
1599 volatile struct smc_regs *smcp;
1600 volatile struct scc_regs *sccp;
1601
1602 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1603 return;
1604
1605 state = info->state;
1606
1607 local_irq_save(flags);
1608
1609 if (tty_hung_up_p(filp)) {
1610 DBG_CNT("before DEC-hung");
1611 local_irq_restore(flags);
1612 return;
1613 }
1614
1615 #ifdef SERIAL_DEBUG_OPEN
1616 printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1617 #endif
1618 if ((tty->count == 1) && (state->count != 1)) {
1619 /*
1620 * Uh, oh. tty->count is 1, which means that the tty
1621 * structure will be freed. state->count should always
1622 * be one in these conditions. If it's greater than
1623 * one, we've got real problems, since it means the
1624 * serial port won't be shutdown.
1625 */
1626 printk("rs_close: bad serial port count; tty->count is 1, "
1627 "state->count is %d\n", state->count);
1628 state->count = 1;
1629 }
1630 if (--state->count < 0) {
1631 printk("rs_close: bad serial port count for ttys%d: %d\n",
1632 info->line, state->count);
1633 state->count = 0;
1634 }
1635 if (state->count) {
1636 DBG_CNT("before DEC-2");
1637 local_irq_restore(flags);
1638 return;
1639 }
1640 info->flags |= ASYNC_CLOSING;
1641 /*
1642 * Now we wait for the transmit buffer to clear; and we notify
1643 * the line discipline to only process XON/XOFF characters.
1644 */
1645 tty->closing = 1;
1646 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1647 tty_wait_until_sent(tty, info->closing_wait);
1648 /*
1649 * At this point we stop accepting input. To do this, we
1650 * disable the receive line status interrupts, and tell the
1651 * interrupt driver to stop checking the data ready bit in the
1652 * line status register.
1653 */
1654 info->read_status_mask &= ~BD_SC_EMPTY;
1655 if (info->flags & ASYNC_INITIALIZED) {
1656
1657 idx = PORT_NUM(info->state->smc_scc_num);
1658 if (info->state->smc_scc_num & NUM_IS_SCC) {
1659 sccp = &pquicc->scc_regs[idx];
1660 sccp->scc_sccm &= ~UART_SCCM_RX;
1661 sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1662 } else {
1663 smcp = &pquicc->smc_regs[idx];
1664 smcp->smc_smcm &= ~SMCM_RX;
1665 smcp->smc_smcmr &= ~SMCMR_REN;
1666 }
1667 /*
1668 * Before we drop DTR, make sure the UART transmitter
1669 * has completely drained; this is especially
1670 * important if there is a transmit FIFO!
1671 */
1672 rs_360_wait_until_sent(tty, info->timeout);
1673 }
1674 shutdown(info);
1675 if (tty->driver->flush_buffer)
1676 tty->driver->flush_buffer(tty);
1677 tty_ldisc_flush(tty);
1678 tty->closing = 0;
1679 info->event = 0;
1680 info->tty = 0;
1681 if (info->blocked_open) {
1682 if (info->close_delay) {
1683 msleep_interruptible(jiffies_to_msecs(info->close_delay));
1684 }
1685 wake_up_interruptible(&info->open_wait);
1686 }
1687 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1688 wake_up_interruptible(&info->close_wait);
1689 local_irq_restore(flags);
1690 }
1691
1692 /*
1693 * rs_wait_until_sent() --- wait until the transmitter is empty
1694 */
1695 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1696 {
1697 ser_info_t *info = (ser_info_t *)tty->driver_data;
1698 unsigned long orig_jiffies, char_time;
1699 /*int lsr;*/
1700 volatile QUICC_BD *bdp;
1701
1702 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1703 return;
1704
1705 #ifdef maybe
1706 if (info->state->type == PORT_UNKNOWN)
1707 return;
1708 #endif
1709
1710 orig_jiffies = jiffies;
1711 /*
1712 * Set the check interval to be 1/5 of the estimated time to
1713 * send a single character, and make it at least 1. The check
1714 * interval should also be less than the timeout.
1715 *
1716 * Note: we have to use pretty tight timings here to satisfy
1717 * the NIST-PCTS.
1718 */
1719 char_time = 1;
1720 if (timeout)
1721 char_time = min(char_time, (unsigned long)timeout);
1722 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1723 printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1724 printk("jiff=%lu...", jiffies);
1725 #endif
1726
1727 /* We go through the loop at least once because we can't tell
1728 * exactly when the last character exits the shifter. There can
1729 * be at least two characters waiting to be sent after the buffers
1730 * are empty.
1731 */
1732 do {
1733 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1734 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1735 #endif
1736 /* current->counter = 0; make us low-priority */
1737 msleep_interruptible(jiffies_to_msecs(char_time));
1738 if (signal_pending(current))
1739 break;
1740 if (timeout && ((orig_jiffies + timeout) < jiffies))
1741 break;
1742 /* The 'tx_cur' is really the next buffer to send. We
1743 * have to back up to the previous BD and wait for it
1744 * to go. This isn't perfect, because all this indicates
1745 * is the buffer is available. There are still characters
1746 * in the CPM FIFO.
1747 */
1748 bdp = info->tx_cur;
1749 if (bdp == info->tx_bd_base)
1750 bdp += (TX_NUM_FIFO-1);
1751 else
1752 bdp--;
1753 } while (bdp->status & BD_SC_READY);
1754 current->state = TASK_RUNNING;
1755 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1756 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1757 #endif
1758 }
1759
1760 /*
1761 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1762 */
1763 static void rs_360_hangup(struct tty_struct *tty)
1764 {
1765 ser_info_t *info = (ser_info_t *)tty->driver_data;
1766 struct serial_state *state = info->state;
1767
1768 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1769 return;
1770
1771 state = info->state;
1772
1773 rs_360_flush_buffer(tty);
1774 shutdown(info);
1775 info->event = 0;
1776 state->count = 0;
1777 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1778 info->tty = 0;
1779 wake_up_interruptible(&info->open_wait);
1780 }
1781
1782 /*
1783 * ------------------------------------------------------------
1784 * rs_open() and friends
1785 * ------------------------------------------------------------
1786 */
1787 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1788 ser_info_t *info)
1789 {
1790 #ifdef DO_THIS_LATER
1791 DECLARE_WAITQUEUE(wait, current);
1792 #endif
1793 struct serial_state *state = info->state;
1794 int retval;
1795 int do_clocal = 0;
1796
1797 /*
1798 * If the device is in the middle of being closed, then block
1799 * until it's done, and then try again.
1800 */
1801 if (tty_hung_up_p(filp) ||
1802 (info->flags & ASYNC_CLOSING)) {
1803 if (info->flags & ASYNC_CLOSING)
1804 interruptible_sleep_on(&info->close_wait);
1805 #ifdef SERIAL_DO_RESTART
1806 if (info->flags & ASYNC_HUP_NOTIFY)
1807 return -EAGAIN;
1808 else
1809 return -ERESTARTSYS;
1810 #else
1811 return -EAGAIN;
1812 #endif
1813 }
1814
1815 /*
1816 * If non-blocking mode is set, or the port is not enabled,
1817 * then make the check up front and then exit.
1818 * If this is an SMC port, we don't have modem control to wait
1819 * for, so just get out here.
1820 */
1821 if ((filp->f_flags & O_NONBLOCK) ||
1822 (tty->flags & (1 << TTY_IO_ERROR)) ||
1823 !(info->state->smc_scc_num & NUM_IS_SCC)) {
1824 info->flags |= ASYNC_NORMAL_ACTIVE;
1825 return 0;
1826 }
1827
1828 if (tty->termios->c_cflag & CLOCAL)
1829 do_clocal = 1;
1830
1831 /*
1832 * Block waiting for the carrier detect and the line to become
1833 * free (i.e., not in use by the callout). While we are in
1834 * this loop, state->count is dropped by one, so that
1835 * rs_close() knows when to free things. We restore it upon
1836 * exit, either normal or abnormal.
1837 */
1838 retval = 0;
1839 #ifdef DO_THIS_LATER
1840 add_wait_queue(&info->open_wait, &wait);
1841 #ifdef SERIAL_DEBUG_OPEN
1842 printk("block_til_ready before block: ttys%d, count = %d\n",
1843 state->line, state->count);
1844 #endif
1845 local_irq_disable();
1846 if (!tty_hung_up_p(filp))
1847 state->count--;
1848 local_irq_enable();
1849 info->blocked_open++;
1850 while (1) {
1851 local_irq_disable();
1852 if (tty->termios->c_cflag & CBAUD)
1853 serial_out(info, UART_MCR,
1854 serial_inp(info, UART_MCR) |
1855 (UART_MCR_DTR | UART_MCR_RTS));
1856 local_irq_enable();
1857 set_current_state(TASK_INTERRUPTIBLE);
1858 if (tty_hung_up_p(filp) ||
1859 !(info->flags & ASYNC_INITIALIZED)) {
1860 #ifdef SERIAL_DO_RESTART
1861 if (info->flags & ASYNC_HUP_NOTIFY)
1862 retval = -EAGAIN;
1863 else
1864 retval = -ERESTARTSYS;
1865 #else
1866 retval = -EAGAIN;
1867 #endif
1868 break;
1869 }
1870 if (!(info->flags & ASYNC_CLOSING) &&
1871 (do_clocal || (serial_in(info, UART_MSR) &
1872 UART_MSR_DCD)))
1873 break;
1874 if (signal_pending(current)) {
1875 retval = -ERESTARTSYS;
1876 break;
1877 }
1878 #ifdef SERIAL_DEBUG_OPEN
1879 printk("block_til_ready blocking: ttys%d, count = %d\n",
1880 info->line, state->count);
1881 #endif
1882 schedule();
1883 }
1884 current->state = TASK_RUNNING;
1885 remove_wait_queue(&info->open_wait, &wait);
1886 if (!tty_hung_up_p(filp))
1887 state->count++;
1888 info->blocked_open--;
1889 #ifdef SERIAL_DEBUG_OPEN
1890 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1891 info->line, state->count);
1892 #endif
1893 #endif /* DO_THIS_LATER */
1894 if (retval)
1895 return retval;
1896 info->flags |= ASYNC_NORMAL_ACTIVE;
1897 return 0;
1898 }
1899
1900 static int get_async_struct(int line, ser_info_t **ret_info)
1901 {
1902 struct serial_state *sstate;
1903
1904 sstate = rs_table + line;
1905 if (sstate->info) {
1906 sstate->count++;
1907 *ret_info = (ser_info_t *)sstate->info;
1908 return 0;
1909 }
1910 else {
1911 return -ENOMEM;
1912 }
1913 }
1914
1915 /*
1916 * This routine is called whenever a serial port is opened. It
1917 * enables interrupts for a serial port, linking in its async structure into
1918 * the IRQ chain. It also performs the serial-specific
1919 * initialization for the tty structure.
1920 */
1921 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1922 {
1923 ser_info_t *info;
1924 int retval, line;
1925
1926 line = tty->index;
1927 if ((line < 0) || (line >= NR_PORTS))
1928 return -ENODEV;
1929 retval = get_async_struct(line, &info);
1930 if (retval)
1931 return retval;
1932 if (serial_paranoia_check(info, tty->name, "rs_open"))
1933 return -ENODEV;
1934
1935 #ifdef SERIAL_DEBUG_OPEN
1936 printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1937 #endif
1938 tty->driver_data = info;
1939 info->tty = tty;
1940
1941 /*
1942 * Start up serial port
1943 */
1944 retval = startup(info);
1945 if (retval)
1946 return retval;
1947
1948 retval = block_til_ready(tty, filp, info);
1949 if (retval) {
1950 #ifdef SERIAL_DEBUG_OPEN
1951 printk("rs_open returning after block_til_ready with %d\n",
1952 retval);
1953 #endif
1954 return retval;
1955 }
1956
1957 #ifdef SERIAL_DEBUG_OPEN
1958 printk("rs_open %s successful...", tty->name);
1959 #endif
1960 return 0;
1961 }
1962
1963 /*
1964 * /proc fs routines....
1965 */
1966
1967 static inline int line_info(char *buf, struct serial_state *state)
1968 {
1969 #ifdef notdef
1970 struct async_struct *info = state->info, scr_info;
1971 char stat_buf[30], control, status;
1972 #endif
1973 int ret;
1974
1975 ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
1976 state->line,
1977 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
1978 (unsigned int)(state->port), state->irq);
1979
1980 if (!state->port || (state->type == PORT_UNKNOWN)) {
1981 ret += sprintf(buf+ret, "\n");
1982 return ret;
1983 }
1984
1985 #ifdef notdef
1986 /*
1987 * Figure out the current RS-232 lines
1988 */
1989 if (!info) {
1990 info = &scr_info; /* This is just for serial_{in,out} */
1991
1992 info->magic = SERIAL_MAGIC;
1993 info->port = state->port;
1994 info->flags = state->flags;
1995 info->quot = 0;
1996 info->tty = 0;
1997 }
1998 local_irq_disable();
1999 status = serial_in(info, UART_MSR);
2000 control = info ? info->MCR : serial_in(info, UART_MCR);
2001 local_irq_enable();
2002
2003 stat_buf[0] = 0;
2004 stat_buf[1] = 0;
2005 if (control & UART_MCR_RTS)
2006 strcat(stat_buf, "|RTS");
2007 if (status & UART_MSR_CTS)
2008 strcat(stat_buf, "|CTS");
2009 if (control & UART_MCR_DTR)
2010 strcat(stat_buf, "|DTR");
2011 if (status & UART_MSR_DSR)
2012 strcat(stat_buf, "|DSR");
2013 if (status & UART_MSR_DCD)
2014 strcat(stat_buf, "|CD");
2015 if (status & UART_MSR_RI)
2016 strcat(stat_buf, "|RI");
2017
2018 if (info->quot) {
2019 ret += sprintf(buf+ret, " baud:%d",
2020 state->baud_base / info->quot);
2021 }
2022
2023 ret += sprintf(buf+ret, " tx:%d rx:%d",
2024 state->icount.tx, state->icount.rx);
2025
2026 if (state->icount.frame)
2027 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2028
2029 if (state->icount.parity)
2030 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2031
2032 if (state->icount.brk)
2033 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
2034
2035 if (state->icount.overrun)
2036 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2037
2038 /*
2039 * Last thing is the RS-232 status lines
2040 */
2041 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2042 #endif
2043 return ret;
2044 }
2045
2046 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2047 int *eof, void *data)
2048 {
2049 int i, len = 0;
2050 off_t begin = 0;
2051
2052 len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2053 for (i = 0; i < NR_PORTS && len < 4000; i++) {
2054 len += line_info(page + len, &rs_table[i]);
2055 if (len+begin > off+count)
2056 goto done;
2057 if (len+begin < off) {
2058 begin += len;
2059 len = 0;
2060 }
2061 }
2062 *eof = 1;
2063 done:
2064 if (off >= len+begin)
2065 return 0;
2066 *start = page + (begin-off);
2067 return ((count < begin+len-off) ? count : begin+len-off);
2068 }
2069
2070 /*
2071 * ---------------------------------------------------------------------
2072 * rs_init() and friends
2073 *
2074 * rs_init() is called at boot-time to initialize the serial driver.
2075 * ---------------------------------------------------------------------
2076 */
2077
2078 /*
2079 * This routine prints out the appropriate serial driver version
2080 * number, and identifies which options were configured into this
2081 * driver.
2082 */
2083 static _INLINE_ void show_serial_version(void)
2084 {
2085 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2086 }
2087
2088
2089 /*
2090 * The serial console driver used during boot. Note that these names
2091 * clash with those found in "serial.c", so we currently can't support
2092 * the 16xxx uarts and these at the same time. I will fix this to become
2093 * an indirect function call from tty_io.c (or something).
2094 */
2095
2096 #ifdef CONFIG_SERIAL_CONSOLE
2097
2098 /*
2099 * Print a string to the serial port trying not to disturb any possible
2100 * real use of the port...
2101 */
2102 static void my_console_write(int idx, const char *s,
2103 unsigned count)
2104 {
2105 struct serial_state *ser;
2106 ser_info_t *info;
2107 unsigned i;
2108 QUICC_BD *bdp, *bdbase;
2109 volatile struct smc_uart_pram *up;
2110 volatile u_char *cp;
2111
2112 ser = rs_table + idx;
2113
2114
2115 /* If the port has been initialized for general use, we have
2116 * to use the buffer descriptors allocated there. Otherwise,
2117 * we simply use the single buffer allocated.
2118 */
2119 if ((info = (ser_info_t *)ser->info) != NULL) {
2120 bdp = info->tx_cur;
2121 bdbase = info->tx_bd_base;
2122 }
2123 else {
2124 /* Pointer to UART in parameter ram.
2125 */
2126 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2127 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2128
2129 /* Get the address of the host memory buffer.
2130 */
2131 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2132 }
2133
2134 /*
2135 * We need to gracefully shut down the transmitter, disable
2136 * interrupts, then send our bytes out.
2137 */
2138
2139 /*
2140 * Now, do each character. This is not as bad as it looks
2141 * since this is a holding FIFO and not a transmitting FIFO.
2142 * We could add the complexity of filling the entire transmit
2143 * buffer, but we would just wait longer between accesses......
2144 */
2145 for (i = 0; i < count; i++, s++) {
2146 /* Wait for transmitter fifo to empty.
2147 * Ready indicates output is ready, and xmt is doing
2148 * that, not that it is ready for us to send.
2149 */
2150 while (bdp->status & BD_SC_READY);
2151
2152 /* Send the character out.
2153 */
2154 cp = bdp->buf;
2155 *cp = *s;
2156
2157 bdp->length = 1;
2158 bdp->status |= BD_SC_READY;
2159
2160 if (bdp->status & BD_SC_WRAP)
2161 bdp = bdbase;
2162 else
2163 bdp++;
2164
2165 /* if a LF, also do CR... */
2166 if (*s == 10) {
2167 while (bdp->status & BD_SC_READY);
2168 /* cp = __va(bdp->buf); */
2169 cp = bdp->buf;
2170 *cp = 13;
2171 bdp->length = 1;
2172 bdp->status |= BD_SC_READY;
2173
2174 if (bdp->status & BD_SC_WRAP) {
2175 bdp = bdbase;
2176 }
2177 else {
2178 bdp++;
2179 }
2180 }
2181 }
2182
2183 /*
2184 * Finally, Wait for transmitter & holding register to empty
2185 * and restore the IER
2186 */
2187 while (bdp->status & BD_SC_READY);
2188
2189 if (info)
2190 info->tx_cur = (QUICC_BD *)bdp;
2191 }
2192
2193 static void serial_console_write(struct console *c, const char *s,
2194 unsigned count)
2195 {
2196 #ifdef CONFIG_KGDB
2197 /* Try to let stub handle output. Returns true if it did. */
2198 if (kgdb_output_string(s, count))
2199 return;
2200 #endif
2201 my_console_write(c->index, s, count);
2202 }
2203
2204
2205
2206 /*void console_print_68360(const char *p)
2207 {
2208 const char *cp = p;
2209 int i;
2210
2211 for (i=0;cp[i]!=0;i++);
2212
2213 serial_console_write (p, i);
2214
2215 //Comment this if you want to have a strict interrupt-driven output
2216 //rs_fair_output();
2217
2218 return;
2219 }*/
2220
2221
2222
2223
2224
2225
2226 #ifdef CONFIG_XMON
2227 int
2228 xmon_360_write(const char *s, unsigned count)
2229 {
2230 my_console_write(0, s, count);
2231 return(count);
2232 }
2233 #endif
2234
2235 #ifdef CONFIG_KGDB
2236 void
2237 putDebugChar(char ch)
2238 {
2239 my_console_write(0, &ch, 1);
2240 }
2241 #endif
2242
2243 /*
2244 * Receive character from the serial port. This only works well
2245 * before the port is initialized for real use.
2246 */
2247 static int my_console_wait_key(int idx, int xmon, char *obuf)
2248 {
2249 struct serial_state *ser;
2250 u_char c, *cp;
2251 ser_info_t *info;
2252 QUICC_BD *bdp;
2253 volatile struct smc_uart_pram *up;
2254 int i;
2255
2256 ser = rs_table + idx;
2257
2258 /* Get the address of the host memory buffer.
2259 * If the port has been initialized for general use, we must
2260 * use information from the port structure.
2261 */
2262 if ((info = (ser_info_t *)ser->info))
2263 bdp = info->rx_cur;
2264 else
2265 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2266 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2267
2268 /* Pointer to UART in parameter ram.
2269 */
2270 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2271 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2272
2273 /*
2274 * We need to gracefully shut down the receiver, disable
2275 * interrupts, then read the input.
2276 * XMON just wants a poll. If no character, return -1, else
2277 * return the character.
2278 */
2279 if (!xmon) {
2280 while (bdp->status & BD_SC_EMPTY);
2281 }
2282 else {
2283 if (bdp->status & BD_SC_EMPTY)
2284 return -1;
2285 }
2286
2287 cp = (char *)bdp->buf;
2288
2289 if (obuf) {
2290 i = c = bdp->length;
2291 while (i-- > 0)
2292 *obuf++ = *cp++;
2293 }
2294 else {
2295 c = *cp;
2296 }
2297 bdp->status |= BD_SC_EMPTY;
2298
2299 if (info) {
2300 if (bdp->status & BD_SC_WRAP) {
2301 bdp = info->rx_bd_base;
2302 }
2303 else {
2304 bdp++;
2305 }
2306 info->rx_cur = (QUICC_BD *)bdp;
2307 }
2308
2309 return((int)c);
2310 }
2311
2312 static int serial_console_wait_key(struct console *co)
2313 {
2314 return(my_console_wait_key(co->index, 0, NULL));
2315 }
2316
2317 #ifdef CONFIG_XMON
2318 int
2319 xmon_360_read_poll(void)
2320 {
2321 return(my_console_wait_key(0, 1, NULL));
2322 }
2323
2324 int
2325 xmon_360_read_char(void)
2326 {
2327 return(my_console_wait_key(0, 0, NULL));
2328 }
2329 #endif
2330
2331 #ifdef CONFIG_KGDB
2332 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2333 static int kgdb_chars;
2334
2335 unsigned char
2336 getDebugChar(void)
2337 {
2338 if (kgdb_chars <= 0) {
2339 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2340 kgdp = kgdb_buf;
2341 }
2342 kgdb_chars--;
2343
2344 return(*kgdp++);
2345 }
2346
2347 void kgdb_interruptible(int state)
2348 {
2349 }
2350 void kgdb_map_scc(void)
2351 {
2352 struct serial_state *ser;
2353 uint mem_addr;
2354 volatile QUICC_BD *bdp;
2355 volatile smc_uart_t *up;
2356
2357 cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2358
2359 /* To avoid data cache CPM DMA coherency problems, allocate a
2360 * buffer in the CPM DPRAM. This will work until the CPM and
2361 * serial ports are initialized. At that time a memory buffer
2362 * will be allocated.
2363 * The port is already initialized from the boot procedure, all
2364 * we do here is give it a different buffer and make it a FIFO.
2365 */
2366
2367 ser = rs_table;
2368
2369 /* Right now, assume we are using SMCs.
2370 */
2371 up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2372
2373 /* Allocate space for an input FIFO, plus a few bytes for output.
2374 * Allocate bytes to maintain word alignment.
2375 */
2376 mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2377
2378 /* Set the physical address of the host memory buffers in
2379 * the buffer descriptors.
2380 */
2381 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2382 bdp->buf = mem_addr;
2383
2384 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2385 bdp->buf = mem_addr+RX_BUF_SIZE;
2386
2387 up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
2388 up->smc_maxidl = RX_BUF_SIZE;
2389 }
2390 #endif
2391
2392 static struct tty_struct *serial_console_device(struct console *c, int *index)
2393 {
2394 *index = c->index;
2395 return serial_driver;
2396 }
2397
2398
2399 struct console sercons = {
2400 .name = "ttyS",
2401 .write = serial_console_write,
2402 .device = serial_console_device,
2403 .wait_key = serial_console_wait_key,
2404 .setup = serial_console_setup,
2405 .flags = CON_PRINTBUFFER,
2406 .index = CONFIG_SERIAL_CONSOLE_PORT,
2407 };
2408
2409
2410
2411 /*
2412 * Register console.
2413 */
2414 long console_360_init(long kmem_start, long kmem_end)
2415 {
2416 register_console(&sercons);
2417 /*register_console (console_print_68360); - 2.0.38 only required a write
2418 function pointer. */
2419 return kmem_start;
2420 }
2421
2422 #endif
2423
2424 /* Index in baud rate table of the default console baud rate.
2425 */
2426 static int baud_idx;
2427
2428 static struct tty_operations rs_360_ops = {
2429 .owner = THIS_MODULE,
2430 .open = rs_360_open,
2431 .close = rs_360_close,
2432 .write = rs_360_write,
2433 .put_char = rs_360_put_char,
2434 .write_room = rs_360_write_room,
2435 .chars_in_buffer = rs_360_chars_in_buffer,
2436 .flush_buffer = rs_360_flush_buffer,
2437 .ioctl = rs_360_ioctl,
2438 .throttle = rs_360_throttle,
2439 .unthrottle = rs_360_unthrottle,
2440 /* .send_xchar = rs_360_send_xchar, */
2441 .set_termios = rs_360_set_termios,
2442 .stop = rs_360_stop,
2443 .start = rs_360_start,
2444 .hangup = rs_360_hangup,
2445 /* .wait_until_sent = rs_360_wait_until_sent, */
2446 /* .read_proc = rs_360_read_proc, */
2447 .tiocmget = rs_360_tiocmget,
2448 .tiocmset = rs_360_tiocmset,
2449 };
2450
2451 static int __init rs_360_init(void)
2452 {
2453 struct serial_state * state;
2454 ser_info_t *info;
2455 void *mem_addr;
2456 uint dp_addr, iobits;
2457 int i, j, idx;
2458 ushort chan;
2459 QUICC_BD *bdp;
2460 volatile QUICC *cp;
2461 volatile struct smc_regs *sp;
2462 volatile struct smc_uart_pram *up;
2463 volatile struct scc_regs *scp;
2464 volatile struct uart_pram *sup;
2465 /* volatile immap_t *immap; */
2466
2467 serial_driver = alloc_tty_driver(NR_PORTS);
2468 if (!serial_driver)
2469 return -1;
2470
2471 show_serial_version();
2472
2473 serial_driver->name = "ttyS";
2474 serial_driver->major = TTY_MAJOR;
2475 serial_driver->minor_start = 64;
2476 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2477 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2478 serial_driver->init_termios = tty_std_termios;
2479 serial_driver->init_termios.c_cflag =
2480 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2481 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2482 tty_set_operations(serial_driver, &rs_360_ops);
2483
2484 if (tty_register_driver(serial_driver))
2485 panic("Couldn't register serial driver\n");
2486
2487 cp = pquicc; /* Get pointer to Communication Processor */
2488 /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
2489
2490
2491 /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2492 */
2493 /* The "standard" configuration through the 860.
2494 */
2495 /* immap->im_ioport.iop_papar |= 0x00fc; */
2496 /* immap->im_ioport.iop_padir &= ~0x00fc; */
2497 /* immap->im_ioport.iop_paodr &= ~0x00fc; */
2498 cp->pio_papar |= 0x00fc;
2499 cp->pio_padir &= ~0x00fc;
2500 /* cp->pio_paodr &= ~0x00fc; */
2501
2502
2503 /* Since we don't yet do modem control, connect the port C pins
2504 * as general purpose I/O. This will assert CTS and CD for the
2505 * SCC ports.
2506 */
2507 /* FIXME: see 360um p.7-365 and 860um p.34-12
2508 * I can't make sense of these bits - mleslie*/
2509 /* immap->im_ioport.iop_pcdir |= 0x03c6; */
2510 /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
2511
2512 /* cp->pio_pcdir |= 0x03c6; */
2513 /* cp->pio_pcpar &= ~0x03c6; */
2514
2515
2516
2517 /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
2518 * BRG4 to SCC3.
2519 */
2520 cp->si_sicr &= ~0x00ffff00;
2521 cp->si_sicr |= 0x001b1200;
2522
2523 #ifdef CONFIG_PP04
2524 /* Frequentis PP04 forced to RS-232 until we know better.
2525 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2526 */
2527 immap->im_ioport.iop_pcdir |= 0x000c;
2528 immap->im_ioport.iop_pcpar &= ~0x000c;
2529 immap->im_ioport.iop_pcdat &= ~0x000c;
2530
2531 /* This enables the TX driver.
2532 */
2533 cp->cp_pbpar &= ~0x6000;
2534 cp->cp_pbdat &= ~0x6000;
2535 #endif
2536
2537 for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2538 state->magic = SSTATE_MAGIC;
2539 state->line = i;
2540 state->type = PORT_UNKNOWN;
2541 state->custom_divisor = 0;
2542 state->close_delay = 5*HZ/10;
2543 state->closing_wait = 30*HZ;
2544 state->icount.cts = state->icount.dsr =
2545 state->icount.rng = state->icount.dcd = 0;
2546 state->icount.rx = state->icount.tx = 0;
2547 state->icount.frame = state->icount.parity = 0;
2548 state->icount.overrun = state->icount.brk = 0;
2549 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2550 i, (unsigned int)(state->irq),
2551 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2552
2553 #ifdef CONFIG_SERIAL_CONSOLE
2554 /* If we just printed the message on the console port, and
2555 * we are about to initialize it for general use, we have
2556 * to wait a couple of character times for the CR/NL to
2557 * make it out of the transmit buffer.
2558 */
2559 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2560 mdelay(8);
2561
2562
2563 /* idx = PORT_NUM(info->state->smc_scc_num); */
2564 /* if (info->state->smc_scc_num & NUM_IS_SCC) */
2565 /* chan = scc_chan_map[idx]; */
2566 /* else */
2567 /* chan = smc_chan_map[idx]; */
2568
2569 /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2570 /* while (cp->cp_cr & CPM_CR_FLG); */
2571
2572 #endif
2573 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2574 info = &quicc_ser_info[i];
2575 if (info) {
2576 memset (info, 0, sizeof(ser_info_t));
2577 info->magic = SERIAL_MAGIC;
2578 info->line = i;
2579 info->flags = state->flags;
2580 INIT_WORK(&info->tqueue, do_softint, info);
2581 INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2582 init_waitqueue_head(&info->open_wait);
2583 init_waitqueue_head(&info->close_wait);
2584 info->state = state;
2585 state->info = (struct async_struct *)info;
2586
2587 /* We need to allocate a transmit and receive buffer
2588 * descriptors from dual port ram, and a character
2589 * buffer area from host mem.
2590 */
2591 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2592
2593 /* Allocate space for FIFOs in the host memory.
2594 * (for now this is from a static array of buffers :(
2595 */
2596 /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2597 /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2598 mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2599
2600 /* Set the physical address of the host memory
2601 * buffers in the buffer descriptors, and the
2602 * virtual address for us to work with.
2603 */
2604 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2605 info->rx_cur = info->rx_bd_base = bdp;
2606
2607 /* initialize rx buffer descriptors */
2608 for (j=0; j<(RX_NUM_FIFO-1); j++) {
2609 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2610 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2611 mem_addr += RX_BUF_SIZE;
2612 bdp++;
2613 }
2614 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2615 bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2616
2617
2618 idx = PORT_NUM(info->state->smc_scc_num);
2619 if (info->state->smc_scc_num & NUM_IS_SCC) {
2620
2621 #if defined (CONFIG_UCQUICC) && 1
2622 /* set the transceiver mode to RS232 */
2623 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2624 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2625 *(uint *)_periph_base = sipex_mode_bits;
2626 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2627 #endif
2628 }
2629
2630 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2631
2632 /* Allocate space for FIFOs in the host memory.
2633 */
2634 /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2635 /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2636 mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2637
2638 /* Set the physical address of the host memory
2639 * buffers in the buffer descriptors, and the
2640 * virtual address for us to work with.
2641 */
2642 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2643 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2644 info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2645
2646 /* initialize tx buffer descriptors */
2647 for (j=0; j<(TX_NUM_FIFO-1); j++) {
2648 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2649 bdp->status = BD_SC_INTRPT;
2650 mem_addr += TX_BUF_SIZE;
2651 bdp++;
2652 }
2653 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2654 bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2655
2656 if (info->state->smc_scc_num & NUM_IS_SCC) {
2657 scp = &pquicc->scc_regs[idx];
2658 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2659 sup->rbase = dp_addr;
2660 sup->tbase = dp_addr;
2661
2662 /* Set up the uart parameters in the
2663 * parameter ram.
2664 */
2665 sup->rfcr = SMC_EB;
2666 sup->tfcr = SMC_EB;
2667
2668 /* Set this to 1 for now, so we get single
2669 * character interrupts. Using idle charater
2670 * time requires some additional tuning.
2671 */
2672 sup->mrblr = 1;
2673 sup->max_idl = 0;
2674 sup->brkcr = 1;
2675 sup->parec = 0;
2676 sup->frmer = 0;
2677 sup->nosec = 0;
2678 sup->brkec = 0;
2679 sup->uaddr1 = 0;
2680 sup->uaddr2 = 0;
2681 sup->toseq = 0;
2682 {
2683 int i;
2684 for (i=0;i<8;i++)
2685 sup->cc[i] = 0x8000;
2686 }
2687 sup->rccm = 0xc0ff;
2688
2689 /* Send the CPM an initialize command.
2690 */
2691 chan = scc_chan_map[idx];
2692
2693 /* execute the INIT RX & TX PARAMS command for this channel. */
2694 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2695 while (cp->cp_cr & CPM_CR_FLG);
2696
2697 /* Set UART mode, 8 bit, no parity, one stop.
2698 * Enable receive and transmit.
2699 */
2700 scp->scc_gsmr.w.high = 0;
2701 scp->scc_gsmr.w.low =
2702 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2703
2704 /* Disable all interrupts and clear all pending
2705 * events.
2706 */
2707 scp->scc_sccm = 0;
2708 scp->scc_scce = 0xffff;
2709 scp->scc_dsr = 0x7e7e;
2710 scp->scc_psmr = 0x3000;
2711
2712 /* If the port is the console, enable Rx and Tx.
2713 */
2714 #ifdef CONFIG_SERIAL_CONSOLE
2715 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2716 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2717 #endif
2718 }
2719 else {
2720 /* Configure SMCs Tx/Rx instead of port B
2721 * parallel I/O.
2722 */
2723 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2724 up->rbase = dp_addr;
2725
2726 iobits = 0xc0 << (idx * 4);
2727 cp->pip_pbpar |= iobits;
2728 cp->pip_pbdir &= ~iobits;
2729 cp->pip_pbodr &= ~iobits;
2730
2731
2732 /* Connect the baud rate generator to the
2733 * SMC based upon index in rs_table. Also
2734 * make sure it is connected to NMSI.
2735 */
2736 cp->si_simode &= ~(0xffff << (idx * 16));
2737 cp->si_simode |= (i << ((idx * 16) + 12));
2738
2739 up->tbase = dp_addr;
2740
2741 /* Set up the uart parameters in the
2742 * parameter ram.
2743 */
2744 up->rfcr = SMC_EB;
2745 up->tfcr = SMC_EB;
2746
2747 /* Set this to 1 for now, so we get single
2748 * character interrupts. Using idle charater
2749 * time requires some additional tuning.
2750 */
2751 up->mrblr = 1;
2752 up->max_idl = 0;
2753 up->brkcr = 1;
2754
2755 /* Send the CPM an initialize command.
2756 */
2757 chan = smc_chan_map[idx];
2758
2759 cp->cp_cr = mk_cr_cmd(chan,
2760 CPM_CR_INIT_TRX) | CPM_CR_FLG;
2761 #ifdef CONFIG_SERIAL_CONSOLE
2762 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2763 printk("");
2764 #endif
2765 while (cp->cp_cr & CPM_CR_FLG);
2766
2767 /* Set UART mode, 8 bit, no parity, one stop.
2768 * Enable receive and transmit.
2769 */
2770 sp = &cp->smc_regs[idx];
2771 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2772
2773 /* Disable all interrupts and clear all pending
2774 * events.
2775 */
2776 sp->smc_smcm = 0;
2777 sp->smc_smce = 0xff;
2778
2779 /* If the port is the console, enable Rx and Tx.
2780 */
2781 #ifdef CONFIG_SERIAL_CONSOLE
2782 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2783 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2784 #endif
2785 }
2786
2787 /* Install interrupt handler.
2788 */
2789 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2790 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2791 request_irq(state->irq, rs_360_interrupt,
2792 IRQ_FLG_LOCK, "ttyS", (void *)info);
2793
2794 /* Set up the baud rate generator.
2795 */
2796 m360_cpm_setbrg(i, baud_table[baud_idx]);
2797
2798 }
2799 }
2800
2801 return 0;
2802 }
2803 module_init(rs_360_init);
2804
2805 /* This must always be called before the rs_360_init() function, otherwise
2806 * it blows away the port control information.
2807 */
2808 //static int __init serial_console_setup( struct console *co, char *options)
2809 int serial_console_setup( struct console *co, char *options)
2810 {
2811 struct serial_state *ser;
2812 uint mem_addr, dp_addr, bidx, idx, iobits;
2813 ushort chan;
2814 QUICC_BD *bdp;
2815 volatile QUICC *cp;
2816 volatile struct smc_regs *sp;
2817 volatile struct scc_regs *scp;
2818 volatile struct smc_uart_pram *up;
2819 volatile struct uart_pram *sup;
2820
2821 /* mleslie TODO:
2822 * add something to the 68k bootloader to store a desired initial console baud rate */
2823
2824 /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
2825 /* bd = (bd_t *)__res; */
2826
2827 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2828 /* if (bd->bi_baudrate == baud_table[bidx]) */
2829 if (CONSOLE_BAUDRATE == baud_table[bidx])
2830 break;
2831
2832 /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2833 baud_idx = bidx;
2834
2835 ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2836
2837 cp = pquicc; /* Get pointer to Communication Processor */
2838
2839 idx = PORT_NUM(ser->smc_scc_num);
2840 if (ser->smc_scc_num & NUM_IS_SCC) {
2841
2842 /* TODO: need to set up SCC pin assignment etc. here */
2843
2844 }
2845 else {
2846 iobits = 0xc0 << (idx * 4);
2847 cp->pip_pbpar |= iobits;
2848 cp->pip_pbdir &= ~iobits;
2849 cp->pip_pbodr &= ~iobits;
2850
2851 /* Connect the baud rate generator to the
2852 * SMC based upon index in rs_table. Also
2853 * make sure it is connected to NMSI.
2854 */
2855 cp->si_simode &= ~(0xffff << (idx * 16));
2856 cp->si_simode |= (idx << ((idx * 16) + 12));
2857 }
2858
2859 /* When we get here, the CPM has been reset, so we need
2860 * to configure the port.
2861 * We need to allocate a transmit and receive buffer descriptor
2862 * from dual port ram, and a character buffer area from host mem.
2863 */
2864
2865 /* Allocate space for two buffer descriptors in the DP ram.
2866 */
2867 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2868
2869 /* Allocate space for two 2 byte FIFOs in the host memory.
2870 */
2871 /* mem_addr = m360_cpm_hostalloc(8); */
2872 mem_addr = (uint)console_fifos;
2873
2874
2875 /* Set the physical address of the host memory buffers in
2876 * the buffer descriptors.
2877 */
2878 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2879 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2880 bdp->buf = (char *)mem_addr;
2881 (bdp+1)->buf = (char *)(mem_addr+4);
2882
2883 /* For the receive, set empty and wrap.
2884 * For transmit, set wrap.
2885 */
2886 bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2887 (bdp+1)->status = BD_SC_WRAP;
2888
2889 /* Set up the uart parameters in the parameter ram.
2890 */
2891 if (ser->smc_scc_num & NUM_IS_SCC) {
2892 scp = &cp->scc_regs[idx];
2893 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2894 sup = &pquicc->pram[ser->port].scc.pscc.u;
2895
2896 sup->rbase = dp_addr;
2897 sup->tbase = dp_addr + sizeof(QUICC_BD);
2898
2899 /* Set up the uart parameters in the
2900 * parameter ram.
2901 */
2902 sup->rfcr = SMC_EB;
2903 sup->tfcr = SMC_EB;
2904
2905 /* Set this to 1 for now, so we get single
2906 * character interrupts. Using idle charater
2907 * time requires some additional tuning.
2908 */
2909 sup->mrblr = 1;
2910 sup->max_idl = 0;
2911 sup->brkcr = 1;
2912 sup->parec = 0;
2913 sup->frmer = 0;
2914 sup->nosec = 0;
2915 sup->brkec = 0;
2916 sup->uaddr1 = 0;
2917 sup->uaddr2 = 0;
2918 sup->toseq = 0;
2919 {
2920 int i;
2921 for (i=0;i<8;i++)
2922 sup->cc[i] = 0x8000;
2923 }
2924 sup->rccm = 0xc0ff;
2925
2926 /* Send the CPM an initialize command.
2927 */
2928 chan = scc_chan_map[idx];
2929
2930 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2931 while (cp->cp_cr & CPM_CR_FLG);
2932
2933 /* Set UART mode, 8 bit, no parity, one stop.
2934 * Enable receive and transmit.
2935 */
2936 scp->scc_gsmr.w.high = 0;
2937 scp->scc_gsmr.w.low =
2938 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2939
2940 /* Disable all interrupts and clear all pending
2941 * events.
2942 */
2943 scp->scc_sccm = 0;
2944 scp->scc_scce = 0xffff;
2945 scp->scc_dsr = 0x7e7e;
2946 scp->scc_psmr = 0x3000;
2947
2948 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2949
2950 }
2951 else {
2952 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2953 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2954
2955 up->rbase = dp_addr; /* Base of receive buffer desc. */
2956 up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
2957 up->rfcr = SMC_EB;
2958 up->tfcr = SMC_EB;
2959
2960 /* Set this to 1 for now, so we get single character interrupts.
2961 */
2962 up->mrblr = 1; /* receive buffer length */
2963 up->max_idl = 0; /* wait forever for next char */
2964
2965 /* Send the CPM an initialize command.
2966 */
2967 chan = smc_chan_map[idx];
2968 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2969 while (cp->cp_cr & CPM_CR_FLG);
2970
2971 /* Set UART mode, 8 bit, no parity, one stop.
2972 * Enable receive and transmit.
2973 */
2974 sp = &cp->smc_regs[idx];
2975 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2976
2977 /* And finally, enable Rx and Tx.
2978 */
2979 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2980 }
2981
2982 /* Set up the baud rate generator.
2983 */
2984 /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
2985 m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
2986
2987 return 0;
2988 }
2989
2990 /*
2991 * Local variables:
2992 * c-indent-level: 4
2993 * c-basic-offset: 4
2994 * tab-width: 4
2995 * End:
2996 */