]>
git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/serial/amba-pl010.c
2 * linux/drivers/char/amba.c
4 * Driver for AMBA serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
27 * This is a generic driver for ARM AMBA-type serial ports. They
28 * have a lot of 16550-like features, but are not register compatible.
29 * Note that although they do have CTS, DCD and DSR inputs, they do
30 * not have an RI input, nor do they have DTR or RTS outputs. If
31 * required, these have to be supplied via some other means (eg, GPIO)
32 * and hooked into this driver.
35 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
39 #include <linux/module.h>
40 #include <linux/ioport.h>
41 #include <linux/init.h>
42 #include <linux/console.h>
43 #include <linux/sysrq.h>
44 #include <linux/device.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial_core.h>
48 #include <linux/serial.h>
49 #include <linux/amba/bus.h>
50 #include <linux/amba/serial.h>
56 #define SERIAL_AMBA_MAJOR 204
57 #define SERIAL_AMBA_MINOR 16
58 #define SERIAL_AMBA_NR UART_NR
60 #define AMBA_ISR_PASS_LIMIT 256
62 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
63 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
65 #define UART_DUMMY_RSR_RX 256
66 #define UART_PORT_SIZE 64
69 * We wrap our port structure around the generic uart_port.
71 struct uart_amba_port
{
72 struct uart_port port
;
73 struct amba_device
*dev
;
74 struct amba_pl010_data
*data
;
75 unsigned int old_status
;
78 static void pl010_stop_tx(struct uart_port
*port
)
82 cr
= readb(port
->membase
+ UART010_CR
);
83 cr
&= ~UART010_CR_TIE
;
84 writel(cr
, port
->membase
+ UART010_CR
);
87 static void pl010_start_tx(struct uart_port
*port
)
91 cr
= readb(port
->membase
+ UART010_CR
);
93 writel(cr
, port
->membase
+ UART010_CR
);
96 static void pl010_stop_rx(struct uart_port
*port
)
100 cr
= readb(port
->membase
+ UART010_CR
);
101 cr
&= ~(UART010_CR_RIE
| UART010_CR_RTIE
);
102 writel(cr
, port
->membase
+ UART010_CR
);
105 static void pl010_enable_ms(struct uart_port
*port
)
109 cr
= readb(port
->membase
+ UART010_CR
);
110 cr
|= UART010_CR_MSIE
;
111 writel(cr
, port
->membase
+ UART010_CR
);
116 pl010_rx_chars(struct uart_port
*port
, struct pt_regs
*regs
)
118 pl010_rx_chars(struct uart_port
*port
)
121 struct tty_struct
*tty
= port
->info
->tty
;
122 unsigned int status
, ch
, flag
, rsr
, max_count
= 256;
124 status
= readb(port
->membase
+ UART01x_FR
);
125 while (UART_RX_DATA(status
) && max_count
--) {
126 ch
= readb(port
->membase
+ UART01x_DR
);
132 * Note that the error handling code is
133 * out of the main execution path
135 rsr
= readb(port
->membase
+ UART01x_RSR
) | UART_DUMMY_RSR_RX
;
136 if (unlikely(rsr
& UART01x_RSR_ANY
)) {
137 if (rsr
& UART01x_RSR_BE
) {
138 rsr
&= ~(UART01x_RSR_FE
| UART01x_RSR_PE
);
140 if (uart_handle_break(port
))
142 } else if (rsr
& UART01x_RSR_PE
)
143 port
->icount
.parity
++;
144 else if (rsr
& UART01x_RSR_FE
)
145 port
->icount
.frame
++;
146 if (rsr
& UART01x_RSR_OE
)
147 port
->icount
.overrun
++;
149 rsr
&= port
->read_status_mask
;
151 if (rsr
& UART01x_RSR_BE
)
153 else if (rsr
& UART01x_RSR_PE
)
155 else if (rsr
& UART01x_RSR_FE
)
159 if (uart_handle_sysrq_char(port
, ch
, regs
))
162 uart_insert_char(port
, rsr
, UART01x_RSR_OE
, ch
, flag
);
165 status
= readb(port
->membase
+ UART01x_FR
);
167 tty_flip_buffer_push(tty
);
171 static void pl010_tx_chars(struct uart_port
*port
)
173 struct circ_buf
*xmit
= &port
->info
->xmit
;
177 writel(port
->x_char
, port
->membase
+ UART01x_DR
);
182 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
187 count
= port
->fifosize
>> 1;
189 writel(xmit
->buf
[xmit
->tail
], port
->membase
+ UART01x_DR
);
190 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
192 if (uart_circ_empty(xmit
))
194 } while (--count
> 0);
196 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
197 uart_write_wakeup(port
);
199 if (uart_circ_empty(xmit
))
203 static void pl010_modem_status(struct uart_port
*port
)
205 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
206 unsigned int status
, delta
;
208 writel(0, uap
->port
.membase
+ UART010_ICR
);
210 status
= readb(uap
->port
.membase
+ UART01x_FR
) & UART01x_FR_MODEM_ANY
;
212 delta
= status
^ uap
->old_status
;
213 uap
->old_status
= status
;
218 if (delta
& UART01x_FR_DCD
)
219 uart_handle_dcd_change(&uap
->port
, status
& UART01x_FR_DCD
);
221 if (delta
& UART01x_FR_DSR
)
222 uap
->port
.icount
.dsr
++;
224 if (delta
& UART01x_FR_CTS
)
225 uart_handle_cts_change(&uap
->port
, status
& UART01x_FR_CTS
);
227 wake_up_interruptible(&uap
->port
.info
->delta_msr_wait
);
230 static irqreturn_t
pl010_int(int irq
, void *dev_id
, struct pt_regs
*regs
)
232 struct uart_port
*port
= dev_id
;
233 unsigned int status
, pass_counter
= AMBA_ISR_PASS_LIMIT
;
236 spin_lock(&port
->lock
);
238 status
= readb(port
->membase
+ UART010_IIR
);
241 if (status
& (UART010_IIR_RTIS
| UART010_IIR_RIS
))
243 pl010_rx_chars(port
, regs
);
245 pl010_rx_chars(port
);
247 if (status
& UART010_IIR_MIS
)
248 pl010_modem_status(port
);
249 if (status
& UART010_IIR_TIS
)
250 pl010_tx_chars(port
);
252 if (pass_counter
-- == 0)
255 status
= readb(port
->membase
+ UART010_IIR
);
256 } while (status
& (UART010_IIR_RTIS
| UART010_IIR_RIS
|
261 spin_unlock(&port
->lock
);
263 return IRQ_RETVAL(handled
);
266 static unsigned int pl010_tx_empty(struct uart_port
*port
)
268 return readb(port
->membase
+ UART01x_FR
) & UART01x_FR_BUSY
? 0 : TIOCSER_TEMT
;
271 static unsigned int pl010_get_mctrl(struct uart_port
*port
)
273 unsigned int result
= 0;
276 status
= readb(port
->membase
+ UART01x_FR
);
277 if (status
& UART01x_FR_DCD
)
279 if (status
& UART01x_FR_DSR
)
281 if (status
& UART01x_FR_CTS
)
287 static void pl010_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
289 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
292 uap
->data
->set_mctrl(uap
->dev
, uap
->port
.membase
, mctrl
);
295 static void pl010_break_ctl(struct uart_port
*port
, int break_state
)
300 spin_lock_irqsave(&port
->lock
, flags
);
301 lcr_h
= readb(port
->membase
+ UART010_LCRH
);
302 if (break_state
== -1)
303 lcr_h
|= UART01x_LCRH_BRK
;
305 lcr_h
&= ~UART01x_LCRH_BRK
;
306 writel(lcr_h
, port
->membase
+ UART010_LCRH
);
307 spin_unlock_irqrestore(&port
->lock
, flags
);
310 static int pl010_startup(struct uart_port
*port
)
312 struct uart_amba_port
*uap
= (struct uart_amba_port
*)port
;
318 retval
= request_irq(port
->irq
, pl010_int
, 0, "uart-pl010", port
);
323 * initialise the old status of the modem signals
325 uap
->old_status
= readb(port
->membase
+ UART01x_FR
) & UART01x_FR_MODEM_ANY
;
328 * Finally, enable interrupts
330 writel(UART01x_CR_UARTEN
| UART010_CR_RIE
| UART010_CR_RTIE
,
331 port
->membase
+ UART010_CR
);
336 static void pl010_shutdown(struct uart_port
*port
)
341 free_irq(port
->irq
, port
);
344 * disable all interrupts, disable the port
346 writel(0, port
->membase
+ UART010_CR
);
348 /* disable break condition and fifos */
349 writel(readb(port
->membase
+ UART010_LCRH
) &
350 ~(UART01x_LCRH_BRK
| UART01x_LCRH_FEN
),
351 port
->membase
+ UART010_LCRH
);
355 pl010_set_termios(struct uart_port
*port
, struct termios
*termios
,
358 unsigned int lcr_h
, old_cr
;
360 unsigned int baud
, quot
;
363 * Ask the core to calculate the divisor for us.
365 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
366 quot
= uart_get_divisor(port
, baud
);
368 switch (termios
->c_cflag
& CSIZE
) {
370 lcr_h
= UART01x_LCRH_WLEN_5
;
373 lcr_h
= UART01x_LCRH_WLEN_6
;
376 lcr_h
= UART01x_LCRH_WLEN_7
;
379 lcr_h
= UART01x_LCRH_WLEN_8
;
382 if (termios
->c_cflag
& CSTOPB
)
383 lcr_h
|= UART01x_LCRH_STP2
;
384 if (termios
->c_cflag
& PARENB
) {
385 lcr_h
|= UART01x_LCRH_PEN
;
386 if (!(termios
->c_cflag
& PARODD
))
387 lcr_h
|= UART01x_LCRH_EPS
;
389 if (port
->fifosize
> 1)
390 lcr_h
|= UART01x_LCRH_FEN
;
392 spin_lock_irqsave(&port
->lock
, flags
);
395 * Update the per-port timeout.
397 uart_update_timeout(port
, termios
->c_cflag
, baud
);
399 port
->read_status_mask
= UART01x_RSR_OE
;
400 if (termios
->c_iflag
& INPCK
)
401 port
->read_status_mask
|= UART01x_RSR_FE
| UART01x_RSR_PE
;
402 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
403 port
->read_status_mask
|= UART01x_RSR_BE
;
406 * Characters to ignore
408 port
->ignore_status_mask
= 0;
409 if (termios
->c_iflag
& IGNPAR
)
410 port
->ignore_status_mask
|= UART01x_RSR_FE
| UART01x_RSR_PE
;
411 if (termios
->c_iflag
& IGNBRK
) {
412 port
->ignore_status_mask
|= UART01x_RSR_BE
;
414 * If we're ignoring parity and break indicators,
415 * ignore overruns too (for real raw support).
417 if (termios
->c_iflag
& IGNPAR
)
418 port
->ignore_status_mask
|= UART01x_RSR_OE
;
422 * Ignore all characters if CREAD is not set.
424 if ((termios
->c_cflag
& CREAD
) == 0)
425 port
->ignore_status_mask
|= UART_DUMMY_RSR_RX
;
427 /* first, disable everything */
428 old_cr
= readb(port
->membase
+ UART010_CR
) & ~UART010_CR_MSIE
;
430 if (UART_ENABLE_MS(port
, termios
->c_cflag
))
431 old_cr
|= UART010_CR_MSIE
;
433 writel(0, port
->membase
+ UART010_CR
);
437 writel((quot
& 0xf00) >> 8, port
->membase
+ UART010_LCRM
);
438 writel(quot
& 0xff, port
->membase
+ UART010_LCRL
);
441 * ----------v----------v----------v----------v-----
442 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
443 * ----------^----------^----------^----------^-----
445 writel(lcr_h
, port
->membase
+ UART010_LCRH
);
446 writel(old_cr
, port
->membase
+ UART010_CR
);
448 spin_unlock_irqrestore(&port
->lock
, flags
);
451 static const char *pl010_type(struct uart_port
*port
)
453 return port
->type
== PORT_AMBA
? "AMBA" : NULL
;
457 * Release the memory region(s) being used by 'port'
459 static void pl010_release_port(struct uart_port
*port
)
461 release_mem_region(port
->mapbase
, UART_PORT_SIZE
);
465 * Request the memory region(s) being used by 'port'
467 static int pl010_request_port(struct uart_port
*port
)
469 return request_mem_region(port
->mapbase
, UART_PORT_SIZE
, "uart-pl010")
470 != NULL
? 0 : -EBUSY
;
474 * Configure/autoconfigure the port.
476 static void pl010_config_port(struct uart_port
*port
, int flags
)
478 if (flags
& UART_CONFIG_TYPE
) {
479 port
->type
= PORT_AMBA
;
480 pl010_request_port(port
);
485 * verify the new serial_struct (for TIOCSSERIAL).
487 static int pl010_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
490 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_AMBA
)
492 if (ser
->irq
< 0 || ser
->irq
>= NR_IRQS
)
494 if (ser
->baud_base
< 9600)
499 static struct uart_ops amba_pl010_pops
= {
500 .tx_empty
= pl010_tx_empty
,
501 .set_mctrl
= pl010_set_mctrl
,
502 .get_mctrl
= pl010_get_mctrl
,
503 .stop_tx
= pl010_stop_tx
,
504 .start_tx
= pl010_start_tx
,
505 .stop_rx
= pl010_stop_rx
,
506 .enable_ms
= pl010_enable_ms
,
507 .break_ctl
= pl010_break_ctl
,
508 .startup
= pl010_startup
,
509 .shutdown
= pl010_shutdown
,
510 .set_termios
= pl010_set_termios
,
512 .release_port
= pl010_release_port
,
513 .request_port
= pl010_request_port
,
514 .config_port
= pl010_config_port
,
515 .verify_port
= pl010_verify_port
,
518 static struct uart_amba_port
*amba_ports
[UART_NR
];
520 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
522 static void pl010_console_putchar(struct uart_port
*port
, int ch
)
527 status
= readb(port
->membase
+ UART01x_FR
);
529 } while (!UART_TX_READY(status
));
530 writel(ch
, port
->membase
+ UART01x_DR
);
534 pl010_console_write(struct console
*co
, const char *s
, unsigned int count
)
536 struct uart_port
*port
= &amba_ports
[co
->index
]->port
;
537 unsigned int status
, old_cr
;
540 * First save the CR then disable the interrupts
542 old_cr
= readb(port
->membase
+ UART010_CR
);
543 writel(UART01x_CR_UARTEN
, port
->membase
+ UART010_CR
);
545 uart_console_write(port
, s
, count
, pl010_console_putchar
);
548 * Finally, wait for transmitter to become empty
549 * and restore the TCR
552 status
= readb(port
->membase
+ UART01x_FR
);
554 } while (status
& UART01x_FR_BUSY
);
555 writel(old_cr
, port
->membase
+ UART010_CR
);
559 pl010_console_get_options(struct uart_port
*port
, int *baud
,
560 int *parity
, int *bits
)
562 if (readb(port
->membase
+ UART010_CR
) & UART01x_CR_UARTEN
) {
563 unsigned int lcr_h
, quot
;
564 lcr_h
= readb(port
->membase
+ UART010_LCRH
);
567 if (lcr_h
& UART01x_LCRH_PEN
) {
568 if (lcr_h
& UART01x_LCRH_EPS
)
574 if ((lcr_h
& 0x60) == UART01x_LCRH_WLEN_7
)
579 quot
= readb(port
->membase
+ UART010_LCRL
) | readb(port
->membase
+ UART010_LCRM
) << 8;
580 *baud
= port
->uartclk
/ (16 * (quot
+ 1));
584 static int __init
pl010_console_setup(struct console
*co
, char *options
)
586 struct uart_port
*port
;
593 * Check whether an invalid uart number has been specified, and
594 * if so, search for the first available port that does have
597 if (co
->index
>= UART_NR
)
599 port
= &amba_ports
[co
->index
]->port
;
602 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
604 pl010_console_get_options(port
, &baud
, &parity
, &bits
);
606 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
609 static struct uart_driver amba_reg
;
610 static struct console amba_console
= {
612 .write
= pl010_console_write
,
613 .device
= uart_console_device
,
614 .setup
= pl010_console_setup
,
615 .flags
= CON_PRINTBUFFER
,
620 #define AMBA_CONSOLE &amba_console
622 #define AMBA_CONSOLE NULL
625 static struct uart_driver amba_reg
= {
626 .owner
= THIS_MODULE
,
627 .driver_name
= "ttyAM",
629 .major
= SERIAL_AMBA_MAJOR
,
630 .minor
= SERIAL_AMBA_MINOR
,
632 .cons
= AMBA_CONSOLE
,
635 static int pl010_probe(struct amba_device
*dev
, void *id
)
637 struct uart_amba_port
*port
;
641 for (i
= 0; i
< ARRAY_SIZE(amba_ports
); i
++)
642 if (amba_ports
[i
] == NULL
)
645 if (i
== ARRAY_SIZE(amba_ports
)) {
650 port
= kzalloc(sizeof(struct uart_amba_port
), GFP_KERNEL
);
656 base
= ioremap(dev
->res
.start
, PAGE_SIZE
);
662 port
->port
.dev
= &dev
->dev
;
663 port
->port
.mapbase
= dev
->res
.start
;
664 port
->port
.membase
= base
;
665 port
->port
.iotype
= UPIO_MEM
;
666 port
->port
.irq
= dev
->irq
[0];
667 port
->port
.uartclk
= 14745600;
668 port
->port
.fifosize
= 16;
669 port
->port
.ops
= &amba_pl010_pops
;
670 port
->port
.flags
= UPF_BOOT_AUTOCONF
;
673 port
->data
= dev
->dev
.platform_data
;
675 amba_ports
[i
] = port
;
677 amba_set_drvdata(dev
, port
);
678 ret
= uart_add_one_port(&amba_reg
, &port
->port
);
680 amba_set_drvdata(dev
, NULL
);
681 amba_ports
[i
] = NULL
;
691 static int pl010_remove(struct amba_device
*dev
)
693 struct uart_amba_port
*port
= amba_get_drvdata(dev
);
696 amba_set_drvdata(dev
, NULL
);
698 uart_remove_one_port(&amba_reg
, &port
->port
);
700 for (i
= 0; i
< ARRAY_SIZE(amba_ports
); i
++)
701 if (amba_ports
[i
] == port
)
702 amba_ports
[i
] = NULL
;
704 iounmap(port
->port
.membase
);
710 static int pl010_suspend(struct amba_device
*dev
, pm_message_t state
)
712 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
715 uart_suspend_port(&amba_reg
, &uap
->port
);
720 static int pl010_resume(struct amba_device
*dev
)
722 struct uart_amba_port
*uap
= amba_get_drvdata(dev
);
725 uart_resume_port(&amba_reg
, &uap
->port
);
730 static struct amba_id pl010_ids
[] __initdata
= {
738 static struct amba_driver pl010_driver
= {
740 .name
= "uart-pl010",
742 .id_table
= pl010_ids
,
743 .probe
= pl010_probe
,
744 .remove
= pl010_remove
,
745 .suspend
= pl010_suspend
,
746 .resume
= pl010_resume
,
749 static int __init
pl010_init(void)
753 printk(KERN_INFO
"Serial: AMBA driver $Revision: 1.41 $\n");
755 ret
= uart_register_driver(&amba_reg
);
757 ret
= amba_driver_register(&pl010_driver
);
759 uart_unregister_driver(&amba_reg
);
764 static void __exit
pl010_exit(void)
766 amba_driver_unregister(&pl010_driver
);
767 uart_unregister_driver(&amba_reg
);
770 module_init(pl010_init
);
771 module_exit(pl010_exit
);
773 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
774 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
775 MODULE_LICENSE("GPL");