drivers/serial/amba-pl010.c

   1 /*
   2  *  linux/drivers/char/amba.c
   3  *
   4  *  Driver for AMBA serial ports
   5  *
   6  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   7  *
   8  *  Copyright 1999 ARM Limited
   9  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  *
  25  *  $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
  26  *
  27  * This is a generic driver for ARM AMBA-type serial ports.  They
  28  * have a lot of 16550-like features, but are not register compatible.
  29  * Note that although they do have CTS, DCD and DSR inputs, they do
  30  * not have an RI input, nor do they have DTR or RTS outputs.  If
  31  * required, these have to be supplied via some other means (eg, GPIO)
  32  * and hooked into this driver.
  33  */
  34
  35 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  36 #define SUPPORT_SYSRQ
  37 #endif
  38
  39 #include <linux/module.h>
  40 #include <linux/ioport.h>
  41 #include <linux/init.h>
  42 #include <linux/console.h>
  43 #include <linux/sysrq.h>
  44 #include <linux/device.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial_core.h>
  48 #include <linux/serial.h>
  49 #include <linux/amba/bus.h>
  50 #include <linux/amba/serial.h>
  51 #include <linux/clk.h>
  52
  53 #include <asm/io.h>
  54
  55 #define UART_NR         8
  56
  57 #define SERIAL_AMBA_MAJOR       204
  58 #define SERIAL_AMBA_MINOR       16
  59 #define SERIAL_AMBA_NR          UART_NR
  60
  61 #define AMBA_ISR_PASS_LIMIT     256
  62
  63 #define UART_RX_DATA(s)         (((s) & UART01x_FR_RXFE) == 0)
  64 #define UART_TX_READY(s)        (((s) & UART01x_FR_TXFF) == 0)
  65
  66 #define UART_DUMMY_RSR_RX       256
  67 #define UART_PORT_SIZE          64
  68
  69 /*
  70  * We wrap our port structure around the generic uart_port.
  71  */
  72 struct uart_amba_port {
  73         struct uart_port        port;
  74         struct clk              *clk;
  75         struct amba_device      *dev;
  76         struct amba_pl010_data  *data;
  77         unsigned int            old_status;
  78 };
  79
  80 static void pl010_stop_tx(struct uart_port *port)
  81 {
  82         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  83         unsigned int cr;
  84
  85         cr = readb(uap->port.membase + UART010_CR);
  86         cr &= ~UART010_CR_TIE;
  87         writel(cr, uap->port.membase + UART010_CR);
  88 }
  89
  90 static void pl010_start_tx(struct uart_port *port)
  91 {
  92         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  93         unsigned int cr;
  94
  95         cr = readb(uap->port.membase + UART010_CR);
  96         cr |= UART010_CR_TIE;
  97         writel(cr, uap->port.membase + UART010_CR);
  98 }
  99
 100 static void pl010_stop_rx(struct uart_port *port)
 101 {
 102         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 103         unsigned int cr;
 104
 105         cr = readb(uap->port.membase + UART010_CR);
 106         cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
 107         writel(cr, uap->port.membase + UART010_CR);
 108 }
 109
 110 static void pl010_enable_ms(struct uart_port *port)
 111 {
 112         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 113         unsigned int cr;
 114
 115         cr = readb(uap->port.membase + UART010_CR);
 116         cr |= UART010_CR_MSIE;
 117         writel(cr, uap->port.membase + UART010_CR);
 118 }
 119
 120 static void pl010_rx_chars(struct uart_amba_port *uap)
 121 {
 122         struct tty_struct *tty = uap->port.info->tty;
 123         unsigned int status, ch, flag, rsr, max_count = 256;
 124
 125         status = readb(uap->port.membase + UART01x_FR);
 126         while (UART_RX_DATA(status) && max_count--) {
 127                 ch = readb(uap->port.membase + UART01x_DR);
 128                 flag = TTY_NORMAL;
 129
 130                 uap->port.icount.rx++;
 131
 132                 /*
 133                  * Note that the error handling code is
 134                  * out of the main execution path
 135                  */
 136                 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
 137                 if (unlikely(rsr & UART01x_RSR_ANY)) {
 138                         writel(0, uap->port.membase + UART01x_ECR);
 139
 140                         if (rsr & UART01x_RSR_BE) {
 141                                 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
 142                                 uap->port.icount.brk++;
 143                                 if (uart_handle_break(&uap->port))
 144                                         goto ignore_char;
 145                         } else if (rsr & UART01x_RSR_PE)
 146                                 uap->port.icount.parity++;
 147                         else if (rsr & UART01x_RSR_FE)
 148                                 uap->port.icount.frame++;
 149                         if (rsr & UART01x_RSR_OE)
 150                                 uap->port.icount.overrun++;
 151
 152                         rsr &= uap->port.read_status_mask;
 153
 154                         if (rsr & UART01x_RSR_BE)
 155                                 flag = TTY_BREAK;
 156                         else if (rsr & UART01x_RSR_PE)
 157                                 flag = TTY_PARITY;
 158                         else if (rsr & UART01x_RSR_FE)
 159                                 flag = TTY_FRAME;
 160                 }
 161
 162                 if (uart_handle_sysrq_char(&uap->port, ch))
 163                         goto ignore_char;
 164
 165                 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
 166
 167         ignore_char:
 168                 status = readb(uap->port.membase + UART01x_FR);
 169         }
 170         tty_flip_buffer_push(tty);
 171         return;
 172 }
 173
 174 static void pl010_tx_chars(struct uart_amba_port *uap)
 175 {
 176         struct circ_buf *xmit = &uap->port.info->xmit;
 177         int count;
 178
 179         if (uap->port.x_char) {
 180                 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
 181                 uap->port.icount.tx++;
 182                 uap->port.x_char = 0;
 183                 return;
 184         }
 185         if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
 186                 pl010_stop_tx(&uap->port);
 187                 return;
 188         }
 189
 190         count = uap->port.fifosize >> 1;
 191         do {
 192                 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
 193                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 194                 uap->port.icount.tx++;
 195                 if (uart_circ_empty(xmit))
 196                         break;
 197         } while (--count > 0);
 198
 199         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 200                 uart_write_wakeup(&uap->port);
 201
 202         if (uart_circ_empty(xmit))
 203                 pl010_stop_tx(&uap->port);
 204 }
 205
 206 static void pl010_modem_status(struct uart_amba_port *uap)
 207 {
 208         unsigned int status, delta;
 209
 210         writel(0, uap->port.membase + UART010_ICR);
 211
 212         status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 213
 214         delta = status ^ uap->old_status;
 215         uap->old_status = status;
 216
 217         if (!delta)
 218                 return;
 219
 220         if (delta & UART01x_FR_DCD)
 221                 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
 222
 223         if (delta & UART01x_FR_DSR)
 224                 uap->port.icount.dsr++;
 225
 226         if (delta & UART01x_FR_CTS)
 227                 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
 228
 229         wake_up_interruptible(&uap->port.info->delta_msr_wait);
 230 }
 231
 232 static irqreturn_t pl010_int(int irq, void *dev_id)
 233 {
 234         struct uart_amba_port *uap = dev_id;
 235         unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
 236         int handled = 0;
 237
 238         spin_lock(&uap->port.lock);
 239
 240         status = readb(uap->port.membase + UART010_IIR);
 241         if (status) {
 242                 do {
 243                         if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
 244                                 pl010_rx_chars(uap);
 245                         if (status & UART010_IIR_MIS)
 246                                 pl010_modem_status(uap);
 247                         if (status & UART010_IIR_TIS)
 248                                 pl010_tx_chars(uap);
 249
 250                         if (pass_counter-- == 0)
 251                                 break;
 252
 253                         status = readb(uap->port.membase + UART010_IIR);
 254                 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
 255                                    UART010_IIR_TIS));
 256                 handled = 1;
 257         }
 258
 259         spin_unlock(&uap->port.lock);
 260
 261         return IRQ_RETVAL(handled);
 262 }
 263
 264 static unsigned int pl010_tx_empty(struct uart_port *port)
 265 {
 266         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 267         unsigned int status = readb(uap->port.membase + UART01x_FR);
 268         return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
 269 }
 270
 271 static unsigned int pl010_get_mctrl(struct uart_port *port)
 272 {
 273         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 274         unsigned int result = 0;
 275         unsigned int status;
 276
 277         status = readb(uap->port.membase + UART01x_FR);
 278         if (status & UART01x_FR_DCD)
 279                 result |= TIOCM_CAR;
 280         if (status & UART01x_FR_DSR)
 281                 result |= TIOCM_DSR;
 282         if (status & UART01x_FR_CTS)
 283                 result |= TIOCM_CTS;
 284
 285         return result;
 286 }
 287
 288 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
 289 {
 290         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 291
 292         if (uap->data)
 293                 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
 294 }
 295
 296 static void pl010_break_ctl(struct uart_port *port, int break_state)
 297 {
 298         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 299         unsigned long flags;
 300         unsigned int lcr_h;
 301
 302         spin_lock_irqsave(&uap->port.lock, flags);
 303         lcr_h = readb(uap->port.membase + UART010_LCRH);
 304         if (break_state == -1)
 305                 lcr_h |= UART01x_LCRH_BRK;
 306         else
 307                 lcr_h &= ~UART01x_LCRH_BRK;
 308         writel(lcr_h, uap->port.membase + UART010_LCRH);
 309         spin_unlock_irqrestore(&uap->port.lock, flags);
 310 }
 311
 312 static int pl010_startup(struct uart_port *port)
 313 {
 314         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 315         int retval;
 316
 317         /*
 318          * Try to enable the clock producer.
 319          */
 320         retval = clk_enable(uap->clk);
 321         if (retval)
 322                 goto out;
 323
 324         uap->port.uartclk = clk_get_rate(uap->clk);
 325
 326         /*
 327          * Allocate the IRQ
 328          */
 329         retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
 330         if (retval)
 331                 goto clk_dis;
 332
 333         /*
 334          * initialise the old status of the modem signals
 335          */
 336         uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 337
 338         /*
 339          * Finally, enable interrupts
 340          */
 341         writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
 342                uap->port.membase + UART010_CR);
 343
 344         return 0;
 345
 346  clk_dis:
 347         clk_disable(uap->clk);
 348  out:
 349         return retval;
 350 }
 351
 352 static void pl010_shutdown(struct uart_port *port)
 353 {
 354         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 355
 356         /*
 357          * Free the interrupt
 358          */
 359         free_irq(uap->port.irq, uap);
 360
 361         /*
 362          * disable all interrupts, disable the port
 363          */
 364         writel(0, uap->port.membase + UART010_CR);
 365
 366         /* disable break condition and fifos */
 367         writel(readb(uap->port.membase + UART010_LCRH) &
 368                 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
 369                uap->port.membase + UART010_LCRH);
 370
 371         /*
 372          * Shut down the clock producer
 373          */
 374         clk_disable(uap->clk);
 375 }
 376
 377 static void
 378 pl010_set_termios(struct uart_port *port, struct ktermios *termios,
 379                      struct ktermios *old)
 380 {
 381         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 382         unsigned int lcr_h, old_cr;
 383         unsigned long flags;
 384         unsigned int baud, quot;
 385
 386         /*
 387          * Ask the core to calculate the divisor for us.
 388          */
 389         baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
 390         quot = uart_get_divisor(port, baud);
 391
 392         switch (termios->c_cflag & CSIZE) {
 393         case CS5:
 394                 lcr_h = UART01x_LCRH_WLEN_5;
 395                 break;
 396         case CS6:
 397                 lcr_h = UART01x_LCRH_WLEN_6;
 398                 break;
 399         case CS7:
 400                 lcr_h = UART01x_LCRH_WLEN_7;
 401                 break;
 402         default: // CS8
 403                 lcr_h = UART01x_LCRH_WLEN_8;
 404                 break;
 405         }
 406         if (termios->c_cflag & CSTOPB)
 407                 lcr_h |= UART01x_LCRH_STP2;
 408         if (termios->c_cflag & PARENB) {
 409                 lcr_h |= UART01x_LCRH_PEN;
 410                 if (!(termios->c_cflag & PARODD))
 411                         lcr_h |= UART01x_LCRH_EPS;
 412         }
 413         if (uap->port.fifosize > 1)
 414                 lcr_h |= UART01x_LCRH_FEN;
 415
 416         spin_lock_irqsave(&uap->port.lock, flags);
 417
 418         /*
 419          * Update the per-port timeout.
 420          */
 421         uart_update_timeout(port, termios->c_cflag, baud);
 422
 423         uap->port.read_status_mask = UART01x_RSR_OE;
 424         if (termios->c_iflag & INPCK)
 425                 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
 426         if (termios->c_iflag & (BRKINT | PARMRK))
 427                 uap->port.read_status_mask |= UART01x_RSR_BE;
 428
 429         /*
 430          * Characters to ignore
 431          */
 432         uap->port.ignore_status_mask = 0;
 433         if (termios->c_iflag & IGNPAR)
 434                 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
 435         if (termios->c_iflag & IGNBRK) {
 436                 uap->port.ignore_status_mask |= UART01x_RSR_BE;
 437                 /*
 438                  * If we're ignoring parity and break indicators,
 439                  * ignore overruns too (for real raw support).
 440                  */
 441                 if (termios->c_iflag & IGNPAR)
 442                         uap->port.ignore_status_mask |= UART01x_RSR_OE;
 443         }
 444
 445         /*
 446          * Ignore all characters if CREAD is not set.
 447          */
 448         if ((termios->c_cflag & CREAD) == 0)
 449                 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
 450
 451         /* first, disable everything */
 452         old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 453
 454         if (UART_ENABLE_MS(port, termios->c_cflag))
 455                 old_cr |= UART010_CR_MSIE;
 456
 457         writel(0, uap->port.membase + UART010_CR);
 458
 459         /* Set baud rate */
 460         quot -= 1;
 461         writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
 462         writel(quot & 0xff, uap->port.membase + UART010_LCRL);
 463
 464         /*
 465          * ----------v----------v----------v----------v-----
 466          * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
 467          * ----------^----------^----------^----------^-----
 468          */
 469         writel(lcr_h, uap->port.membase + UART010_LCRH);
 470         writel(old_cr, uap->port.membase + UART010_CR);
 471
 472         spin_unlock_irqrestore(&uap->port.lock, flags);
 473 }
 474
 475 static const char *pl010_type(struct uart_port *port)
 476 {
 477         return port->type == PORT_AMBA ? "AMBA" : NULL;
 478 }
 479
 480 /*
 481  * Release the memory region(s) being used by 'port'
 482  */
 483 static void pl010_release_port(struct uart_port *port)
 484 {
 485         release_mem_region(port->mapbase, UART_PORT_SIZE);
 486 }
 487
 488 /*
 489  * Request the memory region(s) being used by 'port'
 490  */
 491 static int pl010_request_port(struct uart_port *port)
 492 {
 493         return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
 494                         != NULL ? 0 : -EBUSY;
 495 }
 496
 497 /*
 498  * Configure/autoconfigure the port.
 499  */
 500 static void pl010_config_port(struct uart_port *port, int flags)
 501 {
 502         if (flags & UART_CONFIG_TYPE) {
 503                 port->type = PORT_AMBA;
 504                 pl010_request_port(port);
 505         }
 506 }
 507
 508 /*
 509  * verify the new serial_struct (for TIOCSSERIAL).
 510  */
 511 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
 512 {
 513         int ret = 0;
 514         if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
 515                 ret = -EINVAL;
 516         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 517                 ret = -EINVAL;
 518         if (ser->baud_base < 9600)
 519                 ret = -EINVAL;
 520         return ret;
 521 }
 522
 523 static struct uart_ops amba_pl010_pops = {
 524         .tx_empty       = pl010_tx_empty,
 525         .set_mctrl      = pl010_set_mctrl,
 526         .get_mctrl      = pl010_get_mctrl,
 527         .stop_tx        = pl010_stop_tx,
 528         .start_tx       = pl010_start_tx,
 529         .stop_rx        = pl010_stop_rx,
 530         .enable_ms      = pl010_enable_ms,
 531         .break_ctl      = pl010_break_ctl,
 532         .startup        = pl010_startup,
 533         .shutdown       = pl010_shutdown,
 534         .set_termios    = pl010_set_termios,
 535         .type           = pl010_type,
 536         .release_port   = pl010_release_port,
 537         .request_port   = pl010_request_port,
 538         .config_port    = pl010_config_port,
 539         .verify_port    = pl010_verify_port,
 540 };
 541
 542 static struct uart_amba_port *amba_ports[UART_NR];
 543
 544 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
 545
 546 static void pl010_console_putchar(struct uart_port *port, int ch)
 547 {
 548         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 549         unsigned int status;
 550
 551         do {
 552                 status = readb(uap->port.membase + UART01x_FR);
 553                 barrier();
 554         } while (!UART_TX_READY(status));
 555         writel(ch, uap->port.membase + UART01x_DR);
 556 }
 557
 558 static void
 559 pl010_console_write(struct console *co, const char *s, unsigned int count)
 560 {
 561         struct uart_amba_port *uap = amba_ports[co->index];
 562         unsigned int status, old_cr;
 563
 564         clk_enable(uap->clk);
 565
 566         /*
 567          *      First save the CR then disable the interrupts
 568          */
 569         old_cr = readb(uap->port.membase + UART010_CR);
 570         writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
 571
 572         uart_console_write(&uap->port, s, count, pl010_console_putchar);
 573
 574         /*
 575          *      Finally, wait for transmitter to become empty
 576          *      and restore the TCR
 577          */
 578         do {
 579                 status = readb(uap->port.membase + UART01x_FR);
 580                 barrier();
 581         } while (status & UART01x_FR_BUSY);
 582         writel(old_cr, uap->port.membase + UART010_CR);
 583
 584         clk_disable(uap->clk);
 585 }
 586
 587 static void __init
 588 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
 589                              int *parity, int *bits)
 590 {
 591         if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 592                 unsigned int lcr_h, quot;
 593                 lcr_h = readb(uap->port.membase + UART010_LCRH);
 594
 595                 *parity = 'n';
 596                 if (lcr_h & UART01x_LCRH_PEN) {
 597                         if (lcr_h & UART01x_LCRH_EPS)
 598                                 *parity = 'e';
 599                         else
 600                                 *parity = 'o';
 601                 }
 602
 603                 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
 604                         *bits = 7;
 605                 else
 606                         *bits = 8;
 607
 608                 quot = readb(uap->port.membase + UART010_LCRL) |
 609                        readb(uap->port.membase + UART010_LCRM) << 8;
 610                 *baud = uap->port.uartclk / (16 * (quot + 1));
 611         }
 612 }
 613
 614 static int __init pl010_console_setup(struct console *co, char *options)
 615 {
 616         struct uart_amba_port *uap;
 617         int baud = 38400;
 618         int bits = 8;
 619         int parity = 'n';
 620         int flow = 'n';
 621
 622         /*
 623          * Check whether an invalid uart number has been specified, and
 624          * if so, search for the first available port that does have
 625          * console support.
 626          */
 627         if (co->index >= UART_NR)
 628                 co->index = 0;
 629         uap = amba_ports[co->index];
 630         if (!uap)
 631                 return -ENODEV;
 632
 633         uap->port.uartclk = clk_get_rate(uap->clk);
 634
 635         if (options)
 636                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 637         else
 638                 pl010_console_get_options(uap, &baud, &parity, &bits);
 639
 640         return uart_set_options(&uap->port, co, baud, parity, bits, flow);
 641 }
 642
 643 static struct uart_driver amba_reg;
 644 static struct console amba_console = {
 645         .name           = "ttyAM",
 646         .write          = pl010_console_write,
 647         .device         = uart_console_device,
 648         .setup          = pl010_console_setup,
 649         .flags          = CON_PRINTBUFFER,
 650         .index          = -1,
 651         .data           = &amba_reg,
 652 };
 653
 654 #define AMBA_CONSOLE    &amba_console
 655 #else
 656 #define AMBA_CONSOLE    NULL
 657 #endif
 658
 659 static struct uart_driver amba_reg = {
 660         .owner                  = THIS_MODULE,
 661         .driver_name            = "ttyAM",
 662         .dev_name               = "ttyAM",
 663         .major                  = SERIAL_AMBA_MAJOR,
 664         .minor                  = SERIAL_AMBA_MINOR,
 665         .nr                     = UART_NR,
 666         .cons                   = AMBA_CONSOLE,
 667 };
 668
 669 static int pl010_probe(struct amba_device *dev, void *id)
 670 {
 671         struct uart_amba_port *uap;
 672         void __iomem *base;
 673         int i, ret;
 674
 675         for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
 676                 if (amba_ports[i] == NULL)
 677                         break;
 678
 679         if (i == ARRAY_SIZE(amba_ports)) {
 680                 ret = -EBUSY;
 681                 goto out;
 682         }
 683
 684         uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
 685         if (!uap) {
 686                 ret = -ENOMEM;
 687                 goto out;
 688         }
 689
 690         base = ioremap(dev->res.start, PAGE_SIZE);
 691         if (!base) {
 692                 ret = -ENOMEM;
 693                 goto free;
 694         }
 695
 696         uap->clk = clk_get(&dev->dev, "UARTCLK");
 697         if (IS_ERR(uap->clk)) {
 698                 ret = PTR_ERR(uap->clk);
 699                 goto unmap;
 700         }
 701
 702         uap->port.dev = &dev->dev;
 703         uap->port.mapbase = dev->res.start;
 704         uap->port.membase = base;
 705         uap->port.iotype = UPIO_MEM;
 706         uap->port.irq = dev->irq[0];
 707         uap->port.fifosize = 16;
 708         uap->port.ops = &amba_pl010_pops;
 709         uap->port.flags = UPF_BOOT_AUTOCONF;
 710         uap->port.line = i;
 711         uap->dev = dev;
 712         uap->data = dev->dev.platform_data;
 713
 714         amba_ports[i] = uap;
 715
 716         amba_set_drvdata(dev, uap);
 717         ret = uart_add_one_port(&amba_reg, &uap->port);
 718         if (ret) {
 719                 amba_set_drvdata(dev, NULL);
 720                 amba_ports[i] = NULL;
 721                 clk_put(uap->clk);
 722  unmap:
 723                 iounmap(base);
 724  free:
 725                 kfree(uap);
 726         }
 727  out:
 728         return ret;
 729 }
 730
 731 static int pl010_remove(struct amba_device *dev)
 732 {
 733         struct uart_amba_port *uap = amba_get_drvdata(dev);
 734         int i;
 735
 736         amba_set_drvdata(dev, NULL);
 737
 738         uart_remove_one_port(&amba_reg, &uap->port);
 739
 740         for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
 741                 if (amba_ports[i] == uap)
 742                         amba_ports[i] = NULL;
 743
 744         iounmap(uap->port.membase);
 745         clk_put(uap->clk);
 746         kfree(uap);
 747         return 0;
 748 }
 749
 750 static int pl010_suspend(struct amba_device *dev, pm_message_t state)
 751 {
 752         struct uart_amba_port *uap = amba_get_drvdata(dev);
 753
 754         if (uap)
 755                 uart_suspend_port(&amba_reg, &uap->port);
 756
 757         return 0;
 758 }
 759
 760 static int pl010_resume(struct amba_device *dev)
 761 {
 762         struct uart_amba_port *uap = amba_get_drvdata(dev);
 763
 764         if (uap)
 765                 uart_resume_port(&amba_reg, &uap->port);
 766
 767         return 0;
 768 }
 769
 770 static struct amba_id pl010_ids[] __initdata = {
 771         {
 772                 .id     = 0x00041010,
 773                 .mask   = 0x000fffff,
 774         },
 775         { 0, 0 },
 776 };
 777
 778 static struct amba_driver pl010_driver = {
 779         .drv = {
 780                 .name   = "uart-pl010",
 781         },
 782         .id_table       = pl010_ids,
 783         .probe          = pl010_probe,
 784         .remove         = pl010_remove,
 785         .suspend        = pl010_suspend,
 786         .resume         = pl010_resume,
 787 };
 788
 789 static int __init pl010_init(void)
 790 {
 791         int ret;
 792
 793         printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
 794
 795         ret = uart_register_driver(&amba_reg);
 796         if (ret == 0) {
 797                 ret = amba_driver_register(&pl010_driver);
 798                 if (ret)
 799                         uart_unregister_driver(&amba_reg);
 800         }
 801         return ret;
 802 }
 803
 804 static void __exit pl010_exit(void)
 805 {
 806         amba_driver_unregister(&pl010_driver);
 807         uart_unregister_driver(&amba_reg);
 808 }
 809
 810 module_init(pl010_init);
 811 module_exit(pl010_exit);
 812
 813 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
 814 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
 815 MODULE_LICENSE("GPL");