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[mirror_ubuntu-bionic-kernel.git] / drivers / serial / bfin_5xx.c
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
26 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
27 #include <linux/kgdb.h>
28 #include <asm/irq_regs.h>
29 #endif
30
31 #include <asm/gpio.h>
32 #include <mach/bfin_serial_5xx.h>
33
34 #ifdef CONFIG_SERIAL_BFIN_DMA
35 #include <linux/dma-mapping.h>
36 #include <asm/io.h>
37 #include <asm/irq.h>
38 #include <asm/cacheflush.h>
39 #endif
40
41 /* UART name and device definitions */
42 #define BFIN_SERIAL_NAME "ttyBF"
43 #define BFIN_SERIAL_MAJOR 204
44 #define BFIN_SERIAL_MINOR 64
45
46 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
47 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
48
49 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
50 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
51
52 # ifndef CONFIG_SERIAL_BFIN_PIO
53 # error KGDB only support UART in PIO mode.
54 # endif
55
56 static int kgdboc_port_line;
57 static int kgdboc_break_enabled;
58 #endif
59 /*
60 * Setup for console. Argument comes from the menuconfig
61 */
62 #define DMA_RX_XCOUNT 512
63 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
64
65 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
66 #define CTS_CHECK_JIFFIES (HZ / 50)
67
68 #ifdef CONFIG_SERIAL_BFIN_DMA
69 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
70 #else
71 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
72 #endif
73
74 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
75
76 static void bfin_serial_reset_irda(struct uart_port *port);
77
78 /*
79 * interrupts are disabled on entry
80 */
81 static void bfin_serial_stop_tx(struct uart_port *port)
82 {
83 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
84 #ifdef CONFIG_SERIAL_BFIN_DMA
85 struct circ_buf *xmit = &uart->port.info->xmit;
86 #endif
87
88 while (!(UART_GET_LSR(uart) & TEMT))
89 cpu_relax();
90
91 #ifdef CONFIG_SERIAL_BFIN_DMA
92 disable_dma(uart->tx_dma_channel);
93 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
94 uart->port.icount.tx += uart->tx_count;
95 uart->tx_count = 0;
96 uart->tx_done = 1;
97 #else
98 #ifdef CONFIG_BF54x
99 /* Clear TFI bit */
100 UART_PUT_LSR(uart, TFI);
101 #endif
102 UART_CLEAR_IER(uart, ETBEI);
103 #endif
104 }
105
106 /*
107 * port is locked and interrupts are disabled
108 */
109 static void bfin_serial_start_tx(struct uart_port *port)
110 {
111 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
112 struct tty_struct *tty = uart->port.info->port.tty;
113
114 /*
115 * To avoid losting RX interrupt, we reset IR function
116 * before sending data.
117 */
118 if (tty->termios->c_line == N_IRDA)
119 bfin_serial_reset_irda(port);
120
121 #ifdef CONFIG_SERIAL_BFIN_DMA
122 if (uart->tx_done)
123 bfin_serial_dma_tx_chars(uart);
124 #else
125 UART_SET_IER(uart, ETBEI);
126 bfin_serial_tx_chars(uart);
127 #endif
128 }
129
130 /*
131 * Interrupts are enabled
132 */
133 static void bfin_serial_stop_rx(struct uart_port *port)
134 {
135 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
136
137 UART_CLEAR_IER(uart, ERBFI);
138 }
139
140 /*
141 * Set the modem control timer to fire immediately.
142 */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147
148 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
149 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
150 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
151 #else
152 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
153 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
154 #endif
155
156 #ifdef CONFIG_SERIAL_BFIN_PIO
157 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
158 {
159 struct tty_struct *tty = NULL;
160 unsigned int status, ch, flg;
161 static struct timeval anomaly_start = { .tv_sec = 0 };
162
163 status = UART_GET_LSR(uart);
164 UART_CLEAR_LSR(uart);
165
166 ch = UART_GET_CHAR(uart);
167 uart->port.icount.rx++;
168
169 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
170 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
171 if (kgdb_connected && kgdboc_port_line == uart->port.line)
172 if (ch == 0x3) {/* Ctrl + C */
173 kgdb_breakpoint();
174 return;
175 }
176
177 if (!uart->port.info || !uart->port.info->port.tty)
178 return;
179 #endif
180 tty = uart->port.info->port.tty;
181
182 if (ANOMALY_05000363) {
183 /* The BF533 (and BF561) family of processors have a nice anomaly
184 * where they continuously generate characters for a "single" break.
185 * We have to basically ignore this flood until the "next" valid
186 * character comes across. Due to the nature of the flood, it is
187 * not possible to reliably catch bytes that are sent too quickly
188 * after this break. So application code talking to the Blackfin
189 * which sends a break signal must allow at least 1.5 character
190 * times after the end of the break for things to stabilize. This
191 * timeout was picked as it must absolutely be larger than 1
192 * character time +/- some percent. So 1.5 sounds good. All other
193 * Blackfin families operate properly. Woo.
194 */
195 if (anomaly_start.tv_sec) {
196 struct timeval curr;
197 suseconds_t usecs;
198
199 if ((~ch & (~ch + 1)) & 0xff)
200 goto known_good_char;
201
202 do_gettimeofday(&curr);
203 if (curr.tv_sec - anomaly_start.tv_sec > 1)
204 goto known_good_char;
205
206 usecs = 0;
207 if (curr.tv_sec != anomaly_start.tv_sec)
208 usecs += USEC_PER_SEC;
209 usecs += curr.tv_usec - anomaly_start.tv_usec;
210
211 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
212 goto known_good_char;
213
214 if (ch)
215 anomaly_start.tv_sec = 0;
216 else
217 anomaly_start = curr;
218
219 return;
220
221 known_good_char:
222 status &= ~BI;
223 anomaly_start.tv_sec = 0;
224 }
225 }
226
227 if (status & BI) {
228 if (ANOMALY_05000363)
229 if (bfin_revid() < 5)
230 do_gettimeofday(&anomaly_start);
231 uart->port.icount.brk++;
232 if (uart_handle_break(&uart->port))
233 goto ignore_char;
234 status &= ~(PE | FE);
235 }
236 if (status & PE)
237 uart->port.icount.parity++;
238 if (status & OE)
239 uart->port.icount.overrun++;
240 if (status & FE)
241 uart->port.icount.frame++;
242
243 status &= uart->port.read_status_mask;
244
245 if (status & BI)
246 flg = TTY_BREAK;
247 else if (status & PE)
248 flg = TTY_PARITY;
249 else if (status & FE)
250 flg = TTY_FRAME;
251 else
252 flg = TTY_NORMAL;
253
254 if (uart_handle_sysrq_char(&uart->port, ch))
255 goto ignore_char;
256
257 uart_insert_char(&uart->port, status, OE, ch, flg);
258
259 ignore_char:
260 tty_flip_buffer_push(tty);
261 }
262
263 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
264 {
265 struct circ_buf *xmit = &uart->port.info->xmit;
266
267 /*
268 * Check the modem control lines before
269 * transmitting anything.
270 */
271 bfin_serial_mctrl_check(uart);
272
273 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
274 #ifdef CONFIG_BF54x
275 /* Clear TFI bit */
276 UART_PUT_LSR(uart, TFI);
277 #endif
278 UART_CLEAR_IER(uart, ETBEI);
279 return;
280 }
281
282 if (uart->port.x_char) {
283 UART_PUT_CHAR(uart, uart->port.x_char);
284 uart->port.icount.tx++;
285 uart->port.x_char = 0;
286 }
287
288 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
289 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
290 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
291 uart->port.icount.tx++;
292 SSYNC();
293 }
294
295 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
296 uart_write_wakeup(&uart->port);
297 }
298
299 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
300 {
301 struct bfin_serial_port *uart = dev_id;
302
303 spin_lock(&uart->port.lock);
304 while (UART_GET_LSR(uart) & DR)
305 bfin_serial_rx_chars(uart);
306 spin_unlock(&uart->port.lock);
307
308 return IRQ_HANDLED;
309 }
310
311 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
312 {
313 struct bfin_serial_port *uart = dev_id;
314
315 spin_lock(&uart->port.lock);
316 if (UART_GET_LSR(uart) & THRE)
317 bfin_serial_tx_chars(uart);
318 spin_unlock(&uart->port.lock);
319
320 return IRQ_HANDLED;
321 }
322 #endif
323
324 #ifdef CONFIG_SERIAL_BFIN_DMA
325 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
326 {
327 struct circ_buf *xmit = &uart->port.info->xmit;
328
329 uart->tx_done = 0;
330
331 /*
332 * Check the modem control lines before
333 * transmitting anything.
334 */
335 bfin_serial_mctrl_check(uart);
336
337 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
338 uart->tx_count = 0;
339 uart->tx_done = 1;
340 return;
341 }
342
343 if (uart->port.x_char) {
344 UART_PUT_CHAR(uart, uart->port.x_char);
345 uart->port.icount.tx++;
346 uart->port.x_char = 0;
347 }
348
349 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
350 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
351 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
352 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
353 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
354 set_dma_config(uart->tx_dma_channel,
355 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
356 INTR_ON_BUF,
357 DIMENSION_LINEAR,
358 DATA_SIZE_8,
359 DMA_SYNC_RESTART));
360 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
361 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
362 set_dma_x_modify(uart->tx_dma_channel, 1);
363 enable_dma(uart->tx_dma_channel);
364
365 UART_SET_IER(uart, ETBEI);
366 }
367
368 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
369 {
370 struct tty_struct *tty = uart->port.info->port.tty;
371 int i, flg, status;
372
373 status = UART_GET_LSR(uart);
374 UART_CLEAR_LSR(uart);
375
376 uart->port.icount.rx +=
377 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
378 UART_XMIT_SIZE);
379
380 if (status & BI) {
381 uart->port.icount.brk++;
382 if (uart_handle_break(&uart->port))
383 goto dma_ignore_char;
384 status &= ~(PE | FE);
385 }
386 if (status & PE)
387 uart->port.icount.parity++;
388 if (status & OE)
389 uart->port.icount.overrun++;
390 if (status & FE)
391 uart->port.icount.frame++;
392
393 status &= uart->port.read_status_mask;
394
395 if (status & BI)
396 flg = TTY_BREAK;
397 else if (status & PE)
398 flg = TTY_PARITY;
399 else if (status & FE)
400 flg = TTY_FRAME;
401 else
402 flg = TTY_NORMAL;
403
404 for (i = uart->rx_dma_buf.tail; ; i++) {
405 if (i >= UART_XMIT_SIZE)
406 i = 0;
407 if (i == uart->rx_dma_buf.head)
408 break;
409 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
410 uart_insert_char(&uart->port, status, OE,
411 uart->rx_dma_buf.buf[i], flg);
412 }
413
414 dma_ignore_char:
415 tty_flip_buffer_push(tty);
416 }
417
418 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
419 {
420 int x_pos, pos;
421 unsigned long flags;
422
423 spin_lock_irqsave(&uart->port.lock, flags);
424
425 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
426 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
427 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
428 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
429 uart->rx_dma_nrows = 0;
430 x_pos = DMA_RX_XCOUNT - x_pos;
431 if (x_pos == DMA_RX_XCOUNT)
432 x_pos = 0;
433
434 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
435 if (pos != uart->rx_dma_buf.tail) {
436 uart->rx_dma_buf.head = pos;
437 bfin_serial_dma_rx_chars(uart);
438 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
439 }
440
441 spin_unlock_irqrestore(&uart->port.lock, flags);
442
443 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
444 }
445
446 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
447 {
448 struct bfin_serial_port *uart = dev_id;
449 struct circ_buf *xmit = &uart->port.info->xmit;
450
451 spin_lock(&uart->port.lock);
452 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
453 disable_dma(uart->tx_dma_channel);
454 clear_dma_irqstat(uart->tx_dma_channel);
455 UART_CLEAR_IER(uart, ETBEI);
456 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
457 uart->port.icount.tx += uart->tx_count;
458
459 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
460 uart_write_wakeup(&uart->port);
461
462 bfin_serial_dma_tx_chars(uart);
463 }
464
465 spin_unlock(&uart->port.lock);
466 return IRQ_HANDLED;
467 }
468
469 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
470 {
471 struct bfin_serial_port *uart = dev_id;
472 unsigned short irqstat;
473
474 spin_lock(&uart->port.lock);
475 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
476 clear_dma_irqstat(uart->rx_dma_channel);
477 bfin_serial_dma_rx_chars(uart);
478 spin_unlock(&uart->port.lock);
479
480 return IRQ_HANDLED;
481 }
482 #endif
483
484 /*
485 * Return TIOCSER_TEMT when transmitter is not busy.
486 */
487 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
488 {
489 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
490 unsigned short lsr;
491
492 lsr = UART_GET_LSR(uart);
493 if (lsr & TEMT)
494 return TIOCSER_TEMT;
495 else
496 return 0;
497 }
498
499 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
500 {
501 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
502 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
503 if (uart->cts_pin < 0)
504 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
505
506 if (UART_GET_CTS(uart))
507 return TIOCM_DSR | TIOCM_CAR;
508 else
509 #endif
510 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
511 }
512
513 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
514 {
515 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
516 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
517 if (uart->rts_pin < 0)
518 return;
519
520 if (mctrl & TIOCM_RTS)
521 UART_CLEAR_RTS(uart);
522 else
523 UART_SET_RTS(uart);
524 #endif
525 }
526
527 /*
528 * Handle any change of modem status signal since we were last called.
529 */
530 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
531 {
532 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
533 unsigned int status;
534 struct uart_info *info = uart->port.info;
535 struct tty_struct *tty = info->port.tty;
536
537 status = bfin_serial_get_mctrl(&uart->port);
538 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
539 if (!(status & TIOCM_CTS)) {
540 tty->hw_stopped = 1;
541 uart->cts_timer.data = (unsigned long)(uart);
542 uart->cts_timer.function = (void *)bfin_serial_mctrl_check;
543 uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES;
544 add_timer(&(uart->cts_timer));
545 } else {
546 tty->hw_stopped = 0;
547 }
548 #endif
549 }
550
551 /*
552 * Interrupts are always disabled.
553 */
554 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
555 {
556 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
557 u16 lcr = UART_GET_LCR(uart);
558 if (break_state)
559 lcr |= SB;
560 else
561 lcr &= ~SB;
562 UART_PUT_LCR(uart, lcr);
563 SSYNC();
564 }
565
566 static int bfin_serial_startup(struct uart_port *port)
567 {
568 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
569
570 #ifdef CONFIG_SERIAL_BFIN_DMA
571 dma_addr_t dma_handle;
572
573 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
574 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
575 return -EBUSY;
576 }
577
578 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
579 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
580 free_dma(uart->rx_dma_channel);
581 return -EBUSY;
582 }
583
584 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
585 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
586
587 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
588 uart->rx_dma_buf.head = 0;
589 uart->rx_dma_buf.tail = 0;
590 uart->rx_dma_nrows = 0;
591
592 set_dma_config(uart->rx_dma_channel,
593 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
594 INTR_ON_ROW, DIMENSION_2D,
595 DATA_SIZE_8,
596 DMA_SYNC_RESTART));
597 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
598 set_dma_x_modify(uart->rx_dma_channel, 1);
599 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
600 set_dma_y_modify(uart->rx_dma_channel, 1);
601 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
602 enable_dma(uart->rx_dma_channel);
603
604 uart->rx_dma_timer.data = (unsigned long)(uart);
605 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
606 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
607 add_timer(&(uart->rx_dma_timer));
608 #else
609 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
610 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
611 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
612 kgdboc_break_enabled = 0;
613 else {
614 # endif
615 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
616 "BFIN_UART_RX", uart)) {
617 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
618 return -EBUSY;
619 }
620
621 if (request_irq
622 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
623 "BFIN_UART_TX", uart)) {
624 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
625 free_irq(uart->port.irq, uart);
626 return -EBUSY;
627 }
628
629 # ifdef CONFIG_BF54x
630 {
631 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
632
633 switch (uart->port.irq) {
634 case IRQ_UART3_RX:
635 uart_dma_ch_rx = CH_UART3_RX;
636 uart_dma_ch_tx = CH_UART3_TX;
637 break;
638 case IRQ_UART2_RX:
639 uart_dma_ch_rx = CH_UART2_RX;
640 uart_dma_ch_tx = CH_UART2_TX;
641 break;
642 default:
643 uart_dma_ch_rx = uart_dma_ch_tx = 0;
644 break;
645 };
646
647 if (uart_dma_ch_rx &&
648 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
649 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
650 free_irq(uart->port.irq, uart);
651 free_irq(uart->port.irq + 1, uart);
652 return -EBUSY;
653 }
654 if (uart_dma_ch_tx &&
655 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
656 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
657 free_dma(uart_dma_ch_rx);
658 free_irq(uart->port.irq, uart);
659 free_irq(uart->port.irq + 1, uart);
660 return -EBUSY;
661 }
662 }
663 # endif
664 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
665 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
666 }
667 # endif
668 #endif
669 UART_SET_IER(uart, ERBFI);
670 return 0;
671 }
672
673 static void bfin_serial_shutdown(struct uart_port *port)
674 {
675 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
676
677 #ifdef CONFIG_SERIAL_BFIN_DMA
678 disable_dma(uart->tx_dma_channel);
679 free_dma(uart->tx_dma_channel);
680 disable_dma(uart->rx_dma_channel);
681 free_dma(uart->rx_dma_channel);
682 del_timer(&(uart->rx_dma_timer));
683 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
684 #else
685 #ifdef CONFIG_BF54x
686 switch (uart->port.irq) {
687 case IRQ_UART3_RX:
688 free_dma(CH_UART3_RX);
689 free_dma(CH_UART3_TX);
690 break;
691 case IRQ_UART2_RX:
692 free_dma(CH_UART2_RX);
693 free_dma(CH_UART2_TX);
694 break;
695 default:
696 break;
697 };
698 #endif
699 free_irq(uart->port.irq, uart);
700 free_irq(uart->port.irq+1, uart);
701 #endif
702 }
703
704 static void
705 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
706 struct ktermios *old)
707 {
708 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
709 unsigned long flags;
710 unsigned int baud, quot;
711 unsigned short val, ier, lcr = 0;
712
713 switch (termios->c_cflag & CSIZE) {
714 case CS8:
715 lcr = WLS(8);
716 break;
717 case CS7:
718 lcr = WLS(7);
719 break;
720 case CS6:
721 lcr = WLS(6);
722 break;
723 case CS5:
724 lcr = WLS(5);
725 break;
726 default:
727 printk(KERN_ERR "%s: word lengh not supported\n",
728 __func__);
729 }
730
731 if (termios->c_cflag & CSTOPB)
732 lcr |= STB;
733 if (termios->c_cflag & PARENB)
734 lcr |= PEN;
735 if (!(termios->c_cflag & PARODD))
736 lcr |= EPS;
737 if (termios->c_cflag & CMSPAR)
738 lcr |= STP;
739
740 port->read_status_mask = OE;
741 if (termios->c_iflag & INPCK)
742 port->read_status_mask |= (FE | PE);
743 if (termios->c_iflag & (BRKINT | PARMRK))
744 port->read_status_mask |= BI;
745
746 /*
747 * Characters to ignore
748 */
749 port->ignore_status_mask = 0;
750 if (termios->c_iflag & IGNPAR)
751 port->ignore_status_mask |= FE | PE;
752 if (termios->c_iflag & IGNBRK) {
753 port->ignore_status_mask |= BI;
754 /*
755 * If we're ignoring parity and break indicators,
756 * ignore overruns too (for real raw support).
757 */
758 if (termios->c_iflag & IGNPAR)
759 port->ignore_status_mask |= OE;
760 }
761
762 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
763 quot = uart_get_divisor(port, baud);
764 spin_lock_irqsave(&uart->port.lock, flags);
765
766 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
767
768 /* Disable UART */
769 ier = UART_GET_IER(uart);
770 UART_DISABLE_INTS(uart);
771
772 /* Set DLAB in LCR to Access DLL and DLH */
773 UART_SET_DLAB(uart);
774
775 UART_PUT_DLL(uart, quot & 0xFF);
776 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
777 SSYNC();
778
779 /* Clear DLAB in LCR to Access THR RBR IER */
780 UART_CLEAR_DLAB(uart);
781
782 UART_PUT_LCR(uart, lcr);
783
784 /* Enable UART */
785 UART_ENABLE_INTS(uart, ier);
786
787 val = UART_GET_GCTL(uart);
788 val |= UCEN;
789 UART_PUT_GCTL(uart, val);
790
791 /* Port speed changed, update the per-port timeout. */
792 uart_update_timeout(port, termios->c_cflag, baud);
793
794 spin_unlock_irqrestore(&uart->port.lock, flags);
795 }
796
797 static const char *bfin_serial_type(struct uart_port *port)
798 {
799 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
800
801 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
802 }
803
804 /*
805 * Release the memory region(s) being used by 'port'.
806 */
807 static void bfin_serial_release_port(struct uart_port *port)
808 {
809 }
810
811 /*
812 * Request the memory region(s) being used by 'port'.
813 */
814 static int bfin_serial_request_port(struct uart_port *port)
815 {
816 return 0;
817 }
818
819 /*
820 * Configure/autoconfigure the port.
821 */
822 static void bfin_serial_config_port(struct uart_port *port, int flags)
823 {
824 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
825
826 if (flags & UART_CONFIG_TYPE &&
827 bfin_serial_request_port(&uart->port) == 0)
828 uart->port.type = PORT_BFIN;
829 }
830
831 /*
832 * Verify the new serial_struct (for TIOCSSERIAL).
833 * The only change we allow are to the flags and type, and
834 * even then only between PORT_BFIN and PORT_UNKNOWN
835 */
836 static int
837 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
838 {
839 return 0;
840 }
841
842 /*
843 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
844 * In other cases, disable IrDA function.
845 */
846 static void bfin_serial_set_ldisc(struct uart_port *port)
847 {
848 int line = port->line;
849 unsigned short val;
850
851 if (line >= port->info->port.tty->driver->num)
852 return;
853
854 switch (port->info->port.tty->termios->c_line) {
855 case N_IRDA:
856 val = UART_GET_GCTL(&bfin_serial_ports[line]);
857 val |= (IREN | RPOLC);
858 UART_PUT_GCTL(&bfin_serial_ports[line], val);
859 break;
860 default:
861 val = UART_GET_GCTL(&bfin_serial_ports[line]);
862 val &= ~(IREN | RPOLC);
863 UART_PUT_GCTL(&bfin_serial_ports[line], val);
864 }
865 }
866
867 #ifdef CONFIG_CONSOLE_POLL
868 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
869 {
870 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
871
872 while (!(UART_GET_LSR(uart) & THRE))
873 cpu_relax();
874
875 UART_CLEAR_DLAB(uart);
876 UART_PUT_CHAR(uart, (unsigned char)chr);
877 }
878
879 static int bfin_serial_poll_get_char(struct uart_port *port)
880 {
881 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
882 unsigned char chr;
883
884 while (!(UART_GET_LSR(uart) & DR))
885 cpu_relax();
886
887 UART_CLEAR_DLAB(uart);
888 chr = UART_GET_CHAR(uart);
889
890 return chr;
891 }
892 #endif
893
894 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
895 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
896 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
897 {
898 if (kgdboc_break_enabled) {
899 kgdboc_break_enabled = 0;
900 bfin_serial_shutdown(port);
901 }
902 }
903
904 static int bfin_kgdboc_port_startup(struct uart_port *port)
905 {
906 kgdboc_port_line = port->line;
907 kgdboc_break_enabled = !bfin_serial_startup(port);
908 return 0;
909 }
910 #endif
911
912 static void bfin_serial_reset_irda(struct uart_port *port)
913 {
914 int line = port->line;
915 unsigned short val;
916
917 val = UART_GET_GCTL(&bfin_serial_ports[line]);
918 val &= ~(IREN | RPOLC);
919 UART_PUT_GCTL(&bfin_serial_ports[line], val);
920 SSYNC();
921 val |= (IREN | RPOLC);
922 UART_PUT_GCTL(&bfin_serial_ports[line], val);
923 SSYNC();
924 }
925
926 static struct uart_ops bfin_serial_pops = {
927 .tx_empty = bfin_serial_tx_empty,
928 .set_mctrl = bfin_serial_set_mctrl,
929 .get_mctrl = bfin_serial_get_mctrl,
930 .stop_tx = bfin_serial_stop_tx,
931 .start_tx = bfin_serial_start_tx,
932 .stop_rx = bfin_serial_stop_rx,
933 .enable_ms = bfin_serial_enable_ms,
934 .break_ctl = bfin_serial_break_ctl,
935 .startup = bfin_serial_startup,
936 .shutdown = bfin_serial_shutdown,
937 .set_termios = bfin_serial_set_termios,
938 .set_ldisc = bfin_serial_set_ldisc,
939 .type = bfin_serial_type,
940 .release_port = bfin_serial_release_port,
941 .request_port = bfin_serial_request_port,
942 .config_port = bfin_serial_config_port,
943 .verify_port = bfin_serial_verify_port,
944 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
945 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
946 .kgdboc_port_startup = bfin_kgdboc_port_startup,
947 .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
948 #endif
949 #ifdef CONFIG_CONSOLE_POLL
950 .poll_put_char = bfin_serial_poll_put_char,
951 .poll_get_char = bfin_serial_poll_get_char,
952 #endif
953 };
954
955 static void __init bfin_serial_init_ports(void)
956 {
957 static int first = 1;
958 int i;
959
960 if (!first)
961 return;
962 first = 0;
963
964 for (i = 0; i < nr_active_ports; i++) {
965 bfin_serial_ports[i].port.uartclk = get_sclk();
966 bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE;
967 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
968 bfin_serial_ports[i].port.line = i;
969 bfin_serial_ports[i].port.iotype = UPIO_MEM;
970 bfin_serial_ports[i].port.membase =
971 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
972 bfin_serial_ports[i].port.mapbase =
973 bfin_serial_resource[i].uart_base_addr;
974 bfin_serial_ports[i].port.irq =
975 bfin_serial_resource[i].uart_irq;
976 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
977 #ifdef CONFIG_SERIAL_BFIN_DMA
978 bfin_serial_ports[i].tx_done = 1;
979 bfin_serial_ports[i].tx_count = 0;
980 bfin_serial_ports[i].tx_dma_channel =
981 bfin_serial_resource[i].uart_tx_dma_channel;
982 bfin_serial_ports[i].rx_dma_channel =
983 bfin_serial_resource[i].uart_rx_dma_channel;
984 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
985 #endif
986 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
987 init_timer(&(bfin_serial_ports[i].cts_timer));
988 bfin_serial_ports[i].cts_pin =
989 bfin_serial_resource[i].uart_cts_pin;
990 bfin_serial_ports[i].rts_pin =
991 bfin_serial_resource[i].uart_rts_pin;
992 #endif
993 bfin_serial_hw_init(&bfin_serial_ports[i]);
994 }
995
996 }
997
998 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
999 /*
1000 * If the port was already initialised (eg, by a boot loader),
1001 * try to determine the current setup.
1002 */
1003 static void __init
1004 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1005 int *parity, int *bits)
1006 {
1007 unsigned short status;
1008
1009 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1010 if (status == (ERBFI | ETBEI)) {
1011 /* ok, the port was enabled */
1012 u16 lcr, dlh, dll;
1013
1014 lcr = UART_GET_LCR(uart);
1015
1016 *parity = 'n';
1017 if (lcr & PEN) {
1018 if (lcr & EPS)
1019 *parity = 'e';
1020 else
1021 *parity = 'o';
1022 }
1023 switch (lcr & 0x03) {
1024 case 0: *bits = 5; break;
1025 case 1: *bits = 6; break;
1026 case 2: *bits = 7; break;
1027 case 3: *bits = 8; break;
1028 }
1029 /* Set DLAB in LCR to Access DLL and DLH */
1030 UART_SET_DLAB(uart);
1031
1032 dll = UART_GET_DLL(uart);
1033 dlh = UART_GET_DLH(uart);
1034
1035 /* Clear DLAB in LCR to Access THR RBR IER */
1036 UART_CLEAR_DLAB(uart);
1037
1038 *baud = get_sclk() / (16*(dll | dlh << 8));
1039 }
1040 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1041 }
1042
1043 static struct uart_driver bfin_serial_reg;
1044
1045 static int __init
1046 bfin_serial_console_setup(struct console *co, char *options)
1047 {
1048 struct bfin_serial_port *uart;
1049 int baud = 57600;
1050 int bits = 8;
1051 int parity = 'n';
1052 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1053 int flow = 'r';
1054 # else
1055 int flow = 'n';
1056 # endif
1057
1058 /*
1059 * Check whether an invalid uart number has been specified, and
1060 * if so, search for the first available port that does have
1061 * console support.
1062 */
1063 if (co->index == -1 || co->index >= nr_active_ports)
1064 co->index = 0;
1065 uart = &bfin_serial_ports[co->index];
1066
1067 if (options)
1068 uart_parse_options(options, &baud, &parity, &bits, &flow);
1069 else
1070 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1071
1072 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1073 }
1074 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1075 defined (CONFIG_EARLY_PRINTK) */
1076
1077 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1078 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1079 {
1080 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1081 while (!(UART_GET_LSR(uart) & THRE))
1082 barrier();
1083 UART_PUT_CHAR(uart, ch);
1084 SSYNC();
1085 }
1086
1087 /*
1088 * Interrupts are disabled on entering
1089 */
1090 static void
1091 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1092 {
1093 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1094 unsigned long flags;
1095
1096 spin_lock_irqsave(&uart->port.lock, flags);
1097 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1098 spin_unlock_irqrestore(&uart->port.lock, flags);
1099
1100 }
1101
1102 static struct console bfin_serial_console = {
1103 .name = BFIN_SERIAL_NAME,
1104 .write = bfin_serial_console_write,
1105 .device = uart_console_device,
1106 .setup = bfin_serial_console_setup,
1107 .flags = CON_PRINTBUFFER,
1108 .index = -1,
1109 .data = &bfin_serial_reg,
1110 };
1111
1112 static int __init bfin_serial_rs_console_init(void)
1113 {
1114 bfin_serial_init_ports();
1115 register_console(&bfin_serial_console);
1116
1117 return 0;
1118 }
1119 console_initcall(bfin_serial_rs_console_init);
1120
1121 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1122 #else
1123 #define BFIN_SERIAL_CONSOLE NULL
1124 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1125
1126
1127 #ifdef CONFIG_EARLY_PRINTK
1128 static __init void early_serial_putc(struct uart_port *port, int ch)
1129 {
1130 unsigned timeout = 0xffff;
1131 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1132
1133 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1134 cpu_relax();
1135 UART_PUT_CHAR(uart, ch);
1136 }
1137
1138 static __init void early_serial_write(struct console *con, const char *s,
1139 unsigned int n)
1140 {
1141 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1142 unsigned int i;
1143
1144 for (i = 0; i < n; i++, s++) {
1145 if (*s == '\n')
1146 early_serial_putc(&uart->port, '\r');
1147 early_serial_putc(&uart->port, *s);
1148 }
1149 }
1150
1151 static struct __initdata console bfin_early_serial_console = {
1152 .name = "early_BFuart",
1153 .write = early_serial_write,
1154 .device = uart_console_device,
1155 .flags = CON_PRINTBUFFER,
1156 .setup = bfin_serial_console_setup,
1157 .index = -1,
1158 .data = &bfin_serial_reg,
1159 };
1160
1161 struct console __init *bfin_earlyserial_init(unsigned int port,
1162 unsigned int cflag)
1163 {
1164 struct bfin_serial_port *uart;
1165 struct ktermios t;
1166
1167 if (port == -1 || port >= nr_active_ports)
1168 port = 0;
1169 bfin_serial_init_ports();
1170 bfin_early_serial_console.index = port;
1171 uart = &bfin_serial_ports[port];
1172 t.c_cflag = cflag;
1173 t.c_iflag = 0;
1174 t.c_oflag = 0;
1175 t.c_lflag = ICANON;
1176 t.c_line = port;
1177 bfin_serial_set_termios(&uart->port, &t, &t);
1178 return &bfin_early_serial_console;
1179 }
1180
1181 #endif /* CONFIG_EARLY_PRINTK */
1182
1183 static struct uart_driver bfin_serial_reg = {
1184 .owner = THIS_MODULE,
1185 .driver_name = "bfin-uart",
1186 .dev_name = BFIN_SERIAL_NAME,
1187 .major = BFIN_SERIAL_MAJOR,
1188 .minor = BFIN_SERIAL_MINOR,
1189 .nr = BFIN_UART_NR_PORTS,
1190 .cons = BFIN_SERIAL_CONSOLE,
1191 };
1192
1193 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1194 {
1195 int i;
1196
1197 for (i = 0; i < nr_active_ports; i++) {
1198 if (bfin_serial_ports[i].port.dev != &dev->dev)
1199 continue;
1200 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1201 }
1202
1203 return 0;
1204 }
1205
1206 static int bfin_serial_resume(struct platform_device *dev)
1207 {
1208 int i;
1209
1210 for (i = 0; i < nr_active_ports; i++) {
1211 if (bfin_serial_ports[i].port.dev != &dev->dev)
1212 continue;
1213 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1214 }
1215
1216 return 0;
1217 }
1218
1219 static int bfin_serial_probe(struct platform_device *dev)
1220 {
1221 struct resource *res = dev->resource;
1222 int i;
1223
1224 for (i = 0; i < dev->num_resources; i++, res++)
1225 if (res->flags & IORESOURCE_MEM)
1226 break;
1227
1228 if (i < dev->num_resources) {
1229 for (i = 0; i < nr_active_ports; i++, res++) {
1230 if (bfin_serial_ports[i].port.mapbase != res->start)
1231 continue;
1232 bfin_serial_ports[i].port.dev = &dev->dev;
1233 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1234 }
1235 }
1236
1237 return 0;
1238 }
1239
1240 static int bfin_serial_remove(struct platform_device *dev)
1241 {
1242 int i;
1243
1244 for (i = 0; i < nr_active_ports; i++) {
1245 if (bfin_serial_ports[i].port.dev != &dev->dev)
1246 continue;
1247 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1248 bfin_serial_ports[i].port.dev = NULL;
1249 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1250 gpio_free(bfin_serial_ports[i].cts_pin);
1251 gpio_free(bfin_serial_ports[i].rts_pin);
1252 #endif
1253 }
1254
1255 return 0;
1256 }
1257
1258 static struct platform_driver bfin_serial_driver = {
1259 .probe = bfin_serial_probe,
1260 .remove = bfin_serial_remove,
1261 .suspend = bfin_serial_suspend,
1262 .resume = bfin_serial_resume,
1263 .driver = {
1264 .name = "bfin-uart",
1265 .owner = THIS_MODULE,
1266 },
1267 };
1268
1269 static int __init bfin_serial_init(void)
1270 {
1271 int ret;
1272
1273 pr_info("Serial: Blackfin serial driver\n");
1274
1275 bfin_serial_init_ports();
1276
1277 ret = uart_register_driver(&bfin_serial_reg);
1278 if (ret == 0) {
1279 ret = platform_driver_register(&bfin_serial_driver);
1280 if (ret) {
1281 pr_debug("uart register failed\n");
1282 uart_unregister_driver(&bfin_serial_reg);
1283 }
1284 }
1285 return ret;
1286 }
1287
1288 static void __exit bfin_serial_exit(void)
1289 {
1290 platform_driver_unregister(&bfin_serial_driver);
1291 uart_unregister_driver(&bfin_serial_reg);
1292 }
1293
1294
1295 module_init(bfin_serial_init);
1296 module_exit(bfin_serial_exit);
1297
1298 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1299 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1300 MODULE_LICENSE("GPL");
1301 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1302 MODULE_ALIAS("platform:bfin-uart");
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