1 /* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
21 * Revision 1.22 2004/08/24 06:12:20 starvik
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
27 * Revision 1.19 2004/05/17 13:12:15 starvik
29 * Big merge from Linux 2.4 still pending.
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
272 * Items worth noticing:
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
426 static char *serial_version
= "$Revision: 1.25 $";
428 #include <linux/config.h>
429 #include <linux/types.h>
430 #include <linux/errno.h>
431 #include <linux/signal.h>
432 #include <linux/sched.h>
433 #include <linux/timer.h>
434 #include <linux/interrupt.h>
435 #include <linux/tty.h>
436 #include <linux/tty_flip.h>
437 #include <linux/major.h>
438 #include <linux/string.h>
439 #include <linux/fcntl.h>
440 #include <linux/mm.h>
441 #include <linux/slab.h>
442 #include <linux/init.h>
443 #include <asm/uaccess.h>
444 #include <linux/kernel.h>
445 #include <linux/mutex.h>
449 #include <asm/system.h>
450 #include <asm/bitops.h>
451 #include <linux/delay.h>
453 #include <asm/arch/svinto.h>
455 /* non-arch dependent serial structures are in linux/serial.h */
456 #include <linux/serial.h>
457 /* while we keep our own stuff (struct e100_serial) in a local .h file */
459 #include <asm/fasttimer.h>
461 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
462 #ifndef CONFIG_ETRAX_FAST_TIMER
463 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
467 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
468 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
469 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
472 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
473 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
477 * All of the compatibilty code so we can compile serial.c against
478 * older kernels is hidden in serial_compat.h
480 #if defined(LOCAL_HEADERS)
481 #include "serial_compat.h"
484 struct tty_driver
*serial_driver
;
486 /* serial subtype definitions */
487 #ifndef SERIAL_TYPE_NORMAL
488 #define SERIAL_TYPE_NORMAL 1
491 /* number of characters left in xmit buffer before we ask for more */
492 #define WAKEUP_CHARS 256
494 //#define SERIAL_DEBUG_INTR
495 //#define SERIAL_DEBUG_OPEN
496 //#define SERIAL_DEBUG_FLOW
497 //#define SERIAL_DEBUG_DATA
498 //#define SERIAL_DEBUG_THROTTLE
499 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
500 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
502 /* Enable this to use serial interrupts to handle when you
503 expect the first received event on the serial port to
504 be an error, break or similar. Used to be able to flash IRMA
506 #define SERIAL_HANDLE_EARLY_ERRORS
508 /* Defined and used in n_tty.c, but we need it here as well */
509 #define TTY_THRESHOLD_THROTTLE 128
511 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
512 * must not be to high or flow control won't work if we leave it to the tty
513 * layer so we have our own throttling in flush_to_flip
514 * TTY_FLIPBUF_SIZE=512,
515 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
516 * BUF_SIZE can't be > 128
518 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
519 #define SERIAL_DESCR_BUF_SIZE 256
521 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
522 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
524 /* We don't want to load the system with massive fast timer interrupt
525 * on high baudrates so limit it to 250 us (4kHz) */
526 #define MIN_FLUSH_TIME_USEC 250
528 /* Add an x here to log a lot of timer stuff */
530 /* Debug details of interrupt handling */
531 #define DINTR1(x) /* irq on/off, errors */
532 #define DINTR2(x) /* tx and rx */
533 /* Debug flip buffer stuff */
535 /* Debug flow control and overview of data flow */
538 #define DLOG_INT_TRIG(x)
540 //#define DEBUG_LOG_INCLUDED
541 #ifndef DEBUG_LOG_INCLUDED
542 #define DEBUG_LOG(line, string, value)
544 struct debug_log_info
547 unsigned long timer_data
;
552 #define DEBUG_LOG_SIZE 4096
554 struct debug_log_info debug_log
[DEBUG_LOG_SIZE
];
555 int debug_log_pos
= 0;
557 #define DEBUG_LOG(_line, _string, _value) do { \
558 if ((_line) == SERIAL_DEBUG_LINE) {\
559 debug_log_func(_line, _string, _value); \
563 void debug_log_func(int line
, const char *string
, int value
)
565 if (debug_log_pos
< DEBUG_LOG_SIZE
) {
566 debug_log
[debug_log_pos
].time
= jiffies
;
567 debug_log
[debug_log_pos
].timer_data
= *R_TIMER_DATA
;
568 // debug_log[debug_log_pos].line = line;
569 debug_log
[debug_log_pos
].string
= string
;
570 debug_log
[debug_log_pos
].value
= value
;
573 /*printk(string, value);*/
577 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
578 /* Default number of timer ticks before flushing rx fifo
579 * When using "little data, low latency applications: use 0
580 * When using "much data applications (PPP)" use ~5
582 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
585 unsigned long timer_data_to_ns(unsigned long timer_data
);
587 static void change_speed(struct e100_serial
*info
);
588 static void rs_throttle(struct tty_struct
* tty
);
589 static void rs_wait_until_sent(struct tty_struct
*tty
, int timeout
);
590 static int rs_write(struct tty_struct
* tty
, int from_user
,
591 const unsigned char *buf
, int count
);
592 #ifdef CONFIG_ETRAX_RS485
593 static int e100_write_rs485(struct tty_struct
* tty
, int from_user
,
594 const unsigned char *buf
, int count
);
596 static int get_lsr_info(struct e100_serial
* info
, unsigned int *value
);
599 #define DEF_BAUD 115200 /* 115.2 kbit/s */
600 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
601 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
602 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
603 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
605 /* offsets from R_SERIALx_CTRL */
608 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
609 #define REG_TR_DATA 0
611 #define REG_TR_CTRL 1
612 #define REG_REC_CTRL 2
614 #define REG_XOFF 4 /* this is a 32 bit register */
616 /* The bitfields are the same for all serial ports */
617 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
618 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
619 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
620 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
621 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
623 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
625 /* Values for info->errorcode */
626 #define ERRCODE_SET_BREAK (TTY_BREAK)
627 #define ERRCODE_INSERT 0x100
628 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
630 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
633 * General note regarding the use of IO_* macros in this file:
635 * We will use the bits defined for DMA channel 6 when using various
636 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
637 * the same for all channels (which of course they are).
639 * We will also use the bits defined for serial port 0 when writing commands
640 * to the different ports, as these bits too are the same for all ports.
644 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
645 static const unsigned long e100_ser_int_mask
= 0
646 #ifdef CONFIG_ETRAX_SERIAL_PORT0
647 | IO_MASK(R_IRQ_MASK1_RD
, ser0_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser0_ready
)
649 #ifdef CONFIG_ETRAX_SERIAL_PORT1
650 | IO_MASK(R_IRQ_MASK1_RD
, ser1_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser1_ready
)
652 #ifdef CONFIG_ETRAX_SERIAL_PORT2
653 | IO_MASK(R_IRQ_MASK1_RD
, ser2_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser2_ready
)
655 #ifdef CONFIG_ETRAX_SERIAL_PORT3
656 | IO_MASK(R_IRQ_MASK1_RD
, ser3_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser3_ready
)
659 unsigned long r_alt_ser_baudrate_shadow
= 0;
661 /* this is the data for the four serial ports in the etrax100 */
662 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
663 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
665 static struct e100_serial rs_table
[] = {
667 .port
= (unsigned char *)R_SERIAL0_CTRL
,
668 .irq
= 1U << 12, /* uses DMA 6 and 7 */
669 .oclrintradr
= R_DMA_CH6_CLR_INTR
,
670 .ofirstadr
= R_DMA_CH6_FIRST
,
671 .ocmdadr
= R_DMA_CH6_CMD
,
672 .ostatusadr
= R_DMA_CH6_STATUS
,
673 .iclrintradr
= R_DMA_CH7_CLR_INTR
,
674 .ifirstadr
= R_DMA_CH7_FIRST
,
675 .icmdadr
= R_DMA_CH7_CMD
,
676 .idescradr
= R_DMA_CH7_DESCR
,
681 #ifdef CONFIG_ETRAX_SERIAL_PORT0
683 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
684 .dma_out_enabled
= 1,
686 .dma_out_enabled
= 0,
688 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
695 .dma_out_enabled
= 0,
700 #ifndef CONFIG_SVINTO_SIM
702 .port
= (unsigned char *)R_SERIAL1_CTRL
,
703 .irq
= 1U << 16, /* uses DMA 8 and 9 */
704 .oclrintradr
= R_DMA_CH8_CLR_INTR
,
705 .ofirstadr
= R_DMA_CH8_FIRST
,
706 .ocmdadr
= R_DMA_CH8_CMD
,
707 .ostatusadr
= R_DMA_CH8_STATUS
,
708 .iclrintradr
= R_DMA_CH9_CLR_INTR
,
709 .ifirstadr
= R_DMA_CH9_FIRST
,
710 .icmdadr
= R_DMA_CH9_CMD
,
711 .idescradr
= R_DMA_CH9_DESCR
,
716 #ifdef CONFIG_ETRAX_SERIAL_PORT1
718 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
719 .dma_out_enabled
= 1,
721 .dma_out_enabled
= 0,
723 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
730 .dma_out_enabled
= 0,
736 .port
= (unsigned char *)R_SERIAL2_CTRL
,
737 .irq
= 1U << 4, /* uses DMA 2 and 3 */
738 .oclrintradr
= R_DMA_CH2_CLR_INTR
,
739 .ofirstadr
= R_DMA_CH2_FIRST
,
740 .ocmdadr
= R_DMA_CH2_CMD
,
741 .ostatusadr
= R_DMA_CH2_STATUS
,
742 .iclrintradr
= R_DMA_CH3_CLR_INTR
,
743 .ifirstadr
= R_DMA_CH3_FIRST
,
744 .icmdadr
= R_DMA_CH3_CMD
,
745 .idescradr
= R_DMA_CH3_DESCR
,
750 #ifdef CONFIG_ETRAX_SERIAL_PORT2
752 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
753 .dma_out_enabled
= 1,
755 .dma_out_enabled
= 0,
757 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
764 .dma_out_enabled
= 0,
770 .port
= (unsigned char *)R_SERIAL3_CTRL
,
771 .irq
= 1U << 8, /* uses DMA 4 and 5 */
772 .oclrintradr
= R_DMA_CH4_CLR_INTR
,
773 .ofirstadr
= R_DMA_CH4_FIRST
,
774 .ocmdadr
= R_DMA_CH4_CMD
,
775 .ostatusadr
= R_DMA_CH4_STATUS
,
776 .iclrintradr
= R_DMA_CH5_CLR_INTR
,
777 .ifirstadr
= R_DMA_CH5_FIRST
,
778 .icmdadr
= R_DMA_CH5_CMD
,
779 .idescradr
= R_DMA_CH5_DESCR
,
784 #ifdef CONFIG_ETRAX_SERIAL_PORT3
786 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
787 .dma_out_enabled
= 1,
789 .dma_out_enabled
= 0,
791 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
798 .dma_out_enabled
= 0,
806 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
808 static struct termios
*serial_termios
[NR_PORTS
];
809 static struct termios
*serial_termios_locked
[NR_PORTS
];
810 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
811 static struct fast_timer fast_timers
[NR_PORTS
];
814 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
815 #define PROCSTAT(x) x
816 struct ser_statistics_type
{
818 int early_errors_cnt
;
821 unsigned long int processing_flip
;
822 unsigned long processing_flip_still_room
;
823 unsigned long int timeout_flush_cnt
;
830 static struct ser_statistics_type ser_stat
[NR_PORTS
];
836 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
839 #if defined(CONFIG_ETRAX_RS485)
840 #ifdef CONFIG_ETRAX_FAST_TIMER
841 static struct fast_timer fast_timers_rs485
[NR_PORTS
];
843 #if defined(CONFIG_ETRAX_RS485_ON_PA)
844 static int rs485_pa_bit
= CONFIG_ETRAX_RS485_ON_PA_BIT
;
846 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
847 static int rs485_port_g_bit
= CONFIG_ETRAX_RS485_ON_PORT_G_BIT
;
851 /* Info and macros needed for each ports extra control/status signals. */
852 #define E100_STRUCT_PORT(line, pinname) \
853 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
854 (R_PORT_PA_DATA): ( \
855 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
856 (R_PORT_PB_DATA):&dummy_ser[line]))
858 #define E100_STRUCT_SHADOW(line, pinname) \
859 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
860 (&port_pa_data_shadow): ( \
861 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
862 (&port_pb_data_shadow):&dummy_ser[line]))
863 #define E100_STRUCT_MASK(line, pinname) \
864 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
865 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
866 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
867 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
869 #define DUMMY_DTR_MASK 1
870 #define DUMMY_RI_MASK 2
871 #define DUMMY_DSR_MASK 4
872 #define DUMMY_CD_MASK 8
873 static unsigned char dummy_ser
[NR_PORTS
] = {0xFF, 0xFF, 0xFF,0xFF};
875 /* If not all status pins are used or disabled, use mixed mode */
876 #ifdef CONFIG_ETRAX_SERIAL_PORT0
878 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
880 #if SER0_PA_BITSUM != -4
881 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
882 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
883 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
886 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
887 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
888 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
891 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
892 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
893 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
896 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
897 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
898 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
903 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
905 #if SER0_PB_BITSUM != -4
906 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
907 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
908 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
911 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
912 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
913 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
916 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
917 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
918 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
921 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
922 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
923 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
931 #ifdef CONFIG_ETRAX_SERIAL_PORT1
933 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
935 #if SER1_PA_BITSUM != -4
936 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
937 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
938 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
941 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
942 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
943 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
946 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
947 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
948 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
951 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
952 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
953 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
958 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
960 #if SER1_PB_BITSUM != -4
961 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
962 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
963 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
966 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
967 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
968 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
971 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
972 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
973 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
976 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
977 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
978 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
985 #ifdef CONFIG_ETRAX_SERIAL_PORT2
987 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
989 #if SER2_PA_BITSUM != -4
990 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
991 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
992 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
995 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
996 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
997 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1000 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1001 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1002 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1005 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1006 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1007 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1012 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1014 #if SER2_PB_BITSUM != -4
1015 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1016 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1017 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1020 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1021 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1022 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1025 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1026 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1027 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1030 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1031 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1032 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1039 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1041 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1043 #if SER3_PA_BITSUM != -4
1044 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1045 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1046 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1049 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1050 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1051 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1054 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1055 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1056 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1059 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1060 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1061 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1066 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1068 #if SER3_PB_BITSUM != -4
1069 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1070 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1071 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1074 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1075 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1076 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1079 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1080 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1081 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1084 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1085 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1086 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1094 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1095 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1096 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1097 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1098 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1101 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1102 /* The pins can be mixed on PA and PB */
1103 #define CONTROL_PINS_PORT_NOT_USED(line) \
1104 &dummy_ser[line], &dummy_ser[line], \
1105 &dummy_ser[line], &dummy_ser[line], \
1106 &dummy_ser[line], &dummy_ser[line], \
1107 &dummy_ser[line], &dummy_ser[line], \
1108 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1113 volatile unsigned char *dtr_port
;
1114 unsigned char *dtr_shadow
;
1115 volatile unsigned char *ri_port
;
1116 unsigned char *ri_shadow
;
1117 volatile unsigned char *dsr_port
;
1118 unsigned char *dsr_shadow
;
1119 volatile unsigned char *cd_port
;
1120 unsigned char *cd_shadow
;
1122 unsigned char dtr_mask
;
1123 unsigned char ri_mask
;
1124 unsigned char dsr_mask
;
1125 unsigned char cd_mask
;
1128 static const struct control_pins e100_modem_pins
[NR_PORTS
] =
1132 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1133 E100_STRUCT_PORT(0,DTR
), E100_STRUCT_SHADOW(0,DTR
),
1134 E100_STRUCT_PORT(0,RI
), E100_STRUCT_SHADOW(0,RI
),
1135 E100_STRUCT_PORT(0,DSR
), E100_STRUCT_SHADOW(0,DSR
),
1136 E100_STRUCT_PORT(0,CD
), E100_STRUCT_SHADOW(0,CD
),
1137 E100_STRUCT_MASK(0,DTR
),
1138 E100_STRUCT_MASK(0,RI
),
1139 E100_STRUCT_MASK(0,DSR
),
1140 E100_STRUCT_MASK(0,CD
)
1142 CONTROL_PINS_PORT_NOT_USED(0)
1148 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1149 E100_STRUCT_PORT(1,DTR
), E100_STRUCT_SHADOW(1,DTR
),
1150 E100_STRUCT_PORT(1,RI
), E100_STRUCT_SHADOW(1,RI
),
1151 E100_STRUCT_PORT(1,DSR
), E100_STRUCT_SHADOW(1,DSR
),
1152 E100_STRUCT_PORT(1,CD
), E100_STRUCT_SHADOW(1,CD
),
1153 E100_STRUCT_MASK(1,DTR
),
1154 E100_STRUCT_MASK(1,RI
),
1155 E100_STRUCT_MASK(1,DSR
),
1156 E100_STRUCT_MASK(1,CD
)
1158 CONTROL_PINS_PORT_NOT_USED(1)
1164 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1165 E100_STRUCT_PORT(2,DTR
), E100_STRUCT_SHADOW(2,DTR
),
1166 E100_STRUCT_PORT(2,RI
), E100_STRUCT_SHADOW(2,RI
),
1167 E100_STRUCT_PORT(2,DSR
), E100_STRUCT_SHADOW(2,DSR
),
1168 E100_STRUCT_PORT(2,CD
), E100_STRUCT_SHADOW(2,CD
),
1169 E100_STRUCT_MASK(2,DTR
),
1170 E100_STRUCT_MASK(2,RI
),
1171 E100_STRUCT_MASK(2,DSR
),
1172 E100_STRUCT_MASK(2,CD
)
1174 CONTROL_PINS_PORT_NOT_USED(2)
1180 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1181 E100_STRUCT_PORT(3,DTR
), E100_STRUCT_SHADOW(3,DTR
),
1182 E100_STRUCT_PORT(3,RI
), E100_STRUCT_SHADOW(3,RI
),
1183 E100_STRUCT_PORT(3,DSR
), E100_STRUCT_SHADOW(3,DSR
),
1184 E100_STRUCT_PORT(3,CD
), E100_STRUCT_SHADOW(3,CD
),
1185 E100_STRUCT_MASK(3,DTR
),
1186 E100_STRUCT_MASK(3,RI
),
1187 E100_STRUCT_MASK(3,DSR
),
1188 E100_STRUCT_MASK(3,CD
)
1190 CONTROL_PINS_PORT_NOT_USED(3)
1194 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1196 /* All pins are on either PA or PB for each serial port */
1197 #define CONTROL_PINS_PORT_NOT_USED(line) \
1198 &dummy_ser[line], &dummy_ser[line], \
1199 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1204 volatile unsigned char *port
;
1205 unsigned char *shadow
;
1207 unsigned char dtr_mask
;
1208 unsigned char ri_mask
;
1209 unsigned char dsr_mask
;
1210 unsigned char cd_mask
;
1213 #define dtr_port port
1214 #define dtr_shadow shadow
1215 #define ri_port port
1216 #define ri_shadow shadow
1217 #define dsr_port port
1218 #define dsr_shadow shadow
1219 #define cd_port port
1220 #define cd_shadow shadow
1222 static const struct control_pins e100_modem_pins
[NR_PORTS
] =
1226 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1227 E100_STRUCT_PORT(0,DTR
), E100_STRUCT_SHADOW(0,DTR
),
1228 E100_STRUCT_MASK(0,DTR
),
1229 E100_STRUCT_MASK(0,RI
),
1230 E100_STRUCT_MASK(0,DSR
),
1231 E100_STRUCT_MASK(0,CD
)
1233 CONTROL_PINS_PORT_NOT_USED(0)
1239 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1240 E100_STRUCT_PORT(1,DTR
), E100_STRUCT_SHADOW(1,DTR
),
1241 E100_STRUCT_MASK(1,DTR
),
1242 E100_STRUCT_MASK(1,RI
),
1243 E100_STRUCT_MASK(1,DSR
),
1244 E100_STRUCT_MASK(1,CD
)
1246 CONTROL_PINS_PORT_NOT_USED(1)
1252 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1253 E100_STRUCT_PORT(2,DTR
), E100_STRUCT_SHADOW(2,DTR
),
1254 E100_STRUCT_MASK(2,DTR
),
1255 E100_STRUCT_MASK(2,RI
),
1256 E100_STRUCT_MASK(2,DSR
),
1257 E100_STRUCT_MASK(2,CD
)
1259 CONTROL_PINS_PORT_NOT_USED(2)
1265 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1266 E100_STRUCT_PORT(3,DTR
), E100_STRUCT_SHADOW(3,DTR
),
1267 E100_STRUCT_MASK(3,DTR
),
1268 E100_STRUCT_MASK(3,RI
),
1269 E100_STRUCT_MASK(3,DSR
),
1270 E100_STRUCT_MASK(3,CD
)
1272 CONTROL_PINS_PORT_NOT_USED(3)
1276 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1278 #define E100_RTS_MASK 0x20
1279 #define E100_CTS_MASK 0x40
1281 /* All serial port signals are active low:
1282 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1283 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1285 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1289 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1291 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1293 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1295 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1297 /* Normally inputs */
1298 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1299 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1302 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1306 * tmp_buf is used as a temporary buffer by serial_write. We need to
1307 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1308 * and some other program tries to do a serial write at the same time.
1309 * Since the lock will only come under contention when the system is
1310 * swapping and available memory is low, it makes sense to share one
1311 * buffer across all the serial ports, since it significantly saves
1312 * memory if large numbers of serial ports are open.
1314 static unsigned char *tmp_buf
;
1315 static DEFINE_MUTEX(tmp_buf_mutex
);
1317 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1318 static void update_char_time(struct e100_serial
* info
)
1320 tcflag_t cflags
= info
->tty
->termios
->c_cflag
;
1323 /* calc. number of bits / data byte */
1324 /* databits + startbit and 1 stopbit */
1325 if ((cflags
& CSIZE
) == CS7
)
1330 if (cflags
& CSTOPB
) /* 2 stopbits ? */
1333 if (cflags
& PARENB
) /* parity bit ? */
1337 info
->char_time_usec
= ((bits
* 1000000) / info
->baud
) + 1;
1338 info
->flush_time_usec
= 4*info
->char_time_usec
;
1339 if (info
->flush_time_usec
< MIN_FLUSH_TIME_USEC
)
1340 info
->flush_time_usec
= MIN_FLUSH_TIME_USEC
;
1345 * This function maps from the Bxxxx defines in asm/termbits.h into real
1350 cflag_to_baud(unsigned int cflag
)
1352 static int baud_table
[] = {
1353 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1354 4800, 9600, 19200, 38400 };
1356 static int ext_baud_table
[] = {
1357 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1358 0, 0, 0, 0, 0, 0, 0, 0 };
1360 if (cflag
& CBAUDEX
)
1361 return ext_baud_table
[(cflag
& CBAUD
) & ~CBAUDEX
];
1363 return baud_table
[cflag
& CBAUD
];
1366 /* and this maps to an etrax100 hardware baud constant */
1368 static unsigned char
1369 cflag_to_etrax_baud(unsigned int cflag
)
1373 static char baud_table
[] = {
1374 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1376 static char ext_baud_table
[] = {
1377 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1379 if (cflag
& CBAUDEX
)
1380 retval
= ext_baud_table
[(cflag
& CBAUD
) & ~CBAUDEX
];
1382 retval
= baud_table
[cflag
& CBAUD
];
1385 printk(KERN_WARNING
"serdriver tried setting invalid baud rate, flags %x.\n", cflag
);
1386 retval
= 5; /* choose default 9600 instead */
1389 return retval
| (retval
<< 4); /* choose same for both TX and RX */
1393 /* Various static support functions */
1395 /* Functions to set or clear DTR/RTS on the requested line */
1396 /* It is complicated by the fact that RTS is a serial port register, while
1397 * DTR might not be implemented in the HW at all, and if it is, it can be on
1403 e100_dtr(struct e100_serial
*info
, int set
)
1405 #ifndef CONFIG_SVINTO_SIM
1406 unsigned char mask
= e100_modem_pins
[info
->line
].dtr_mask
;
1408 #ifdef SERIAL_DEBUG_IO
1409 printk("ser%i dtr %i mask: 0x%02X\n", info
->line
, set
, mask
);
1410 printk("ser%i shadow before 0x%02X get: %i\n",
1411 info
->line
, *e100_modem_pins
[info
->line
].dtr_shadow
,
1412 E100_DTR_GET(info
));
1414 /* DTR is active low */
1416 unsigned long flags
;
1420 *e100_modem_pins
[info
->line
].dtr_shadow
&= ~mask
;
1421 *e100_modem_pins
[info
->line
].dtr_shadow
|= (set
? 0 : mask
);
1422 *e100_modem_pins
[info
->line
].dtr_port
= *e100_modem_pins
[info
->line
].dtr_shadow
;
1423 restore_flags(flags
);
1426 #ifdef SERIAL_DEBUG_IO
1427 printk("ser%i shadow after 0x%02X get: %i\n",
1428 info
->line
, *e100_modem_pins
[info
->line
].dtr_shadow
,
1429 E100_DTR_GET(info
));
1434 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1438 e100_rts(struct e100_serial
*info
, int set
)
1440 #ifndef CONFIG_SVINTO_SIM
1441 unsigned long flags
;
1444 info
->rx_ctrl
&= ~E100_RTS_MASK
;
1445 info
->rx_ctrl
|= (set
? 0 : E100_RTS_MASK
); /* RTS is active low */
1446 info
->port
[REG_REC_CTRL
] = info
->rx_ctrl
;
1447 restore_flags(flags
);
1448 #ifdef SERIAL_DEBUG_IO
1449 printk("ser%i rts %i\n", info
->line
, set
);
1455 /* If this behaves as a modem, RI and CD is an output */
1457 e100_ri_out(struct e100_serial
*info
, int set
)
1459 #ifndef CONFIG_SVINTO_SIM
1460 /* RI is active low */
1462 unsigned char mask
= e100_modem_pins
[info
->line
].ri_mask
;
1463 unsigned long flags
;
1467 *e100_modem_pins
[info
->line
].ri_shadow
&= ~mask
;
1468 *e100_modem_pins
[info
->line
].ri_shadow
|= (set
? 0 : mask
);
1469 *e100_modem_pins
[info
->line
].ri_port
= *e100_modem_pins
[info
->line
].ri_shadow
;
1470 restore_flags(flags
);
1475 e100_cd_out(struct e100_serial
*info
, int set
)
1477 #ifndef CONFIG_SVINTO_SIM
1478 /* CD is active low */
1480 unsigned char mask
= e100_modem_pins
[info
->line
].cd_mask
;
1481 unsigned long flags
;
1485 *e100_modem_pins
[info
->line
].cd_shadow
&= ~mask
;
1486 *e100_modem_pins
[info
->line
].cd_shadow
|= (set
? 0 : mask
);
1487 *e100_modem_pins
[info
->line
].cd_port
= *e100_modem_pins
[info
->line
].cd_shadow
;
1488 restore_flags(flags
);
1494 e100_disable_rx(struct e100_serial
*info
)
1496 #ifndef CONFIG_SVINTO_SIM
1497 /* disable the receiver */
1498 info
->port
[REG_REC_CTRL
] =
1499 (info
->rx_ctrl
&= ~IO_MASK(R_SERIAL0_REC_CTRL
, rec_enable
));
1504 e100_enable_rx(struct e100_serial
*info
)
1506 #ifndef CONFIG_SVINTO_SIM
1507 /* enable the receiver */
1508 info
->port
[REG_REC_CTRL
] =
1509 (info
->rx_ctrl
|= IO_MASK(R_SERIAL0_REC_CTRL
, rec_enable
));
1513 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1516 e100_disable_rxdma_irq(struct e100_serial
*info
)
1518 #ifdef SERIAL_DEBUG_INTR
1519 printk("rxdma_irq(%d): 0\n",info
->line
);
1521 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable_rxdma_irq %i\n", info
->line
));
1522 *R_IRQ_MASK2_CLR
= (info
->irq
<< 2) | (info
->irq
<< 3);
1526 e100_enable_rxdma_irq(struct e100_serial
*info
)
1528 #ifdef SERIAL_DEBUG_INTR
1529 printk("rxdma_irq(%d): 1\n",info
->line
);
1531 DINTR1(DEBUG_LOG(info
->line
,"IRQ enable_rxdma_irq %i\n", info
->line
));
1532 *R_IRQ_MASK2_SET
= (info
->irq
<< 2) | (info
->irq
<< 3);
1535 /* the tx DMA uses only dma_descr interrupt */
1537 static void e100_disable_txdma_irq(struct e100_serial
*info
)
1539 #ifdef SERIAL_DEBUG_INTR
1540 printk("txdma_irq(%d): 0\n",info
->line
);
1542 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable_txdma_irq %i\n", info
->line
));
1543 *R_IRQ_MASK2_CLR
= info
->irq
;
1546 static void e100_enable_txdma_irq(struct e100_serial
*info
)
1548 #ifdef SERIAL_DEBUG_INTR
1549 printk("txdma_irq(%d): 1\n",info
->line
);
1551 DINTR1(DEBUG_LOG(info
->line
,"IRQ enable_txdma_irq %i\n", info
->line
));
1552 *R_IRQ_MASK2_SET
= info
->irq
;
1555 static void e100_disable_txdma_channel(struct e100_serial
*info
)
1557 unsigned long flags
;
1559 /* Disable output DMA channel for the serial port in question
1560 * ( set to something other then serialX)
1564 DFLOW(DEBUG_LOG(info
->line
, "disable_txdma_channel %i\n", info
->line
));
1565 if (info
->line
== 0) {
1566 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma6
)) ==
1567 IO_STATE(R_GEN_CONFIG
, dma6
, serial0
)) {
1568 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma6
);
1569 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma6
, unused
);
1571 } else if (info
->line
== 1) {
1572 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma8
)) ==
1573 IO_STATE(R_GEN_CONFIG
, dma8
, serial1
)) {
1574 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma8
);
1575 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma8
, usb
);
1577 } else if (info
->line
== 2) {
1578 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma2
)) ==
1579 IO_STATE(R_GEN_CONFIG
, dma2
, serial2
)) {
1580 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma2
);
1581 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma2
, par0
);
1583 } else if (info
->line
== 3) {
1584 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma4
)) ==
1585 IO_STATE(R_GEN_CONFIG
, dma4
, serial3
)) {
1586 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma4
);
1587 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma4
, par1
);
1590 *R_GEN_CONFIG
= genconfig_shadow
;
1591 restore_flags(flags
);
1595 static void e100_enable_txdma_channel(struct e100_serial
*info
)
1597 unsigned long flags
;
1601 DFLOW(DEBUG_LOG(info
->line
, "enable_txdma_channel %i\n", info
->line
));
1602 /* Enable output DMA channel for the serial port in question */
1603 if (info
->line
== 0) {
1604 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma6
);
1605 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma6
, serial0
);
1606 } else if (info
->line
== 1) {
1607 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma8
);
1608 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma8
, serial1
);
1609 } else if (info
->line
== 2) {
1610 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma2
);
1611 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma2
, serial2
);
1612 } else if (info
->line
== 3) {
1613 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma4
);
1614 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma4
, serial3
);
1616 *R_GEN_CONFIG
= genconfig_shadow
;
1617 restore_flags(flags
);
1620 static void e100_disable_rxdma_channel(struct e100_serial
*info
)
1622 unsigned long flags
;
1624 /* Disable input DMA channel for the serial port in question
1625 * ( set to something other then serialX)
1629 if (info
->line
== 0) {
1630 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma7
)) ==
1631 IO_STATE(R_GEN_CONFIG
, dma7
, serial0
)) {
1632 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma7
);
1633 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma7
, unused
);
1635 } else if (info
->line
== 1) {
1636 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma9
)) ==
1637 IO_STATE(R_GEN_CONFIG
, dma9
, serial1
)) {
1638 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma9
);
1639 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma9
, usb
);
1641 } else if (info
->line
== 2) {
1642 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma3
)) ==
1643 IO_STATE(R_GEN_CONFIG
, dma3
, serial2
)) {
1644 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma3
);
1645 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma3
, par0
);
1647 } else if (info
->line
== 3) {
1648 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma5
)) ==
1649 IO_STATE(R_GEN_CONFIG
, dma5
, serial3
)) {
1650 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma5
);
1651 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma5
, par1
);
1654 *R_GEN_CONFIG
= genconfig_shadow
;
1655 restore_flags(flags
);
1659 static void e100_enable_rxdma_channel(struct e100_serial
*info
)
1661 unsigned long flags
;
1665 /* Enable input DMA channel for the serial port in question */
1666 if (info
->line
== 0) {
1667 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma7
);
1668 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma7
, serial0
);
1669 } else if (info
->line
== 1) {
1670 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma9
);
1671 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma9
, serial1
);
1672 } else if (info
->line
== 2) {
1673 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma3
);
1674 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma3
, serial2
);
1675 } else if (info
->line
== 3) {
1676 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma5
);
1677 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma5
, serial3
);
1679 *R_GEN_CONFIG
= genconfig_shadow
;
1680 restore_flags(flags
);
1683 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1684 /* in order to detect and fix errors on the first byte
1685 we have to use the serial interrupts as well. */
1688 e100_disable_serial_data_irq(struct e100_serial
*info
)
1690 #ifdef SERIAL_DEBUG_INTR
1691 printk("ser_irq(%d): 0\n",info
->line
);
1693 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable data_irq %i\n", info
->line
));
1694 *R_IRQ_MASK1_CLR
= (1U << (8+2*info
->line
));
1698 e100_enable_serial_data_irq(struct e100_serial
*info
)
1700 #ifdef SERIAL_DEBUG_INTR
1701 printk("ser_irq(%d): 1\n",info
->line
);
1702 printk("**** %d = %d\n",
1704 (1U << (8+2*info
->line
)));
1706 DINTR1(DEBUG_LOG(info
->line
,"IRQ enable data_irq %i\n", info
->line
));
1707 *R_IRQ_MASK1_SET
= (1U << (8+2*info
->line
));
1712 e100_disable_serial_tx_ready_irq(struct e100_serial
*info
)
1714 #ifdef SERIAL_DEBUG_INTR
1715 printk("ser_tx_irq(%d): 0\n",info
->line
);
1717 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable ready_irq %i\n", info
->line
));
1718 *R_IRQ_MASK1_CLR
= (1U << (8+1+2*info
->line
));
1722 e100_enable_serial_tx_ready_irq(struct e100_serial
*info
)
1724 #ifdef SERIAL_DEBUG_INTR
1725 printk("ser_tx_irq(%d): 1\n",info
->line
);
1726 printk("**** %d = %d\n",
1728 (1U << (8+1+2*info
->line
)));
1730 DINTR2(DEBUG_LOG(info
->line
,"IRQ enable ready_irq %i\n", info
->line
));
1731 *R_IRQ_MASK1_SET
= (1U << (8+1+2*info
->line
));
1734 static inline void e100_enable_rx_irq(struct e100_serial
*info
)
1736 if (info
->uses_dma_in
)
1737 e100_enable_rxdma_irq(info
);
1739 e100_enable_serial_data_irq(info
);
1741 static inline void e100_disable_rx_irq(struct e100_serial
*info
)
1743 if (info
->uses_dma_in
)
1744 e100_disable_rxdma_irq(info
);
1746 e100_disable_serial_data_irq(info
);
1749 #if defined(CONFIG_ETRAX_RS485)
1750 /* Enable RS-485 mode on selected port. This is UGLY. */
1752 e100_enable_rs485(struct tty_struct
*tty
,struct rs485_control
*r
)
1754 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
1756 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1757 *R_PORT_PA_DATA
= port_pa_data_shadow
|= (1 << rs485_pa_bit
);
1759 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1760 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
1761 rs485_port_g_bit
, 1);
1763 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1764 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
1765 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT
, 1);
1766 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
1767 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT
, 1);
1770 info
->rs485
.rts_on_send
= 0x01 & r
->rts_on_send
;
1771 info
->rs485
.rts_after_sent
= 0x01 & r
->rts_after_sent
;
1772 if (r
->delay_rts_before_send
>= 1000)
1773 info
->rs485
.delay_rts_before_send
= 1000;
1775 info
->rs485
.delay_rts_before_send
= r
->delay_rts_before_send
;
1776 info
->rs485
.enabled
= r
->enabled
;
1777 /* printk("rts: on send = %i, after = %i, enabled = %i",
1778 info->rs485.rts_on_send,
1779 info->rs485.rts_after_sent,
1787 e100_write_rs485(struct tty_struct
*tty
, int from_user
,
1788 const unsigned char *buf
, int count
)
1790 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
1791 int old_enabled
= info
->rs485
.enabled
;
1793 /* rs485 is always implicitly enabled if we're using the ioctl()
1794 * but it doesn't have to be set in the rs485_control
1795 * (to be backward compatible with old apps)
1796 * So we store, set and restore it.
1798 info
->rs485
.enabled
= 1;
1799 /* rs_write now deals with RS485 if enabled */
1800 count
= rs_write(tty
, from_user
, buf
, count
);
1801 info
->rs485
.enabled
= old_enabled
;
1805 #ifdef CONFIG_ETRAX_FAST_TIMER
1806 /* Timer function to toggle RTS when using FAST_TIMER */
1807 static void rs485_toggle_rts_timer_function(unsigned long data
)
1809 struct e100_serial
*info
= (struct e100_serial
*)data
;
1811 fast_timers_rs485
[info
->line
].function
= NULL
;
1812 e100_rts(info
, info
->rs485
.rts_after_sent
);
1813 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1814 e100_enable_rx(info
);
1815 e100_enable_rx_irq(info
);
1819 #endif /* CONFIG_ETRAX_RS485 */
1822 * ------------------------------------------------------------
1823 * rs_stop() and rs_start()
1825 * This routines are called before setting or resetting tty->stopped.
1826 * They enable or disable transmitter using the XOFF registers, as necessary.
1827 * ------------------------------------------------------------
1831 rs_stop(struct tty_struct
*tty
)
1833 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
1835 unsigned long flags
;
1838 save_flags(flags
); cli();
1839 DFLOW(DEBUG_LOG(info
->line
, "XOFF rs_stop xmit %i\n",
1840 CIRC_CNT(info
->xmit
.head
,
1841 info
->xmit
.tail
,SERIAL_XMIT_SIZE
)));
1843 xoff
= IO_FIELD(R_SERIAL0_XOFF
, xoff_char
, STOP_CHAR(info
->tty
));
1844 xoff
|= IO_STATE(R_SERIAL0_XOFF
, tx_stop
, stop
);
1845 if (tty
->termios
->c_iflag
& IXON
) {
1846 xoff
|= IO_STATE(R_SERIAL0_XOFF
, auto_xoff
, enable
);
1849 *((unsigned long *)&info
->port
[REG_XOFF
]) = xoff
;
1850 restore_flags(flags
);
1855 rs_start(struct tty_struct
*tty
)
1857 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
1859 unsigned long flags
;
1862 save_flags(flags
); cli();
1863 DFLOW(DEBUG_LOG(info
->line
, "XOFF rs_start xmit %i\n",
1864 CIRC_CNT(info
->xmit
.head
,
1865 info
->xmit
.tail
,SERIAL_XMIT_SIZE
)));
1866 xoff
= IO_FIELD(R_SERIAL0_XOFF
, xoff_char
, STOP_CHAR(tty
));
1867 xoff
|= IO_STATE(R_SERIAL0_XOFF
, tx_stop
, enable
);
1868 if (tty
->termios
->c_iflag
& IXON
) {
1869 xoff
|= IO_STATE(R_SERIAL0_XOFF
, auto_xoff
, enable
);
1872 *((unsigned long *)&info
->port
[REG_XOFF
]) = xoff
;
1873 if (!info
->uses_dma_out
&&
1874 info
->xmit
.head
!= info
->xmit
.tail
&& info
->xmit
.buf
)
1875 e100_enable_serial_tx_ready_irq(info
);
1877 restore_flags(flags
);
1882 * ----------------------------------------------------------------------
1884 * Here starts the interrupt handling routines. All of the following
1885 * subroutines are declared as inline and are folded into
1886 * rs_interrupt(). They were separated out for readability's sake.
1888 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1889 * runs with interrupts turned off. People who may want to modify
1890 * rs_interrupt() should try to keep the interrupt handler as fast as
1891 * possible. After you are done making modifications, it is not a bad
1894 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1896 * and look at the resulting assemble code in serial.s.
1898 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1899 * -----------------------------------------------------------------------
1903 * This routine is used by the interrupt handler to schedule
1904 * processing in the software interrupt portion of the driver.
1906 static void rs_sched_event(struct e100_serial
*info
, int event
)
1908 if (info
->event
& (1 << event
))
1910 info
->event
|= 1 << event
;
1911 schedule_work(&info
->work
);
1914 /* The output DMA channel is free - use it to send as many chars as possible
1916 * We don't pay attention to info->x_char, which means if the TTY wants to
1917 * use XON/XOFF it will set info->x_char but we won't send any X char!
1919 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1920 * buffer containing the X char, and skip updating xmit. We'd also have to
1921 * check if the last sent char was the X char when we enter this function
1922 * the next time, to avoid updating xmit with the sent X value.
1926 transmit_chars_dma(struct e100_serial
*info
)
1928 unsigned int c
, sentl
;
1929 struct etrax_dma_descr
*descr
;
1931 #ifdef CONFIG_SVINTO_SIM
1932 /* This will output too little if tail is not 0 always since
1933 * we don't reloop to send the other part. Anyway this SHOULD be a
1934 * no-op - transmit_chars_dma would never really be called during sim
1935 * since rs_write does not write into the xmit buffer then.
1937 if (info
->xmit
.tail
)
1938 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1939 if (info
->xmit
.head
!= info
->xmit
.tail
) {
1940 SIMCOUT(info
->xmit
.buf
+ info
->xmit
.tail
,
1941 CIRC_CNT(info
->xmit
.head
,
1944 info
->xmit
.head
= info
->xmit
.tail
; /* move back head */
1945 info
->tr_running
= 0;
1949 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1950 *info
->oclrintradr
=
1951 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
1952 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
1954 #ifdef SERIAL_DEBUG_INTR
1955 if (info
->line
== SERIAL_DEBUG_LINE
)
1958 if (!info
->tr_running
) {
1959 /* weirdo... we shouldn't get here! */
1960 printk(KERN_WARNING
"Achtung: transmit_chars_dma with !tr_running\n");
1964 descr
= &info
->tr_descr
;
1966 /* first get the amount of bytes sent during the last DMA transfer,
1967 and update xmit accordingly */
1969 /* if the stop bit was not set, all data has been sent */
1970 if (!(descr
->status
& d_stop
)) {
1971 sentl
= descr
->sw_len
;
1973 /* otherwise we find the amount of data sent here */
1974 sentl
= descr
->hw_len
;
1976 DFLOW(DEBUG_LOG(info
->line
, "TX %i done\n", sentl
));
1979 info
->icount
.tx
+= sentl
;
1981 /* update xmit buffer */
1982 info
->xmit
.tail
= (info
->xmit
.tail
+ sentl
) & (SERIAL_XMIT_SIZE
- 1);
1984 /* if there is only a few chars left in the buf, wake up the blocked
1986 if (CIRC_CNT(info
->xmit
.head
,
1988 SERIAL_XMIT_SIZE
) < WAKEUP_CHARS
)
1989 rs_sched_event(info
, RS_EVENT_WRITE_WAKEUP
);
1991 /* find out the largest amount of consecutive bytes we want to send now */
1993 c
= CIRC_CNT_TO_END(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
1995 /* Don't send all in one DMA transfer - divide it so we wake up
1996 * application before all is sent
1999 if (c
>= 4*WAKEUP_CHARS
)
2003 /* our job here is done, don't schedule any new DMA transfer */
2004 info
->tr_running
= 0;
2006 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2007 if (info
->rs485
.enabled
) {
2008 /* Set a short timer to toggle RTS */
2009 start_one_shot_timer(&fast_timers_rs485
[info
->line
],
2010 rs485_toggle_rts_timer_function
,
2011 (unsigned long)info
,
2012 info
->char_time_usec
*2,
2019 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2020 /* set up the descriptor correctly for output */
2021 DFLOW(DEBUG_LOG(info
->line
, "TX %i\n", c
));
2022 descr
->ctrl
= d_int
| d_eol
| d_wait
; /* Wait needed for tty_wait_until_sent() */
2024 descr
->buf
= virt_to_phys(info
->xmit
.buf
+ info
->xmit
.tail
);
2027 *info
->ofirstadr
= virt_to_phys(descr
); /* write to R_DMAx_FIRST */
2028 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, start
);
2030 /* DMA is now running (hopefully) */
2031 } /* transmit_chars_dma */
2034 start_transmit(struct e100_serial
*info
)
2037 if (info
->line
== SERIAL_DEBUG_LINE
)
2041 info
->tr_descr
.sw_len
= 0;
2042 info
->tr_descr
.hw_len
= 0;
2043 info
->tr_descr
.status
= 0;
2044 info
->tr_running
= 1;
2045 if (info
->uses_dma_out
)
2046 transmit_chars_dma(info
);
2048 e100_enable_serial_tx_ready_irq(info
);
2049 } /* start_transmit */
2051 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2052 static int serial_fast_timer_started
= 0;
2053 static int serial_fast_timer_expired
= 0;
2054 static void flush_timeout_function(unsigned long data
);
2055 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2056 unsigned long timer_flags; \
2057 save_flags(timer_flags); \
2059 if (fast_timers[info->line].function == NULL) { \
2060 serial_fast_timer_started++; \
2061 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2062 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2063 start_one_shot_timer(&fast_timers[info->line], \
2064 flush_timeout_function, \
2065 (unsigned long)info, \
2070 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2072 restore_flags(timer_flags); \
2074 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2077 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2078 #define START_FLUSH_FAST_TIMER(info, string)
2081 static struct etrax_recv_buffer
*
2082 alloc_recv_buffer(unsigned int size
)
2084 struct etrax_recv_buffer
*buffer
;
2086 if (!(buffer
= kmalloc(sizeof *buffer
+ size
, GFP_ATOMIC
)))
2089 buffer
->next
= NULL
;
2091 buffer
->error
= TTY_NORMAL
;
2097 append_recv_buffer(struct e100_serial
*info
, struct etrax_recv_buffer
*buffer
)
2099 unsigned long flags
;
2104 if (!info
->first_recv_buffer
)
2105 info
->first_recv_buffer
= buffer
;
2107 info
->last_recv_buffer
->next
= buffer
;
2109 info
->last_recv_buffer
= buffer
;
2111 info
->recv_cnt
+= buffer
->length
;
2112 if (info
->recv_cnt
> info
->max_recv_cnt
)
2113 info
->max_recv_cnt
= info
->recv_cnt
;
2115 restore_flags(flags
);
2119 add_char_and_flag(struct e100_serial
*info
, unsigned char data
, unsigned char flag
)
2121 struct etrax_recv_buffer
*buffer
;
2122 if (info
->uses_dma_in
) {
2123 if (!(buffer
= alloc_recv_buffer(4)))
2127 buffer
->error
= flag
;
2128 buffer
->buffer
[0] = data
;
2130 append_recv_buffer(info
, buffer
);
2134 struct tty_struct
*tty
= info
->tty
;
2135 *tty
->flip
.char_buf_ptr
= data
;
2136 *tty
->flip
.flag_buf_ptr
= flag
;
2137 tty
->flip
.flag_buf_ptr
++;
2138 tty
->flip
.char_buf_ptr
++;
2146 static unsigned int handle_descr_data(struct e100_serial
*info
,
2147 struct etrax_dma_descr
*descr
,
2150 struct etrax_recv_buffer
*buffer
= phys_to_virt(descr
->buf
) - sizeof *buffer
;
2152 if (info
->recv_cnt
+ recvl
> 65536) {
2154 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__
, recvl
);
2158 buffer
->length
= recvl
;
2160 if (info
->errorcode
== ERRCODE_SET_BREAK
)
2161 buffer
->error
= TTY_BREAK
;
2162 info
->errorcode
= 0;
2164 append_recv_buffer(info
, buffer
);
2166 if (!(buffer
= alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE
)))
2167 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__
);
2169 descr
->buf
= virt_to_phys(buffer
->buffer
);
2174 static unsigned int handle_all_descr_data(struct e100_serial
*info
)
2176 struct etrax_dma_descr
*descr
;
2178 unsigned int ret
= 0;
2182 descr
= &info
->rec_descr
[info
->cur_rec_descr
];
2184 if (descr
== phys_to_virt(*info
->idescradr
))
2187 if (++info
->cur_rec_descr
== SERIAL_RECV_DESCRIPTORS
)
2188 info
->cur_rec_descr
= 0;
2190 /* find out how many bytes were read */
2192 /* if the eop bit was not set, all data has been received */
2193 if (!(descr
->status
& d_eop
)) {
2194 recvl
= descr
->sw_len
;
2196 /* otherwise we find the amount of data received here */
2197 recvl
= descr
->hw_len
;
2200 /* Reset the status information */
2203 DFLOW( DEBUG_LOG(info
->line
, "RX %lu\n", recvl
);
2204 if (info
->tty
->stopped
) {
2205 unsigned char *buf
= phys_to_virt(descr
->buf
);
2206 DEBUG_LOG(info
->line
, "rx 0x%02X\n", buf
[0]);
2207 DEBUG_LOG(info
->line
, "rx 0x%02X\n", buf
[1]);
2208 DEBUG_LOG(info
->line
, "rx 0x%02X\n", buf
[2]);
2213 info
->icount
.rx
+= recvl
;
2215 ret
+= handle_descr_data(info
, descr
, recvl
);
2221 static void receive_chars_dma(struct e100_serial
*info
)
2223 struct tty_struct
*tty
;
2224 unsigned char rstat
;
2226 #ifdef CONFIG_SVINTO_SIM
2227 /* No receive in the simulator. Will probably be when the rest of
2228 * the serial interface works, and this piece will just be removed.
2233 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2234 *info
->iclrintradr
=
2235 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
2236 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
2239 if (!tty
) /* Something wrong... */
2242 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2243 if (info
->uses_dma_in
)
2244 e100_enable_serial_data_irq(info
);
2247 if (info
->errorcode
== ERRCODE_INSERT_BREAK
)
2248 add_char_and_flag(info
, '\0', TTY_BREAK
);
2250 handle_all_descr_data(info
);
2252 /* Read the status register to detect errors */
2253 rstat
= info
->port
[REG_STATUS
];
2254 if (rstat
& IO_MASK(R_SERIAL0_STATUS
, xoff_detect
) ) {
2255 DFLOW(DEBUG_LOG(info
->line
, "XOFF detect stat %x\n", rstat
));
2258 if (rstat
& SER_ERROR_MASK
) {
2259 /* If we got an error, we must reset it by reading the
2262 unsigned char data
= info
->port
[REG_DATA
];
2264 PROCSTAT(ser_stat
[info
->line
].errors_cnt
++);
2265 DEBUG_LOG(info
->line
, "#dERR: s d 0x%04X\n",
2266 ((rstat
& SER_ERROR_MASK
) << 8) | data
);
2268 if (rstat
& SER_PAR_ERR_MASK
)
2269 add_char_and_flag(info
, data
, TTY_PARITY
);
2270 else if (rstat
& SER_OVERRUN_MASK
)
2271 add_char_and_flag(info
, data
, TTY_OVERRUN
);
2272 else if (rstat
& SER_FRAMING_ERR_MASK
)
2273 add_char_and_flag(info
, data
, TTY_FRAME
);
2276 START_FLUSH_FAST_TIMER(info
, "receive_chars");
2278 /* Restart the receiving DMA */
2279 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, restart
);
2282 static int start_recv_dma(struct e100_serial
*info
)
2284 struct etrax_dma_descr
*descr
= info
->rec_descr
;
2285 struct etrax_recv_buffer
*buffer
;
2288 /* Set up the receiving descriptors */
2289 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++) {
2290 if (!(buffer
= alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE
)))
2291 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__
);
2293 descr
[i
].ctrl
= d_int
;
2294 descr
[i
].buf
= virt_to_phys(buffer
->buffer
);
2295 descr
[i
].sw_len
= SERIAL_DESCR_BUF_SIZE
;
2296 descr
[i
].hw_len
= 0;
2297 descr
[i
].status
= 0;
2298 descr
[i
].next
= virt_to_phys(&descr
[i
+1]);
2301 /* Link the last descriptor to the first */
2302 descr
[i
-1].next
= virt_to_phys(&descr
[0]);
2304 /* Start with the first descriptor in the list */
2305 info
->cur_rec_descr
= 0;
2308 *info
->ifirstadr
= virt_to_phys(&descr
[info
->cur_rec_descr
]);
2309 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, start
);
2311 /* Input DMA should be running now */
2316 start_receive(struct e100_serial
*info
)
2318 #ifdef CONFIG_SVINTO_SIM
2319 /* No receive in the simulator. Will probably be when the rest of
2320 * the serial interface works, and this piece will just be removed.
2324 info
->tty
->flip
.count
= 0;
2325 if (info
->uses_dma_in
) {
2326 /* reset the input dma channel to be sure it works */
2328 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
2329 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->icmdadr
) ==
2330 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, reset
));
2332 start_recv_dma(info
);
2337 /* the bits in the MASK2 register are laid out like this:
2338 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2339 where I is the input channel and O is the output channel for the port.
2340 info->irq is the bit number for the DMAO_DESCR so to check the others we
2341 shift info->irq to the left.
2344 /* dma output channel interrupt handler
2345 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2346 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2350 tr_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
)
2352 struct e100_serial
*info
;
2357 #ifdef CONFIG_SVINTO_SIM
2358 /* No receive in the simulator. Will probably be when the rest of
2359 * the serial interface works, and this piece will just be removed.
2362 const char *s
= "What? tr_interrupt in simulator??\n";
2363 SIMCOUT(s
,strlen(s
));
2368 /* find out the line that caused this irq and get it from rs_table */
2370 ireg
= *R_IRQ_MASK2_RD
; /* get the active irq bits for the dma channels */
2372 for (i
= 0; i
< NR_PORTS
; i
++) {
2373 info
= rs_table
+ i
;
2374 if (!info
->enabled
|| !info
->uses_dma_out
)
2376 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2377 if (ireg
& info
->irq
) {
2379 /* we can send a new dma bunch. make it so. */
2380 DINTR2(DEBUG_LOG(info
->line
, "tr_interrupt %i\n", i
));
2381 /* Read jiffies_usec first,
2382 * we want this time to be as late as possible
2384 PROCSTAT(ser_stat
[info
->line
].tx_dma_ints
++);
2385 info
->last_tx_active_usec
= GET_JIFFIES_USEC();
2386 info
->last_tx_active
= jiffies
;
2387 transmit_chars_dma(info
);
2390 /* FIXME: here we should really check for a change in the
2391 status lines and if so call status_handle(info) */
2393 return IRQ_RETVAL(handled
);
2394 } /* tr_interrupt */
2396 /* dma input channel interrupt handler */
2399 rec_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
)
2401 struct e100_serial
*info
;
2406 #ifdef CONFIG_SVINTO_SIM
2407 /* No receive in the simulator. Will probably be when the rest of
2408 * the serial interface works, and this piece will just be removed.
2411 const char *s
= "What? rec_interrupt in simulator??\n";
2412 SIMCOUT(s
,strlen(s
));
2417 /* find out the line that caused this irq and get it from rs_table */
2419 ireg
= *R_IRQ_MASK2_RD
; /* get the active irq bits for the dma channels */
2421 for (i
= 0; i
< NR_PORTS
; i
++) {
2422 info
= rs_table
+ i
;
2423 if (!info
->enabled
|| !info
->uses_dma_in
)
2425 /* check for both dma_eop and dma_descr for the input dma channel */
2426 if (ireg
& ((info
->irq
<< 2) | (info
->irq
<< 3))) {
2428 /* we have received something */
2429 receive_chars_dma(info
);
2432 /* FIXME: here we should really check for a change in the
2433 status lines and if so call status_handle(info) */
2435 return IRQ_RETVAL(handled
);
2436 } /* rec_interrupt */
2438 static int force_eop_if_needed(struct e100_serial
*info
)
2440 /* We check data_avail bit to determine if data has
2441 * arrived since last time
2443 unsigned char rstat
= info
->port
[REG_STATUS
];
2445 /* error or datavail? */
2446 if (rstat
& SER_ERROR_MASK
) {
2447 /* Some error has occurred. If there has been valid data, an
2448 * EOP interrupt will be made automatically. If no data, the
2449 * normal ser_interrupt should be enabled and handle it.
2452 DEBUG_LOG(info
->line
, "timeout err: rstat 0x%03X\n",
2453 rstat
| (info
->line
<< 8));
2457 if (rstat
& SER_DATA_AVAIL_MASK
) {
2458 /* Ok data, no error, count it */
2459 TIMERD(DEBUG_LOG(info
->line
, "timeout: rstat 0x%03X\n",
2460 rstat
| (info
->line
<< 8)));
2461 /* Read data to clear status flags */
2462 (void)info
->port
[REG_DATA
];
2464 info
->forced_eop
= 0;
2465 START_FLUSH_FAST_TIMER(info
, "magic");
2469 /* hit the timeout, force an EOP for the input
2470 * dma channel if we haven't already
2472 if (!info
->forced_eop
) {
2473 info
->forced_eop
= 1;
2474 PROCSTAT(ser_stat
[info
->line
].timeout_flush_cnt
++);
2475 TIMERD(DEBUG_LOG(info
->line
, "timeout EOP %i\n", info
->line
));
2482 static void flush_to_flip_buffer(struct e100_serial
*info
)
2484 struct tty_struct
*tty
;
2485 struct etrax_recv_buffer
*buffer
;
2486 unsigned int length
;
2487 unsigned long flags
;
2490 if (!info
->first_recv_buffer
)
2496 if (!(tty
= info
->tty
)) {
2497 restore_flags(flags
);
2501 length
= tty
->flip
.count
;
2502 /* Don't flip more than the ldisc has room for.
2503 * The return value from ldisc.receive_room(tty) - might not be up to
2504 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2505 * processed and not accounted for yet.
2506 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2507 * Lets buffer data here and let flow control take care of it.
2508 * Since we normally flip large chunks, the ldisc don't react
2509 * with throttle until too late if we flip to much.
2511 max_flip_size
= tty
->ldisc
.receive_room(tty
);
2512 if (max_flip_size
< 0)
2514 if (max_flip_size
<= (TTY_FLIPBUF_SIZE
+ /* Maybe not accounted for */
2515 length
+ info
->recv_cnt
+ /* We have this queued */
2516 2*SERIAL_DESCR_BUF_SIZE
+ /* This could be on the way */
2517 TTY_THRESHOLD_THROTTLE
)) { /* Some slack */
2518 /* check TTY_THROTTLED first so it indicates our state */
2519 if (!test_and_set_bit(TTY_THROTTLED
, &tty
->flags
)) {
2520 DFLOW(DEBUG_LOG(info
->line
,"flush_to_flip throttles room %lu\n", max_flip_size
));
2524 else if (max_flip_size
<= (TTY_FLIPBUF_SIZE
+ /* Maybe not accounted for */
2525 length
+ info
->recv_cnt
+ /* We have this queued */
2526 SERIAL_DESCR_BUF_SIZE
+ /* This could be on the way */
2527 TTY_THRESHOLD_THROTTLE
)) { /* Some slack */
2528 DFLOW(DEBUG_LOG(info
->line
,"flush_to_flip throttles again! %lu\n", max_flip_size
));
2534 if (max_flip_size
> TTY_FLIPBUF_SIZE
)
2535 max_flip_size
= TTY_FLIPBUF_SIZE
;
2537 while ((buffer
= info
->first_recv_buffer
) && length
< max_flip_size
) {
2538 unsigned int count
= buffer
->length
;
2540 if (length
+ count
> max_flip_size
)
2541 count
= max_flip_size
- length
;
2543 memcpy(tty
->flip
.char_buf_ptr
+ length
, buffer
->buffer
, count
);
2544 memset(tty
->flip
.flag_buf_ptr
+ length
, TTY_NORMAL
, count
);
2545 tty
->flip
.flag_buf_ptr
[length
] = buffer
->error
;
2548 info
->recv_cnt
-= count
;
2549 DFLIP(DEBUG_LOG(info
->line
,"flip: %i\n", length
));
2551 if (count
== buffer
->length
) {
2552 info
->first_recv_buffer
= buffer
->next
;
2555 buffer
->length
-= count
;
2556 memmove(buffer
->buffer
, buffer
->buffer
+ count
, buffer
->length
);
2557 buffer
->error
= TTY_NORMAL
;
2561 if (!info
->first_recv_buffer
)
2562 info
->last_recv_buffer
= NULL
;
2564 tty
->flip
.count
= length
;
2565 DFLIP(if (tty
->ldisc
.chars_in_buffer(tty
) > 3500) {
2566 DEBUG_LOG(info
->line
, "ldisc %lu\n",
2567 tty
->ldisc
.chars_in_buffer(tty
));
2568 DEBUG_LOG(info
->line
, "flip.count %lu\n",
2572 restore_flags(flags
);
2576 DEBUG_LOG(info
->line
, "*** rxtot %i\n", info
->icount
.rx
);
2577 DEBUG_LOG(info
->line
, "ldisc %lu\n", tty
->ldisc
.chars_in_buffer(tty
));
2578 DEBUG_LOG(info
->line
, "room %lu\n", tty
->ldisc
.receive_room(tty
));
2583 /* this includes a check for low-latency */
2584 tty_flip_buffer_push(tty
);
2587 static void check_flush_timeout(struct e100_serial
*info
)
2589 /* Flip what we've got (if we can) */
2590 flush_to_flip_buffer(info
);
2592 /* We might need to flip later, but not to fast
2593 * since the system is busy processing input... */
2594 if (info
->first_recv_buffer
)
2595 START_FLUSH_FAST_TIMER_TIME(info
, "flip", 2000);
2597 /* Force eop last, since data might have come while we're processing
2598 * and if we started the slow timer above, we won't start a fast
2601 force_eop_if_needed(info
);
2604 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2605 static void flush_timeout_function(unsigned long data
)
2607 struct e100_serial
*info
= (struct e100_serial
*)data
;
2609 fast_timers
[info
->line
].function
= NULL
;
2610 serial_fast_timer_expired
++;
2611 TIMERD(DEBUG_LOG(info
->line
, "flush_timout %i ", info
->line
));
2612 TIMERD(DEBUG_LOG(info
->line
, "num expired: %i\n", serial_fast_timer_expired
));
2613 check_flush_timeout(info
);
2618 /* dma fifo/buffer timeout handler
2619 forces an end-of-packet for the dma input channel if no chars
2620 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2623 static struct timer_list flush_timer
;
2626 timed_flush_handler(unsigned long ptr
)
2628 struct e100_serial
*info
;
2631 #ifdef CONFIG_SVINTO_SIM
2635 for (i
= 0; i
< NR_PORTS
; i
++) {
2636 info
= rs_table
+ i
;
2637 if (info
->uses_dma_in
)
2638 check_flush_timeout(info
);
2641 /* restart flush timer */
2642 mod_timer(&flush_timer
, jiffies
+ CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
);
2646 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2648 /* If there is an error (ie break) when the DMA is running and
2649 * there are no bytes in the fifo the DMA is stopped and we get no
2650 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2651 * transfer, and if it is without error we can turn the serial
2656 BREAK handling on ETRAX 100:
2657 ETRAX will generate interrupt although there is no stop bit between the
2660 Depending on how long the break sequence is, the end of the breaksequence
2661 will look differently:
2662 | indicates start/end of a character.
2664 B= Break character (0x00) with framing error.
2665 E= Error byte with parity error received after B characters.
2666 F= "Faked" valid byte received immediately after B characters.
2670 B BL ___________________________ V
2671 .._|__________|__________| |valid data |
2673 Multiple frame errors with data == 0x00 (B),
2674 the timing matches up "perfectly" so no extra ending char is detected.
2675 The RXD pin is 1 in the last interrupt, in that case
2676 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2677 know if another byte will come and this really is case 2. below
2678 (e.g F=0xFF or 0xFE)
2679 If RXD pin is 0 we can expect another character (see 2. below).
2684 B B E or F__________________..__ V
2685 .._|__________|__________|______ | |valid data
2689 Multiple frame errors with data == 0x00 (B),
2690 but the part of the break trigs is interpreted as a start bit (and possibly
2691 some 0 bits followed by a number of 1 bits and a stop bit).
2692 Depending on parity settings etc. this last character can be either
2693 a fake "valid" char (F) or have a parity error (E).
2695 If the character is valid it will be put in the buffer,
2696 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2697 will set the flags so the tty will handle it,
2698 if it's an error byte it will not be put in the buffer
2699 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2701 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2702 of the last faulty char (B) and compares it with the current time:
2703 If the time elapsed time is less then 2*char_time_usec we will assume
2704 it's a faked F char and not a Valid char and set
2705 info->errorcode = ERRCODE_SET_BREAK.
2707 Flaws in the above solution:
2708 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2709 We use the timer to distinguish a F character from a V character,
2710 if a V character is to close after the break we might make the wrong decision.
2712 TODO: The break will be delayed until an F or V character is received.
2717 struct e100_serial
* handle_ser_rx_interrupt_no_dma(struct e100_serial
*info
)
2719 unsigned long data_read
;
2720 struct tty_struct
*tty
= info
->tty
;
2723 printk("!NO TTY!\n");
2726 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
- TTY_THRESHOLD_THROTTLE
) {
2727 /* check TTY_THROTTLED first so it indicates our state */
2728 if (!test_and_set_bit(TTY_THROTTLED
, &tty
->flags
)) {
2729 DFLOW(DEBUG_LOG(info
->line
, "rs_throttle flip.count: %i\n", tty
->flip
.count
));
2733 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
) {
2734 DEBUG_LOG(info
->line
, "force FLIP! %i\n", tty
->flip
.count
);
2735 tty
->flip
.work
.func((void *) tty
);
2736 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
) {
2737 DEBUG_LOG(info
->line
, "FLIP FULL! %i\n", tty
->flip
.count
);
2738 return info
; /* if TTY_DONT_FLIP is set */
2741 /* Read data and status at the same time */
2742 data_read
= *((unsigned long *)&info
->port
[REG_DATA_STATUS32
]);
2744 if (data_read
& IO_MASK(R_SERIAL0_READ
, xoff_detect
) ) {
2745 DFLOW(DEBUG_LOG(info
->line
, "XOFF detect\n", 0));
2747 DINTR2(DEBUG_LOG(info
->line
, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
)));
2749 if (data_read
& ( IO_MASK(R_SERIAL0_READ
, framing_err
) |
2750 IO_MASK(R_SERIAL0_READ
, par_err
) |
2751 IO_MASK(R_SERIAL0_READ
, overrun
) )) {
2753 info
->last_rx_active_usec
= GET_JIFFIES_USEC();
2754 info
->last_rx_active
= jiffies
;
2755 DINTR1(DEBUG_LOG(info
->line
, "ser_rx err stat_data %04X\n", data_read
));
2757 if (!log_int_trig1_pos
) {
2758 log_int_trig1_pos
= log_int_pos
;
2759 log_int(rdpc(), 0, 0);
2764 if ( ((data_read
& IO_MASK(R_SERIAL0_READ
, data_in
)) == 0) &&
2765 (data_read
& IO_MASK(R_SERIAL0_READ
, framing_err
)) ) {
2766 /* Most likely a break, but we get interrupts over and
2770 if (!info
->break_detected_cnt
) {
2771 DEBUG_LOG(info
->line
, "#BRK start\n", 0);
2773 if (data_read
& IO_MASK(R_SERIAL0_READ
, rxd
)) {
2774 /* The RX pin is high now, so the break
2775 * must be over, but....
2776 * we can't really know if we will get another
2777 * last byte ending the break or not.
2778 * And we don't know if the byte (if any) will
2779 * have an error or look valid.
2781 DEBUG_LOG(info
->line
, "# BL BRK\n", 0);
2782 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2784 info
->break_detected_cnt
++;
2786 /* The error does not look like a break, but could be
2789 if (info
->break_detected_cnt
) {
2790 DEBUG_LOG(info
->line
, "EBRK %i\n", info
->break_detected_cnt
);
2791 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2793 if (info
->errorcode
== ERRCODE_INSERT_BREAK
) {
2795 *tty
->flip
.char_buf_ptr
= 0;
2796 *tty
->flip
.flag_buf_ptr
= TTY_BREAK
;
2797 tty
->flip
.flag_buf_ptr
++;
2798 tty
->flip
.char_buf_ptr
++;
2802 *tty
->flip
.char_buf_ptr
= IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
);
2804 if (data_read
& IO_MASK(R_SERIAL0_READ
, par_err
)) {
2805 info
->icount
.parity
++;
2806 *tty
->flip
.flag_buf_ptr
= TTY_PARITY
;
2807 } else if (data_read
& IO_MASK(R_SERIAL0_READ
, overrun
)) {
2808 info
->icount
.overrun
++;
2809 *tty
->flip
.flag_buf_ptr
= TTY_OVERRUN
;
2810 } else if (data_read
& IO_MASK(R_SERIAL0_READ
, framing_err
)) {
2811 info
->icount
.frame
++;
2812 *tty
->flip
.flag_buf_ptr
= TTY_FRAME
;
2814 info
->errorcode
= 0;
2816 info
->break_detected_cnt
= 0;
2818 } else if (data_read
& IO_MASK(R_SERIAL0_READ
, data_avail
)) {
2821 if (!log_int_trig1_pos
) {
2822 if (log_int_pos
>= log_int_size
) {
2825 log_int_trig0_pos
= log_int_pos
;
2826 log_int(rdpc(), 0, 0);
2829 *tty
->flip
.char_buf_ptr
= IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
);
2830 *tty
->flip
.flag_buf_ptr
= 0;
2832 DEBUG_LOG(info
->line
, "ser_rx int but no data_avail %08lX\n", data_read
);
2836 tty
->flip
.flag_buf_ptr
++;
2837 tty
->flip
.char_buf_ptr
++;
2840 data_read
= *((unsigned long *)&info
->port
[REG_DATA_STATUS32
]);
2841 if (data_read
& IO_MASK(R_SERIAL0_READ
, data_avail
)) {
2842 DEBUG_LOG(info
->line
, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
));
2846 tty_flip_buffer_push(info
->tty
);
2850 static struct e100_serial
* handle_ser_rx_interrupt(struct e100_serial
*info
)
2852 unsigned char rstat
;
2854 #ifdef SERIAL_DEBUG_INTR
2855 printk("Interrupt from serport %d\n", i
);
2857 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2858 if (!info
->uses_dma_in
) {
2859 return handle_ser_rx_interrupt_no_dma(info
);
2862 rstat
= info
->port
[REG_STATUS
];
2863 if (rstat
& IO_MASK(R_SERIAL0_STATUS
, xoff_detect
) ) {
2864 DFLOW(DEBUG_LOG(info
->line
, "XOFF detect\n", 0));
2867 if (rstat
& SER_ERROR_MASK
) {
2870 info
->last_rx_active_usec
= GET_JIFFIES_USEC();
2871 info
->last_rx_active
= jiffies
;
2872 /* If we got an error, we must reset it by reading the
2875 data
= info
->port
[REG_DATA
];
2876 DINTR1(DEBUG_LOG(info
->line
, "ser_rx! %c\n", data
));
2877 DINTR1(DEBUG_LOG(info
->line
, "ser_rx err stat %02X\n", rstat
));
2878 if (!data
&& (rstat
& SER_FRAMING_ERR_MASK
)) {
2879 /* Most likely a break, but we get interrupts over and
2883 if (!info
->break_detected_cnt
) {
2884 DEBUG_LOG(info
->line
, "#BRK start\n", 0);
2886 if (rstat
& SER_RXD_MASK
) {
2887 /* The RX pin is high now, so the break
2888 * must be over, but....
2889 * we can't really know if we will get another
2890 * last byte ending the break or not.
2891 * And we don't know if the byte (if any) will
2892 * have an error or look valid.
2894 DEBUG_LOG(info
->line
, "# BL BRK\n", 0);
2895 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2897 info
->break_detected_cnt
++;
2899 /* The error does not look like a break, but could be
2902 if (info
->break_detected_cnt
) {
2903 DEBUG_LOG(info
->line
, "EBRK %i\n", info
->break_detected_cnt
);
2904 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2906 if (info
->errorcode
== ERRCODE_INSERT_BREAK
) {
2908 add_char_and_flag(info
, '\0', TTY_BREAK
);
2911 if (rstat
& SER_PAR_ERR_MASK
) {
2912 info
->icount
.parity
++;
2913 add_char_and_flag(info
, data
, TTY_PARITY
);
2914 } else if (rstat
& SER_OVERRUN_MASK
) {
2915 info
->icount
.overrun
++;
2916 add_char_and_flag(info
, data
, TTY_OVERRUN
);
2917 } else if (rstat
& SER_FRAMING_ERR_MASK
) {
2918 info
->icount
.frame
++;
2919 add_char_and_flag(info
, data
, TTY_FRAME
);
2922 info
->errorcode
= 0;
2924 info
->break_detected_cnt
= 0;
2925 DEBUG_LOG(info
->line
, "#iERR s d %04X\n",
2926 ((rstat
& SER_ERROR_MASK
) << 8) | data
);
2928 PROCSTAT(ser_stat
[info
->line
].early_errors_cnt
++);
2929 } else { /* It was a valid byte, now let the DMA do the rest */
2930 unsigned long curr_time_u
= GET_JIFFIES_USEC();
2931 unsigned long curr_time
= jiffies
;
2933 if (info
->break_detected_cnt
) {
2934 /* Detect if this character is a new valid char or the
2935 * last char in a break sequence: If LSBits are 0 and
2936 * MSBits are high AND the time is close to the
2937 * previous interrupt we should discard it.
2940 (curr_time
- info
->last_rx_active
) * (1000000/HZ
) +
2941 curr_time_u
- info
->last_rx_active_usec
;
2942 if (elapsed_usec
< 2*info
->char_time_usec
) {
2943 DEBUG_LOG(info
->line
, "FBRK %i\n", info
->line
);
2944 /* Report as BREAK (error) and let
2945 * receive_chars_dma() handle it
2947 info
->errorcode
= ERRCODE_SET_BREAK
;
2949 DEBUG_LOG(info
->line
, "Not end of BRK (V)%i\n", info
->line
);
2951 DEBUG_LOG(info
->line
, "num brk %i\n", info
->break_detected_cnt
);
2954 #ifdef SERIAL_DEBUG_INTR
2955 printk("** OK, disabling ser_interrupts\n");
2957 e100_disable_serial_data_irq(info
);
2958 DINTR2(DEBUG_LOG(info
->line
, "ser_rx OK %d\n", info
->line
));
2959 info
->break_detected_cnt
= 0;
2961 PROCSTAT(ser_stat
[info
->line
].ser_ints_ok_cnt
++);
2963 /* Restarting the DMA never hurts */
2964 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, restart
);
2965 START_FLUSH_FAST_TIMER(info
, "ser_int");
2967 } /* handle_ser_rx_interrupt */
2969 static void handle_ser_tx_interrupt(struct e100_serial
*info
)
2971 unsigned long flags
;
2974 unsigned char rstat
;
2975 DFLOW(DEBUG_LOG(info
->line
, "tx_int: xchar 0x%02X\n", info
->x_char
));
2976 save_flags(flags
); cli();
2977 rstat
= info
->port
[REG_STATUS
];
2978 DFLOW(DEBUG_LOG(info
->line
, "stat %x\n", rstat
));
2980 info
->port
[REG_TR_DATA
] = info
->x_char
;
2983 /* We must enable since it is disabled in ser_interrupt */
2984 e100_enable_serial_tx_ready_irq(info
);
2985 restore_flags(flags
);
2988 if (info
->uses_dma_out
) {
2989 unsigned char rstat
;
2991 /* We only use normal tx interrupt when sending x_char */
2992 DFLOW(DEBUG_LOG(info
->line
, "tx_int: xchar sent\n", 0));
2993 save_flags(flags
); cli();
2994 rstat
= info
->port
[REG_STATUS
];
2995 DFLOW(DEBUG_LOG(info
->line
, "stat %x\n", rstat
));
2996 e100_disable_serial_tx_ready_irq(info
);
2997 if (info
->tty
->stopped
)
2999 /* Enable the DMA channel and tell it to continue */
3000 e100_enable_txdma_channel(info
);
3001 /* Wait 12 cycles before doing the DMA command */
3002 for(i
= 6; i
> 0; i
--)
3005 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, continue);
3006 restore_flags(flags
);
3009 /* Normal char-by-char interrupt */
3010 if (info
->xmit
.head
== info
->xmit
.tail
3011 || info
->tty
->stopped
3012 || info
->tty
->hw_stopped
) {
3013 DFLOW(DEBUG_LOG(info
->line
, "tx_int: stopped %i\n", info
->tty
->stopped
));
3014 e100_disable_serial_tx_ready_irq(info
);
3015 info
->tr_running
= 0;
3018 DINTR2(DEBUG_LOG(info
->line
, "tx_int %c\n", info
->xmit
.buf
[info
->xmit
.tail
]));
3019 /* Send a byte, rs485 timing is critical so turn of ints */
3020 save_flags(flags
); cli();
3021 info
->port
[REG_TR_DATA
] = info
->xmit
.buf
[info
->xmit
.tail
];
3022 info
->xmit
.tail
= (info
->xmit
.tail
+ 1) & (SERIAL_XMIT_SIZE
-1);
3024 if (info
->xmit
.head
== info
->xmit
.tail
) {
3025 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3026 if (info
->rs485
.enabled
) {
3027 /* Set a short timer to toggle RTS */
3028 start_one_shot_timer(&fast_timers_rs485
[info
->line
],
3029 rs485_toggle_rts_timer_function
,
3030 (unsigned long)info
,
3031 info
->char_time_usec
*2,
3035 info
->last_tx_active_usec
= GET_JIFFIES_USEC();
3036 info
->last_tx_active
= jiffies
;
3037 e100_disable_serial_tx_ready_irq(info
);
3038 info
->tr_running
= 0;
3039 DFLOW(DEBUG_LOG(info
->line
, "tx_int: stop2\n", 0));
3041 /* We must enable since it is disabled in ser_interrupt */
3042 e100_enable_serial_tx_ready_irq(info
);
3044 restore_flags(flags
);
3046 if (CIRC_CNT(info
->xmit
.head
,
3048 SERIAL_XMIT_SIZE
) < WAKEUP_CHARS
)
3049 rs_sched_event(info
, RS_EVENT_WRITE_WAKEUP
);
3051 } /* handle_ser_tx_interrupt */
3053 /* result of time measurements:
3054 * RX duration 54-60 us when doing something, otherwise 6-9 us
3055 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3058 ser_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
3060 static volatile int tx_started
= 0;
3061 struct e100_serial
*info
;
3063 unsigned long flags
;
3064 unsigned long irq_mask1_rd
;
3065 unsigned long data_mask
= (1 << (8+2*0)); /* ser0 data_avail */
3067 static volatile unsigned long reentered_ready_mask
= 0;
3069 save_flags(flags
); cli();
3070 irq_mask1_rd
= *R_IRQ_MASK1_RD
;
3071 /* First handle all rx interrupts with ints disabled */
3073 irq_mask1_rd
&= e100_ser_int_mask
;
3074 for (i
= 0; i
< NR_PORTS
; i
++) {
3075 /* Which line caused the data irq? */
3076 if (irq_mask1_rd
& data_mask
) {
3078 handle_ser_rx_interrupt(info
);
3083 /* Handle tx interrupts with interrupts enabled so we
3084 * can take care of new data interrupts while transmitting
3085 * We protect the tx part with the tx_started flag.
3086 * We disable the tr_ready interrupts we are about to handle and
3087 * unblock the serial interrupt so new serial interrupts may come.
3089 * If we get a new interrupt:
3090 * - it migth be due to synchronous serial ports.
3091 * - serial irq will be blocked by general irq handler.
3092 * - async data will be handled above (sync will be ignored).
3093 * - tx_started flag will prevent us from trying to send again and
3094 * we will exit fast - no need to unblock serial irq.
3095 * - Next (sync) serial interrupt handler will be runned with
3096 * disabled interrupt due to restore_flags() at end of function,
3097 * so sync handler will not be preempted or reentered.
3100 unsigned long ready_mask
;
3103 /* Only the tr_ready interrupts left */
3104 irq_mask1_rd
&= (IO_MASK(R_IRQ_MASK1_RD
, ser0_ready
) |
3105 IO_MASK(R_IRQ_MASK1_RD
, ser1_ready
) |
3106 IO_MASK(R_IRQ_MASK1_RD
, ser2_ready
) |
3107 IO_MASK(R_IRQ_MASK1_RD
, ser3_ready
));
3108 while (irq_mask1_rd
) {
3109 /* Disable those we are about to handle */
3110 *R_IRQ_MASK1_CLR
= irq_mask1_rd
;
3111 /* Unblock the serial interrupt */
3112 *R_VECT_MASK_SET
= IO_STATE(R_VECT_MASK_SET
, serial
, set
);
3115 ready_mask
= (1 << (8+1+2*0)); /* ser0 tr_ready */
3117 for (i
= 0; i
< NR_PORTS
; i
++) {
3118 /* Which line caused the ready irq? */
3119 if (irq_mask1_rd
& ready_mask
) {
3121 handle_ser_tx_interrupt(info
);
3126 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3128 /* Handle reentered TX interrupt */
3129 irq_mask1_rd
= reentered_ready_mask
;
3134 unsigned long ready_mask
;
3135 ready_mask
= irq_mask1_rd
& (IO_MASK(R_IRQ_MASK1_RD
, ser0_ready
) |
3136 IO_MASK(R_IRQ_MASK1_RD
, ser1_ready
) |
3137 IO_MASK(R_IRQ_MASK1_RD
, ser2_ready
) |
3138 IO_MASK(R_IRQ_MASK1_RD
, ser3_ready
));
3140 reentered_ready_mask
|= ready_mask
;
3141 /* Disable those we are about to handle */
3142 *R_IRQ_MASK1_CLR
= ready_mask
;
3143 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE
, "ser_int reentered with TX %X\n", ready_mask
));
3147 restore_flags(flags
);
3148 return IRQ_RETVAL(handled
);
3149 } /* ser_interrupt */
3153 * -------------------------------------------------------------------
3154 * Here ends the serial interrupt routines.
3155 * -------------------------------------------------------------------
3159 * This routine is used to handle the "bottom half" processing for the
3160 * serial driver, known also the "software interrupt" processing.
3161 * This processing is done at the kernel interrupt level, after the
3162 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3163 * is where time-consuming activities which can not be done in the
3164 * interrupt driver proper are done; the interrupt driver schedules
3165 * them using rs_sched_event(), and they get done here.
3168 do_softint(void *private_
)
3170 struct e100_serial
*info
= (struct e100_serial
*) private_
;
3171 struct tty_struct
*tty
;
3177 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP
, &info
->event
)) {
3178 if ((tty
->flags
& (1 << TTY_DO_WRITE_WAKEUP
)) &&
3179 tty
->ldisc
.write_wakeup
)
3180 (tty
->ldisc
.write_wakeup
)(tty
);
3181 wake_up_interruptible(&tty
->write_wait
);
3186 startup(struct e100_serial
* info
)
3188 unsigned long flags
;
3189 unsigned long xmit_page
;
3192 xmit_page
= get_zeroed_page(GFP_KERNEL
);
3199 /* if it was already initialized, skip this */
3201 if (info
->flags
& ASYNC_INITIALIZED
) {
3202 restore_flags(flags
);
3203 free_page(xmit_page
);
3208 free_page(xmit_page
);
3210 info
->xmit
.buf
= (unsigned char *) xmit_page
;
3212 #ifdef SERIAL_DEBUG_OPEN
3213 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info
->line
, info
->xmit
.buf
);
3216 #ifdef CONFIG_SVINTO_SIM
3217 /* Bits and pieces collected from below. Better to have them
3218 in one ifdef:ed clause than to mix in a lot of ifdefs,
3221 clear_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
3223 info
->xmit
.head
= info
->xmit
.tail
= 0;
3224 info
->first_recv_buffer
= info
->last_recv_buffer
= NULL
;
3225 info
->recv_cnt
= info
->max_recv_cnt
= 0;
3227 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++)
3228 info
->rec_descr
[i
].buf
= NULL
;
3230 /* No real action in the simulator, but may set info important
3236 * Clear the FIFO buffers and disable them
3237 * (they will be reenabled in change_speed())
3241 * Reset the DMA channels and make sure their interrupts are cleared
3244 if (info
->dma_in_enabled
) {
3245 info
->uses_dma_in
= 1;
3246 e100_enable_rxdma_channel(info
);
3248 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
3250 /* Wait until reset cycle is complete */
3251 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->icmdadr
) ==
3252 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, reset
));
3254 /* Make sure the irqs are cleared */
3255 *info
->iclrintradr
=
3256 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
3257 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
3259 e100_disable_rxdma_channel(info
);
3262 if (info
->dma_out_enabled
) {
3263 info
->uses_dma_out
= 1;
3264 e100_enable_txdma_channel(info
);
3265 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
3267 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->ocmdadr
) ==
3268 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, reset
));
3270 /* Make sure the irqs are cleared */
3271 *info
->oclrintradr
=
3272 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
3273 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
3275 e100_disable_txdma_channel(info
);
3279 clear_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
3281 info
->xmit
.head
= info
->xmit
.tail
= 0;
3282 info
->first_recv_buffer
= info
->last_recv_buffer
= NULL
;
3283 info
->recv_cnt
= info
->max_recv_cnt
= 0;
3285 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++)
3286 info
->rec_descr
[i
].buf
= 0;
3289 * and set the speed and other flags of the serial port
3290 * this will start the rx/tx as well
3292 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3293 e100_enable_serial_data_irq(info
);
3297 /* dummy read to reset any serial errors */
3299 (void)info
->port
[REG_DATA
];
3301 /* enable the interrupts */
3302 if (info
->uses_dma_out
)
3303 e100_enable_txdma_irq(info
);
3305 e100_enable_rx_irq(info
);
3307 info
->tr_running
= 0; /* to be sure we don't lock up the transmitter */
3309 /* setup the dma input descriptor and start dma */
3311 start_receive(info
);
3313 /* for safety, make sure the descriptors last result is 0 bytes written */
3315 info
->tr_descr
.sw_len
= 0;
3316 info
->tr_descr
.hw_len
= 0;
3317 info
->tr_descr
.status
= 0;
3319 /* enable RTS/DTR last */
3324 #endif /* CONFIG_SVINTO_SIM */
3326 info
->flags
|= ASYNC_INITIALIZED
;
3328 restore_flags(flags
);
3333 * This routine will shutdown a serial port; interrupts are disabled, and
3334 * DTR is dropped if the hangup on close termio flag is on.
3337 shutdown(struct e100_serial
* info
)
3339 unsigned long flags
;
3340 struct etrax_dma_descr
*descr
= info
->rec_descr
;
3341 struct etrax_recv_buffer
*buffer
;
3344 #ifndef CONFIG_SVINTO_SIM
3345 /* shut down the transmitter and receiver */
3346 DFLOW(DEBUG_LOG(info
->line
, "shutdown %i\n", info
->line
));
3347 e100_disable_rx(info
);
3348 info
->port
[REG_TR_CTRL
] = (info
->tx_ctrl
&= ~0x40);
3350 /* disable interrupts, reset dma channels */
3351 if (info
->uses_dma_in
) {
3352 e100_disable_rxdma_irq(info
);
3353 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
3354 info
->uses_dma_in
= 0;
3356 e100_disable_serial_data_irq(info
);
3359 if (info
->uses_dma_out
) {
3360 e100_disable_txdma_irq(info
);
3361 info
->tr_running
= 0;
3362 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
3363 info
->uses_dma_out
= 0;
3365 e100_disable_serial_tx_ready_irq(info
);
3366 info
->tr_running
= 0;
3369 #endif /* CONFIG_SVINTO_SIM */
3371 if (!(info
->flags
& ASYNC_INITIALIZED
))
3374 #ifdef SERIAL_DEBUG_OPEN
3375 printk("Shutting down serial port %d (irq %d)....\n", info
->line
,
3380 cli(); /* Disable interrupts */
3382 if (info
->xmit
.buf
) {
3383 free_page((unsigned long)info
->xmit
.buf
);
3384 info
->xmit
.buf
= NULL
;
3387 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++)
3389 buffer
= phys_to_virt(descr
[i
].buf
) - sizeof *buffer
;
3394 if (!info
->tty
|| (info
->tty
->termios
->c_cflag
& HUPCL
)) {
3395 /* hang up DTR and RTS if HUPCL is enabled */
3397 e100_rts(info
, 0); /* could check CRTSCTS before doing this */
3401 set_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
3403 info
->flags
&= ~ASYNC_INITIALIZED
;
3404 restore_flags(flags
);
3408 /* change baud rate and other assorted parameters */
3411 change_speed(struct e100_serial
*info
)
3415 unsigned long flags
;
3416 /* first some safety checks */
3418 if (!info
->tty
|| !info
->tty
->termios
)
3423 cflag
= info
->tty
->termios
->c_cflag
;
3425 /* possibly, the tx/rx should be disabled first to do this safely */
3427 /* change baud-rate and write it to the hardware */
3428 if ((info
->flags
& ASYNC_SPD_MASK
) == ASYNC_SPD_CUST
) {
3429 /* Special baudrate */
3430 u32 mask
= 0xFF << (info
->line
*8); /* Each port has 8 bits */
3431 unsigned long alt_source
=
3432 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, normal
) |
3433 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, normal
);
3434 /* R_ALT_SER_BAUDRATE selects the source */
3435 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3436 (unsigned long)info
->baud_base
, info
->custom_divisor
));
3437 if (info
->baud_base
== SERIAL_PRESCALE_BASE
) {
3438 /* 0, 2-65535 (0=65536) */
3439 u16 divisor
= info
->custom_divisor
;
3440 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3441 /* baudrate is 3.125MHz/custom_divisor */
3443 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, prescale
) |
3444 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, prescale
);
3446 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor
));
3447 *R_SERIAL_PRESCALE
= divisor
;
3448 info
->baud
= SERIAL_PRESCALE_BASE
/divisor
;
3450 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3451 else if ((info
->baud_base
==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
/8 &&
3452 info
->custom_divisor
== 1) ||
3453 (info
->baud_base
==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
&&
3454 info
->custom_divisor
== 8)) {
3455 /* ext_clk selected */
3457 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, extern) |
3458 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, extern);
3459 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
/8));
3460 info
->baud
= CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
/8;
3466 /* Bad baudbase, we don't support using timer0
3469 printk(KERN_WARNING
"Bad baud_base/custom_divisor: %lu/%i\n",
3470 (unsigned long)info
->baud_base
, info
->custom_divisor
);
3472 r_alt_ser_baudrate_shadow
&= ~mask
;
3473 r_alt_ser_baudrate_shadow
|= (alt_source
<< (info
->line
*8));
3474 *R_ALT_SER_BAUDRATE
= r_alt_ser_baudrate_shadow
;
3476 /* Normal baudrate */
3477 /* Make sure we use normal baudrate */
3478 u32 mask
= 0xFF << (info
->line
*8); /* Each port has 8 bits */
3479 unsigned long alt_source
=
3480 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, normal
) |
3481 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, normal
);
3482 r_alt_ser_baudrate_shadow
&= ~mask
;
3483 r_alt_ser_baudrate_shadow
|= (alt_source
<< (info
->line
*8));
3484 #ifndef CONFIG_SVINTO_SIM
3485 *R_ALT_SER_BAUDRATE
= r_alt_ser_baudrate_shadow
;
3486 #endif /* CONFIG_SVINTO_SIM */
3488 info
->baud
= cflag_to_baud(cflag
);
3489 #ifndef CONFIG_SVINTO_SIM
3490 info
->port
[REG_BAUD
] = cflag_to_etrax_baud(cflag
);
3491 #endif /* CONFIG_SVINTO_SIM */
3494 #ifndef CONFIG_SVINTO_SIM
3495 /* start with default settings and then fill in changes */
3498 /* 8 bit, no/even parity */
3499 info
->rx_ctrl
&= ~(IO_MASK(R_SERIAL0_REC_CTRL
, rec_bitnr
) |
3500 IO_MASK(R_SERIAL0_REC_CTRL
, rec_par_en
) |
3501 IO_MASK(R_SERIAL0_REC_CTRL
, rec_par
));
3503 /* 8 bit, no/even parity, 1 stop bit, no cts */
3504 info
->tx_ctrl
&= ~(IO_MASK(R_SERIAL0_TR_CTRL
, tr_bitnr
) |
3505 IO_MASK(R_SERIAL0_TR_CTRL
, tr_par_en
) |
3506 IO_MASK(R_SERIAL0_TR_CTRL
, tr_par
) |
3507 IO_MASK(R_SERIAL0_TR_CTRL
, stop_bits
) |
3508 IO_MASK(R_SERIAL0_TR_CTRL
, auto_cts
));
3510 if ((cflag
& CSIZE
) == CS7
) {
3511 /* set 7 bit mode */
3512 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_bitnr
, tr_7bit
);
3513 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_bitnr
, rec_7bit
);
3516 if (cflag
& CSTOPB
) {
3517 /* set 2 stop bit mode */
3518 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, stop_bits
, two_bits
);
3521 if (cflag
& PARENB
) {
3523 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_par_en
, enable
);
3524 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_par_en
, enable
);
3527 if (cflag
& CMSPAR
) {
3528 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3529 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_stick_par
, stick
);
3530 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_stick_par
, stick
);
3532 if (cflag
& PARODD
) {
3533 /* set odd parity (or Mark if CMSPAR) */
3534 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_par
, odd
);
3535 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_par
, odd
);
3538 if (cflag
& CRTSCTS
) {
3539 /* enable automatic CTS handling */
3540 DFLOW(DEBUG_LOG(info
->line
, "FLOW auto_cts enabled\n", 0));
3541 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, auto_cts
, active
);
3544 /* make sure the tx and rx are enabled */
3546 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_enable
, enable
);
3547 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_enable
, enable
);
3549 /* actually write the control regs to the hardware */
3551 info
->port
[REG_TR_CTRL
] = info
->tx_ctrl
;
3552 info
->port
[REG_REC_CTRL
] = info
->rx_ctrl
;
3553 xoff
= IO_FIELD(R_SERIAL0_XOFF
, xoff_char
, STOP_CHAR(info
->tty
));
3554 xoff
|= IO_STATE(R_SERIAL0_XOFF
, tx_stop
, enable
);
3555 if (info
->tty
->termios
->c_iflag
& IXON
) {
3556 DFLOW(DEBUG_LOG(info
->line
, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info
->tty
)));
3557 xoff
|= IO_STATE(R_SERIAL0_XOFF
, auto_xoff
, enable
);
3560 *((unsigned long *)&info
->port
[REG_XOFF
]) = xoff
;
3561 restore_flags(flags
);
3562 #endif /* !CONFIG_SVINTO_SIM */
3564 update_char_time(info
);
3566 } /* change_speed */
3568 /* start transmitting chars NOW */
3571 rs_flush_chars(struct tty_struct
*tty
)
3573 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3574 unsigned long flags
;
3576 if (info
->tr_running
||
3577 info
->xmit
.head
== info
->xmit
.tail
||
3583 #ifdef SERIAL_DEBUG_FLOW
3584 printk("rs_flush_chars\n");
3587 /* this protection might not exactly be necessary here */
3591 start_transmit(info
);
3592 restore_flags(flags
);
3595 static int rs_raw_write(struct tty_struct
* tty
, int from_user
,
3596 const unsigned char *buf
, int count
)
3599 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3600 unsigned long flags
;
3602 /* first some sanity checks */
3604 if (!tty
|| !info
->xmit
.buf
|| !tmp_buf
)
3607 #ifdef SERIAL_DEBUG_DATA
3608 if (info
->line
== SERIAL_DEBUG_LINE
)
3609 printk("rs_raw_write (%d), status %d\n",
3610 count
, info
->port
[REG_STATUS
]);
3613 #ifdef CONFIG_SVINTO_SIM
3614 /* Really simple. The output is here and now. */
3615 SIMCOUT(buf
, count
);
3619 DFLOW(DEBUG_LOG(info
->line
, "write count %i ", count
));
3620 DFLOW(DEBUG_LOG(info
->line
, "ldisc %i\n", tty
->ldisc
.chars_in_buffer(tty
)));
3623 /* the cli/restore_flags pairs below are needed because the
3624 * DMA interrupt handler moves the info->xmit values. the memcpy
3625 * needs to be in the critical region unfortunately, because we
3626 * need to read xmit values, memcpy, write xmit values in one
3627 * atomic operation... this could perhaps be avoided by more clever
3631 mutex_lock(&tmp_buf_mutex
);
3634 c
= CIRC_SPACE_TO_END(info
->xmit
.head
,
3642 c
-= copy_from_user(tmp_buf
, buf
, c
);
3649 c1
= CIRC_SPACE_TO_END(info
->xmit
.head
,
3654 memcpy(info
->xmit
.buf
+ info
->xmit
.head
, tmp_buf
, c
);
3655 info
->xmit
.head
= ((info
->xmit
.head
+ c
) &
3656 (SERIAL_XMIT_SIZE
-1));
3657 restore_flags(flags
);
3662 mutex_unlock(&tmp_buf_mutex
);
3666 c
= CIRC_SPACE_TO_END(info
->xmit
.head
,
3675 memcpy(info
->xmit
.buf
+ info
->xmit
.head
, buf
, c
);
3676 info
->xmit
.head
= (info
->xmit
.head
+ c
) &
3677 (SERIAL_XMIT_SIZE
-1);
3682 restore_flags(flags
);
3685 /* enable transmitter if not running, unless the tty is stopped
3686 * this does not need IRQ protection since if tr_running == 0
3687 * the IRQ's are not running anyway for this port.
3689 DFLOW(DEBUG_LOG(info
->line
, "write ret %i\n", ret
));
3691 if (info
->xmit
.head
!= info
->xmit
.tail
&&
3694 !info
->tr_running
) {
3695 start_transmit(info
);
3699 } /* raw_raw_write() */
3702 rs_write(struct tty_struct
* tty
, int from_user
,
3703 const unsigned char *buf
, int count
)
3705 #if defined(CONFIG_ETRAX_RS485)
3706 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3708 if (info
->rs485
.enabled
)
3710 /* If we are in RS-485 mode, we need to toggle RTS and disable
3711 * the receiver before initiating a DMA transfer
3713 #ifdef CONFIG_ETRAX_FAST_TIMER
3714 /* Abort any started timer */
3715 fast_timers_rs485
[info
->line
].function
= NULL
;
3716 del_fast_timer(&fast_timers_rs485
[info
->line
]);
3718 e100_rts(info
, info
->rs485
.rts_on_send
);
3719 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3720 e100_disable_rx(info
);
3721 e100_enable_rx_irq(info
);
3724 if (info
->rs485
.delay_rts_before_send
> 0)
3725 msleep(info
->rs485
.delay_rts_before_send
);
3727 #endif /* CONFIG_ETRAX_RS485 */
3729 count
= rs_raw_write(tty
, from_user
, buf
, count
);
3731 #if defined(CONFIG_ETRAX_RS485)
3732 if (info
->rs485
.enabled
)
3735 /* If we are in RS-485 mode the following has to be done:
3736 * wait until DMA is ready
3737 * wait on transmit shift register
3739 * enable the receiver
3742 /* Sleep until all sent */
3743 tty_wait_until_sent(tty
, 0);
3744 #ifdef CONFIG_ETRAX_FAST_TIMER
3745 /* Now sleep a little more so that shift register is empty */
3746 schedule_usleep(info
->char_time_usec
* 2);
3748 /* wait on transmit shift register */
3750 get_lsr_info(info
, &val
);
3751 }while (!(val
& TIOCSER_TEMT
));
3753 e100_rts(info
, info
->rs485
.rts_after_sent
);
3755 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3756 e100_enable_rx(info
);
3757 e100_enable_rxdma_irq(info
);
3760 #endif /* CONFIG_ETRAX_RS485 */
3766 /* how much space is available in the xmit buffer? */
3769 rs_write_room(struct tty_struct
*tty
)
3771 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3773 return CIRC_SPACE(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
3776 /* How many chars are in the xmit buffer?
3777 * This does not include any chars in the transmitter FIFO.
3778 * Use wait_until_sent for waiting for FIFO drain.
3782 rs_chars_in_buffer(struct tty_struct
*tty
)
3784 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3786 return CIRC_CNT(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
3789 /* discard everything in the xmit buffer */
3792 rs_flush_buffer(struct tty_struct
*tty
)
3794 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3795 unsigned long flags
;
3799 info
->xmit
.head
= info
->xmit
.tail
= 0;
3800 restore_flags(flags
);
3802 wake_up_interruptible(&tty
->write_wait
);
3804 if ((tty
->flags
& (1 << TTY_DO_WRITE_WAKEUP
)) &&
3805 tty
->ldisc
.write_wakeup
)
3806 (tty
->ldisc
.write_wakeup
)(tty
);
3810 * This function is used to send a high-priority XON/XOFF character to
3813 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3814 * but we do it in handle_ser_tx_interrupt().
3815 * We disable DMA channel and enable tx ready interrupt and write the
3816 * character when possible.
3818 static void rs_send_xchar(struct tty_struct
*tty
, char ch
)
3820 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3821 unsigned long flags
;
3822 save_flags(flags
); cli();
3823 if (info
->uses_dma_out
) {
3824 /* Put the DMA on hold and disable the channel */
3825 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, hold
);
3826 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->ocmdadr
) !=
3827 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, hold
));
3828 e100_disable_txdma_channel(info
);
3831 /* Must make sure transmitter is not stopped before we can transmit */
3835 /* Enable manual transmit interrupt and send from there */
3836 DFLOW(DEBUG_LOG(info
->line
, "rs_send_xchar 0x%02X\n", ch
));
3838 e100_enable_serial_tx_ready_irq(info
);
3839 restore_flags(flags
);
3843 * ------------------------------------------------------------
3846 * This routine is called by the upper-layer tty layer to signal that
3847 * incoming characters should be throttled.
3848 * ------------------------------------------------------------
3851 rs_throttle(struct tty_struct
* tty
)
3853 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3854 #ifdef SERIAL_DEBUG_THROTTLE
3857 printk("throttle %s: %lu....\n", tty_name(tty
, buf
),
3858 (unsigned long)tty
->ldisc
.chars_in_buffer(tty
));
3860 DFLOW(DEBUG_LOG(info
->line
,"rs_throttle %lu\n", tty
->ldisc
.chars_in_buffer(tty
)));
3862 /* Do RTS before XOFF since XOFF might take some time */
3863 if (tty
->termios
->c_cflag
& CRTSCTS
) {
3864 /* Turn off RTS line */
3868 rs_send_xchar(tty
, STOP_CHAR(tty
));
3873 rs_unthrottle(struct tty_struct
* tty
)
3875 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3876 #ifdef SERIAL_DEBUG_THROTTLE
3879 printk("unthrottle %s: %lu....\n", tty_name(tty
, buf
),
3880 (unsigned long)tty
->ldisc
.chars_in_buffer(tty
));
3882 DFLOW(DEBUG_LOG(info
->line
,"rs_unthrottle ldisc %d\n", tty
->ldisc
.chars_in_buffer(tty
)));
3883 DFLOW(DEBUG_LOG(info
->line
,"rs_unthrottle flip.count: %i\n", tty
->flip
.count
));
3884 /* Do RTS before XOFF since XOFF might take some time */
3885 if (tty
->termios
->c_cflag
& CRTSCTS
) {
3886 /* Assert RTS line */
3894 rs_send_xchar(tty
, START_CHAR(tty
));
3900 * ------------------------------------------------------------
3901 * rs_ioctl() and friends
3902 * ------------------------------------------------------------
3906 get_serial_info(struct e100_serial
* info
,
3907 struct serial_struct
* retinfo
)
3909 struct serial_struct tmp
;
3911 /* this is all probably wrong, there are a lot of fields
3912 * here that we don't have in e100_serial and maybe we
3913 * should set them to something else than 0.
3918 memset(&tmp
, 0, sizeof(tmp
));
3919 tmp
.type
= info
->type
;
3920 tmp
.line
= info
->line
;
3921 tmp
.port
= (int)info
->port
;
3922 tmp
.irq
= info
->irq
;
3923 tmp
.flags
= info
->flags
;
3924 tmp
.baud_base
= info
->baud_base
;
3925 tmp
.close_delay
= info
->close_delay
;
3926 tmp
.closing_wait
= info
->closing_wait
;
3927 tmp
.custom_divisor
= info
->custom_divisor
;
3928 if (copy_to_user(retinfo
, &tmp
, sizeof(*retinfo
)))
3934 set_serial_info(struct e100_serial
*info
,
3935 struct serial_struct
*new_info
)
3937 struct serial_struct new_serial
;
3938 struct e100_serial old_info
;
3941 if (copy_from_user(&new_serial
, new_info
, sizeof(new_serial
)))
3946 if (!capable(CAP_SYS_ADMIN
)) {
3947 if ((new_serial
.type
!= info
->type
) ||
3948 (new_serial
.close_delay
!= info
->close_delay
) ||
3949 ((new_serial
.flags
& ~ASYNC_USR_MASK
) !=
3950 (info
->flags
& ~ASYNC_USR_MASK
)))
3952 info
->flags
= ((info
->flags
& ~ASYNC_USR_MASK
) |
3953 (new_serial
.flags
& ASYNC_USR_MASK
));
3954 goto check_and_exit
;
3957 if (info
->count
> 1)
3961 * OK, past this point, all the error checking has been done.
3962 * At this point, we start making changes.....
3965 info
->baud_base
= new_serial
.baud_base
;
3966 info
->flags
= ((info
->flags
& ~ASYNC_FLAGS
) |
3967 (new_serial
.flags
& ASYNC_FLAGS
));
3968 info
->custom_divisor
= new_serial
.custom_divisor
;
3969 info
->type
= new_serial
.type
;
3970 info
->close_delay
= new_serial
.close_delay
;
3971 info
->closing_wait
= new_serial
.closing_wait
;
3972 info
->tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
3975 if (info
->flags
& ASYNC_INITIALIZED
) {
3978 retval
= startup(info
);
3983 * get_lsr_info - get line status register info
3985 * Purpose: Let user call ioctl() to get info when the UART physically
3986 * is emptied. On bus types like RS485, the transmitter must
3987 * release the bus after transmitting. This must be done when
3988 * the transmit shift register is empty, not be done when the
3989 * transmit holding register is empty. This functionality
3990 * allows an RS485 driver to be written in user space.
3993 get_lsr_info(struct e100_serial
* info
, unsigned int *value
)
3995 unsigned int result
= TIOCSER_TEMT
;
3996 #ifndef CONFIG_SVINTO_SIM
3997 unsigned long curr_time
= jiffies
;
3998 unsigned long curr_time_usec
= GET_JIFFIES_USEC();
3999 unsigned long elapsed_usec
=
4000 (curr_time
- info
->last_tx_active
) * 1000000/HZ
+
4001 curr_time_usec
- info
->last_tx_active_usec
;
4003 if (info
->xmit
.head
!= info
->xmit
.tail
||
4004 elapsed_usec
< 2*info
->char_time_usec
) {
4009 if (copy_to_user(value
, &result
, sizeof(int)))
4014 #ifdef SERIAL_DEBUG_IO
4021 const struct state_str control_state_str
[] = {
4022 {TIOCM_DTR
, "DTR" },
4026 {TIOCM_CTS
, "CTS" },
4029 {TIOCM_DSR
, "DSR" },
4033 char *get_control_state_str(int MLines
, char *s
)
4038 while (control_state_str
[i
].str
!= NULL
) {
4039 if (MLines
& control_state_str
[i
].state
) {
4043 strcat(s
, control_state_str
[i
].str
);
4052 get_modem_info(struct e100_serial
* info
, unsigned int *value
)
4054 unsigned int result
;
4055 /* Polarity isn't verified */
4056 #if 0 /*def SERIAL_DEBUG_IO */
4058 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4064 E100_CTS_GET(info
));
4068 (!E100_RTS_GET(info
) ? TIOCM_RTS
: 0)
4069 | (!E100_DTR_GET(info
) ? TIOCM_DTR
: 0)
4070 | (!E100_RI_GET(info
) ? TIOCM_RNG
: 0)
4071 | (!E100_DSR_GET(info
) ? TIOCM_DSR
: 0)
4072 | (!E100_CD_GET(info
) ? TIOCM_CAR
: 0)
4073 | (!E100_CTS_GET(info
) ? TIOCM_CTS
: 0);
4075 #ifdef SERIAL_DEBUG_IO
4076 printk("e100ser: modem state: %i 0x%08X\n", result
, result
);
4080 get_control_state_str(result
, s
);
4081 printk("state: %s\n", s
);
4084 if (copy_to_user(value
, &result
, sizeof(int)))
4091 set_modem_info(struct e100_serial
* info
, unsigned int cmd
,
4092 unsigned int *value
)
4096 if (copy_from_user(&arg
, value
, sizeof(int)))
4101 if (arg
& TIOCM_RTS
) {
4104 if (arg
& TIOCM_DTR
) {
4107 /* Handle FEMALE behaviour */
4108 if (arg
& TIOCM_RI
) {
4109 e100_ri_out(info
, 1);
4111 if (arg
& TIOCM_CD
) {
4112 e100_cd_out(info
, 1);
4116 if (arg
& TIOCM_RTS
) {
4119 if (arg
& TIOCM_DTR
) {
4122 /* Handle FEMALE behaviour */
4123 if (arg
& TIOCM_RI
) {
4124 e100_ri_out(info
, 0);
4126 if (arg
& TIOCM_CD
) {
4127 e100_cd_out(info
, 0);
4131 e100_rts(info
, arg
& TIOCM_RTS
);
4132 e100_dtr(info
, arg
& TIOCM_DTR
);
4133 /* Handle FEMALE behaviour */
4134 e100_ri_out(info
, arg
& TIOCM_RI
);
4135 e100_cd_out(info
, arg
& TIOCM_CD
);
4145 rs_break(struct tty_struct
*tty
, int break_state
)
4147 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
4148 unsigned long flags
;
4155 if (break_state
== -1) {
4156 /* Go to manual mode and set the txd pin to 0 */
4157 info
->tx_ctrl
&= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4159 info
->tx_ctrl
|= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4161 info
->port
[REG_TR_CTRL
] = info
->tx_ctrl
;
4162 restore_flags(flags
);
4166 rs_ioctl(struct tty_struct
*tty
, struct file
* file
,
4167 unsigned int cmd
, unsigned long arg
)
4169 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
4171 if ((cmd
!= TIOCGSERIAL
) && (cmd
!= TIOCSSERIAL
) &&
4172 (cmd
!= TIOCSERCONFIG
) && (cmd
!= TIOCSERGWILD
) &&
4173 (cmd
!= TIOCSERSWILD
) && (cmd
!= TIOCSERGSTRUCT
)) {
4174 if (tty
->flags
& (1 << TTY_IO_ERROR
))
4180 return get_modem_info(info
, (unsigned int *) arg
);
4184 return set_modem_info(info
, cmd
, (unsigned int *) arg
);
4186 return get_serial_info(info
,
4187 (struct serial_struct
*) arg
);
4189 return set_serial_info(info
,
4190 (struct serial_struct
*) arg
);
4191 case TIOCSERGETLSR
: /* Get line status register */
4192 return get_lsr_info(info
, (unsigned int *) arg
);
4194 case TIOCSERGSTRUCT
:
4195 if (copy_to_user((struct e100_serial
*) arg
,
4196 info
, sizeof(struct e100_serial
)))
4200 #if defined(CONFIG_ETRAX_RS485)
4201 case TIOCSERSETRS485
:
4203 struct rs485_control rs485ctrl
;
4204 if (copy_from_user(&rs485ctrl
, (struct rs485_control
*)arg
, sizeof(rs485ctrl
)))
4207 return e100_enable_rs485(tty
, &rs485ctrl
);
4210 case TIOCSERWRRS485
:
4212 struct rs485_write rs485wr
;
4213 if (copy_from_user(&rs485wr
, (struct rs485_write
*)arg
, sizeof(rs485wr
)))
4216 return e100_write_rs485(tty
, 1, rs485wr
.outc
, rs485wr
.outc_size
);
4221 return -ENOIOCTLCMD
;
4227 rs_set_termios(struct tty_struct
*tty
, struct termios
*old_termios
)
4229 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
4231 if (tty
->termios
->c_cflag
== old_termios
->c_cflag
&&
4232 tty
->termios
->c_iflag
== old_termios
->c_iflag
)
4237 /* Handle turning off CRTSCTS */
4238 if ((old_termios
->c_cflag
& CRTSCTS
) &&
4239 !(tty
->termios
->c_cflag
& CRTSCTS
)) {
4240 tty
->hw_stopped
= 0;
4246 /* In debugport.c - register a console write function that uses the normal
4249 typedef int (*debugport_write_function
)(int i
, const char *buf
, unsigned int len
);
4251 extern debugport_write_function debug_write_function
;
4253 static int rs_debug_write_function(int i
, const char *buf
, unsigned int len
)
4257 struct tty_struct
*tty
;
4258 static int recurse_cnt
= 0;
4260 tty
= rs_table
[i
].tty
;
4262 unsigned long flags
;
4263 if (recurse_cnt
> 5) /* We skip this debug output */
4266 local_irq_save(flags
);
4268 local_irq_restore(flags
);
4270 cnt
= rs_write(tty
, 0, buf
+ written
, len
);
4278 local_irq_save(flags
);
4280 local_irq_restore(flags
);
4287 * ------------------------------------------------------------
4290 * This routine is called when the serial port gets closed. First, we
4291 * wait for the last remaining data to be sent. Then, we unlink its
4292 * S structure from the interrupt chain if necessary, and we free
4293 * that IRQ if nothing is left in the chain.
4294 * ------------------------------------------------------------
4297 rs_close(struct tty_struct
*tty
, struct file
* filp
)
4299 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
4300 unsigned long flags
;
4305 /* interrupts are disabled for this entire function */
4310 if (tty_hung_up_p(filp
)) {
4311 restore_flags(flags
);
4315 #ifdef SERIAL_DEBUG_OPEN
4316 printk("[%d] rs_close ttyS%d, count = %d\n", current
->pid
,
4317 info
->line
, info
->count
);
4319 if ((tty
->count
== 1) && (info
->count
!= 1)) {
4321 * Uh, oh. tty->count is 1, which means that the tty
4322 * structure will be freed. Info->count should always
4323 * be one in these conditions. If it's greater than
4324 * one, we've got real problems, since it means the
4325 * serial port won't be shutdown.
4328 "rs_close: bad serial port count; tty->count is 1, "
4329 "info->count is %d\n", info
->count
);
4332 if (--info
->count
< 0) {
4333 printk(KERN_CRIT
"rs_close: bad serial port count for ttyS%d: %d\n",
4334 info
->line
, info
->count
);
4338 restore_flags(flags
);
4341 info
->flags
|= ASYNC_CLOSING
;
4343 * Save the termios structure, since this port may have
4344 * separate termios for callout and dialin.
4346 if (info
->flags
& ASYNC_NORMAL_ACTIVE
)
4347 info
->normal_termios
= *tty
->termios
;
4349 * Now we wait for the transmit buffer to clear; and we notify
4350 * the line discipline to only process XON/XOFF characters.
4353 if (info
->closing_wait
!= ASYNC_CLOSING_WAIT_NONE
)
4354 tty_wait_until_sent(tty
, info
->closing_wait
);
4356 * At this point we stop accepting input. To do this, we
4357 * disable the serial receiver and the DMA receive interrupt.
4359 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4360 e100_disable_serial_data_irq(info
);
4363 #ifndef CONFIG_SVINTO_SIM
4364 e100_disable_rx(info
);
4365 e100_disable_rx_irq(info
);
4367 if (info
->flags
& ASYNC_INITIALIZED
) {
4369 * Before we drop DTR, make sure the UART transmitter
4370 * has completely drained; this is especially
4371 * important as we have a transmit FIFO!
4373 rs_wait_until_sent(tty
, HZ
);
4378 if (tty
->driver
->flush_buffer
)
4379 tty
->driver
->flush_buffer(tty
);
4380 if (tty
->ldisc
.flush_buffer
)
4381 tty
->ldisc
.flush_buffer(tty
);
4385 if (info
->blocked_open
) {
4386 if (info
->close_delay
)
4387 schedule_timeout_interruptible(info
->close_delay
);
4388 wake_up_interruptible(&info
->open_wait
);
4390 info
->flags
&= ~(ASYNC_NORMAL_ACTIVE
|ASYNC_CLOSING
);
4391 wake_up_interruptible(&info
->close_wait
);
4392 restore_flags(flags
);
4396 #if defined(CONFIG_ETRAX_RS485)
4397 if (info
->rs485
.enabled
) {
4398 info
->rs485
.enabled
= 0;
4399 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4400 *R_PORT_PA_DATA
= port_pa_data_shadow
&= ~(1 << rs485_pa_bit
);
4402 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4403 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
4404 rs485_port_g_bit
, 0);
4406 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4407 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
4408 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT
, 0);
4409 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
4410 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT
, 0);
4417 * rs_wait_until_sent() --- wait until the transmitter is empty
4419 static void rs_wait_until_sent(struct tty_struct
*tty
, int timeout
)
4421 unsigned long orig_jiffies
;
4422 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
4423 unsigned long curr_time
= jiffies
;
4424 unsigned long curr_time_usec
= GET_JIFFIES_USEC();
4426 (curr_time
- info
->last_tx_active
) * (1000000/HZ
) +
4427 curr_time_usec
- info
->last_tx_active_usec
;
4430 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4431 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4433 orig_jiffies
= jiffies
;
4434 while (info
->xmit
.head
!= info
->xmit
.tail
|| /* More in send queue */
4435 (*info
->ostatusadr
& 0x007f) || /* more in FIFO */
4436 (elapsed_usec
< 2*info
->char_time_usec
)) {
4437 schedule_timeout_interruptible(1);
4438 if (signal_pending(current
))
4440 if (timeout
&& time_after(jiffies
, orig_jiffies
+ timeout
))
4442 curr_time
= jiffies
;
4443 curr_time_usec
= GET_JIFFIES_USEC();
4445 (curr_time
- info
->last_tx_active
) * (1000000/HZ
) +
4446 curr_time_usec
- info
->last_tx_active_usec
;
4448 set_current_state(TASK_RUNNING
);
4452 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4455 rs_hangup(struct tty_struct
*tty
)
4457 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
4459 rs_flush_buffer(tty
);
4463 info
->flags
&= ~ASYNC_NORMAL_ACTIVE
;
4465 wake_up_interruptible(&info
->open_wait
);
4469 * ------------------------------------------------------------
4470 * rs_open() and friends
4471 * ------------------------------------------------------------
4474 block_til_ready(struct tty_struct
*tty
, struct file
* filp
,
4475 struct e100_serial
*info
)
4477 DECLARE_WAITQUEUE(wait
, current
);
4478 unsigned long flags
;
4480 int do_clocal
= 0, extra_count
= 0;
4483 * If the device is in the middle of being closed, then block
4484 * until it's done, and then try again.
4486 if (tty_hung_up_p(filp
) ||
4487 (info
->flags
& ASYNC_CLOSING
)) {
4488 if (info
->flags
& ASYNC_CLOSING
)
4489 interruptible_sleep_on(&info
->close_wait
);
4490 #ifdef SERIAL_DO_RESTART
4491 if (info
->flags
& ASYNC_HUP_NOTIFY
)
4494 return -ERESTARTSYS
;
4501 * If non-blocking mode is set, or the port is not enabled,
4502 * then make the check up front and then exit.
4504 if ((filp
->f_flags
& O_NONBLOCK
) ||
4505 (tty
->flags
& (1 << TTY_IO_ERROR
))) {
4506 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
4510 if (tty
->termios
->c_cflag
& CLOCAL
) {
4515 * Block waiting for the carrier detect and the line to become
4516 * free (i.e., not in use by the callout). While we are in
4517 * this loop, info->count is dropped by one, so that
4518 * rs_close() knows when to free things. We restore it upon
4519 * exit, either normal or abnormal.
4522 add_wait_queue(&info
->open_wait
, &wait
);
4523 #ifdef SERIAL_DEBUG_OPEN
4524 printk("block_til_ready before block: ttyS%d, count = %d\n",
4525 info
->line
, info
->count
);
4529 if (!tty_hung_up_p(filp
)) {
4533 restore_flags(flags
);
4534 info
->blocked_open
++;
4538 /* assert RTS and DTR */
4541 restore_flags(flags
);
4542 set_current_state(TASK_INTERRUPTIBLE
);
4543 if (tty_hung_up_p(filp
) ||
4544 !(info
->flags
& ASYNC_INITIALIZED
)) {
4545 #ifdef SERIAL_DO_RESTART
4546 if (info
->flags
& ASYNC_HUP_NOTIFY
)
4549 retval
= -ERESTARTSYS
;
4555 if (!(info
->flags
& ASYNC_CLOSING
) && do_clocal
)
4556 /* && (do_clocal || DCD_IS_ASSERTED) */
4558 if (signal_pending(current
)) {
4559 retval
= -ERESTARTSYS
;
4562 #ifdef SERIAL_DEBUG_OPEN
4563 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4564 info
->line
, info
->count
);
4568 set_current_state(TASK_RUNNING
);
4569 remove_wait_queue(&info
->open_wait
, &wait
);
4572 info
->blocked_open
--;
4573 #ifdef SERIAL_DEBUG_OPEN
4574 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4575 info
->line
, info
->count
);
4579 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
4584 * This routine is called whenever a serial port is opened.
4585 * It performs the serial-specific initialization for the tty structure.
4588 rs_open(struct tty_struct
*tty
, struct file
* filp
)
4590 struct e100_serial
*info
;
4594 /* find which port we want to open */
4598 if (line
< 0 || line
>= NR_PORTS
)
4601 /* find the corresponding e100_serial struct in the table */
4602 info
= rs_table
+ line
;
4604 /* don't allow the opening of ports that are not enabled in the HW config */
4608 #ifdef SERIAL_DEBUG_OPEN
4609 printk("[%d] rs_open %s, count = %d\n", current
->pid
, tty
->name
,
4614 tty
->driver_data
= info
;
4617 info
->tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
4620 page
= get_zeroed_page(GFP_KERNEL
);
4627 tmp_buf
= (unsigned char *) page
;
4631 * If the port is in the middle of closing, bail out now
4633 if (tty_hung_up_p(filp
) ||
4634 (info
->flags
& ASYNC_CLOSING
)) {
4635 if (info
->flags
& ASYNC_CLOSING
)
4636 interruptible_sleep_on(&info
->close_wait
);
4637 #ifdef SERIAL_DO_RESTART
4638 return ((info
->flags
& ASYNC_HUP_NOTIFY
) ?
4639 -EAGAIN
: -ERESTARTSYS
);
4646 * Start up the serial port
4649 retval
= startup(info
);
4653 retval
= block_til_ready(tty
, filp
, info
);
4655 #ifdef SERIAL_DEBUG_OPEN
4656 printk("rs_open returning after block_til_ready with %d\n",
4662 if ((info
->count
== 1) && (info
->flags
& ASYNC_SPLIT_TERMIOS
)) {
4663 *tty
->termios
= info
->normal_termios
;
4667 #ifdef SERIAL_DEBUG_OPEN
4668 printk("rs_open ttyS%d successful...\n", info
->line
);
4670 DLOG_INT_TRIG( log_int_pos
= 0);
4672 DFLIP( if (info
->line
== SERIAL_DEBUG_LINE
) {
4673 info
->icount
.rx
= 0;
4680 * /proc fs routines....
4683 static int line_info(char *buf
, struct e100_serial
*info
)
4689 ret
= sprintf(buf
, "%d: uart:E100 port:%lX irq:%d",
4690 info
->line
, (unsigned long)info
->port
, info
->irq
);
4692 if (!info
->port
|| (info
->type
== PORT_UNKNOWN
)) {
4693 ret
+= sprintf(buf
+ret
, "\n");
4699 if (!E100_RTS_GET(info
))
4700 strcat(stat_buf
, "|RTS");
4701 if (!E100_CTS_GET(info
))
4702 strcat(stat_buf
, "|CTS");
4703 if (!E100_DTR_GET(info
))
4704 strcat(stat_buf
, "|DTR");
4705 if (!E100_DSR_GET(info
))
4706 strcat(stat_buf
, "|DSR");
4707 if (!E100_CD_GET(info
))
4708 strcat(stat_buf
, "|CD");
4709 if (!E100_RI_GET(info
))
4710 strcat(stat_buf
, "|RI");
4712 ret
+= sprintf(buf
+ret
, " baud:%d", info
->baud
);
4714 ret
+= sprintf(buf
+ret
, " tx:%lu rx:%lu",
4715 (unsigned long)info
->icount
.tx
,
4716 (unsigned long)info
->icount
.rx
);
4717 tmp
= CIRC_CNT(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
4719 ret
+= sprintf(buf
+ret
, " tx_pend:%lu/%lu",
4721 (unsigned long)SERIAL_XMIT_SIZE
);
4724 ret
+= sprintf(buf
+ret
, " rx_pend:%lu/%lu",
4725 (unsigned long)info
->recv_cnt
,
4726 (unsigned long)info
->max_recv_cnt
);
4731 if (info
->tty
->stopped
)
4732 ret
+= sprintf(buf
+ret
, " stopped:%i",
4733 (int)info
->tty
->stopped
);
4734 if (info
->tty
->hw_stopped
)
4735 ret
+= sprintf(buf
+ret
, " hw_stopped:%i",
4736 (int)info
->tty
->hw_stopped
);
4740 unsigned char rstat
= info
->port
[REG_STATUS
];
4741 if (rstat
& IO_MASK(R_SERIAL0_STATUS
, xoff_detect
) )
4742 ret
+= sprintf(buf
+ret
, " xoff_detect:1");
4750 if (info
->icount
.frame
)
4751 ret
+= sprintf(buf
+ret
, " fe:%lu",
4752 (unsigned long)info
->icount
.frame
);
4754 if (info
->icount
.parity
)
4755 ret
+= sprintf(buf
+ret
, " pe:%lu",
4756 (unsigned long)info
->icount
.parity
);
4758 if (info
->icount
.brk
)
4759 ret
+= sprintf(buf
+ret
, " brk:%lu",
4760 (unsigned long)info
->icount
.brk
);
4762 if (info
->icount
.overrun
)
4763 ret
+= sprintf(buf
+ret
, " oe:%lu",
4764 (unsigned long)info
->icount
.overrun
);
4767 * Last thing is the RS-232 status lines
4769 ret
+= sprintf(buf
+ret
, " %s\n", stat_buf
+1);
4773 int rs_read_proc(char *page
, char **start
, off_t off
, int count
,
4774 int *eof
, void *data
)
4779 len
+= sprintf(page
, "serinfo:1.0 driver:%s\n",
4781 for (i
= 0; i
< NR_PORTS
&& len
< 4000; i
++) {
4782 if (!rs_table
[i
].enabled
)
4784 l
= line_info(page
+ len
, &rs_table
[i
]);
4786 if (len
+begin
> off
+count
)
4788 if (len
+begin
< off
) {
4793 #ifdef DEBUG_LOG_INCLUDED
4794 for (i
= 0; i
< debug_log_pos
; i
++) {
4795 len
+= sprintf(page
+ len
, "%-4i %lu.%lu ", i
, debug_log
[i
].time
, timer_data_to_ns(debug_log
[i
].timer_data
));
4796 len
+= sprintf(page
+ len
, debug_log
[i
].string
, debug_log
[i
].value
);
4797 if (len
+begin
> off
+count
)
4799 if (len
+begin
< off
) {
4804 len
+= sprintf(page
+ len
, "debug_log %i/%i %li bytes\n",
4805 i
, DEBUG_LOG_SIZE
, begin
+len
);
4811 if (off
>= len
+begin
)
4813 *start
= page
+ (off
-begin
);
4814 return ((count
< begin
+len
-off
) ? count
: begin
+len
-off
);
4817 /* Finally, routines used to initialize the serial driver. */
4820 show_serial_version(void)
4823 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4824 &serial_version
[11]); /* "$Revision: x.yy" */
4827 /* rs_init inits the driver at boot (using the module_init chain) */
4829 static struct tty_operations rs_ops
= {
4833 .flush_chars
= rs_flush_chars
,
4834 .write_room
= rs_write_room
,
4835 .chars_in_buffer
= rs_chars_in_buffer
,
4836 .flush_buffer
= rs_flush_buffer
,
4838 .throttle
= rs_throttle
,
4839 .unthrottle
= rs_unthrottle
,
4840 .set_termios
= rs_set_termios
,
4843 .hangup
= rs_hangup
,
4844 .break_ctl
= rs_break
,
4845 .send_xchar
= rs_send_xchar
,
4846 .wait_until_sent
= rs_wait_until_sent
,
4847 .read_proc
= rs_read_proc
,
4854 struct e100_serial
*info
;
4855 struct tty_driver
*driver
= alloc_tty_driver(NR_PORTS
);
4860 show_serial_version();
4862 /* Setup the timed flush handler system */
4864 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4865 init_timer(&flush_timer
);
4866 flush_timer
.function
= timed_flush_handler
;
4867 mod_timer(&flush_timer
, jiffies
+ CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
);
4870 /* Initialize the tty_driver structure */
4872 driver
->driver_name
= "serial";
4873 driver
->name
= "ttyS";
4874 driver
->major
= TTY_MAJOR
;
4875 driver
->minor_start
= 64;
4876 driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
4877 driver
->subtype
= SERIAL_TYPE_NORMAL
;
4878 driver
->init_termios
= tty_std_termios
;
4879 driver
->init_termios
.c_cflag
=
4880 B115200
| CS8
| CREAD
| HUPCL
| CLOCAL
; /* is normally B9600 default... */
4881 driver
->flags
= TTY_DRIVER_REAL_RAW
| TTY_DRIVER_NO_DEVFS
;
4882 driver
->termios
= serial_termios
;
4883 driver
->termios_locked
= serial_termios_locked
;
4885 tty_set_operations(driver
, &rs_ops
);
4886 serial_driver
= driver
;
4887 if (tty_register_driver(driver
))
4888 panic("Couldn't register serial driver\n");
4889 /* do some initializing for the separate ports */
4891 for (i
= 0, info
= rs_table
; i
< NR_PORTS
; i
++,info
++) {
4892 info
->uses_dma_in
= 0;
4893 info
->uses_dma_out
= 0;
4896 info
->type
= PORT_ETRAX
;
4897 info
->tr_running
= 0;
4898 info
->forced_eop
= 0;
4899 info
->baud_base
= DEF_BAUD_BASE
;
4900 info
->custom_divisor
= 0;
4902 info
->close_delay
= 5*HZ
/10;
4903 info
->closing_wait
= 30*HZ
;
4907 info
->blocked_open
= 0;
4908 info
->normal_termios
= driver
->init_termios
;
4909 init_waitqueue_head(&info
->open_wait
);
4910 init_waitqueue_head(&info
->close_wait
);
4911 info
->xmit
.buf
= NULL
;
4912 info
->xmit
.tail
= info
->xmit
.head
= 0;
4913 info
->first_recv_buffer
= info
->last_recv_buffer
= NULL
;
4914 info
->recv_cnt
= info
->max_recv_cnt
= 0;
4915 info
->last_tx_active_usec
= 0;
4916 info
->last_tx_active
= 0;
4918 #if defined(CONFIG_ETRAX_RS485)
4919 /* Set sane defaults */
4920 info
->rs485
.rts_on_send
= 0;
4921 info
->rs485
.rts_after_sent
= 1;
4922 info
->rs485
.delay_rts_before_send
= 0;
4923 info
->rs485
.enabled
= 0;
4925 INIT_WORK(&info
->work
, do_softint
, info
);
4927 if (info
->enabled
) {
4928 printk(KERN_INFO
"%s%d at 0x%x is a builtin UART with DMA\n",
4929 serial_driver
->name
, info
->line
, (unsigned int)info
->port
);
4932 #ifdef CONFIG_ETRAX_FAST_TIMER
4933 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4934 memset(fast_timers
, 0, sizeof(fast_timers
));
4936 #ifdef CONFIG_ETRAX_RS485
4937 memset(fast_timers_rs485
, 0, sizeof(fast_timers_rs485
));
4942 #ifndef CONFIG_SVINTO_SIM
4943 /* Not needed in simulator. May only complicate stuff. */
4944 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4946 if (request_irq(SERIAL_IRQ_NBR
, ser_interrupt
, SA_SHIRQ
| SA_INTERRUPT
, "serial ", NULL
))
4949 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4950 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4951 if (request_irq(SER0_DMA_TX_IRQ_NBR
, tr_interrupt
, SA_INTERRUPT
, "serial 0 dma tr", NULL
))
4954 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4955 if (request_irq(SER0_DMA_RX_IRQ_NBR
, rec_interrupt
, SA_INTERRUPT
, "serial 0 dma rec", NULL
))
4960 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4961 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4962 if (request_irq(SER1_DMA_TX_IRQ_NBR
, tr_interrupt
, SA_INTERRUPT
, "serial 1 dma tr", NULL
))
4965 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4966 if (request_irq(SER1_DMA_RX_IRQ_NBR
, rec_interrupt
, SA_INTERRUPT
, "serial 1 dma rec", NULL
))
4970 #ifdef CONFIG_ETRAX_SERIAL_PORT2
4971 /* DMA Shared with par0 (and SCSI0 and ATA) */
4972 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
4973 if (request_irq(SER2_DMA_TX_IRQ_NBR
, tr_interrupt
, SA_SHIRQ
| SA_INTERRUPT
, "serial 2 dma tr", NULL
))
4976 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
4977 if (request_irq(SER2_DMA_RX_IRQ_NBR
, rec_interrupt
, SA_SHIRQ
| SA_INTERRUPT
, "serial 2 dma rec", NULL
))
4981 #ifdef CONFIG_ETRAX_SERIAL_PORT3
4982 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
4983 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
4984 if (request_irq(SER3_DMA_TX_IRQ_NBR
, tr_interrupt
, SA_SHIRQ
| SA_INTERRUPT
, "serial 3 dma tr", NULL
))
4987 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
4988 if (request_irq(SER3_DMA_RX_IRQ_NBR
, rec_interrupt
, SA_SHIRQ
| SA_INTERRUPT
, "serial 3 dma rec", NULL
))
4993 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
4994 if (request_irq(TIMER1_IRQ_NBR
, timeout_interrupt
, SA_SHIRQ
| SA_INTERRUPT
,
4995 "fast serial dma timeout", NULL
)) {
4996 printk(KERN_CRIT
"err: timer1 irq\n");
4999 #endif /* CONFIG_SVINTO_SIM */
5000 debug_write_function
= rs_debug_write_function
;
5004 /* this makes sure that rs_init is called during kernel boot */
5006 module_init(rs_init
);