2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
20 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/sysrq.h>
36 #include <linux/ioport.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/console.h>
41 #include <linux/platform_device.h>
43 #ifdef CONFIG_CPU_FREQ
44 #include <linux/notifier.h>
45 #include <linux/cpufreq.h>
48 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
49 #include <linux/ctype.h>
50 #include <asm/clock.h>
51 #include <asm/sh_bios.h>
59 struct uart_port port
;
64 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
65 unsigned int irqs
[SCIx_NR_IRQS
];
67 /* Port pin configuration */
68 void (*init_pins
)(struct uart_port
*port
,
71 /* Port enable callback */
72 void (*enable
)(struct uart_port
*port
);
74 /* Port disable callback */
75 void (*disable
)(struct uart_port
*port
);
78 struct timer_list break_timer
;
81 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
88 static struct sci_port
*kgdb_sci_port
;
91 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
92 static struct sci_port
*serial_console_port
;
95 /* Function prototypes */
96 static void sci_stop_tx(struct uart_port
*port
);
98 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
100 static struct sci_port sci_ports
[SCI_NPORTS
];
101 static struct uart_driver sci_uart_driver
;
103 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
104 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
105 static inline void handle_error(struct uart_port
*port
)
107 /* Clear error flags */
108 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
111 static int get_char(struct uart_port
*port
)
114 unsigned short status
;
117 spin_lock_irqsave(&port
->lock
, flags
);
119 status
= sci_in(port
, SCxSR
);
120 if (status
& SCxSR_ERRORS(port
)) {
124 } while (!(status
& SCxSR_RDxF(port
)));
125 c
= sci_in(port
, SCxRDR
);
126 sci_in(port
, SCxSR
); /* Dummy read */
127 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
128 spin_unlock_irqrestore(&port
->lock
, flags
);
132 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
134 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
135 static void put_char(struct uart_port
*port
, char c
)
138 unsigned short status
;
140 spin_lock_irqsave(&port
->lock
, flags
);
143 status
= sci_in(port
, SCxSR
);
144 } while (!(status
& SCxSR_TDxE(port
)));
146 sci_out(port
, SCxTDR
, c
);
147 sci_in(port
, SCxSR
); /* Dummy read */
148 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
150 spin_unlock_irqrestore(&port
->lock
, flags
);
154 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
155 static void put_string(struct sci_port
*sci_port
, const char *buffer
, int count
)
157 struct uart_port
*port
= &sci_port
->port
;
158 const unsigned char *p
= buffer
;
161 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
165 #ifdef CONFIG_SH_STANDARD_BIOS
166 /* This call only does a trap the first time it is
167 * called, and so is safe to do here unconditionally
169 usegdb
|= sh_bios_in_gdb_mode();
171 #ifdef CONFIG_SH_KGDB
172 usegdb
|= (kgdb_in_gdb_mode
&& (sci_port
== kgdb_sci_port
));
176 /* $<packet info>#<checksum>. */
180 put_char(port
, 'O'); /* 'O'utput to console */
183 for (i
=0; i
<count
; i
++) { /* Don't use run length encoding */
194 put_char(port
, highhex(checksum
));
195 put_char(port
, lowhex(checksum
));
196 } while (get_char(port
) != '+');
198 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
199 for (i
=0; i
<count
; i
++) {
201 put_char(port
, '\r');
202 put_char(port
, *p
++);
205 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
207 #ifdef CONFIG_SH_KGDB
208 static int kgdb_sci_getchar(void)
212 /* Keep trying to read a character, this could be neater */
213 while ((c
= get_char(&kgdb_sci_port
->port
)) < 0)
219 static inline void kgdb_sci_putchar(int c
)
221 put_char(&kgdb_sci_port
->port
, c
);
223 #endif /* CONFIG_SH_KGDB */
225 #if defined(__H8300S__)
226 enum { sci_disable
, sci_enable
};
228 static void h8300_sci_config(struct uart_port
* port
, unsigned int ctrl
)
230 volatile unsigned char *mstpcrl
=(volatile unsigned char *)MSTPCRL
;
231 int ch
= (port
->mapbase
- SMR0
) >> 3;
232 unsigned char mask
= 1 << (ch
+1);
234 if (ctrl
== sci_disable
) {
241 static inline void h8300_sci_enable(struct uart_port
*port
)
243 h8300_sci_config(port
, sci_enable
);
246 static inline void h8300_sci_disable(struct uart_port
*port
)
248 h8300_sci_config(port
, sci_disable
);
252 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
253 defined(__H8300H__) || defined(__H8300S__)
254 static void sci_init_pins_sci(struct uart_port
* port
, unsigned int cflag
)
256 int ch
= (port
->mapbase
- SMR0
) >> 3;
259 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
260 h8300_sci_pins
[ch
].rx
,
262 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
263 h8300_sci_pins
[ch
].tx
,
267 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
270 #define sci_init_pins_sci NULL
273 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
274 static void sci_init_pins_irda(struct uart_port
*port
, unsigned int cflag
)
276 unsigned int fcr_val
= 0;
279 fcr_val
|= SCFCR_MCE
;
281 sci_out(port
, SCFCR
, fcr_val
);
284 #define sci_init_pins_irda NULL
288 #define sci_init_pins_scif NULL
291 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
292 #if defined(CONFIG_CPU_SUBTYPE_SH7300)
293 /* SH7300 doesn't use RTS/CTS */
294 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
296 sci_out(port
, SCFCR
, 0);
298 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
299 static void sci_init_pins_scif(struct uart_port
* port
, unsigned int cflag
)
301 unsigned int fcr_val
= 0;
303 set_sh771x_scif_pfc(port
);
304 if (cflag
& CRTSCTS
) {
305 fcr_val
|= SCFCR_MCE
;
307 sci_out(port
, SCFCR
, fcr_val
);
309 #elif defined(CONFIG_CPU_SH3)
310 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
311 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
313 unsigned int fcr_val
= 0;
316 /* We need to set SCPCR to enable RTS/CTS */
317 data
= ctrl_inw(SCPCR
);
318 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
319 ctrl_outw(data
& 0x0fcf, SCPCR
);
322 fcr_val
|= SCFCR_MCE
;
324 /* We need to set SCPCR to enable RTS/CTS */
325 data
= ctrl_inw(SCPCR
);
326 /* Clear out SCP7MD1,0, SCP4MD1,0,
327 Set SCP6MD1,0 = {01} (output) */
328 ctrl_outw((data
& 0x0fcf) | 0x1000, SCPCR
);
330 data
= ctrl_inb(SCPDR
);
331 /* Set /RTS2 (bit6) = 0 */
332 ctrl_outb(data
& 0xbf, SCPDR
);
335 sci_out(port
, SCFCR
, fcr_val
);
337 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
338 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
340 unsigned int fcr_val
= 0;
342 if (cflag
& CRTSCTS
) {
343 fcr_val
|= SCFCR_MCE
;
345 ctrl_outw(0x0000, PORT_PSCR
);
349 data
= ctrl_inw(PORT_PSCR
);
352 ctrl_outw(data
, PORT_PSCR
);
354 ctrl_outw(ctrl_inw(SCSPTR0
) & 0x17, SCSPTR0
);
357 sci_out(port
, SCFCR
, fcr_val
);
361 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
363 unsigned int fcr_val
= 0;
365 if (cflag
& CRTSCTS
) {
366 fcr_val
|= SCFCR_MCE
;
368 #ifdef CONFIG_CPU_SUBTYPE_SH7343
370 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \
371 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
372 defined(CONFIG_CPU_SUBTYPE_SHX3)
373 ctrl_outw(0x0080, SCSPTR0
); /* Set RTS = 1 */
375 ctrl_outw(0x0080, SCSPTR2
); /* Set RTS = 1 */
378 sci_out(port
, SCFCR
, fcr_val
);
382 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
383 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
384 defined(CONFIG_CPU_SUBTYPE_SH7785)
385 static inline int scif_txroom(struct uart_port
*port
)
387 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0x7f);
390 static inline int scif_rxroom(struct uart_port
*port
)
392 return sci_in(port
, SCRFDR
) & 0x7f;
395 static inline int scif_txroom(struct uart_port
*port
)
397 return SCIF_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
400 static inline int scif_rxroom(struct uart_port
*port
)
402 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
405 #endif /* SCIF_ONLY || SCI_AND_SCIF */
407 static inline int sci_txroom(struct uart_port
*port
)
409 return ((sci_in(port
, SCxSR
) & SCI_TDRE
) != 0);
412 static inline int sci_rxroom(struct uart_port
*port
)
414 return ((sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0);
417 /* ********************************************************************** *
418 * the interrupt related routines *
419 * ********************************************************************** */
421 static void sci_transmit_chars(struct uart_port
*port
)
423 struct circ_buf
*xmit
= &port
->info
->xmit
;
424 unsigned int stopped
= uart_tx_stopped(port
);
425 unsigned short status
;
429 status
= sci_in(port
, SCxSR
);
430 if (!(status
& SCxSR_TDxE(port
))) {
431 ctrl
= sci_in(port
, SCSCR
);
432 if (uart_circ_empty(xmit
)) {
433 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
435 ctrl
|= SCI_CTRL_FLAGS_TIE
;
437 sci_out(port
, SCSCR
, ctrl
);
442 if (port
->type
== PORT_SCIF
)
443 count
= scif_txroom(port
);
446 count
= sci_txroom(port
);
454 } else if (!uart_circ_empty(xmit
) && !stopped
) {
455 c
= xmit
->buf
[xmit
->tail
];
456 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
461 sci_out(port
, SCxTDR
, c
);
464 } while (--count
> 0);
466 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
468 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
469 uart_write_wakeup(port
);
470 if (uart_circ_empty(xmit
)) {
473 ctrl
= sci_in(port
, SCSCR
);
475 #if !defined(SCI_ONLY)
476 if (port
->type
== PORT_SCIF
) {
477 sci_in(port
, SCxSR
); /* Dummy read */
478 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
482 ctrl
|= SCI_CTRL_FLAGS_TIE
;
483 sci_out(port
, SCSCR
, ctrl
);
487 /* On SH3, SCIF may read end-of-break as a space->mark char */
488 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
490 static inline void sci_receive_chars(struct uart_port
*port
)
492 struct sci_port
*sci_port
= (struct sci_port
*)port
;
493 struct tty_struct
*tty
= port
->info
->tty
;
494 int i
, count
, copied
= 0;
495 unsigned short status
;
498 status
= sci_in(port
, SCxSR
);
499 if (!(status
& SCxSR_RDxF(port
)))
503 #if !defined(SCI_ONLY)
504 if (port
->type
== PORT_SCIF
)
505 count
= scif_rxroom(port
);
508 count
= sci_rxroom(port
);
510 /* Don't copy more bytes than there is room for in the buffer */
511 count
= tty_buffer_request_room(tty
, count
);
513 /* If for any reason we can't copy more data, we're done! */
517 if (port
->type
== PORT_SCI
) {
518 char c
= sci_in(port
, SCxRDR
);
519 if (uart_handle_sysrq_char(port
, c
) || sci_port
->break_flag
)
522 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
525 for (i
=0; i
<count
; i
++) {
526 char c
= sci_in(port
, SCxRDR
);
527 status
= sci_in(port
, SCxSR
);
528 #if defined(CONFIG_CPU_SH3)
529 /* Skip "chars" during break */
530 if (sci_port
->break_flag
) {
532 (status
& SCxSR_FER(port
))) {
537 /* Nonzero => end-of-break */
538 pr_debug("scif: debounce<%02x>\n", c
);
539 sci_port
->break_flag
= 0;
546 #endif /* CONFIG_CPU_SH3 */
547 if (uart_handle_sysrq_char(port
, c
)) {
552 /* Store data and status */
553 if (status
&SCxSR_FER(port
)) {
555 pr_debug("sci: frame error\n");
556 } else if (status
&SCxSR_PER(port
)) {
558 pr_debug("sci: parity error\n");
561 tty_insert_flip_char(tty
, c
, flag
);
565 sci_in(port
, SCxSR
); /* dummy read */
566 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
569 port
->icount
.rx
+= count
;
573 /* Tell the rest of the system the news. New characters! */
574 tty_flip_buffer_push(tty
);
576 sci_in(port
, SCxSR
); /* dummy read */
577 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
581 #define SCI_BREAK_JIFFIES (HZ/20)
582 /* The sci generates interrupts during the break,
583 * 1 per millisecond or so during the break period, for 9600 baud.
584 * So dont bother disabling interrupts.
585 * But dont want more than 1 break event.
586 * Use a kernel timer to periodically poll the rx line until
587 * the break is finished.
589 static void sci_schedule_break_timer(struct sci_port
*port
)
591 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
592 add_timer(&port
->break_timer
);
594 /* Ensure that two consecutive samples find the break over. */
595 static void sci_break_timer(unsigned long data
)
597 struct sci_port
*port
= (struct sci_port
*)data
;
599 if (sci_rxd_in(&port
->port
) == 0) {
600 port
->break_flag
= 1;
601 sci_schedule_break_timer(port
);
602 } else if (port
->break_flag
== 1) {
604 port
->break_flag
= 2;
605 sci_schedule_break_timer(port
);
607 port
->break_flag
= 0;
610 static inline int sci_handle_errors(struct uart_port
*port
)
613 unsigned short status
= sci_in(port
, SCxSR
);
614 struct tty_struct
*tty
= port
->info
->tty
;
616 if (status
& SCxSR_ORER(port
)) {
618 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
620 pr_debug("sci: overrun error\n");
623 if (status
& SCxSR_FER(port
)) {
624 if (sci_rxd_in(port
) == 0) {
625 /* Notify of BREAK */
626 struct sci_port
*sci_port
= (struct sci_port
*)port
;
628 if (!sci_port
->break_flag
) {
629 sci_port
->break_flag
= 1;
630 sci_schedule_break_timer(sci_port
);
632 /* Do sysrq handling. */
633 if (uart_handle_break(port
))
635 pr_debug("sci: BREAK detected\n");
636 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
641 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
643 pr_debug("sci: frame error\n");
647 if (status
& SCxSR_PER(port
)) {
649 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
651 pr_debug("sci: parity error\n");
655 tty_flip_buffer_push(tty
);
660 static inline int sci_handle_breaks(struct uart_port
*port
)
663 unsigned short status
= sci_in(port
, SCxSR
);
664 struct tty_struct
*tty
= port
->info
->tty
;
665 struct sci_port
*s
= &sci_ports
[port
->line
];
667 if (uart_handle_break(port
))
670 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
671 #if defined(CONFIG_CPU_SH3)
675 /* Notify of BREAK */
676 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
678 pr_debug("sci: BREAK detected\n");
681 #if defined(SCIF_ORER)
682 /* XXX: Handle SCIF overrun error */
683 if (port
->type
== PORT_SCIF
&& (sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
684 sci_out(port
, SCLSR
, 0);
685 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
)) {
687 pr_debug("sci: overrun error\n");
693 tty_flip_buffer_push(tty
);
698 static irqreturn_t
sci_rx_interrupt(int irq
, void *port
)
700 /* I think sci_receive_chars has to be called irrespective
701 * of whether the I_IXOFF is set, otherwise, how is the interrupt
704 sci_receive_chars(port
);
709 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
)
711 struct uart_port
*port
= ptr
;
713 spin_lock_irq(&port
->lock
);
714 sci_transmit_chars(port
);
715 spin_unlock_irq(&port
->lock
);
720 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
)
722 struct uart_port
*port
= ptr
;
725 if (port
->type
== PORT_SCI
) {
726 if (sci_handle_errors(port
)) {
727 /* discard character in rx buffer */
729 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
732 #if defined(SCIF_ORER)
733 if((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
734 struct tty_struct
*tty
= port
->info
->tty
;
736 sci_out(port
, SCLSR
, 0);
737 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
738 tty_flip_buffer_push(tty
);
739 pr_debug("scif: overrun error\n");
742 sci_rx_interrupt(irq
, ptr
);
745 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
747 /* Kick the transmission */
748 sci_tx_interrupt(irq
, ptr
);
753 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
)
755 struct uart_port
*port
= ptr
;
758 sci_handle_breaks(port
);
759 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
764 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
)
766 unsigned short ssr_status
, scr_status
;
767 struct uart_port
*port
= ptr
;
769 ssr_status
= sci_in(port
,SCxSR
);
770 scr_status
= sci_in(port
,SCSCR
);
773 if ((ssr_status
& 0x0020) && (scr_status
& 0x0080))
774 sci_tx_interrupt(irq
, ptr
);
776 if ((ssr_status
& 0x0002) && (scr_status
& 0x0040))
777 sci_rx_interrupt(irq
, ptr
);
778 /* Error Interrupt */
779 if ((ssr_status
& 0x0080) && (scr_status
& 0x0400))
780 sci_er_interrupt(irq
, ptr
);
781 /* Break Interrupt */
782 if ((ssr_status
& 0x0010) && (scr_status
& 0x0200))
783 sci_br_interrupt(irq
, ptr
);
788 #ifdef CONFIG_CPU_FREQ
790 * Here we define a transistion notifier so that we can update all of our
791 * ports' baud rate when the peripheral clock changes.
793 static int sci_notifier(struct notifier_block
*self
,
794 unsigned long phase
, void *p
)
796 struct cpufreq_freqs
*freqs
= p
;
799 if ((phase
== CPUFREQ_POSTCHANGE
) ||
800 (phase
== CPUFREQ_RESUMECHANGE
)){
801 for (i
= 0; i
< SCI_NPORTS
; i
++) {
802 struct uart_port
*port
= &sci_ports
[i
].port
;
806 * Update the uartclk per-port if frequency has
807 * changed, since it will no longer necessarily be
808 * consistent with the old frequency.
810 * Really we want to be able to do something like
811 * uart_change_speed() or something along those lines
812 * here to implicitly reset the per-port baud rate..
814 * Clean this up later..
816 clk
= clk_get(NULL
, "module_clk");
817 port
->uartclk
= clk_get_rate(clk
) * 16;
821 printk(KERN_INFO
"%s: got a postchange notification "
822 "for cpu %d (old %d, new %d)\n",
823 __FUNCTION__
, freqs
->cpu
, freqs
->old
, freqs
->new);
829 static struct notifier_block sci_nb
= { &sci_notifier
, NULL
, 0 };
830 #endif /* CONFIG_CPU_FREQ */
832 static int sci_request_irq(struct sci_port
*port
)
835 irqreturn_t (*handlers
[4])(int irq
, void *ptr
) = {
836 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
839 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
840 "SCI Transmit Data Empty", "SCI Break" };
842 if (port
->irqs
[0] == port
->irqs
[1]) {
843 if (!port
->irqs
[0]) {
844 printk(KERN_ERR
"sci: Cannot allocate irq.(IRQ=0)\n");
848 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
849 IRQF_DISABLED
, "sci", port
)) {
850 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
854 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
857 if (request_irq(port
->irqs
[i
], handlers
[i
],
858 IRQF_DISABLED
, desc
[i
], port
)) {
859 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
868 static void sci_free_irq(struct sci_port
*port
)
872 if (port
->irqs
[0] == port
->irqs
[1]) {
874 printk("sci: sci_free_irq error\n");
876 free_irq(port
->irqs
[0], port
);
878 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
882 free_irq(port
->irqs
[i
], port
);
887 static unsigned int sci_tx_empty(struct uart_port
*port
)
893 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
895 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
896 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
897 /* If you have signals for DTR and DCD, please implement here. */
900 static unsigned int sci_get_mctrl(struct uart_port
*port
)
902 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
905 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
908 static void sci_start_tx(struct uart_port
*port
)
912 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
913 ctrl
= sci_in(port
, SCSCR
);
914 ctrl
|= SCI_CTRL_FLAGS_TIE
;
915 sci_out(port
, SCSCR
, ctrl
);
918 static void sci_stop_tx(struct uart_port
*port
)
922 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
923 ctrl
= sci_in(port
, SCSCR
);
924 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
925 sci_out(port
, SCSCR
, ctrl
);
928 static void sci_start_rx(struct uart_port
*port
, unsigned int tty_start
)
932 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
933 ctrl
= sci_in(port
, SCSCR
);
934 ctrl
|= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
935 sci_out(port
, SCSCR
, ctrl
);
938 static void sci_stop_rx(struct uart_port
*port
)
942 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
943 ctrl
= sci_in(port
, SCSCR
);
944 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
945 sci_out(port
, SCSCR
, ctrl
);
948 static void sci_enable_ms(struct uart_port
*port
)
950 /* Nothing here yet .. */
953 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
955 /* Nothing here yet .. */
958 static int sci_startup(struct uart_port
*port
)
960 struct sci_port
*s
= &sci_ports
[port
->line
];
965 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
966 s
->clk
= clk_get(NULL
, "module_clk");
971 sci_start_rx(port
, 1);
976 static void sci_shutdown(struct uart_port
*port
)
978 struct sci_port
*s
= &sci_ports
[port
->line
];
987 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
993 static void sci_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
994 struct ktermios
*old
)
996 struct sci_port
*s
= &sci_ports
[port
->line
];
997 unsigned int status
, baud
, smr_val
;
1000 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1008 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1009 t
= SCBRR_VALUE(baud
, clk_get_rate(s
->clk
));
1011 t
= SCBRR_VALUE(baud
);
1018 status
= sci_in(port
, SCxSR
);
1019 } while (!(status
& SCxSR_TEND(port
)));
1021 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
1023 #if !defined(SCI_ONLY)
1024 if (port
->type
== PORT_SCIF
)
1025 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
1028 smr_val
= sci_in(port
, SCSMR
) & 3;
1029 if ((termios
->c_cflag
& CSIZE
) == CS7
)
1031 if (termios
->c_cflag
& PARENB
)
1033 if (termios
->c_cflag
& PARODD
)
1035 if (termios
->c_cflag
& CSTOPB
)
1038 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1040 sci_out(port
, SCSMR
, smr_val
);
1044 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
1047 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
1049 sci_out(port
, SCBRR
, t
);
1050 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
1053 if (likely(s
->init_pins
))
1054 s
->init_pins(port
, termios
->c_cflag
);
1056 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
1058 if ((termios
->c_cflag
& CREAD
) != 0)
1059 sci_start_rx(port
,0);
1062 static const char *sci_type(struct uart_port
*port
)
1064 switch (port
->type
) {
1065 case PORT_SCI
: return "sci";
1066 case PORT_SCIF
: return "scif";
1067 case PORT_IRDA
: return "irda";
1073 static void sci_release_port(struct uart_port
*port
)
1075 /* Nothing here yet .. */
1078 static int sci_request_port(struct uart_port
*port
)
1080 /* Nothing here yet .. */
1084 static void sci_config_port(struct uart_port
*port
, int flags
)
1086 struct sci_port
*s
= &sci_ports
[port
->line
];
1088 port
->type
= s
->type
;
1090 switch (port
->type
) {
1092 s
->init_pins
= sci_init_pins_sci
;
1095 s
->init_pins
= sci_init_pins_scif
;
1098 s
->init_pins
= sci_init_pins_irda
;
1102 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1103 if (port
->mapbase
== 0)
1104 port
->mapbase
= onchip_remap(SCIF_ADDR_SH5
, 1024, "SCIF");
1106 port
->membase
= (void __iomem
*)port
->mapbase
;
1110 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1112 struct sci_port
*s
= &sci_ports
[port
->line
];
1114 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> NR_IRQS
)
1116 if (ser
->baud_base
< 2400)
1117 /* No paper tape reader for Mitch.. */
1123 static struct uart_ops sci_uart_ops
= {
1124 .tx_empty
= sci_tx_empty
,
1125 .set_mctrl
= sci_set_mctrl
,
1126 .get_mctrl
= sci_get_mctrl
,
1127 .start_tx
= sci_start_tx
,
1128 .stop_tx
= sci_stop_tx
,
1129 .stop_rx
= sci_stop_rx
,
1130 .enable_ms
= sci_enable_ms
,
1131 .break_ctl
= sci_break_ctl
,
1132 .startup
= sci_startup
,
1133 .shutdown
= sci_shutdown
,
1134 .set_termios
= sci_set_termios
,
1136 .release_port
= sci_release_port
,
1137 .request_port
= sci_request_port
,
1138 .config_port
= sci_config_port
,
1139 .verify_port
= sci_verify_port
,
1142 static void __init
sci_init_ports(void)
1144 static int first
= 1;
1152 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1153 sci_ports
[i
].port
.ops
= &sci_uart_ops
;
1154 sci_ports
[i
].port
.iotype
= UPIO_MEM
;
1155 sci_ports
[i
].port
.line
= i
;
1156 sci_ports
[i
].port
.fifosize
= 1;
1158 #if defined(__H8300H__) || defined(__H8300S__)
1160 sci_ports
[i
].enable
= h8300_sci_enable
;
1161 sci_ports
[i
].disable
= h8300_sci_disable
;
1163 sci_ports
[i
].port
.uartclk
= CONFIG_CPU_CLOCK
;
1164 #elif defined(CONFIG_SUPERH64)
1165 sci_ports
[i
].port
.uartclk
= current_cpu_data
.module_clock
* 16;
1168 * XXX: We should use a proper SCI/SCIF clock
1171 struct clk
*clk
= clk_get(NULL
, "module_clk");
1172 sci_ports
[i
].port
.uartclk
= clk_get_rate(clk
) * 16;
1177 sci_ports
[i
].break_timer
.data
= (unsigned long)&sci_ports
[i
];
1178 sci_ports
[i
].break_timer
.function
= sci_break_timer
;
1180 init_timer(&sci_ports
[i
].break_timer
);
1184 int __init
early_sci_setup(struct uart_port
*port
)
1186 if (unlikely(port
->line
> SCI_NPORTS
))
1191 sci_ports
[port
->line
].port
.membase
= port
->membase
;
1192 sci_ports
[port
->line
].port
.mapbase
= port
->mapbase
;
1193 sci_ports
[port
->line
].port
.type
= port
->type
;
1198 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1200 * Print a string to the serial port trying not to disturb
1201 * any possible real use of the port...
1203 static void serial_console_write(struct console
*co
, const char *s
,
1206 put_string(serial_console_port
, s
, count
);
1209 static int __init
serial_console_setup(struct console
*co
, char *options
)
1211 struct uart_port
*port
;
1219 * Check whether an invalid uart number has been specified, and
1220 * if so, search for the first available port that does have
1223 if (co
->index
>= SCI_NPORTS
)
1226 serial_console_port
= &sci_ports
[co
->index
];
1227 port
= &serial_console_port
->port
;
1230 * Also need to check port->type, we don't actually have any
1231 * UPIO_PORT ports, but uart_report_port() handily misreports
1232 * it anyways if we don't have a port available by the time this is
1237 if (!port
->membase
|| !port
->mapbase
)
1240 port
->type
= serial_console_port
->type
;
1242 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1243 if (!serial_console_port
->clk
)
1244 serial_console_port
->clk
= clk_get(NULL
, "module_clk");
1247 if (port
->flags
& UPF_IOREMAP
)
1248 sci_config_port(port
, 0);
1250 if (serial_console_port
->enable
)
1251 serial_console_port
->enable(port
);
1254 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1256 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1257 #if defined(__H8300H__) || defined(__H8300S__)
1258 /* disable rx interrupt */
1265 static struct console serial_console
= {
1267 .device
= uart_console_device
,
1268 .write
= serial_console_write
,
1269 .setup
= serial_console_setup
,
1270 .flags
= CON_PRINTBUFFER
,
1272 .data
= &sci_uart_driver
,
1275 static int __init
sci_console_init(void)
1278 register_console(&serial_console
);
1281 console_initcall(sci_console_init
);
1282 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1284 #ifdef CONFIG_SH_KGDB
1286 * FIXME: Most of this can go away.. at the moment, we rely on
1287 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1288 * most of that can easily be done here instead.
1290 * For the time being, just accept the values that were parsed earlier..
1292 static void __init
kgdb_console_get_options(struct uart_port
*port
, int *baud
,
1293 int *parity
, int *bits
)
1296 *parity
= tolower(kgdb_parity
);
1297 *bits
= kgdb_bits
- '0';
1301 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1302 * care of the early-on initialization for kgdb, regardless of whether we
1303 * actually use kgdb as a console or not.
1305 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1307 int __init
kgdb_console_setup(struct console
*co
, char *options
)
1309 struct uart_port
*port
= &sci_ports
[kgdb_portnum
].port
;
1315 if (co
->index
!= kgdb_portnum
)
1316 co
->index
= kgdb_portnum
;
1318 kgdb_sci_port
= &sci_ports
[co
->index
];
1319 port
= &kgdb_sci_port
->port
;
1322 * Also need to check port->type, we don't actually have any
1323 * UPIO_PORT ports, but uart_report_port() handily misreports
1324 * it anyways if we don't have a port available by the time this is
1329 if (!port
->membase
|| !port
->mapbase
)
1333 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1335 kgdb_console_get_options(port
, &baud
, &parity
, &bits
);
1337 kgdb_getchar
= kgdb_sci_getchar
;
1338 kgdb_putchar
= kgdb_sci_putchar
;
1340 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1342 #endif /* CONFIG_SH_KGDB */
1344 #ifdef CONFIG_SH_KGDB_CONSOLE
1345 static struct console kgdb_console
= {
1347 .device
= uart_console_device
,
1348 .write
= kgdb_console_write
,
1349 .setup
= kgdb_console_setup
,
1350 .flags
= CON_PRINTBUFFER
,
1352 .data
= &sci_uart_driver
,
1355 /* Register the KGDB console so we get messages (d'oh!) */
1356 static int __init
kgdb_console_init(void)
1359 register_console(&kgdb_console
);
1362 console_initcall(kgdb_console_init
);
1363 #endif /* CONFIG_SH_KGDB_CONSOLE */
1365 #if defined(CONFIG_SH_KGDB_CONSOLE)
1366 #define SCI_CONSOLE &kgdb_console
1367 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1368 #define SCI_CONSOLE &serial_console
1370 #define SCI_CONSOLE 0
1373 static char banner
[] __initdata
=
1374 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1376 static struct uart_driver sci_uart_driver
= {
1377 .owner
= THIS_MODULE
,
1378 .driver_name
= "sci",
1379 .dev_name
= "ttySC",
1381 .minor
= SCI_MINOR_START
,
1383 .cons
= SCI_CONSOLE
,
1387 * Register a set of serial devices attached to a platform device. The
1388 * list is terminated with a zero flags entry, which means we expect
1389 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1390 * remapping (such as sh64) should also set UPF_IOREMAP.
1392 static int __devinit
sci_probe(struct platform_device
*dev
)
1394 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1397 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
1398 struct sci_port
*sciport
= &sci_ports
[i
];
1401 if (unlikely(i
== SCI_NPORTS
)) {
1402 dev_notice(&dev
->dev
, "Attempting to register port "
1403 "%d when only %d are available.\n",
1405 dev_notice(&dev
->dev
, "Consider bumping "
1406 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1410 sciport
->port
.mapbase
= p
->mapbase
;
1413 * For the simple (and majority of) cases where we don't need
1414 * to do any remapping, just cast the cookie directly.
1416 if (p
->mapbase
&& !p
->membase
&& !(p
->flags
& UPF_IOREMAP
))
1417 p
->membase
= (void __iomem
*)p
->mapbase
;
1419 sciport
->port
.membase
= p
->membase
;
1421 sciport
->port
.irq
= p
->irqs
[SCIx_TXI_IRQ
];
1422 sciport
->port
.flags
= p
->flags
;
1423 sciport
->port
.dev
= &dev
->dev
;
1425 sciport
->type
= sciport
->port
.type
= p
->type
;
1427 memcpy(&sciport
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1429 uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1432 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1433 kgdb_sci_port
= &sci_ports
[kgdb_portnum
];
1434 kgdb_getchar
= kgdb_sci_getchar
;
1435 kgdb_putchar
= kgdb_sci_putchar
;
1438 #ifdef CONFIG_CPU_FREQ
1439 cpufreq_register_notifier(&sci_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1440 dev_info(&dev
->dev
, "sci: CPU frequency notifier registered\n");
1443 #ifdef CONFIG_SH_STANDARD_BIOS
1444 sh_bios_gdb_detach();
1450 static int __devexit
sci_remove(struct platform_device
*dev
)
1454 for (i
= 0; i
< SCI_NPORTS
; i
++)
1455 uart_remove_one_port(&sci_uart_driver
, &sci_ports
[i
].port
);
1460 static int sci_suspend(struct platform_device
*dev
, pm_message_t state
)
1464 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1465 struct sci_port
*p
= &sci_ports
[i
];
1467 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1468 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1474 static int sci_resume(struct platform_device
*dev
)
1478 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1479 struct sci_port
*p
= &sci_ports
[i
];
1481 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1482 uart_resume_port(&sci_uart_driver
, &p
->port
);
1488 static struct platform_driver sci_driver
= {
1490 .remove
= __devexit_p(sci_remove
),
1491 .suspend
= sci_suspend
,
1492 .resume
= sci_resume
,
1495 .owner
= THIS_MODULE
,
1499 static int __init
sci_init(void)
1507 ret
= uart_register_driver(&sci_uart_driver
);
1508 if (likely(ret
== 0)) {
1509 ret
= platform_driver_register(&sci_driver
);
1511 uart_unregister_driver(&sci_uart_driver
);
1517 static void __exit
sci_exit(void)
1519 platform_driver_unregister(&sci_driver
);
1520 uart_unregister_driver(&sci_uart_driver
);
1523 module_init(sci_init
);
1524 module_exit(sci_exit
);
1526 MODULE_LICENSE("GPL");