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Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-mmc
[mirror_ubuntu-zesty-kernel.git] / drivers / serial / sh-sci.c
1 /*
2 * drivers/serial/sh-sci.c
3 *
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 *
6 * Copyright (C) 2002 - 2006 Paul Mundt
7 *
8 * based off of the old drivers/char/sh-sci.c by:
9 *
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
15 *
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
18 * for more details.
19 */
20
21 #undef DEBUG
22
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/major.h>
32 #include <linux/string.h>
33 #include <linux/sysrq.h>
34 #include <linux/ioport.h>
35 #include <linux/mm.h>
36 #include <linux/init.h>
37 #include <linux/delay.h>
38 #include <linux/console.h>
39 #include <linux/platform_device.h>
40
41 #ifdef CONFIG_CPU_FREQ
42 #include <linux/notifier.h>
43 #include <linux/cpufreq.h>
44 #endif
45
46 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
47 #include <asm/clock.h>
48 #include <asm/sh_bios.h>
49 #include <asm/kgdb.h>
50 #endif
51
52 #include <asm/sci.h>
53
54 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
55 #define SUPPORT_SYSRQ
56 #endif
57
58 #include "sh-sci.h"
59
60 struct sci_port {
61 struct uart_port port;
62
63 /* Port type */
64 unsigned int type;
65
66 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
67 unsigned int irqs[SCIx_NR_IRQS];
68
69 /* Port pin configuration */
70 void (*init_pins)(struct uart_port *port,
71 unsigned int cflag);
72
73 /* Port enable callback */
74 void (*enable)(struct uart_port *port);
75
76 /* Port disable callback */
77 void (*disable)(struct uart_port *port);
78
79 /* Break timer */
80 struct timer_list break_timer;
81 int break_flag;
82 };
83
84 #ifdef CONFIG_SH_KGDB
85 static struct sci_port *kgdb_sci_port;
86 #endif
87
88 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
89 static struct sci_port *serial_console_port;
90 #endif
91
92 /* Function prototypes */
93 static void sci_stop_tx(struct uart_port *port);
94
95 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
96
97 static struct sci_port sci_ports[SCI_NPORTS];
98 static struct uart_driver sci_uart_driver;
99
100 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
101 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
102 static inline void handle_error(struct uart_port *port)
103 {
104 /* Clear error flags */
105 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
106 }
107
108 static int get_char(struct uart_port *port)
109 {
110 unsigned long flags;
111 unsigned short status;
112 int c;
113
114 spin_lock_irqsave(&port->lock, flags);
115 do {
116 status = sci_in(port, SCxSR);
117 if (status & SCxSR_ERRORS(port)) {
118 handle_error(port);
119 continue;
120 }
121 } while (!(status & SCxSR_RDxF(port)));
122 c = sci_in(port, SCxRDR);
123 sci_in(port, SCxSR); /* Dummy read */
124 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
125 spin_unlock_irqrestore(&port->lock, flags);
126
127 return c;
128 }
129 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
130
131 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
132 static void put_char(struct uart_port *port, char c)
133 {
134 unsigned long flags;
135 unsigned short status;
136
137 spin_lock_irqsave(&port->lock, flags);
138
139 do {
140 status = sci_in(port, SCxSR);
141 } while (!(status & SCxSR_TDxE(port)));
142
143 sci_out(port, SCxTDR, c);
144 sci_in(port, SCxSR); /* Dummy read */
145 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
146
147 spin_unlock_irqrestore(&port->lock, flags);
148 }
149 #endif
150
151 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
152 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
153 {
154 struct uart_port *port = &sci_port->port;
155 const unsigned char *p = buffer;
156 int i;
157
158 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
159 int checksum;
160 int usegdb=0;
161
162 #ifdef CONFIG_SH_STANDARD_BIOS
163 /* This call only does a trap the first time it is
164 * called, and so is safe to do here unconditionally
165 */
166 usegdb |= sh_bios_in_gdb_mode();
167 #endif
168 #ifdef CONFIG_SH_KGDB
169 usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
170 #endif
171
172 if (usegdb) {
173 /* $<packet info>#<checksum>. */
174 do {
175 unsigned char c;
176 put_char(port, '$');
177 put_char(port, 'O'); /* 'O'utput to console */
178 checksum = 'O';
179
180 for (i=0; i<count; i++) { /* Don't use run length encoding */
181 int h, l;
182
183 c = *p++;
184 h = highhex(c);
185 l = lowhex(c);
186 put_char(port, h);
187 put_char(port, l);
188 checksum += h + l;
189 }
190 put_char(port, '#');
191 put_char(port, highhex(checksum));
192 put_char(port, lowhex(checksum));
193 } while (get_char(port) != '+');
194 } else
195 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
196 for (i=0; i<count; i++) {
197 if (*p == 10)
198 put_char(port, '\r');
199 put_char(port, *p++);
200 }
201 }
202 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
203
204 #ifdef CONFIG_SH_KGDB
205 static int kgdb_sci_getchar(void)
206 {
207 int c;
208
209 /* Keep trying to read a character, this could be neater */
210 while ((c = get_char(kgdb_sci_port)) < 0)
211 cpu_relax();
212
213 return c;
214 }
215
216 static inline void kgdb_sci_putchar(int c)
217 {
218 put_char(kgdb_sci_port, c);
219 }
220 #endif /* CONFIG_SH_KGDB */
221
222 #if defined(__H8300S__)
223 enum { sci_disable, sci_enable };
224
225 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
226 {
227 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
228 int ch = (port->mapbase - SMR0) >> 3;
229 unsigned char mask = 1 << (ch+1);
230
231 if (ctrl == sci_disable) {
232 *mstpcrl |= mask;
233 } else {
234 *mstpcrl &= ~mask;
235 }
236 }
237
238 static inline void h8300_sci_enable(struct uart_port *port)
239 {
240 h8300_sci_config(port, sci_enable);
241 }
242
243 static inline void h8300_sci_disable(struct uart_port *port)
244 {
245 h8300_sci_config(port, sci_disable);
246 }
247 #endif
248
249 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
250 defined(__H8300H__) || defined(__H8300S__)
251 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
252 {
253 int ch = (port->mapbase - SMR0) >> 3;
254
255 /* set DDR regs */
256 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
257 h8300_sci_pins[ch].rx,
258 H8300_GPIO_INPUT);
259 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
260 h8300_sci_pins[ch].tx,
261 H8300_GPIO_OUTPUT);
262
263 /* tx mark output*/
264 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
265 }
266 #else
267 #define sci_init_pins_sci NULL
268 #endif
269
270 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
271 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
272 {
273 unsigned int fcr_val = 0;
274
275 if (cflag & CRTSCTS)
276 fcr_val |= SCFCR_MCE;
277
278 sci_out(port, SCFCR, fcr_val);
279 }
280 #else
281 #define sci_init_pins_irda NULL
282 #endif
283
284 #ifdef SCI_ONLY
285 #define sci_init_pins_scif NULL
286 #endif
287
288 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
289 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
290 /* SH7300 doesn't use RTS/CTS */
291 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
292 {
293 sci_out(port, SCFCR, 0);
294 }
295 #elif defined(CONFIG_CPU_SH3)
296 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
297 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
298 {
299 unsigned int fcr_val = 0;
300 unsigned short data;
301
302 /* We need to set SCPCR to enable RTS/CTS */
303 data = ctrl_inw(SCPCR);
304 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
305 ctrl_outw(data & 0x0fcf, SCPCR);
306
307 if (cflag & CRTSCTS)
308 fcr_val |= SCFCR_MCE;
309 else {
310 /* We need to set SCPCR to enable RTS/CTS */
311 data = ctrl_inw(SCPCR);
312 /* Clear out SCP7MD1,0, SCP4MD1,0,
313 Set SCP6MD1,0 = {01} (output) */
314 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
315
316 data = ctrl_inb(SCPDR);
317 /* Set /RTS2 (bit6) = 0 */
318 ctrl_outb(data & 0xbf, SCPDR);
319 }
320
321 sci_out(port, SCFCR, fcr_val);
322 }
323 #else
324 /* For SH7750 */
325 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
326 {
327 unsigned int fcr_val = 0;
328
329 if (cflag & CRTSCTS) {
330 fcr_val |= SCFCR_MCE;
331 } else {
332 #ifdef CONFIG_CPU_SUBTYPE_SH7343
333 /* Nothing */
334 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
335 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
336 #else
337 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
338 #endif
339 }
340 sci_out(port, SCFCR, fcr_val);
341 }
342 #endif
343
344 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
345 static inline int scif_txroom(struct uart_port *port)
346 {
347 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
348 }
349
350 static inline int scif_rxroom(struct uart_port *port)
351 {
352 return sci_in(port, SCRFDR) & 0x7f;
353 }
354 #else
355 static inline int scif_txroom(struct uart_port *port)
356 {
357 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
358 }
359
360 static inline int scif_rxroom(struct uart_port *port)
361 {
362 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
363 }
364 #endif
365 #endif /* SCIF_ONLY || SCI_AND_SCIF */
366
367 static inline int sci_txroom(struct uart_port *port)
368 {
369 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
370 }
371
372 static inline int sci_rxroom(struct uart_port *port)
373 {
374 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
375 }
376
377 /* ********************************************************************** *
378 * the interrupt related routines *
379 * ********************************************************************** */
380
381 static void sci_transmit_chars(struct uart_port *port)
382 {
383 struct circ_buf *xmit = &port->info->xmit;
384 unsigned int stopped = uart_tx_stopped(port);
385 unsigned short status;
386 unsigned short ctrl;
387 int count;
388
389 status = sci_in(port, SCxSR);
390 if (!(status & SCxSR_TDxE(port))) {
391 ctrl = sci_in(port, SCSCR);
392 if (uart_circ_empty(xmit)) {
393 ctrl &= ~SCI_CTRL_FLAGS_TIE;
394 } else {
395 ctrl |= SCI_CTRL_FLAGS_TIE;
396 }
397 sci_out(port, SCSCR, ctrl);
398 return;
399 }
400
401 #ifndef SCI_ONLY
402 if (port->type == PORT_SCIF)
403 count = scif_txroom(port);
404 else
405 #endif
406 count = sci_txroom(port);
407
408 do {
409 unsigned char c;
410
411 if (port->x_char) {
412 c = port->x_char;
413 port->x_char = 0;
414 } else if (!uart_circ_empty(xmit) && !stopped) {
415 c = xmit->buf[xmit->tail];
416 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
417 } else {
418 break;
419 }
420
421 sci_out(port, SCxTDR, c);
422
423 port->icount.tx++;
424 } while (--count > 0);
425
426 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
427
428 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
429 uart_write_wakeup(port);
430 if (uart_circ_empty(xmit)) {
431 sci_stop_tx(port);
432 } else {
433 ctrl = sci_in(port, SCSCR);
434
435 #if !defined(SCI_ONLY)
436 if (port->type == PORT_SCIF) {
437 sci_in(port, SCxSR); /* Dummy read */
438 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
439 }
440 #endif
441
442 ctrl |= SCI_CTRL_FLAGS_TIE;
443 sci_out(port, SCSCR, ctrl);
444 }
445 }
446
447 /* On SH3, SCIF may read end-of-break as a space->mark char */
448 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
449
450 static inline void sci_receive_chars(struct uart_port *port,
451 struct pt_regs *regs)
452 {
453 struct sci_port *sci_port = (struct sci_port *)port;
454 struct tty_struct *tty = port->info->tty;
455 int i, count, copied = 0;
456 unsigned short status;
457 unsigned char flag;
458
459 status = sci_in(port, SCxSR);
460 if (!(status & SCxSR_RDxF(port)))
461 return;
462
463 while (1) {
464 #if !defined(SCI_ONLY)
465 if (port->type == PORT_SCIF)
466 count = scif_rxroom(port);
467 else
468 #endif
469 count = sci_rxroom(port);
470
471 /* Don't copy more bytes than there is room for in the buffer */
472 count = tty_buffer_request_room(tty, count);
473
474 /* If for any reason we can't copy more data, we're done! */
475 if (count == 0)
476 break;
477
478 if (port->type == PORT_SCI) {
479 char c = sci_in(port, SCxRDR);
480 if (uart_handle_sysrq_char(port, c, regs) || sci_port->break_flag)
481 count = 0;
482 else {
483 tty_insert_flip_char(tty, c, TTY_NORMAL);
484 }
485 } else {
486 for (i=0; i<count; i++) {
487 char c = sci_in(port, SCxRDR);
488 status = sci_in(port, SCxSR);
489 #if defined(CONFIG_CPU_SH3)
490 /* Skip "chars" during break */
491 if (sci_port->break_flag) {
492 if ((c == 0) &&
493 (status & SCxSR_FER(port))) {
494 count--; i--;
495 continue;
496 }
497
498 /* Nonzero => end-of-break */
499 pr_debug("scif: debounce<%02x>\n", c);
500 sci_port->break_flag = 0;
501
502 if (STEPFN(c)) {
503 count--; i--;
504 continue;
505 }
506 }
507 #endif /* CONFIG_CPU_SH3 */
508 if (uart_handle_sysrq_char(port, c, regs)) {
509 count--; i--;
510 continue;
511 }
512
513 /* Store data and status */
514 if (status&SCxSR_FER(port)) {
515 flag = TTY_FRAME;
516 pr_debug("sci: frame error\n");
517 } else if (status&SCxSR_PER(port)) {
518 flag = TTY_PARITY;
519 pr_debug("sci: parity error\n");
520 } else
521 flag = TTY_NORMAL;
522 tty_insert_flip_char(tty, c, flag);
523 }
524 }
525
526 sci_in(port, SCxSR); /* dummy read */
527 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
528
529 copied += count;
530 port->icount.rx += count;
531 }
532
533 if (copied) {
534 /* Tell the rest of the system the news. New characters! */
535 tty_flip_buffer_push(tty);
536 } else {
537 sci_in(port, SCxSR); /* dummy read */
538 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
539 }
540 }
541
542 #define SCI_BREAK_JIFFIES (HZ/20)
543 /* The sci generates interrupts during the break,
544 * 1 per millisecond or so during the break period, for 9600 baud.
545 * So dont bother disabling interrupts.
546 * But dont want more than 1 break event.
547 * Use a kernel timer to periodically poll the rx line until
548 * the break is finished.
549 */
550 static void sci_schedule_break_timer(struct sci_port *port)
551 {
552 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
553 add_timer(&port->break_timer);
554 }
555 /* Ensure that two consecutive samples find the break over. */
556 static void sci_break_timer(unsigned long data)
557 {
558 struct sci_port *port = (struct sci_port *)data;
559
560 if (sci_rxd_in(&port->port) == 0) {
561 port->break_flag = 1;
562 sci_schedule_break_timer(port);
563 } else if (port->break_flag == 1) {
564 /* break is over. */
565 port->break_flag = 2;
566 sci_schedule_break_timer(port);
567 } else
568 port->break_flag = 0;
569 }
570
571 static inline int sci_handle_errors(struct uart_port *port)
572 {
573 int copied = 0;
574 unsigned short status = sci_in(port, SCxSR);
575 struct tty_struct *tty = port->info->tty;
576
577 if (status & SCxSR_ORER(port)) {
578 /* overrun error */
579 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
580 copied++;
581 pr_debug("sci: overrun error\n");
582 }
583
584 if (status & SCxSR_FER(port)) {
585 if (sci_rxd_in(port) == 0) {
586 /* Notify of BREAK */
587 struct sci_port *sci_port = (struct sci_port *)port;
588
589 if (!sci_port->break_flag) {
590 sci_port->break_flag = 1;
591 sci_schedule_break_timer(sci_port);
592
593 /* Do sysrq handling. */
594 if (uart_handle_break(port))
595 return 0;
596 pr_debug("sci: BREAK detected\n");
597 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
598 copied++;
599 }
600 } else {
601 /* frame error */
602 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
603 copied++;
604 pr_debug("sci: frame error\n");
605 }
606 }
607
608 if (status & SCxSR_PER(port)) {
609 /* parity error */
610 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
611 copied++;
612 pr_debug("sci: parity error\n");
613 }
614
615 if (copied)
616 tty_flip_buffer_push(tty);
617
618 return copied;
619 }
620
621 static inline int sci_handle_breaks(struct uart_port *port)
622 {
623 int copied = 0;
624 unsigned short status = sci_in(port, SCxSR);
625 struct tty_struct *tty = port->info->tty;
626 struct sci_port *s = &sci_ports[port->line];
627
628 if (!s->break_flag && status & SCxSR_BRK(port)) {
629 #if defined(CONFIG_CPU_SH3)
630 /* Debounce break */
631 s->break_flag = 1;
632 #endif
633 /* Notify of BREAK */
634 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
635 copied++;
636 pr_debug("sci: BREAK detected\n");
637 }
638
639 #if defined(SCIF_ORER)
640 /* XXX: Handle SCIF overrun error */
641 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
642 sci_out(port, SCLSR, 0);
643 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
644 copied++;
645 pr_debug("sci: overrun error\n");
646 }
647 }
648 #endif
649
650 if (copied)
651 tty_flip_buffer_push(tty);
652
653 return copied;
654 }
655
656 static irqreturn_t sci_rx_interrupt(int irq, void *port, struct pt_regs *regs)
657 {
658 /* I think sci_receive_chars has to be called irrespective
659 * of whether the I_IXOFF is set, otherwise, how is the interrupt
660 * to be disabled?
661 */
662 sci_receive_chars(port, regs);
663
664 return IRQ_HANDLED;
665 }
666
667 static irqreturn_t sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs)
668 {
669 struct uart_port *port = ptr;
670
671 spin_lock_irq(&port->lock);
672 sci_transmit_chars(port);
673 spin_unlock_irq(&port->lock);
674
675 return IRQ_HANDLED;
676 }
677
678 static irqreturn_t sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs)
679 {
680 struct uart_port *port = ptr;
681
682 /* Handle errors */
683 if (port->type == PORT_SCI) {
684 if (sci_handle_errors(port)) {
685 /* discard character in rx buffer */
686 sci_in(port, SCxSR);
687 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
688 }
689 } else {
690 #if defined(SCIF_ORER)
691 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
692 struct tty_struct *tty = port->info->tty;
693
694 sci_out(port, SCLSR, 0);
695 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
696 tty_flip_buffer_push(tty);
697 pr_debug("scif: overrun error\n");
698 }
699 #endif
700 sci_rx_interrupt(irq, ptr, regs);
701 }
702
703 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
704
705 /* Kick the transmission */
706 sci_tx_interrupt(irq, ptr, regs);
707
708 return IRQ_HANDLED;
709 }
710
711 static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs)
712 {
713 struct uart_port *port = ptr;
714
715 /* Handle BREAKs */
716 sci_handle_breaks(port);
717
718 #ifdef CONFIG_SH_KGDB
719 /* Break into the debugger if a break is detected */
720 BREAKPOINT();
721 #endif
722
723 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
724
725 return IRQ_HANDLED;
726 }
727
728 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr, struct pt_regs *regs)
729 {
730 unsigned short ssr_status, scr_status;
731 struct uart_port *port = ptr;
732
733 ssr_status = sci_in(port,SCxSR);
734 scr_status = sci_in(port,SCSCR);
735
736 /* Tx Interrupt */
737 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
738 sci_tx_interrupt(irq, ptr, regs);
739 /* Rx Interrupt */
740 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
741 sci_rx_interrupt(irq, ptr, regs);
742 /* Error Interrupt */
743 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
744 sci_er_interrupt(irq, ptr, regs);
745 /* Break Interrupt */
746 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
747 sci_br_interrupt(irq, ptr, regs);
748
749 return IRQ_HANDLED;
750 }
751
752 #ifdef CONFIG_CPU_FREQ
753 /*
754 * Here we define a transistion notifier so that we can update all of our
755 * ports' baud rate when the peripheral clock changes.
756 */
757 static int sci_notifier(struct notifier_block *self,
758 unsigned long phase, void *p)
759 {
760 struct cpufreq_freqs *freqs = p;
761 int i;
762
763 if ((phase == CPUFREQ_POSTCHANGE) ||
764 (phase == CPUFREQ_RESUMECHANGE)){
765 for (i = 0; i < SCI_NPORTS; i++) {
766 struct uart_port *port = &sci_ports[i].port;
767 struct clk *clk;
768
769 /*
770 * Update the uartclk per-port if frequency has
771 * changed, since it will no longer necessarily be
772 * consistent with the old frequency.
773 *
774 * Really we want to be able to do something like
775 * uart_change_speed() or something along those lines
776 * here to implicitly reset the per-port baud rate..
777 *
778 * Clean this up later..
779 */
780 clk = clk_get("module_clk");
781 port->uartclk = clk_get_rate(clk) * 16;
782 clk_put(clk);
783 }
784
785 printk(KERN_INFO "%s: got a postchange notification "
786 "for cpu %d (old %d, new %d)\n",
787 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
788 }
789
790 return NOTIFY_OK;
791 }
792
793 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
794 #endif /* CONFIG_CPU_FREQ */
795
796 static int sci_request_irq(struct sci_port *port)
797 {
798 int i;
799 irqreturn_t (*handlers[4])(int irq, void *ptr, struct pt_regs *regs) = {
800 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
801 sci_br_interrupt,
802 };
803 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
804 "SCI Transmit Data Empty", "SCI Break" };
805
806 if (port->irqs[0] == port->irqs[1]) {
807 if (!port->irqs[0]) {
808 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
809 return -ENODEV;
810 }
811
812 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
813 SA_INTERRUPT, "sci", port)) {
814 printk(KERN_ERR "sci: Cannot allocate irq.\n");
815 return -ENODEV;
816 }
817 } else {
818 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
819 if (!port->irqs[i])
820 continue;
821 if (request_irq(port->irqs[i], handlers[i],
822 SA_INTERRUPT, desc[i], port)) {
823 printk(KERN_ERR "sci: Cannot allocate irq.\n");
824 return -ENODEV;
825 }
826 }
827 }
828
829 return 0;
830 }
831
832 static void sci_free_irq(struct sci_port *port)
833 {
834 int i;
835
836 if (port->irqs[0] == port->irqs[1]) {
837 if (!port->irqs[0])
838 printk("sci: sci_free_irq error\n");
839 else
840 free_irq(port->irqs[0], port);
841 } else {
842 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
843 if (!port->irqs[i])
844 continue;
845
846 free_irq(port->irqs[i], port);
847 }
848 }
849 }
850
851 static unsigned int sci_tx_empty(struct uart_port *port)
852 {
853 /* Can't detect */
854 return TIOCSER_TEMT;
855 }
856
857 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
858 {
859 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
860 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
861 /* If you have signals for DTR and DCD, please implement here. */
862 }
863
864 static unsigned int sci_get_mctrl(struct uart_port *port)
865 {
866 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
867 and CTS/RTS */
868
869 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
870 }
871
872 static void sci_start_tx(struct uart_port *port)
873 {
874 unsigned short ctrl;
875
876 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
877 ctrl = sci_in(port, SCSCR);
878 ctrl |= SCI_CTRL_FLAGS_TIE;
879 sci_out(port, SCSCR, ctrl);
880 }
881
882 static void sci_stop_tx(struct uart_port *port)
883 {
884 unsigned short ctrl;
885
886 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
887 ctrl = sci_in(port, SCSCR);
888 ctrl &= ~SCI_CTRL_FLAGS_TIE;
889 sci_out(port, SCSCR, ctrl);
890 }
891
892 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
893 {
894 unsigned short ctrl;
895
896 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
897 ctrl = sci_in(port, SCSCR);
898 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
899 sci_out(port, SCSCR, ctrl);
900 }
901
902 static void sci_stop_rx(struct uart_port *port)
903 {
904 unsigned short ctrl;
905
906 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
907 ctrl = sci_in(port, SCSCR);
908 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
909 sci_out(port, SCSCR, ctrl);
910 }
911
912 static void sci_enable_ms(struct uart_port *port)
913 {
914 /* Nothing here yet .. */
915 }
916
917 static void sci_break_ctl(struct uart_port *port, int break_state)
918 {
919 /* Nothing here yet .. */
920 }
921
922 static int sci_startup(struct uart_port *port)
923 {
924 struct sci_port *s = &sci_ports[port->line];
925
926 if (s->enable)
927 s->enable(port);
928
929 sci_request_irq(s);
930 sci_start_tx(port);
931 sci_start_rx(port, 1);
932
933 return 0;
934 }
935
936 static void sci_shutdown(struct uart_port *port)
937 {
938 struct sci_port *s = &sci_ports[port->line];
939
940 sci_stop_rx(port);
941 sci_stop_tx(port);
942 sci_free_irq(s);
943
944 if (s->disable)
945 s->disable(port);
946 }
947
948 static void sci_set_termios(struct uart_port *port, struct termios *termios,
949 struct termios *old)
950 {
951 struct sci_port *s = &sci_ports[port->line];
952 unsigned int status, baud, smr_val;
953 unsigned long flags;
954 int t;
955
956 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
957
958 switch (baud) {
959 case 0:
960 t = -1;
961 break;
962 default:
963 {
964 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
965 struct clk *clk = clk_get("module_clk");
966 t = SCBRR_VALUE(baud, clk_get_rate(clk));
967 clk_put(clk);
968 #else
969 t = SCBRR_VALUE(baud);
970 #endif
971 }
972 break;
973 }
974
975 spin_lock_irqsave(&port->lock, flags);
976
977 do {
978 status = sci_in(port, SCxSR);
979 } while (!(status & SCxSR_TEND(port)));
980
981 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
982
983 #if !defined(SCI_ONLY)
984 if (port->type == PORT_SCIF)
985 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
986 #endif
987
988 smr_val = sci_in(port, SCSMR) & 3;
989 if ((termios->c_cflag & CSIZE) == CS7)
990 smr_val |= 0x40;
991 if (termios->c_cflag & PARENB)
992 smr_val |= 0x20;
993 if (termios->c_cflag & PARODD)
994 smr_val |= 0x30;
995 if (termios->c_cflag & CSTOPB)
996 smr_val |= 0x08;
997
998 uart_update_timeout(port, termios->c_cflag, baud);
999
1000 sci_out(port, SCSMR, smr_val);
1001
1002 if (t > 0) {
1003 if(t >= 256) {
1004 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1005 t >>= 2;
1006 } else {
1007 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1008 }
1009 sci_out(port, SCBRR, t);
1010 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1011 }
1012
1013 if (likely(s->init_pins))
1014 s->init_pins(port, termios->c_cflag);
1015
1016 sci_out(port, SCSCR, SCSCR_INIT(port));
1017
1018 if ((termios->c_cflag & CREAD) != 0)
1019 sci_start_rx(port,0);
1020
1021 spin_unlock_irqrestore(&port->lock, flags);
1022 }
1023
1024 static const char *sci_type(struct uart_port *port)
1025 {
1026 switch (port->type) {
1027 case PORT_SCI: return "sci";
1028 case PORT_SCIF: return "scif";
1029 case PORT_IRDA: return "irda";
1030 }
1031
1032 return 0;
1033 }
1034
1035 static void sci_release_port(struct uart_port *port)
1036 {
1037 /* Nothing here yet .. */
1038 }
1039
1040 static int sci_request_port(struct uart_port *port)
1041 {
1042 /* Nothing here yet .. */
1043 return 0;
1044 }
1045
1046 static void sci_config_port(struct uart_port *port, int flags)
1047 {
1048 struct sci_port *s = &sci_ports[port->line];
1049
1050 port->type = s->type;
1051
1052 switch (port->type) {
1053 case PORT_SCI:
1054 s->init_pins = sci_init_pins_sci;
1055 break;
1056 case PORT_SCIF:
1057 s->init_pins = sci_init_pins_scif;
1058 break;
1059 case PORT_IRDA:
1060 s->init_pins = sci_init_pins_irda;
1061 break;
1062 }
1063
1064 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1065 if (port->mapbase == 0)
1066 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1067
1068 port->membase = (void __iomem *)port->mapbase;
1069 #endif
1070 }
1071
1072 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1073 {
1074 struct sci_port *s = &sci_ports[port->line];
1075
1076 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1077 return -EINVAL;
1078 if (ser->baud_base < 2400)
1079 /* No paper tape reader for Mitch.. */
1080 return -EINVAL;
1081
1082 return 0;
1083 }
1084
1085 static struct uart_ops sci_uart_ops = {
1086 .tx_empty = sci_tx_empty,
1087 .set_mctrl = sci_set_mctrl,
1088 .get_mctrl = sci_get_mctrl,
1089 .start_tx = sci_start_tx,
1090 .stop_tx = sci_stop_tx,
1091 .stop_rx = sci_stop_rx,
1092 .enable_ms = sci_enable_ms,
1093 .break_ctl = sci_break_ctl,
1094 .startup = sci_startup,
1095 .shutdown = sci_shutdown,
1096 .set_termios = sci_set_termios,
1097 .type = sci_type,
1098 .release_port = sci_release_port,
1099 .request_port = sci_request_port,
1100 .config_port = sci_config_port,
1101 .verify_port = sci_verify_port,
1102 };
1103
1104 static void __init sci_init_ports(void)
1105 {
1106 static int first = 1;
1107 int i;
1108
1109 if (!first)
1110 return;
1111
1112 first = 0;
1113
1114 for (i = 0; i < SCI_NPORTS; i++) {
1115 sci_ports[i].port.ops = &sci_uart_ops;
1116 sci_ports[i].port.iotype = UPIO_MEM;
1117 sci_ports[i].port.line = i;
1118 sci_ports[i].port.fifosize = 1;
1119
1120 #if defined(__H8300H__) || defined(__H8300S__)
1121 #ifdef __H8300S__
1122 sci_ports[i].enable = h8300_sci_enable;
1123 sci_ports[i].disable = h8300_sci_disable;
1124 #endif
1125 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1126 #elif defined(CONFIG_SUPERH64)
1127 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1128 #else
1129 /*
1130 * XXX: We should use a proper SCI/SCIF clock
1131 */
1132 {
1133 struct clk *clk = clk_get("module_clk");
1134 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1135 clk_put(clk);
1136 }
1137 #endif
1138
1139 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1140 sci_ports[i].break_timer.function = sci_break_timer;
1141
1142 init_timer(&sci_ports[i].break_timer);
1143 }
1144 }
1145
1146 int __init early_sci_setup(struct uart_port *port)
1147 {
1148 if (unlikely(port->line > SCI_NPORTS))
1149 return -ENODEV;
1150
1151 sci_init_ports();
1152
1153 sci_ports[port->line].port.membase = port->membase;
1154 sci_ports[port->line].port.mapbase = port->mapbase;
1155 sci_ports[port->line].port.type = port->type;
1156
1157 return 0;
1158 }
1159
1160 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1161 /*
1162 * Print a string to the serial port trying not to disturb
1163 * any possible real use of the port...
1164 */
1165 static void serial_console_write(struct console *co, const char *s,
1166 unsigned count)
1167 {
1168 put_string(serial_console_port, s, count);
1169 }
1170
1171 static int __init serial_console_setup(struct console *co, char *options)
1172 {
1173 struct uart_port *port;
1174 int baud = 115200;
1175 int bits = 8;
1176 int parity = 'n';
1177 int flow = 'n';
1178 int ret;
1179
1180 /*
1181 * Check whether an invalid uart number has been specified, and
1182 * if so, search for the first available port that does have
1183 * console support.
1184 */
1185 if (co->index >= SCI_NPORTS)
1186 co->index = 0;
1187
1188 serial_console_port = &sci_ports[co->index];
1189 port = &serial_console_port->port;
1190
1191 /*
1192 * Also need to check port->type, we don't actually have any
1193 * UPIO_PORT ports, but uart_report_port() handily misreports
1194 * it anyways if we don't have a port available by the time this is
1195 * called.
1196 */
1197 if (!port->type)
1198 return -ENODEV;
1199 if (!port->membase || !port->mapbase)
1200 return -ENODEV;
1201
1202 spin_lock_init(&port->lock);
1203
1204 port->type = serial_console_port->type;
1205
1206 if (port->flags & UPF_IOREMAP)
1207 sci_config_port(port, 0);
1208
1209 if (serial_console_port->enable)
1210 serial_console_port->enable(port);
1211
1212 if (options)
1213 uart_parse_options(options, &baud, &parity, &bits, &flow);
1214
1215 ret = uart_set_options(port, co, baud, parity, bits, flow);
1216 #if defined(__H8300H__) || defined(__H8300S__)
1217 /* disable rx interrupt */
1218 if (ret == 0)
1219 sci_stop_rx(port);
1220 #endif
1221 return ret;
1222 }
1223
1224 static struct console serial_console = {
1225 .name = "ttySC",
1226 .device = uart_console_device,
1227 .write = serial_console_write,
1228 .setup = serial_console_setup,
1229 .flags = CON_PRINTBUFFER,
1230 .index = -1,
1231 .data = &sci_uart_driver,
1232 };
1233
1234 static int __init sci_console_init(void)
1235 {
1236 sci_init_ports();
1237 register_console(&serial_console);
1238 return 0;
1239 }
1240 console_initcall(sci_console_init);
1241 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1242
1243 #ifdef CONFIG_SH_KGDB
1244 /*
1245 * FIXME: Most of this can go away.. at the moment, we rely on
1246 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1247 * most of that can easily be done here instead.
1248 *
1249 * For the time being, just accept the values that were parsed earlier..
1250 */
1251 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1252 int *parity, int *bits)
1253 {
1254 *baud = kgdb_baud;
1255 *parity = tolower(kgdb_parity);
1256 *bits = kgdb_bits - '0';
1257 }
1258
1259 /*
1260 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1261 * care of the early-on initialization for kgdb, regardless of whether we
1262 * actually use kgdb as a console or not.
1263 *
1264 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1265 */
1266 int __init kgdb_console_setup(struct console *co, char *options)
1267 {
1268 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1269 int baud = 38400;
1270 int bits = 8;
1271 int parity = 'n';
1272 int flow = 'n';
1273
1274 spin_lock_init(&port->lock);
1275
1276 if (co->index != kgdb_portnum)
1277 co->index = kgdb_portnum;
1278
1279 if (options)
1280 uart_parse_options(options, &baud, &parity, &bits, &flow);
1281 else
1282 kgdb_console_get_options(port, &baud, &parity, &bits);
1283
1284 kgdb_getchar = kgdb_sci_getchar;
1285 kgdb_putchar = kgdb_sci_putchar;
1286
1287 return uart_set_options(port, co, baud, parity, bits, flow);
1288 }
1289 #endif /* CONFIG_SH_KGDB */
1290
1291 #ifdef CONFIG_SH_KGDB_CONSOLE
1292 static struct console kgdb_console = {
1293 .name = "ttySC",
1294 .write = kgdb_console_write,
1295 .setup = kgdb_console_setup,
1296 .flags = CON_PRINTBUFFER | CON_ENABLED,
1297 .index = -1,
1298 .data = &sci_uart_driver,
1299 };
1300
1301 /* Register the KGDB console so we get messages (d'oh!) */
1302 static int __init kgdb_console_init(void)
1303 {
1304 sci_init_ports();
1305 register_console(&kgdb_console);
1306 return 0;
1307 }
1308 console_initcall(kgdb_console_init);
1309 #endif /* CONFIG_SH_KGDB_CONSOLE */
1310
1311 #if defined(CONFIG_SH_KGDB_CONSOLE)
1312 #define SCI_CONSOLE &kgdb_console
1313 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1314 #define SCI_CONSOLE &serial_console
1315 #else
1316 #define SCI_CONSOLE 0
1317 #endif
1318
1319 static char banner[] __initdata =
1320 KERN_INFO "SuperH SCI(F) driver initialized\n";
1321
1322 static struct uart_driver sci_uart_driver = {
1323 .owner = THIS_MODULE,
1324 .driver_name = "sci",
1325 .dev_name = "ttySC",
1326 .major = SCI_MAJOR,
1327 .minor = SCI_MINOR_START,
1328 .nr = SCI_NPORTS,
1329 .cons = SCI_CONSOLE,
1330 };
1331
1332 /*
1333 * Register a set of serial devices attached to a platform device. The
1334 * list is terminated with a zero flags entry, which means we expect
1335 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1336 * remapping (such as sh64) should also set UPF_IOREMAP.
1337 */
1338 static int __devinit sci_probe(struct platform_device *dev)
1339 {
1340 struct plat_sci_port *p = dev->dev.platform_data;
1341 int i;
1342
1343 for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
1344 struct sci_port *sciport = &sci_ports[i];
1345
1346 sciport->port.mapbase = p->mapbase;
1347
1348 /*
1349 * For the simple (and majority of) cases where we don't need
1350 * to do any remapping, just cast the cookie directly.
1351 */
1352 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1353 p->membase = (void __iomem *)p->mapbase;
1354
1355 sciport->port.membase = p->membase;
1356
1357 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1358 sciport->port.flags = p->flags;
1359 sciport->port.dev = &dev->dev;
1360
1361 sciport->type = sciport->port.type = p->type;
1362
1363 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1364
1365 uart_add_one_port(&sci_uart_driver, &sciport->port);
1366 }
1367
1368 #ifdef CONFIG_CPU_FREQ
1369 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1370 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1371 #endif
1372
1373 #ifdef CONFIG_SH_STANDARD_BIOS
1374 sh_bios_gdb_detach();
1375 #endif
1376
1377 return 0;
1378 }
1379
1380 static int __devexit sci_remove(struct platform_device *dev)
1381 {
1382 int i;
1383
1384 for (i = 0; i < SCI_NPORTS; i++)
1385 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1386
1387 return 0;
1388 }
1389
1390 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1391 {
1392 int i;
1393
1394 for (i = 0; i < SCI_NPORTS; i++) {
1395 struct sci_port *p = &sci_ports[i];
1396
1397 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1398 uart_suspend_port(&sci_uart_driver, &p->port);
1399 }
1400
1401 return 0;
1402 }
1403
1404 static int sci_resume(struct platform_device *dev)
1405 {
1406 int i;
1407
1408 for (i = 0; i < SCI_NPORTS; i++) {
1409 struct sci_port *p = &sci_ports[i];
1410
1411 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1412 uart_resume_port(&sci_uart_driver, &p->port);
1413 }
1414
1415 return 0;
1416 }
1417
1418 static struct platform_driver sci_driver = {
1419 .probe = sci_probe,
1420 .remove = __devexit_p(sci_remove),
1421 .suspend = sci_suspend,
1422 .resume = sci_resume,
1423 .driver = {
1424 .name = "sh-sci",
1425 .owner = THIS_MODULE,
1426 },
1427 };
1428
1429 static int __init sci_init(void)
1430 {
1431 int ret;
1432
1433 printk(banner);
1434
1435 sci_init_ports();
1436
1437 ret = uart_register_driver(&sci_uart_driver);
1438 if (likely(ret == 0)) {
1439 ret = platform_driver_register(&sci_driver);
1440 if (unlikely(ret))
1441 uart_unregister_driver(&sci_uart_driver);
1442 }
1443
1444 return ret;
1445 }
1446
1447 static void __exit sci_exit(void)
1448 {
1449 platform_driver_unregister(&sci_driver);
1450 uart_unregister_driver(&sci_uart_driver);
1451 }
1452
1453 module_init(sci_init);
1454 module_exit(sci_exit);
1455
1456 MODULE_LICENSE("GPL");
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