drivers/serial/vr41xx_siu.c

   1 /*
   2  *  Driver for NEC VR4100 series Serial Interface Unit.
   3  *
   4  *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
   5  *
   6  *  Based on drivers/serial/8250.c, by Russell King.
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program; if not, write to the Free Software
  20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22 #include <linux/config.h>
  23
  24 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25 #define SUPPORT_SYSRQ
  26 #endif
  27
  28 #include <linux/console.h>
  29 #include <linux/device.h>
  30 #include <linux/err.h>
  31 #include <linux/ioport.h>
  32 #include <linux/init.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/module.h>
  35 #include <linux/serial.h>
  36 #include <linux/serial_core.h>
  37 #include <linux/serial_reg.h>
  38 #include <linux/tty.h>
  39 #include <linux/tty_flip.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/vr41xx/siu.h>
  43 #include <asm/vr41xx/vr41xx.h>
  44
  45 #define SIU_PORTS_MAX   2
  46 #define SIU_BAUD_BASE   1152000
  47 #define SIU_MAJOR       204
  48 #define SIU_MINOR_BASE  82
  49
  50 #define RX_MAX_COUNT    256
  51 #define TX_MAX_COUNT    15
  52
  53 #define SIUIRSEL        0x08
  54  #define TMICMODE       0x20
  55  #define TMICTX         0x10
  56  #define IRMSEL         0x0c
  57  #define IRMSEL_HP      0x08
  58  #define IRMSEL_TEMIC   0x04
  59  #define IRMSEL_SHARP   0x00
  60  #define IRUSESEL       0x02
  61  #define SIRSEL         0x01
  62
  63 struct siu_port {
  64         unsigned int type;
  65         unsigned int irq;
  66         unsigned long start;
  67 };
  68
  69 static const struct siu_port siu_type1_ports[] = {
  70         {       .type           = PORT_VR41XX_SIU,
  71                 .irq            = SIU_IRQ,
  72                 .start          = 0x0c000000UL,         },
  73 };
  74
  75 #define SIU_TYPE1_NR_PORTS      (sizeof(siu_type1_ports) / sizeof(struct siu_port))
  76
  77 static const struct siu_port siu_type2_ports[] = {
  78         {       .type           = PORT_VR41XX_SIU,
  79                 .irq            = SIU_IRQ,
  80                 .start          = 0x0f000800UL,         },
  81         {       .type           = PORT_VR41XX_DSIU,
  82                 .irq            = DSIU_IRQ,
  83                 .start          = 0x0f000820UL,         },
  84 };
  85
  86 #define SIU_TYPE2_NR_PORTS      (sizeof(siu_type2_ports) / sizeof(struct siu_port))
  87
  88 static struct uart_port siu_uart_ports[SIU_PORTS_MAX];
  89 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
  90
  91 #define siu_read(port, offset)          readb((port)->membase + (offset))
  92 #define siu_write(port, offset, value)  writeb((value), (port)->membase + (offset))
  93
  94 void vr41xx_select_siu_interface(siu_interface_t interface)
  95 {
  96         struct uart_port *port;
  97         unsigned long flags;
  98         uint8_t irsel;
  99
 100         port = &siu_uart_ports[0];
 101
 102         spin_lock_irqsave(&port->lock, flags);
 103
 104         irsel = siu_read(port, SIUIRSEL);
 105         if (interface == SIU_INTERFACE_IRDA)
 106                 irsel |= SIRSEL;
 107         else
 108                 irsel &= ~SIRSEL;
 109         siu_write(port, SIUIRSEL, irsel);
 110
 111         spin_unlock_irqrestore(&port->lock, flags);
 112 }
 113
 114 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
 115
 116 void vr41xx_use_irda(irda_use_t use)
 117 {
 118         struct uart_port *port;
 119         unsigned long flags;
 120         uint8_t irsel;
 121
 122         port = &siu_uart_ports[0];
 123
 124         spin_lock_irqsave(&port->lock, flags);
 125
 126         irsel = siu_read(port, SIUIRSEL);
 127         if (use == FIR_USE_IRDA)
 128                 irsel |= IRUSESEL;
 129         else
 130                 irsel &= ~IRUSESEL;
 131         siu_write(port, SIUIRSEL, irsel);
 132
 133         spin_unlock_irqrestore(&port->lock, flags);
 134 }
 135
 136 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
 137
 138 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
 139 {
 140         struct uart_port *port;
 141         unsigned long flags;
 142         uint8_t irsel;
 143
 144         port = &siu_uart_ports[0];
 145
 146         spin_lock_irqsave(&port->lock, flags);
 147
 148         irsel = siu_read(port, SIUIRSEL);
 149         irsel &= ~(IRMSEL | TMICTX | TMICMODE);
 150         switch (module) {
 151         case SHARP_IRDA:
 152                 irsel |= IRMSEL_SHARP;
 153                 break;
 154         case TEMIC_IRDA:
 155                 irsel |= IRMSEL_TEMIC | TMICMODE;
 156                 if (speed == IRDA_TX_4MBPS)
 157                         irsel |= TMICTX;
 158                 break;
 159         case HP_IRDA:
 160                 irsel |= IRMSEL_HP;
 161                 break;
 162         default:
 163                 break;
 164         }
 165         siu_write(port, SIUIRSEL, irsel);
 166
 167         spin_unlock_irqrestore(&port->lock, flags);
 168 }
 169
 170 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
 171
 172 static inline void siu_clear_fifo(struct uart_port *port)
 173 {
 174         siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
 175         siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
 176                                   UART_FCR_CLEAR_XMIT);
 177         siu_write(port, UART_FCR, 0);
 178 }
 179
 180 static inline int siu_probe_ports(void)
 181 {
 182         switch (current_cpu_data.cputype) {
 183         case CPU_VR4111:
 184         case CPU_VR4121:
 185                 return SIU_TYPE1_NR_PORTS;
 186         case CPU_VR4122:
 187         case CPU_VR4131:
 188         case CPU_VR4133:
 189                 return SIU_TYPE2_NR_PORTS;
 190         }
 191
 192         return 0;
 193 }
 194
 195 static inline unsigned long siu_port_size(struct uart_port *port)
 196 {
 197         switch (port->type) {
 198         case PORT_VR41XX_SIU:
 199                 return 11UL;
 200         case PORT_VR41XX_DSIU:
 201                 return 8UL;
 202         }
 203
 204         return 0;
 205 }
 206
 207 static inline unsigned int siu_check_type(struct uart_port *port)
 208 {
 209         switch (current_cpu_data.cputype) {
 210         case CPU_VR4111:
 211         case CPU_VR4121:
 212                 if (port->line == 0)
 213                         return PORT_VR41XX_SIU;
 214                 break;
 215         case CPU_VR4122:
 216         case CPU_VR4131:
 217         case CPU_VR4133:
 218                 if (port->line == 0)
 219                         return PORT_VR41XX_SIU;
 220                 else if (port->line == 1)
 221                         return PORT_VR41XX_DSIU;
 222                 break;
 223         }
 224
 225         return PORT_UNKNOWN;
 226 }
 227
 228 static inline const char *siu_type_name(struct uart_port *port)
 229 {
 230         switch (port->type) {
 231         case PORT_VR41XX_SIU:
 232                 return "SIU";
 233         case PORT_VR41XX_DSIU:
 234                 return "DSIU";
 235         }
 236
 237         return "unknown";
 238 }
 239
 240 static unsigned int siu_tx_empty(struct uart_port *port)
 241 {
 242         uint8_t lsr;
 243
 244         lsr = siu_read(port, UART_LSR);
 245         if (lsr & UART_LSR_TEMT)
 246                 return TIOCSER_TEMT;
 247
 248         return 0;
 249 }
 250
 251 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 252 {
 253         uint8_t mcr = 0;
 254
 255         if (mctrl & TIOCM_DTR)
 256                 mcr |= UART_MCR_DTR;
 257         if (mctrl & TIOCM_RTS)
 258                 mcr |= UART_MCR_RTS;
 259         if (mctrl & TIOCM_OUT1)
 260                 mcr |= UART_MCR_OUT1;
 261         if (mctrl & TIOCM_OUT2)
 262                 mcr |= UART_MCR_OUT2;
 263         if (mctrl & TIOCM_LOOP)
 264                 mcr |= UART_MCR_LOOP;
 265
 266         siu_write(port, UART_MCR, mcr);
 267 }
 268
 269 static unsigned int siu_get_mctrl(struct uart_port *port)
 270 {
 271         uint8_t msr;
 272         unsigned int mctrl = 0;
 273
 274         msr = siu_read(port, UART_MSR);
 275         if (msr & UART_MSR_DCD)
 276                 mctrl |= TIOCM_CAR;
 277         if (msr & UART_MSR_RI)
 278                 mctrl |= TIOCM_RNG;
 279         if (msr & UART_MSR_DSR)
 280                 mctrl |= TIOCM_DSR;
 281         if (msr & UART_MSR_CTS)
 282                 mctrl |= TIOCM_CTS;
 283
 284         return mctrl;
 285 }
 286
 287 static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop)
 288 {
 289         unsigned long flags;
 290         uint8_t ier;
 291
 292         spin_lock_irqsave(&port->lock, flags);
 293
 294         ier = siu_read(port, UART_IER);
 295         ier &= ~UART_IER_THRI;
 296         siu_write(port, UART_IER, ier);
 297
 298         spin_unlock_irqrestore(&port->lock, flags);
 299 }
 300
 301 static void siu_start_tx(struct uart_port *port, unsigned int tty_start)
 302 {
 303         unsigned long flags;
 304         uint8_t ier;
 305
 306         spin_lock_irqsave(&port->lock, flags);
 307
 308         ier = siu_read(port, UART_IER);
 309         ier |= UART_IER_THRI;
 310         siu_write(port, UART_IER, ier);
 311
 312         spin_unlock_irqrestore(&port->lock, flags);
 313 }
 314
 315 static void siu_stop_rx(struct uart_port *port)
 316 {
 317         unsigned long flags;
 318         uint8_t ier;
 319
 320         spin_lock_irqsave(&port->lock, flags);
 321
 322         ier = siu_read(port, UART_IER);
 323         ier &= ~UART_IER_RLSI;
 324         siu_write(port, UART_IER, ier);
 325
 326         port->read_status_mask &= ~UART_LSR_DR;
 327
 328         spin_unlock_irqrestore(&port->lock, flags);
 329 }
 330
 331 static void siu_enable_ms(struct uart_port *port)
 332 {
 333         unsigned long flags;
 334         uint8_t ier;
 335
 336         spin_lock_irqsave(&port->lock, flags);
 337
 338         ier = siu_read(port, UART_IER);
 339         ier |= UART_IER_MSI;
 340         siu_write(port, UART_IER, ier);
 341
 342         spin_unlock_irqrestore(&port->lock, flags);
 343 }
 344
 345 static void siu_break_ctl(struct uart_port *port, int ctl)
 346 {
 347         unsigned long flags;
 348         uint8_t lcr;
 349
 350         spin_lock_irqsave(&port->lock, flags);
 351
 352         lcr = siu_read(port, UART_LCR);
 353         if (ctl == -1)
 354                 lcr |= UART_LCR_SBC;
 355         else
 356                 lcr &= ~UART_LCR_SBC;
 357         siu_write(port, UART_LCR, lcr);
 358
 359         spin_unlock_irqrestore(&port->lock, flags);
 360 }
 361
 362 static inline void receive_chars(struct uart_port *port, uint8_t *status,
 363                                  struct pt_regs *regs)
 364 {
 365         struct tty_struct *tty;
 366         uint8_t lsr, ch;
 367         char flag;
 368         int max_count = RX_MAX_COUNT;
 369
 370         tty = port->info->tty;
 371         lsr = *status;
 372
 373         do {
 374                 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
 375                         if (tty->low_latency)
 376                                 tty_flip_buffer_push(tty);
 377                 }
 378
 379                 ch = siu_read(port, UART_RX);
 380                 port->icount.rx++;
 381                 flag = TTY_NORMAL;
 382
 383 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
 384                 lsr |= lsr_break_flag[port->line];
 385                 lsr_break_flag[port->line] = 0;
 386 #endif
 387                 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
 388                                     UART_LSR_PE | UART_LSR_OE))) {
 389                         if (lsr & UART_LSR_BI) {
 390                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 391                                 port->icount.brk++;
 392
 393                                 if (uart_handle_break(port))
 394                                         goto ignore_char;
 395                         }
 396
 397                         if (lsr & UART_LSR_FE)
 398                                 port->icount.frame++;
 399                         if (lsr & UART_LSR_PE)
 400                                 port->icount.parity++;
 401                         if (lsr & UART_LSR_OE)
 402                                 port->icount.overrun++;
 403
 404                         lsr &= port->read_status_mask;
 405                         if (lsr & UART_LSR_BI)
 406                                 flag = TTY_BREAK;
 407                         if (lsr & UART_LSR_FE)
 408                                 flag = TTY_FRAME;
 409                         if (lsr & UART_LSR_PE)
 410                                 flag = TTY_PARITY;
 411                 }
 412
 413                 if (uart_handle_sysrq_char(port, ch, regs))
 414                         goto ignore_char;
 415
 416                 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
 417
 418         ignore_char:
 419                 lsr = siu_read(port, UART_LSR);
 420         } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
 421
 422         tty_flip_buffer_push(tty);
 423
 424         *status = lsr;
 425 }
 426
 427 static inline void check_modem_status(struct uart_port *port)
 428 {
 429         uint8_t msr;
 430
 431         msr = siu_read(port, UART_MSR);
 432         if ((msr & UART_MSR_ANY_DELTA) == 0)
 433                 return;
 434         if (msr & UART_MSR_DDCD)
 435                 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
 436         if (msr & UART_MSR_TERI)
 437                 port->icount.rng++;
 438         if (msr & UART_MSR_DDSR)
 439                 port->icount.dsr++;
 440         if (msr & UART_MSR_DCTS)
 441                 uart_handle_cts_change(port, msr & UART_MSR_CTS);
 442
 443         wake_up_interruptible(&port->info->delta_msr_wait);
 444 }
 445
 446 static inline void transmit_chars(struct uart_port *port)
 447 {
 448         struct circ_buf *xmit;
 449         int max_count = TX_MAX_COUNT;
 450
 451         xmit = &port->info->xmit;
 452
 453         if (port->x_char) {
 454                 siu_write(port, UART_TX, port->x_char);
 455                 port->icount.tx++;
 456                 port->x_char = 0;
 457                 return;
 458         }
 459
 460         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 461                 siu_stop_tx(port, 0);
 462                 return;
 463         }
 464
 465         do {
 466                 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
 467                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 468                 port->icount.tx++;
 469                 if (uart_circ_empty(xmit))
 470                         break;
 471         } while (max_count-- > 0);
 472
 473         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 474                 uart_write_wakeup(port);
 475
 476         if (uart_circ_empty(xmit))
 477                 siu_stop_tx(port, 0);
 478 }
 479
 480 static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 481 {
 482         struct uart_port *port;
 483         uint8_t iir, lsr;
 484
 485         if (dev_id == NULL)
 486                 return IRQ_NONE;
 487
 488         port = (struct uart_port *)dev_id;
 489
 490         iir = siu_read(port, UART_IIR);
 491         if (iir & UART_IIR_NO_INT)
 492                 return IRQ_NONE;
 493
 494         lsr = siu_read(port, UART_LSR);
 495         if (lsr & UART_LSR_DR)
 496                 receive_chars(port, &lsr, regs);
 497
 498         check_modem_status(port);
 499
 500         if (lsr & UART_LSR_THRE)
 501                 transmit_chars(port);
 502
 503         return IRQ_HANDLED;
 504 }
 505
 506 static int siu_startup(struct uart_port *port)
 507 {
 508         int retval;
 509
 510         siu_clear_fifo(port);
 511
 512         (void)siu_read(port, UART_LSR);
 513         (void)siu_read(port, UART_RX);
 514         (void)siu_read(port, UART_IIR);
 515         (void)siu_read(port, UART_MSR);
 516
 517         if (siu_read(port, UART_LSR) == 0xff)
 518                 return -ENODEV;
 519
 520         retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
 521         if (retval)
 522                 return retval;
 523
 524         if (port->type == PORT_VR41XX_DSIU)
 525                 vr41xx_enable_dsiuint(DSIUINT_ALL);
 526
 527         siu_write(port, UART_LCR, UART_LCR_WLEN8);
 528
 529         spin_lock_irq(&port->lock);
 530         siu_set_mctrl(port, port->mctrl);
 531         spin_unlock_irq(&port->lock);
 532
 533         siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
 534
 535         (void)siu_read(port, UART_LSR);
 536         (void)siu_read(port, UART_RX);
 537         (void)siu_read(port, UART_IIR);
 538         (void)siu_read(port, UART_MSR);
 539
 540         return 0;
 541 }
 542
 543 static void siu_shutdown(struct uart_port *port)
 544 {
 545         unsigned long flags;
 546         uint8_t lcr;
 547
 548         if (port->membase == NULL)
 549                 return;
 550
 551         siu_write(port, UART_IER, 0);
 552
 553         spin_lock_irqsave(&port->lock, flags);
 554
 555         port->mctrl &= ~TIOCM_OUT2;
 556         siu_set_mctrl(port, port->mctrl);
 557
 558         spin_unlock_irqrestore(&port->lock, flags);
 559
 560         lcr = siu_read(port, UART_LCR);
 561         lcr &= ~UART_LCR_SBC;
 562         siu_write(port, UART_LCR, lcr);
 563
 564         siu_clear_fifo(port);
 565
 566         (void)siu_read(port, UART_RX);
 567
 568         if (port->type == PORT_VR41XX_DSIU)
 569                 vr41xx_disable_dsiuint(DSIUINT_ALL);
 570
 571         free_irq(port->irq, port);
 572 }
 573
 574 static void siu_set_termios(struct uart_port *port, struct termios *new,
 575                             struct termios *old)
 576 {
 577         tcflag_t c_cflag, c_iflag;
 578         uint8_t lcr, fcr, ier;
 579         unsigned int baud, quot;
 580         unsigned long flags;
 581
 582         c_cflag = new->c_cflag;
 583         switch (c_cflag & CSIZE) {
 584         case CS5:
 585                 lcr = UART_LCR_WLEN5;
 586                 break;
 587         case CS6:
 588                 lcr = UART_LCR_WLEN6;
 589                 break;
 590         case CS7:
 591                 lcr = UART_LCR_WLEN7;
 592                 break;
 593         default:
 594                 lcr = UART_LCR_WLEN8;
 595                 break;
 596         }
 597
 598         if (c_cflag & CSTOPB)
 599                 lcr |= UART_LCR_STOP;
 600         if (c_cflag & PARENB)
 601                 lcr |= UART_LCR_PARITY;
 602         if ((c_cflag & PARODD) != PARODD)
 603                 lcr |= UART_LCR_EPAR;
 604         if (c_cflag & CMSPAR)
 605                 lcr |= UART_LCR_SPAR;
 606
 607         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
 608         quot = uart_get_divisor(port, baud);
 609
 610         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
 611
 612         spin_lock_irqsave(&port->lock, flags);
 613
 614         uart_update_timeout(port, c_cflag, baud);
 615
 616         c_iflag = new->c_iflag;
 617
 618         port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
 619         if (c_iflag & INPCK)
 620                 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 621         if (c_iflag & (BRKINT | PARMRK))
 622                 port->read_status_mask |= UART_LSR_BI;
 623
 624         port->ignore_status_mask = 0;
 625         if (c_iflag & IGNPAR)
 626                 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
 627         if (c_iflag & IGNBRK) {
 628                 port->ignore_status_mask |= UART_LSR_BI;
 629                 if (c_iflag & IGNPAR)
 630                         port->ignore_status_mask |= UART_LSR_OE;
 631         }
 632
 633         if ((c_cflag & CREAD) == 0)
 634                 port->ignore_status_mask |= UART_LSR_DR;
 635
 636         ier = siu_read(port, UART_IER);
 637         ier &= ~UART_IER_MSI;
 638         if (UART_ENABLE_MS(port, c_cflag))
 639                 ier |= UART_IER_MSI;
 640         siu_write(port, UART_IER, ier);
 641
 642         siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
 643
 644         siu_write(port, UART_DLL, (uint8_t)quot);
 645         siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
 646
 647         siu_write(port, UART_LCR, lcr);
 648
 649         siu_write(port, UART_FCR, fcr);
 650
 651         siu_set_mctrl(port, port->mctrl);
 652
 653         spin_unlock_irqrestore(&port->lock, flags);
 654 }
 655
 656 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
 657 {
 658         switch (state) {
 659         case 0:
 660                 switch (port->type) {
 661                 case PORT_VR41XX_SIU:
 662                         vr41xx_supply_clock(SIU_CLOCK);
 663                         break;
 664                 case PORT_VR41XX_DSIU:
 665                         vr41xx_supply_clock(DSIU_CLOCK);
 666                         break;
 667                 }
 668                 break;
 669         case 3:
 670                 switch (port->type) {
 671                 case PORT_VR41XX_SIU:
 672                         vr41xx_mask_clock(SIU_CLOCK);
 673                         break;
 674                 case PORT_VR41XX_DSIU:
 675                         vr41xx_mask_clock(DSIU_CLOCK);
 676                         break;
 677                 }
 678                 break;
 679         }
 680 }
 681
 682 static const char *siu_type(struct uart_port *port)
 683 {
 684         return siu_type_name(port);
 685 }
 686
 687 static void siu_release_port(struct uart_port *port)
 688 {
 689         unsigned long size;
 690
 691         if (port->flags & UPF_IOREMAP) {
 692                 iounmap(port->membase);
 693                 port->membase = NULL;
 694         }
 695
 696         size = siu_port_size(port);
 697         release_mem_region(port->mapbase, size);
 698 }
 699
 700 static int siu_request_port(struct uart_port *port)
 701 {
 702         unsigned long size;
 703         struct resource *res;
 704
 705         size = siu_port_size(port);
 706         res = request_mem_region(port->mapbase, size, siu_type_name(port));
 707         if (res == NULL)
 708                 return -EBUSY;
 709
 710         if (port->flags & UPF_IOREMAP) {
 711                 port->membase = ioremap(port->mapbase, size);
 712                 if (port->membase == NULL) {
 713                         release_resource(res);
 714                         return -ENOMEM;
 715                 }
 716         }
 717
 718         return 0;
 719 }
 720
 721 static void siu_config_port(struct uart_port *port, int flags)
 722 {
 723         if (flags & UART_CONFIG_TYPE) {
 724                 port->type = siu_check_type(port);
 725                 (void)siu_request_port(port);
 726         }
 727 }
 728
 729 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
 730 {
 731         if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
 732                 return -EINVAL;
 733         if (port->irq != serial->irq)
 734                 return -EINVAL;
 735         if (port->iotype != serial->io_type)
 736                 return -EINVAL;
 737         if (port->mapbase != (unsigned long)serial->iomem_base)
 738                 return -EINVAL;
 739
 740         return 0;
 741 }
 742
 743 static struct uart_ops siu_uart_ops = {
 744         .tx_empty       = siu_tx_empty,
 745         .set_mctrl      = siu_set_mctrl,
 746         .get_mctrl      = siu_get_mctrl,
 747         .stop_tx        = siu_stop_tx,
 748         .start_tx       = siu_start_tx,
 749         .stop_rx        = siu_stop_rx,
 750         .enable_ms      = siu_enable_ms,
 751         .break_ctl      = siu_break_ctl,
 752         .startup        = siu_startup,
 753         .shutdown       = siu_shutdown,
 754         .set_termios    = siu_set_termios,
 755         .pm             = siu_pm,
 756         .type           = siu_type,
 757         .release_port   = siu_release_port,
 758         .request_port   = siu_request_port,
 759         .config_port    = siu_config_port,
 760         .verify_port    = siu_verify_port,
 761 };
 762
 763 static int siu_init_ports(void)
 764 {
 765         const struct siu_port *siu;
 766         struct uart_port *port;
 767         int i, num;
 768
 769         switch (current_cpu_data.cputype) {
 770         case CPU_VR4111:
 771         case CPU_VR4121:
 772                 siu = siu_type1_ports;
 773                 break;
 774         case CPU_VR4122:
 775         case CPU_VR4131:
 776         case CPU_VR4133:
 777                 siu = siu_type2_ports;
 778                 break;
 779         default:
 780                 return 0;
 781         }
 782
 783         port = siu_uart_ports;
 784         num = siu_probe_ports();
 785         for (i = 0; i < num; i++) {
 786                 spin_lock_init(&port->lock);
 787                 port->irq = siu->irq;
 788                 port->uartclk = SIU_BAUD_BASE * 16;
 789                 port->fifosize = 16;
 790                 port->regshift = 0;
 791                 port->iotype = UPIO_MEM;
 792                 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
 793                 port->type = siu->type;
 794                 port->line = i;
 795                 port->mapbase = siu->start;
 796                 siu++;
 797                 port++;
 798         }
 799
 800         return num;
 801 }
 802
 803 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
 804
 805 static void early_set_termios(struct uart_port *port, struct termios *new,
 806                               struct termios *old)
 807 {
 808         tcflag_t c_cflag;
 809         uint8_t lcr;
 810         unsigned int baud, quot;
 811
 812         c_cflag = new->c_cflag;
 813         switch (c_cflag & CSIZE) {
 814         case CS5:
 815                 lcr = UART_LCR_WLEN5;
 816                 break;
 817         case CS6:
 818                 lcr = UART_LCR_WLEN6;
 819                 break;
 820         case CS7:
 821                 lcr = UART_LCR_WLEN7;
 822                 break;
 823         default:
 824                 lcr = UART_LCR_WLEN8;
 825                 break;
 826         }
 827
 828         if (c_cflag & CSTOPB)
 829                 lcr |= UART_LCR_STOP;
 830         if (c_cflag & PARENB)
 831                 lcr |= UART_LCR_PARITY;
 832         if ((c_cflag & PARODD) != PARODD)
 833                 lcr |= UART_LCR_EPAR;
 834         if (c_cflag & CMSPAR)
 835                 lcr |= UART_LCR_SPAR;
 836
 837         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
 838         quot = uart_get_divisor(port, baud);
 839
 840         siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
 841
 842         siu_write(port, UART_DLL, (uint8_t)quot);
 843         siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
 844
 845         siu_write(port, UART_LCR, lcr);
 846 }
 847
 848 static struct uart_ops early_uart_ops = {
 849         .set_termios    = early_set_termios,
 850 };
 851
 852 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)
 853
 854 static void wait_for_xmitr(struct uart_port *port)
 855 {
 856         int timeout = 10000;
 857         uint8_t lsr, msr;
 858
 859         do {
 860                 lsr = siu_read(port, UART_LSR);
 861                 if (lsr & UART_LSR_BI)
 862                         lsr_break_flag[port->line] = UART_LSR_BI;
 863
 864                 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
 865                         break;
 866         } while (timeout-- > 0);
 867
 868         if (port->flags & UPF_CONS_FLOW) {
 869                 timeout = 1000000;
 870
 871                 do {
 872                         msr = siu_read(port, UART_MSR);
 873                         if ((msr & UART_MSR_CTS) != 0)
 874                                 break;
 875                 } while (timeout-- > 0);
 876         }
 877 }
 878
 879 static void siu_console_write(struct console *con, const char *s, unsigned count)
 880 {
 881         struct uart_port *port;
 882         uint8_t ier;
 883         unsigned i;
 884
 885         port = &siu_uart_ports[con->index];
 886
 887         ier = siu_read(port, UART_IER);
 888         siu_write(port, UART_IER, 0);
 889
 890         for (i = 0; i < count && *s != '\0'; i++, s++) {
 891                 wait_for_xmitr(port);
 892                 siu_write(port, UART_TX, *s);
 893                 if (*s == '\n') {
 894                         wait_for_xmitr(port);
 895                         siu_write(port, UART_TX, '\r');
 896                 }
 897         }
 898
 899         wait_for_xmitr(port);
 900         siu_write(port, UART_IER, ier);
 901 }
 902
 903 static int siu_console_setup(struct console *con, char *options)
 904 {
 905         struct uart_port *port;
 906         int baud = 9600;
 907         int parity = 'n';
 908         int bits = 8;
 909         int flow = 'n';
 910
 911         if (con->index >= SIU_PORTS_MAX)
 912                 con->index = 0;
 913
 914         port = &siu_uart_ports[con->index];
 915         if (port->membase == NULL) {
 916                 if (port->mapbase == 0)
 917                         return -ENODEV;
 918                 port->membase = (unsigned char __iomem *)KSEG1ADDR(port->mapbase);
 919         }
 920
 921         vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
 922
 923         if (options != NULL)
 924                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 925
 926         return uart_set_options(port, con, baud, parity, bits, flow);
 927 }
 928
 929 static struct uart_driver siu_uart_driver;
 930
 931 static struct console siu_console = {
 932         .name   = "ttyVR",
 933         .write  = siu_console_write,
 934         .device = uart_console_device,
 935         .setup  = siu_console_setup,
 936         .flags  = CON_PRINTBUFFER,
 937         .index  = -1,
 938         .data   = &siu_uart_driver,
 939 };
 940
 941 static int __devinit siu_console_init(void)
 942 {
 943         struct uart_port *port;
 944         int num, i;
 945
 946         num = siu_init_ports();
 947         if (num <= 0)
 948                 return -ENODEV;
 949
 950         for (i = 0; i < num; i++) {
 951                 port = &siu_uart_ports[i];
 952                 port->ops = &early_uart_ops;
 953         }
 954
 955         register_console(&siu_console);
 956
 957         return 0;
 958 }
 959
 960 console_initcall(siu_console_init);
 961
 962 #define SERIAL_VR41XX_CONSOLE   &siu_console
 963 #else
 964 #define SERIAL_VR41XX_CONSOLE   NULL
 965 #endif
 966
 967 static struct uart_driver siu_uart_driver = {
 968         .owner          = THIS_MODULE,
 969         .driver_name    = "SIU",
 970         .dev_name       = "ttyVR",
 971         .devfs_name     = "ttvr/",
 972         .major          = SIU_MAJOR,
 973         .minor          = SIU_MINOR_BASE,
 974         .cons           = SERIAL_VR41XX_CONSOLE,
 975 };
 976
 977 static int siu_probe(struct device *dev)
 978 {
 979         struct uart_port *port;
 980         int num, i, retval;
 981
 982         num = siu_init_ports();
 983         if (num <= 0)
 984                 return -ENODEV;
 985
 986         siu_uart_driver.nr = num;
 987         retval = uart_register_driver(&siu_uart_driver);
 988         if (retval)
 989                 return retval;
 990
 991         for (i = 0; i < num; i++) {
 992                 port = &siu_uart_ports[i];
 993                 port->ops = &siu_uart_ops;
 994                 port->dev = dev;
 995
 996                 retval = uart_add_one_port(&siu_uart_driver, port);
 997                 if (retval)
 998                         break;
 999         }
1000
1001         if (i == 0 && retval < 0) {
1002                 uart_unregister_driver(&siu_uart_driver);
1003                 return retval;
1004         }
1005
1006         return 0;
1007 }
1008
1009 static int siu_remove(struct device *dev)
1010 {
1011         struct uart_port *port;
1012         int i;
1013
1014         for (i = 0; i < siu_uart_driver.nr; i++) {
1015                 port = &siu_uart_ports[i];
1016                 if (port->dev == dev) {
1017                         uart_remove_one_port(&siu_uart_driver, port);
1018                         port->dev = NULL;
1019                 }
1020         }
1021
1022         uart_unregister_driver(&siu_uart_driver);
1023
1024         return 0;
1025 }
1026
1027 static int siu_suspend(struct device *dev, pm_message_t state, u32 level)
1028 {
1029         struct uart_port *port;
1030         int i;
1031
1032         if (level != SUSPEND_DISABLE)
1033                 return 0;
1034
1035         for (i = 0; i < siu_uart_driver.nr; i++) {
1036                 port = &siu_uart_ports[i];
1037                 if ((port->type == PORT_VR41XX_SIU ||
1038                      port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1039                         uart_suspend_port(&siu_uart_driver, port);
1040
1041         }
1042
1043         return 0;
1044 }
1045
1046 static int siu_resume(struct device *dev, u32 level)
1047 {
1048         struct uart_port *port;
1049         int i;
1050
1051         if (level != RESUME_ENABLE)
1052                 return 0;
1053
1054         for (i = 0; i < siu_uart_driver.nr; i++) {
1055                 port = &siu_uart_ports[i];
1056                 if ((port->type == PORT_VR41XX_SIU ||
1057                      port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1058                         uart_resume_port(&siu_uart_driver, port);
1059         }
1060
1061         return 0;
1062 }
1063
1064 static struct platform_device *siu_platform_device;
1065
1066 static struct device_driver siu_device_driver = {
1067         .name           = "SIU",
1068         .bus            = &platform_bus_type,
1069         .probe          = siu_probe,
1070         .remove         = siu_remove,
1071         .suspend        = siu_suspend,
1072         .resume         = siu_resume,
1073 };
1074
1075 static int __devinit vr41xx_siu_init(void)
1076 {
1077         int retval;
1078
1079         siu_platform_device = platform_device_register_simple("SIU", -1, NULL, 0);
1080         if (IS_ERR(siu_platform_device))
1081                 return PTR_ERR(siu_platform_device);
1082
1083         retval = driver_register(&siu_device_driver);
1084         if (retval < 0)
1085                 platform_device_unregister(siu_platform_device);
1086
1087         return retval;
1088 }
1089
1090 static void __devexit vr41xx_siu_exit(void)
1091 {
1092         driver_unregister(&siu_device_driver);
1093
1094         platform_device_unregister(siu_platform_device);
1095 }
1096
1097 module_init(vr41xx_siu_init);
1098 module_exit(vr41xx_siu_exit);