1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/init.h>
8 #include <linux/module.h>
9 #include <linux/nvmem-consumer.h>
10 #include <linux/of_address.h>
11 #include <linux/slab.h>
12 #include <linux/sys_soc.h>
13 #include <linux/platform_device.h>
14 #include <linux/arm-smccc.h>
19 #define IMX8MQ_SW_INFO_B1 0x40
20 #define IMX8MQ_SW_MAGIC_B1 0xff0055aa
22 #define IMX_SIP_GET_SOC_INFO 0xc2000006
24 #define OCOTP_UID_LOW 0x410
25 #define OCOTP_UID_HIGH 0x420
27 #define IMX8MP_OCOTP_UID_OFFSET 0x10
29 /* Same as ANADIG_DIGPROG_IMX7D */
30 #define ANADIG_DIGPROG_IMX8MM 0x800
32 struct imx8_soc_data
{
34 u32 (*soc_revision
)(struct device
*dev
);
39 #ifdef CONFIG_HAVE_ARM_SMCCC
40 static u32
imx8mq_soc_revision_from_atf(void)
42 struct arm_smccc_res res
;
44 arm_smccc_smc(IMX_SIP_GET_SOC_INFO
, 0, 0, 0, 0, 0, 0, 0, &res
);
46 if (res
.a0
== SMCCC_RET_NOT_SUPPORTED
)
52 static inline u32
imx8mq_soc_revision_from_atf(void) { return 0; };
55 static u32 __init
imx8mq_soc_revision(struct device
*dev
)
57 struct device_node
*np
;
58 void __iomem
*ocotp_base
;
62 np
= of_find_compatible_node(NULL
, NULL
, "fsl,imx8mq-ocotp");
66 ocotp_base
= of_iomap(np
, 0);
70 * SOC revision on older imx8mq is not available in fuses so query
71 * the value from ATF instead.
73 rev
= imx8mq_soc_revision_from_atf();
75 magic
= readl_relaxed(ocotp_base
+ IMX8MQ_SW_INFO_B1
);
76 if (magic
== IMX8MQ_SW_MAGIC_B1
)
83 ret
= nvmem_cell_read_u64(dev
, "soc_unique_id", &soc_uid
);
90 soc_uid
= readl_relaxed(ocotp_base
+ OCOTP_UID_HIGH
);
92 soc_uid
|= readl_relaxed(ocotp_base
+ OCOTP_UID_LOW
);
101 static void __init
imx8mm_soc_uid(void)
103 void __iomem
*ocotp_base
;
104 struct device_node
*np
;
105 u32 offset
= of_machine_is_compatible("fsl,imx8mp") ?
106 IMX8MP_OCOTP_UID_OFFSET
: 0;
108 np
= of_find_compatible_node(NULL
, NULL
, "fsl,imx8mm-ocotp");
112 ocotp_base
= of_iomap(np
, 0);
113 WARN_ON(!ocotp_base
);
115 soc_uid
= readl_relaxed(ocotp_base
+ OCOTP_UID_HIGH
+ offset
);
117 soc_uid
|= readl_relaxed(ocotp_base
+ OCOTP_UID_LOW
+ offset
);
123 static u32 __init
imx8mm_soc_revision(struct device
*dev
)
125 struct device_node
*np
;
126 void __iomem
*anatop_base
;
129 np
= of_find_compatible_node(NULL
, NULL
, "fsl,imx8mm-anatop");
133 anatop_base
= of_iomap(np
, 0);
134 WARN_ON(!anatop_base
);
136 rev
= readl_relaxed(anatop_base
+ ANADIG_DIGPROG_IMX8MM
);
138 iounmap(anatop_base
);
144 ret
= nvmem_cell_read_u64(dev
, "soc_unique_id", &soc_uid
);
154 static const struct imx8_soc_data imx8mq_soc_data
= {
156 .soc_revision
= imx8mq_soc_revision
,
159 static const struct imx8_soc_data imx8mm_soc_data
= {
161 .soc_revision
= imx8mm_soc_revision
,
164 static const struct imx8_soc_data imx8mn_soc_data
= {
166 .soc_revision
= imx8mm_soc_revision
,
169 static const struct imx8_soc_data imx8mp_soc_data
= {
171 .soc_revision
= imx8mm_soc_revision
,
174 static __maybe_unused
const struct of_device_id imx8_machine_match
[] = {
175 { .compatible
= "fsl,imx8mq", .data
= &imx8mq_soc_data
, },
176 { .compatible
= "fsl,imx8mm", .data
= &imx8mm_soc_data
, },
177 { .compatible
= "fsl,imx8mn", .data
= &imx8mn_soc_data
, },
178 { .compatible
= "fsl,imx8mp", .data
= &imx8mp_soc_data
, },
182 static __maybe_unused
const struct of_device_id imx8_soc_match
[] = {
183 { .compatible
= "fsl,imx8mq-soc", .data
= &imx8mq_soc_data
, },
184 { .compatible
= "fsl,imx8mm-soc", .data
= &imx8mm_soc_data
, },
185 { .compatible
= "fsl,imx8mn-soc", .data
= &imx8mn_soc_data
, },
186 { .compatible
= "fsl,imx8mp-soc", .data
= &imx8mp_soc_data
, },
190 #define imx8_revision(soc_rev) \
192 kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \
195 static int imx8_soc_info(struct platform_device
*pdev
)
197 struct soc_device_attribute
*soc_dev_attr
;
198 struct soc_device
*soc_dev
;
199 const struct of_device_id
*id
;
201 const struct imx8_soc_data
*data
;
204 soc_dev_attr
= kzalloc(sizeof(*soc_dev_attr
), GFP_KERNEL
);
208 soc_dev_attr
->family
= "Freescale i.MX";
210 ret
= of_property_read_string(of_root
, "model", &soc_dev_attr
->machine
);
215 id
= of_match_node(imx8_soc_match
, pdev
->dev
.of_node
);
217 id
= of_match_node(imx8_machine_match
, of_root
);
225 soc_dev_attr
->soc_id
= data
->name
;
226 if (data
->soc_revision
) {
228 soc_rev
= data
->soc_revision(&pdev
->dev
);
233 soc_rev
= data
->soc_revision(NULL
);
238 soc_dev_attr
->revision
= imx8_revision(soc_rev
);
239 if (!soc_dev_attr
->revision
) {
244 soc_dev_attr
->serial_number
= kasprintf(GFP_KERNEL
, "%016llX", soc_uid
);
245 if (!soc_dev_attr
->serial_number
) {
250 soc_dev
= soc_device_register(soc_dev_attr
);
251 if (IS_ERR(soc_dev
)) {
252 ret
= PTR_ERR(soc_dev
);
253 goto free_serial_number
;
256 pr_info("SoC: %s revision %s\n", soc_dev_attr
->soc_id
,
257 soc_dev_attr
->revision
);
259 if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT
))
260 platform_device_register_simple("imx-cpufreq-dt", -1, NULL
, 0);
265 kfree(soc_dev_attr
->serial_number
);
267 if (strcmp(soc_dev_attr
->revision
, "unknown"))
268 kfree(soc_dev_attr
->revision
);
274 /* Retain device_initcall is for backward compatibility with DTS. */
275 static int __init
imx8_soc_init(void)
277 if (of_find_matching_node_and_match(NULL
, imx8_soc_match
, NULL
))
280 return imx8_soc_info(NULL
);
282 device_initcall(imx8_soc_init
);
284 static struct platform_driver imx8_soc_info_driver
= {
285 .probe
= imx8_soc_info
,
287 .name
= "imx8_soc_info",
288 .of_match_table
= imx8_soc_match
,
292 module_platform_driver(imx8_soc_info_driver
);
293 MODULE_LICENSE("GPL v2");