drivers/soc/renesas/r8a7795-sysc.c

   1 /*
   2  * Renesas R-Car H3 System Controller
   3  *
   4  * Copyright (C) 2016 Glider bvba
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  */
  10
  11 #include <linux/bug.h>
  12 #include <linux/kernel.h>
  13
  14 #include <dt-bindings/power/r8a7795-sysc.h>
  15
  16 #include "rcar-sysc.h"
  17
  18 static const struct rcar_sysc_area r8a7795_areas[] __initconst = {
  19         { "always-on",      0, 0, R8A7795_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
  20         { "ca57-scu",   0x1c0, 0, R8A7795_PD_CA57_SCU,  R8A7795_PD_ALWAYS_ON,
  21           PD_SCU },
  22         { "ca57-cpu0",   0x80, 0, R8A7795_PD_CA57_CPU0, R8A7795_PD_CA57_SCU,
  23           PD_CPU_NOCR },
  24         { "ca57-cpu1",   0x80, 1, R8A7795_PD_CA57_CPU1, R8A7795_PD_CA57_SCU,
  25           PD_CPU_NOCR },
  26         { "ca57-cpu2",   0x80, 2, R8A7795_PD_CA57_CPU2, R8A7795_PD_CA57_SCU,
  27           PD_CPU_NOCR },
  28         { "ca57-cpu3",   0x80, 3, R8A7795_PD_CA57_CPU3, R8A7795_PD_CA57_SCU,
  29           PD_CPU_NOCR },
  30         { "ca53-scu",   0x140, 0, R8A7795_PD_CA53_SCU,  R8A7795_PD_ALWAYS_ON,
  31           PD_SCU },
  32         { "ca53-cpu0",  0x200, 0, R8A7795_PD_CA53_CPU0, R8A7795_PD_CA53_SCU,
  33           PD_CPU_NOCR },
  34         { "ca53-cpu1",  0x200, 1, R8A7795_PD_CA53_CPU1, R8A7795_PD_CA53_SCU,
  35           PD_CPU_NOCR },
  36         { "ca53-cpu2",  0x200, 2, R8A7795_PD_CA53_CPU2, R8A7795_PD_CA53_SCU,
  37           PD_CPU_NOCR },
  38         { "ca53-cpu3",  0x200, 3, R8A7795_PD_CA53_CPU3, R8A7795_PD_CA53_SCU,
  39           PD_CPU_NOCR },
  40         { "a3vp",       0x340, 0, R8A7795_PD_A3VP,      R8A7795_PD_ALWAYS_ON },
  41         { "cr7",        0x240, 0, R8A7795_PD_CR7,       R8A7795_PD_ALWAYS_ON },
  42         { "a3vc",       0x380, 0, R8A7795_PD_A3VC,      R8A7795_PD_ALWAYS_ON },
  43         { "a2vc0",      0x3c0, 0, R8A7795_PD_A2VC0,     R8A7795_PD_A3VC },
  44         { "a2vc1",      0x3c0, 1, R8A7795_PD_A2VC1,     R8A7795_PD_A3VC },
  45         { "3dg-a",      0x100, 0, R8A7795_PD_3DG_A,     R8A7795_PD_ALWAYS_ON },
  46         { "3dg-b",      0x100, 1, R8A7795_PD_3DG_B,     R8A7795_PD_3DG_A },
  47         { "3dg-c",      0x100, 2, R8A7795_PD_3DG_C,     R8A7795_PD_3DG_B },
  48         { "3dg-d",      0x100, 3, R8A7795_PD_3DG_D,     R8A7795_PD_3DG_C },
  49         { "3dg-e",      0x100, 4, R8A7795_PD_3DG_E,     R8A7795_PD_3DG_D },
  50         { "a3ir",       0x180, 0, R8A7795_PD_A3IR,      R8A7795_PD_ALWAYS_ON },
  51 };
  52
  53 const struct rcar_sysc_info r8a7795_sysc_info __initconst = {
  54         .areas = r8a7795_areas,
  55         .num_areas = ARRAY_SIZE(r8a7795_areas),
  56 };