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[mirror_ubuntu-hirsute-kernel.git] / drivers / spi / spi-nuc900.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2009 Nuvoton technology.
4 * Wan ZongShun <mcuos.com@gmail.com>
5 */
6
7 #include <linux/module.h>
8 #include <linux/spinlock.h>
9 #include <linux/interrupt.h>
10 #include <linux/delay.h>
11 #include <linux/errno.h>
12 #include <linux/err.h>
13 #include <linux/clk.h>
14 #include <linux/device.h>
15 #include <linux/platform_device.h>
16 #include <linux/gpio.h>
17 #include <linux/io.h>
18 #include <linux/slab.h>
19
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
22
23 #include <linux/platform_data/spi-nuc900.h>
24
25 /* usi registers offset */
26 #define USI_CNT 0x00
27 #define USI_DIV 0x04
28 #define USI_SSR 0x08
29 #define USI_RX0 0x10
30 #define USI_TX0 0x10
31
32 /* usi register bit */
33 #define ENINT (0x01 << 17)
34 #define ENFLG (0x01 << 16)
35 #define SLEEP (0x0f << 12)
36 #define TXNUM (0x03 << 8)
37 #define TXBITLEN (0x1f << 3)
38 #define TXNEG (0x01 << 2)
39 #define RXNEG (0x01 << 1)
40 #define LSB (0x01 << 10)
41 #define SELECTLEV (0x01 << 2)
42 #define SELECTPOL (0x01 << 31)
43 #define SELECTSLAVE 0x01
44 #define GOBUSY 0x01
45
46 struct nuc900_spi {
47 struct spi_bitbang bitbang;
48 struct completion done;
49 void __iomem *regs;
50 int irq;
51 int len;
52 int count;
53 const unsigned char *tx;
54 unsigned char *rx;
55 struct clk *clk;
56 struct spi_master *master;
57 struct nuc900_spi_info *pdata;
58 spinlock_t lock;
59 };
60
61 static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
62 {
63 return spi_master_get_devdata(sdev->master);
64 }
65
66 static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
67 {
68 struct nuc900_spi *hw = to_hw(spi);
69 unsigned int val;
70 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
71 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
72 unsigned long flags;
73
74 spin_lock_irqsave(&hw->lock, flags);
75
76 val = __raw_readl(hw->regs + USI_SSR);
77
78 if (!cs)
79 val &= ~SELECTLEV;
80 else
81 val |= SELECTLEV;
82
83 if (!ssr)
84 val &= ~SELECTSLAVE;
85 else
86 val |= SELECTSLAVE;
87
88 __raw_writel(val, hw->regs + USI_SSR);
89
90 val = __raw_readl(hw->regs + USI_CNT);
91
92 if (!cpol)
93 val &= ~SELECTPOL;
94 else
95 val |= SELECTPOL;
96
97 __raw_writel(val, hw->regs + USI_CNT);
98
99 spin_unlock_irqrestore(&hw->lock, flags);
100 }
101
102 static void nuc900_spi_chipsel(struct spi_device *spi, int value)
103 {
104 switch (value) {
105 case BITBANG_CS_INACTIVE:
106 nuc900_slave_select(spi, 0);
107 break;
108
109 case BITBANG_CS_ACTIVE:
110 nuc900_slave_select(spi, 1);
111 break;
112 }
113 }
114
115 static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, unsigned int txnum)
116 {
117 unsigned int val;
118 unsigned long flags;
119
120 spin_lock_irqsave(&hw->lock, flags);
121
122 val = __raw_readl(hw->regs + USI_CNT) & ~TXNUM;
123
124 if (txnum)
125 val |= txnum << 0x08;
126
127 __raw_writel(val, hw->regs + USI_CNT);
128
129 spin_unlock_irqrestore(&hw->lock, flags);
130
131 }
132
133 static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
134 unsigned int txbitlen)
135 {
136 unsigned int val;
137 unsigned long flags;
138
139 spin_lock_irqsave(&hw->lock, flags);
140
141 val = __raw_readl(hw->regs + USI_CNT) & ~TXBITLEN;
142
143 val |= (txbitlen << 0x03);
144
145 __raw_writel(val, hw->regs + USI_CNT);
146
147 spin_unlock_irqrestore(&hw->lock, flags);
148 }
149
150 static void nuc900_spi_gobusy(struct nuc900_spi *hw)
151 {
152 unsigned int val;
153 unsigned long flags;
154
155 spin_lock_irqsave(&hw->lock, flags);
156
157 val = __raw_readl(hw->regs + USI_CNT);
158
159 val |= GOBUSY;
160
161 __raw_writel(val, hw->regs + USI_CNT);
162
163 spin_unlock_irqrestore(&hw->lock, flags);
164 }
165
166 static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
167 {
168 return hw->tx ? hw->tx[count] : 0;
169 }
170
171 static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
172 {
173 struct nuc900_spi *hw = to_hw(spi);
174
175 hw->tx = t->tx_buf;
176 hw->rx = t->rx_buf;
177 hw->len = t->len;
178 hw->count = 0;
179
180 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
181
182 nuc900_spi_gobusy(hw);
183
184 wait_for_completion(&hw->done);
185
186 return hw->count;
187 }
188
189 static irqreturn_t nuc900_spi_irq(int irq, void *dev)
190 {
191 struct nuc900_spi *hw = dev;
192 unsigned int status;
193 unsigned int count = hw->count;
194
195 status = __raw_readl(hw->regs + USI_CNT);
196 __raw_writel(status, hw->regs + USI_CNT);
197
198 if (status & ENFLG) {
199 hw->count++;
200
201 if (hw->rx)
202 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
203 count++;
204
205 if (count < hw->len) {
206 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
207 nuc900_spi_gobusy(hw);
208 } else {
209 complete(&hw->done);
210 }
211
212 return IRQ_HANDLED;
213 }
214
215 complete(&hw->done);
216 return IRQ_HANDLED;
217 }
218
219 static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
220 {
221 unsigned int val;
222 unsigned long flags;
223
224 spin_lock_irqsave(&hw->lock, flags);
225
226 val = __raw_readl(hw->regs + USI_CNT);
227
228 if (edge)
229 val |= TXNEG;
230 else
231 val &= ~TXNEG;
232 __raw_writel(val, hw->regs + USI_CNT);
233
234 spin_unlock_irqrestore(&hw->lock, flags);
235 }
236
237 static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
238 {
239 unsigned int val;
240 unsigned long flags;
241
242 spin_lock_irqsave(&hw->lock, flags);
243
244 val = __raw_readl(hw->regs + USI_CNT);
245
246 if (edge)
247 val |= RXNEG;
248 else
249 val &= ~RXNEG;
250 __raw_writel(val, hw->regs + USI_CNT);
251
252 spin_unlock_irqrestore(&hw->lock, flags);
253 }
254
255 static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
256 {
257 unsigned int val;
258 unsigned long flags;
259
260 spin_lock_irqsave(&hw->lock, flags);
261
262 val = __raw_readl(hw->regs + USI_CNT);
263
264 if (lsb)
265 val |= LSB;
266 else
267 val &= ~LSB;
268 __raw_writel(val, hw->regs + USI_CNT);
269
270 spin_unlock_irqrestore(&hw->lock, flags);
271 }
272
273 static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
274 {
275 unsigned int val;
276 unsigned long flags;
277
278 spin_lock_irqsave(&hw->lock, flags);
279
280 val = __raw_readl(hw->regs + USI_CNT) & ~SLEEP;
281
282 if (sleep)
283 val |= (sleep << 12);
284
285 __raw_writel(val, hw->regs + USI_CNT);
286
287 spin_unlock_irqrestore(&hw->lock, flags);
288 }
289
290 static void nuc900_enable_int(struct nuc900_spi *hw)
291 {
292 unsigned int val;
293 unsigned long flags;
294
295 spin_lock_irqsave(&hw->lock, flags);
296
297 val = __raw_readl(hw->regs + USI_CNT);
298
299 val |= ENINT;
300
301 __raw_writel(val, hw->regs + USI_CNT);
302
303 spin_unlock_irqrestore(&hw->lock, flags);
304 }
305
306 static void nuc900_set_divider(struct nuc900_spi *hw)
307 {
308 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
309 }
310
311 static void nuc900_init_spi(struct nuc900_spi *hw)
312 {
313 clk_enable(hw->clk);
314 spin_lock_init(&hw->lock);
315
316 nuc900_tx_edge(hw, hw->pdata->txneg);
317 nuc900_rx_edge(hw, hw->pdata->rxneg);
318 nuc900_send_first(hw, hw->pdata->lsb);
319 nuc900_set_sleep(hw, hw->pdata->sleep);
320 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
321 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
322 nuc900_set_divider(hw);
323 nuc900_enable_int(hw);
324 }
325
326 static int nuc900_spi_probe(struct platform_device *pdev)
327 {
328 struct nuc900_spi *hw;
329 struct spi_master *master;
330 struct resource *res;
331 int err = 0;
332
333 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
334 if (master == NULL) {
335 dev_err(&pdev->dev, "No memory for spi_master\n");
336 return -ENOMEM;
337 }
338
339 hw = spi_master_get_devdata(master);
340 hw->master = master;
341 hw->pdata = dev_get_platdata(&pdev->dev);
342
343 if (hw->pdata == NULL) {
344 dev_err(&pdev->dev, "No platform data supplied\n");
345 err = -ENOENT;
346 goto err_pdata;
347 }
348
349 platform_set_drvdata(pdev, hw);
350 init_completion(&hw->done);
351
352 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
353 if (hw->pdata->lsb)
354 master->mode_bits |= SPI_LSB_FIRST;
355 master->num_chipselect = hw->pdata->num_cs;
356 master->bus_num = hw->pdata->bus_num;
357 hw->bitbang.master = hw->master;
358 hw->bitbang.chipselect = nuc900_spi_chipsel;
359 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
360
361 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
362 hw->regs = devm_ioremap_resource(&pdev->dev, res);
363 if (IS_ERR(hw->regs)) {
364 err = PTR_ERR(hw->regs);
365 goto err_pdata;
366 }
367
368 hw->irq = platform_get_irq(pdev, 0);
369 if (hw->irq < 0) {
370 dev_err(&pdev->dev, "No IRQ specified\n");
371 err = -ENOENT;
372 goto err_pdata;
373 }
374
375 err = devm_request_irq(&pdev->dev, hw->irq, nuc900_spi_irq, 0,
376 pdev->name, hw);
377 if (err) {
378 dev_err(&pdev->dev, "Cannot claim IRQ\n");
379 goto err_pdata;
380 }
381
382 hw->clk = devm_clk_get(&pdev->dev, "spi");
383 if (IS_ERR(hw->clk)) {
384 dev_err(&pdev->dev, "No clock for device\n");
385 err = PTR_ERR(hw->clk);
386 goto err_pdata;
387 }
388
389 mfp_set_groupg(&pdev->dev, NULL);
390 nuc900_init_spi(hw);
391
392 err = spi_bitbang_start(&hw->bitbang);
393 if (err) {
394 dev_err(&pdev->dev, "Failed to register SPI master\n");
395 goto err_register;
396 }
397
398 return 0;
399
400 err_register:
401 clk_disable(hw->clk);
402 err_pdata:
403 spi_master_put(hw->master);
404 return err;
405 }
406
407 static int nuc900_spi_remove(struct platform_device *dev)
408 {
409 struct nuc900_spi *hw = platform_get_drvdata(dev);
410
411 spi_bitbang_stop(&hw->bitbang);
412 clk_disable(hw->clk);
413 spi_master_put(hw->master);
414 return 0;
415 }
416
417 static struct platform_driver nuc900_spi_driver = {
418 .probe = nuc900_spi_probe,
419 .remove = nuc900_spi_remove,
420 .driver = {
421 .name = "nuc900-spi",
422 },
423 };
424 module_platform_driver(nuc900_spi_driver);
425
426 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
427 MODULE_DESCRIPTION("nuc900 spi driver!");
428 MODULE_LICENSE("GPL");
429 MODULE_ALIAS("platform:nuc900-spi");