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1 /*
2 * Copyright (c) 2009 Nuvoton technology.
3 * Wan ZongShun <mcuos.com@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 */
10
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/workqueue.h>
15 #include <linux/interrupt.h>
16 #include <linux/delay.h>
17 #include <linux/errno.h>
18 #include <linux/err.h>
19 #include <linux/clk.h>
20 #include <linux/device.h>
21 #include <linux/platform_device.h>
22 #include <linux/gpio.h>
23 #include <linux/io.h>
24 #include <linux/slab.h>
25
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi_bitbang.h>
28
29 #include <linux/platform_data/spi-nuc900.h>
30
31 /* usi registers offset */
32 #define USI_CNT 0x00
33 #define USI_DIV 0x04
34 #define USI_SSR 0x08
35 #define USI_RX0 0x10
36 #define USI_TX0 0x10
37
38 /* usi register bit */
39 #define ENINT (0x01 << 17)
40 #define ENFLG (0x01 << 16)
41 #define TXNUM (0x03 << 8)
42 #define TXNEG (0x01 << 2)
43 #define RXNEG (0x01 << 1)
44 #define LSB (0x01 << 10)
45 #define SELECTLEV (0x01 << 2)
46 #define SELECTPOL (0x01 << 31)
47 #define SELECTSLAVE 0x01
48 #define GOBUSY 0x01
49
50 struct nuc900_spi {
51 struct spi_bitbang bitbang;
52 struct completion done;
53 void __iomem *regs;
54 int irq;
55 int len;
56 int count;
57 const unsigned char *tx;
58 unsigned char *rx;
59 struct clk *clk;
60 struct spi_master *master;
61 struct spi_device *curdev;
62 struct device *dev;
63 struct nuc900_spi_info *pdata;
64 spinlock_t lock;
65 struct resource *res;
66 };
67
68 static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
69 {
70 return spi_master_get_devdata(sdev->master);
71 }
72
73 static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
74 {
75 struct nuc900_spi *hw = to_hw(spi);
76 unsigned int val;
77 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
78 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
79 unsigned long flags;
80
81 spin_lock_irqsave(&hw->lock, flags);
82
83 val = __raw_readl(hw->regs + USI_SSR);
84
85 if (!cs)
86 val &= ~SELECTLEV;
87 else
88 val |= SELECTLEV;
89
90 if (!ssr)
91 val &= ~SELECTSLAVE;
92 else
93 val |= SELECTSLAVE;
94
95 __raw_writel(val, hw->regs + USI_SSR);
96
97 val = __raw_readl(hw->regs + USI_CNT);
98
99 if (!cpol)
100 val &= ~SELECTPOL;
101 else
102 val |= SELECTPOL;
103
104 __raw_writel(val, hw->regs + USI_CNT);
105
106 spin_unlock_irqrestore(&hw->lock, flags);
107 }
108
109 static void nuc900_spi_chipsel(struct spi_device *spi, int value)
110 {
111 switch (value) {
112 case BITBANG_CS_INACTIVE:
113 nuc900_slave_select(spi, 0);
114 break;
115
116 case BITBANG_CS_ACTIVE:
117 nuc900_slave_select(spi, 1);
118 break;
119 }
120 }
121
122 static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
123 unsigned int txnum)
124 {
125 unsigned int val;
126 unsigned long flags;
127
128 spin_lock_irqsave(&hw->lock, flags);
129
130 val = __raw_readl(hw->regs + USI_CNT);
131
132 if (!txnum)
133 val &= ~TXNUM;
134 else
135 val |= txnum << 0x08;
136
137 __raw_writel(val, hw->regs + USI_CNT);
138
139 spin_unlock_irqrestore(&hw->lock, flags);
140
141 }
142
143 static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
144 unsigned int txbitlen)
145 {
146 unsigned int val;
147 unsigned long flags;
148
149 spin_lock_irqsave(&hw->lock, flags);
150
151 val = __raw_readl(hw->regs + USI_CNT);
152
153 val |= (txbitlen << 0x03);
154
155 __raw_writel(val, hw->regs + USI_CNT);
156
157 spin_unlock_irqrestore(&hw->lock, flags);
158 }
159
160 static void nuc900_spi_gobusy(struct nuc900_spi *hw)
161 {
162 unsigned int val;
163 unsigned long flags;
164
165 spin_lock_irqsave(&hw->lock, flags);
166
167 val = __raw_readl(hw->regs + USI_CNT);
168
169 val |= GOBUSY;
170
171 __raw_writel(val, hw->regs + USI_CNT);
172
173 spin_unlock_irqrestore(&hw->lock, flags);
174 }
175
176 static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
177 {
178 return hw->tx ? hw->tx[count] : 0;
179 }
180
181 static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
182 {
183 struct nuc900_spi *hw = to_hw(spi);
184
185 hw->tx = t->tx_buf;
186 hw->rx = t->rx_buf;
187 hw->len = t->len;
188 hw->count = 0;
189
190 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
191
192 nuc900_spi_gobusy(hw);
193
194 wait_for_completion(&hw->done);
195
196 return hw->count;
197 }
198
199 static irqreturn_t nuc900_spi_irq(int irq, void *dev)
200 {
201 struct nuc900_spi *hw = dev;
202 unsigned int status;
203 unsigned int count = hw->count;
204
205 status = __raw_readl(hw->regs + USI_CNT);
206 __raw_writel(status, hw->regs + USI_CNT);
207
208 if (status & ENFLG) {
209 hw->count++;
210
211 if (hw->rx)
212 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
213 count++;
214
215 if (count < hw->len) {
216 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
217 nuc900_spi_gobusy(hw);
218 } else {
219 complete(&hw->done);
220 }
221
222 return IRQ_HANDLED;
223 }
224
225 complete(&hw->done);
226 return IRQ_HANDLED;
227 }
228
229 static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
230 {
231 unsigned int val;
232 unsigned long flags;
233
234 spin_lock_irqsave(&hw->lock, flags);
235
236 val = __raw_readl(hw->regs + USI_CNT);
237
238 if (edge)
239 val |= TXNEG;
240 else
241 val &= ~TXNEG;
242 __raw_writel(val, hw->regs + USI_CNT);
243
244 spin_unlock_irqrestore(&hw->lock, flags);
245 }
246
247 static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
248 {
249 unsigned int val;
250 unsigned long flags;
251
252 spin_lock_irqsave(&hw->lock, flags);
253
254 val = __raw_readl(hw->regs + USI_CNT);
255
256 if (edge)
257 val |= RXNEG;
258 else
259 val &= ~RXNEG;
260 __raw_writel(val, hw->regs + USI_CNT);
261
262 spin_unlock_irqrestore(&hw->lock, flags);
263 }
264
265 static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
266 {
267 unsigned int val;
268 unsigned long flags;
269
270 spin_lock_irqsave(&hw->lock, flags);
271
272 val = __raw_readl(hw->regs + USI_CNT);
273
274 if (lsb)
275 val |= LSB;
276 else
277 val &= ~LSB;
278 __raw_writel(val, hw->regs + USI_CNT);
279
280 spin_unlock_irqrestore(&hw->lock, flags);
281 }
282
283 static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
284 {
285 unsigned int val;
286 unsigned long flags;
287
288 spin_lock_irqsave(&hw->lock, flags);
289
290 val = __raw_readl(hw->regs + USI_CNT);
291
292 if (sleep)
293 val |= (sleep << 12);
294 else
295 val &= ~(0x0f << 12);
296 __raw_writel(val, hw->regs + USI_CNT);
297
298 spin_unlock_irqrestore(&hw->lock, flags);
299 }
300
301 static void nuc900_enable_int(struct nuc900_spi *hw)
302 {
303 unsigned int val;
304 unsigned long flags;
305
306 spin_lock_irqsave(&hw->lock, flags);
307
308 val = __raw_readl(hw->regs + USI_CNT);
309
310 val |= ENINT;
311
312 __raw_writel(val, hw->regs + USI_CNT);
313
314 spin_unlock_irqrestore(&hw->lock, flags);
315 }
316
317 static void nuc900_set_divider(struct nuc900_spi *hw)
318 {
319 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
320 }
321
322 static void nuc900_init_spi(struct nuc900_spi *hw)
323 {
324 clk_enable(hw->clk);
325 spin_lock_init(&hw->lock);
326
327 nuc900_tx_edge(hw, hw->pdata->txneg);
328 nuc900_rx_edge(hw, hw->pdata->rxneg);
329 nuc900_send_first(hw, hw->pdata->lsb);
330 nuc900_set_sleep(hw, hw->pdata->sleep);
331 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
332 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
333 nuc900_set_divider(hw);
334 nuc900_enable_int(hw);
335 }
336
337 static int nuc900_spi_probe(struct platform_device *pdev)
338 {
339 struct nuc900_spi *hw;
340 struct spi_master *master;
341 int err = 0;
342
343 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
344 if (master == NULL) {
345 dev_err(&pdev->dev, "No memory for spi_master\n");
346 return -ENOMEM;
347 }
348
349 hw = spi_master_get_devdata(master);
350 hw->master = master;
351 hw->pdata = dev_get_platdata(&pdev->dev);
352 hw->dev = &pdev->dev;
353
354 if (hw->pdata == NULL) {
355 dev_err(&pdev->dev, "No platform data supplied\n");
356 err = -ENOENT;
357 goto err_pdata;
358 }
359
360 platform_set_drvdata(pdev, hw);
361 init_completion(&hw->done);
362
363 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
364 master->num_chipselect = hw->pdata->num_cs;
365 master->bus_num = hw->pdata->bus_num;
366 hw->bitbang.master = hw->master;
367 hw->bitbang.chipselect = nuc900_spi_chipsel;
368 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
369
370 hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
371 hw->regs = devm_ioremap_resource(&pdev->dev, hw->res);
372 if (IS_ERR(hw->regs)) {
373 err = PTR_ERR(hw->regs);
374 goto err_pdata;
375 }
376
377 hw->irq = platform_get_irq(pdev, 0);
378 if (hw->irq < 0) {
379 dev_err(&pdev->dev, "No IRQ specified\n");
380 err = -ENOENT;
381 goto err_pdata;
382 }
383
384 err = devm_request_irq(&pdev->dev, hw->irq, nuc900_spi_irq, 0,
385 pdev->name, hw);
386 if (err) {
387 dev_err(&pdev->dev, "Cannot claim IRQ\n");
388 goto err_pdata;
389 }
390
391 hw->clk = devm_clk_get(&pdev->dev, "spi");
392 if (IS_ERR(hw->clk)) {
393 dev_err(&pdev->dev, "No clock for device\n");
394 err = PTR_ERR(hw->clk);
395 goto err_pdata;
396 }
397
398 mfp_set_groupg(&pdev->dev, NULL);
399 nuc900_init_spi(hw);
400
401 err = spi_bitbang_start(&hw->bitbang);
402 if (err) {
403 dev_err(&pdev->dev, "Failed to register SPI master\n");
404 goto err_register;
405 }
406
407 return 0;
408
409 err_register:
410 clk_disable(hw->clk);
411 err_pdata:
412 spi_master_put(hw->master);
413 return err;
414 }
415
416 static int nuc900_spi_remove(struct platform_device *dev)
417 {
418 struct nuc900_spi *hw = platform_get_drvdata(dev);
419
420 spi_bitbang_stop(&hw->bitbang);
421 clk_disable(hw->clk);
422 spi_master_put(hw->master);
423 return 0;
424 }
425
426 static struct platform_driver nuc900_spi_driver = {
427 .probe = nuc900_spi_probe,
428 .remove = nuc900_spi_remove,
429 .driver = {
430 .name = "nuc900-spi",
431 .owner = THIS_MODULE,
432 },
433 };
434 module_platform_driver(nuc900_spi_driver);
435
436 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
437 MODULE_DESCRIPTION("nuc900 spi driver!");
438 MODULE_LICENSE("GPL");
439 MODULE_ALIAS("platform:nuc900-spi");