drivers/staging/bcm/target_params.h

   1 #ifndef TARGET_PARAMS_H
   2 #define TARGET_PARAMS_H
   3
   4 struct bcm_target_params {
   5         u32 m_u32CfgVersion;
   6         u32 m_u32CenterFrequency;
   7         u32 m_u32BandAScan;
   8         u32 m_u32BandBScan;
   9         u32 m_u32BandCScan;
  10         u32 m_u32ErtpsOptions;
  11         u32 m_u32PHSEnable;
  12         u32 m_u32HoEnable;
  13         u32 m_u32HoReserved1;
  14         u32 m_u32HoReserved2;
  15         u32 m_u32MimoEnable;
  16         u32 m_u32SecurityEnable;
  17         u32 m_u32PowerSavingModesEnable; /* bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable */
  18         /* PowerSaving Mode Options:
  19          * bit 0 = 1: CPE mode - to keep pcmcia if alive;
  20          * bit 1 = 1: CINR reporting in Idlemode Msg
  21          * bit 2 = 1: Default PSC Enable in sleepmode
  22          */
  23         u32 m_u32PowerSavingModeOptions;
  24         u32 m_u32ArqEnable;
  25         /* From Version #3, the HARQ section renamed as general */
  26         u32 m_u32HarqEnable;
  27         u32 m_u32EEPROMFlag;
  28         /* BINARY TYPE - 4th MSByte: Interface Type -  3rd MSByte: Vendor Type - 2nd MSByte
  29          * Unused - LSByte
  30          */
  31         u32 m_u32Customize;
  32         u32 m_u32ConfigBW;  /* In Hz */
  33         u32 m_u32ShutDownInitThresholdTimer;
  34         u32 m_u32RadioParameter;
  35         u32 m_u32PhyParameter1;
  36         u32 m_u32PhyParameter2;
  37         u32 m_u32PhyParameter3;
  38         u32 m_u32TestOptions; /* in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17  test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack */
  39         u32 m_u32MaxMACDataperDLFrame;
  40         u32 m_u32MaxMACDataperULFrame;
  41         u32 m_u32Corr2MacFlags;
  42         u32 HostDrvrConfig1;
  43         u32 HostDrvrConfig2;
  44         u32 HostDrvrConfig3;
  45         u32 HostDrvrConfig4;
  46         u32 HostDrvrConfig5;
  47         u32 HostDrvrConfig6;
  48         u32 m_u32SegmentedPUSCenable;
  49         /* removed SHUT down related 'unused' params from here to sync 4.x and 5.x CFG files..
  50          * BAMC Related Parameters
  51          * Bit 0-15 Band AMC signaling configuration: Bit 1 = 1 \96 Enable Band AMC signaling.
  52          * bit 16-31 Band AMC Data configuration: Bit 16 = 1 \96 Band AMC 2x3 support.
  53          */
  54         u32 m_u32BandAMCEnable;
  55 };
  56
  57 #endif