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Staging: Add initial release of brcm80211 - Broadcom 802.11n wireless LAN driver.
[mirror_ubuntu-artful-kernel.git] / drivers / staging / brcm80211 / sys / wlc_rate.c
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <wlc_cfg.h>
18 #include <typedefs.h>
19 #include <osl.h>
20 #include <bcmutils.h>
21 #include <siutils.h>
22 #include <bcmendian.h>
23 #include <wlioctl.h>
24
25 #include <proto/802.11.h>
26 #include <d11.h>
27 #include <wlc_rate.h>
28 #include <wl_dbg.h>
29 #include <wlc_pub.h>
30
31 /* Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate value */
32 const uint8 rate_info[WLC_MAXRATE + 1] = {
33 /* 0 1 2 3 4 5 6 7 8 9 */
34 /* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
35 /* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00,
36 /* 20 */ 0x00, 0x00, 0x6e, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00,
37 /* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00, 0x00, 0x00,
38 /* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00,
39 /* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
40 /* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
41 /* 70 */ 0x00, 0x00, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
42 /* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
43 /* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00,
44 /* 100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8c
45 };
46
47 /* rates are in units of Kbps */
48 const mcs_info_t mcs_table[MCS_TABLE_SIZE] = {
49 /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */
50 {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00,
51 WLC_RATE_6M},
52 /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */
53 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08,
54 WLC_RATE_12M},
55 /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */
56 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A,
57 WLC_RATE_18M},
58 /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */
59 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10,
60 WLC_RATE_24M},
61 /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */
62 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12,
63 WLC_RATE_36M},
64 /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */
65 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19,
66 WLC_RATE_48M},
67 /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */
68 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A,
69 WLC_RATE_54M},
70 /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */
71 {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C,
72 WLC_RATE_54M},
73 /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */
74 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40,
75 WLC_RATE_6M},
76 /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */
77 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48,
78 WLC_RATE_12M},
79 /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */
80 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A,
81 WLC_RATE_18M},
82 /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */
83 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50,
84 WLC_RATE_24M},
85 /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */
86 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52,
87 WLC_RATE_36M},
88 /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */
89 {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59,
90 WLC_RATE_48M},
91 /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */
92 {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A,
93 WLC_RATE_54M},
94 /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */
95 {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C,
96 WLC_RATE_54M},
97 /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */
98 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80,
99 WLC_RATE_6M},
100 /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */
101 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88,
102 WLC_RATE_12M},
103 /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */
104 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A,
105 WLC_RATE_18M},
106 /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */
107 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90,
108 WLC_RATE_24M},
109 /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */
110 {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92,
111 WLC_RATE_36M},
112 /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */
113 {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99,
114 WLC_RATE_48M},
115 /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */
116 {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A,
117 WLC_RATE_54M},
118 /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */
119 {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B,
120 WLC_RATE_54M},
121 /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */
122 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0,
123 WLC_RATE_6M},
124 /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */
125 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8,
126 WLC_RATE_12M},
127 /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */
128 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA,
129 WLC_RATE_18M},
130 /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */
131 {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0,
132 WLC_RATE_24M},
133 /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */
134 {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2,
135 WLC_RATE_36M},
136 /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */
137 {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9,
138 WLC_RATE_48M},
139 /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */
140 {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA,
141 WLC_RATE_54M},
142 /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */
143 {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB,
144 WLC_RATE_54M},
145 /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */
146 {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, WLC_RATE_6M},
147 };
148
149 /* phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams
150 * Number of spatial streams: always 1
151 * other fields: refer to table 78 of section 17.3.2.2 of the original .11a standard
152 */
153 typedef struct legacy_phycfg {
154 uint32 rate_ofdm; /* ofdm mac rate */
155 uint8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */
156 } legacy_phycfg_t;
157
158 #define LEGACY_PHYCFG_TABLE_SIZE 12 /* Number of legacy_rate_cfg entries in the table */
159
160 /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */
161 /* Eventually MIMOPHY would also be converted to this format */
162 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
163 static const legacy_phycfg_t legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = {
164 {WLC_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */
165 {WLC_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */
166 {WLC_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */
167 {WLC_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */
168 {WLC_RATE_6M, 0x00}, /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */
169 {WLC_RATE_9M, 0x02}, /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */
170 {WLC_RATE_12M, 0x08}, /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */
171 {WLC_RATE_18M, 0x0A}, /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */
172 {WLC_RATE_24M, 0x10}, /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */
173 {WLC_RATE_36M, 0x12}, /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */
174 {WLC_RATE_48M, 0x19}, /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */
175 {WLC_RATE_54M, 0x1A}, /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */
176 };
177
178 /* Hardware rates (also encodes default basic rates) */
179
180 const wlc_rateset_t cck_ofdm_mimo_rates = {
181 12,
182 { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */
183 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
184 0x6c},
185 0x00,
186 {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
187 0x00, 0x00, 0x00, 0x00}
188 };
189
190 const wlc_rateset_t ofdm_mimo_rates = {
191 8,
192 { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
193 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
194 0x00,
195 {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
196 0x00, 0x00, 0x00, 0x00}
197 };
198
199 /* Default ratesets that include MCS32 for 40BW channels */
200 const wlc_rateset_t cck_ofdm_40bw_mimo_rates = {
201 12,
202 { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */
203 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
204 0x6c},
205 0x00,
206 {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
207 0x00, 0x00, 0x00, 0x00}
208 };
209
210 const wlc_rateset_t ofdm_40bw_mimo_rates = {
211 8,
212 { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
213 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
214 0x00,
215 {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
216 0x00, 0x00, 0x00, 0x00}
217 };
218
219 const wlc_rateset_t cck_ofdm_rates = {
220 12,
221 { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */
222 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
223 0x6c},
224 0x00,
225 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
226 0x00, 0x00, 0x00, 0x00}
227 };
228
229 const wlc_rateset_t gphy_legacy_rates = {
230 4,
231 { /* 1b, 2b, 5.5b, 11b Mbps */
232 0x82, 0x84, 0x8b, 0x96},
233 0x00,
234 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
235 0x00, 0x00, 0x00, 0x00}
236 };
237
238 const wlc_rateset_t ofdm_rates = {
239 8,
240 { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
241 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
242 0x00,
243 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
244 0x00, 0x00, 0x00, 0x00}
245 };
246
247 const wlc_rateset_t cck_rates = {
248 4,
249 { /* 1b, 2b, 5.5, 11 Mbps */
250 0x82, 0x84, 0x0b, 0x16},
251 0x00,
252 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
253 0x00, 0x00, 0x00, 0x00}
254 };
255
256 static bool wlc_rateset_valid(wlc_rateset_t * rs, bool check_brate);
257
258 /* check if rateset is valid.
259 * if check_brate is true, rateset without a basic rate is considered NOT valid.
260 */
261 static bool wlc_rateset_valid(wlc_rateset_t * rs, bool check_brate)
262 {
263 uint idx;
264
265 if (!rs->count)
266 return FALSE;
267
268 if (!check_brate)
269 return TRUE;
270
271 /* error if no basic rates */
272 for (idx = 0; idx < rs->count; idx++) {
273 if (rs->rates[idx] & WLC_RATE_FLAG)
274 return TRUE;
275 }
276 return FALSE;
277 }
278
279 void wlc_rateset_mcs_upd(wlc_rateset_t * rs, uint8 txstreams)
280 {
281 int i;
282 for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++)
283 rs->mcs[i] = 0;
284 }
285
286 /* filter based on hardware rateset, and sort filtered rateset with basic bit(s) preserved,
287 * and check if resulting rateset is valid.
288 */
289 bool
290 wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t * rs,
291 const wlc_rateset_t * hw_rs,
292 bool check_brate, uint8 txstreams)
293 {
294 uint8 rateset[WLC_MAXRATE + 1];
295 uint8 r;
296 uint count;
297 uint i;
298
299 bzero(rateset, sizeof(rateset));
300 count = rs->count;
301
302 for (i = 0; i < count; i++) {
303 /* mask off "basic rate" bit, WLC_RATE_FLAG */
304 r = (int)rs->rates[i] & RATE_MASK;
305 if ((r > WLC_MAXRATE) || (rate_info[r] == 0)) {
306 continue;
307 }
308 rateset[r] = rs->rates[i]; /* preserve basic bit! */
309 }
310
311 /* fill out the rates in order, looking at only supported rates */
312 count = 0;
313 for (i = 0; i < hw_rs->count; i++) {
314 r = hw_rs->rates[i] & RATE_MASK;
315 ASSERT(r <= WLC_MAXRATE);
316 if (rateset[r])
317 rs->rates[count++] = rateset[r];
318 }
319
320 rs->count = count;
321
322 /* only set the mcs rate bit if the equivalent hw mcs bit is set */
323 for (i = 0; i < MCSSET_LEN; i++)
324 rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]);
325
326 if (wlc_rateset_valid(rs, check_brate))
327 return TRUE;
328 else
329 return FALSE;
330 }
331
332 /* caluclate the rate of a rx'd frame and return it as a ratespec */
333 ratespec_t BCMFASTPATH wlc_compute_rspec(d11rxhdr_t * rxh, uint8 * plcp)
334 {
335 int phy_type;
336 ratespec_t rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT;
337
338 phy_type =
339 ((rxh->RxChan & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT);
340
341 if ((phy_type == PHY_TYPE_N) || (phy_type == PHY_TYPE_SSN) ||
342 (phy_type == PHY_TYPE_LCN) || (phy_type == PHY_TYPE_HT)) {
343 switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) {
344 case PRXS0_CCK:
345 rspec =
346 CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal);
347 break;
348 case PRXS0_OFDM:
349 rspec =
350 OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->
351 rlpt[0]);
352 break;
353 case PRXS0_PREN:
354 rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE;
355 if (plcp[0] & MIMO_PLCP_40MHZ) {
356 /* indicate rspec is for 40 MHz mode */
357 rspec &= ~RSPEC_BW_MASK;
358 rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT);
359 }
360 break;
361 case PRXS0_STDN:
362 /* fallthru */
363 default:
364 /* not supported */
365 ASSERT(0);
366 break;
367 }
368 if (PLCP3_ISSGI(plcp[3]))
369 rspec |= RSPEC_SHORT_GI;
370 } else
371 if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM))
372 rspec = OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->rlpt[0]);
373 else
374 rspec = CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal);
375
376 return rspec;
377 }
378
379 /* copy rateset src to dst as-is (no masking or sorting) */
380 void wlc_rateset_copy(const wlc_rateset_t * src, wlc_rateset_t * dst)
381 {
382 bcopy(src, dst, sizeof(wlc_rateset_t));
383 }
384
385 /*
386 * Copy and selectively filter one rateset to another.
387 * 'basic_only' means only copy basic rates.
388 * 'rates' indicates cck (11b) and ofdm rates combinations.
389 * - 0: cck and ofdm
390 * - 1: cck only
391 * - 2: ofdm only
392 * 'xmask' is the copy mask (typically 0x7f or 0xff).
393 */
394 void
395 wlc_rateset_filter(wlc_rateset_t * src, wlc_rateset_t * dst, bool basic_only,
396 uint8 rates, uint xmask, bool mcsallow)
397 {
398 uint i;
399 uint r;
400 uint count;
401
402 count = 0;
403 for (i = 0; i < src->count; i++) {
404 r = src->rates[i];
405 if (basic_only && !(r & WLC_RATE_FLAG))
406 continue;
407 if ((rates == WLC_RATES_CCK) && IS_OFDM((r & RATE_MASK)))
408 continue;
409 if ((rates == WLC_RATES_OFDM) && IS_CCK((r & RATE_MASK)))
410 continue;
411 dst->rates[count++] = r & xmask;
412 }
413 dst->count = count;
414 dst->htphy_membership = src->htphy_membership;
415
416 if (mcsallow && rates != WLC_RATES_CCK)
417 bcopy(&src->mcs[0], &dst->mcs[0], MCSSET_LEN);
418 else
419 wlc_rateset_mcs_clear(dst);
420 }
421
422 /* select rateset for a given phy_type and bandtype and filter it, sort it
423 * and fill rs_tgt with result
424 */
425 void
426 wlc_rateset_default(wlc_rateset_t * rs_tgt, const wlc_rateset_t * rs_hw,
427 uint phy_type, int bandtype, bool cck_only, uint rate_mask,
428 bool mcsallow, uint8 bw, uint8 txstreams)
429 {
430 const wlc_rateset_t *rs_dflt;
431 wlc_rateset_t rs_sel;
432 if ((PHYTYPE_IS(phy_type, PHY_TYPE_HT)) ||
433 (PHYTYPE_IS(phy_type, PHY_TYPE_N)) ||
434 (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) ||
435 (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) {
436 if (BAND_5G(bandtype)) {
437 rs_dflt = (bw == WLC_20_MHZ ?
438 &ofdm_mimo_rates : &ofdm_40bw_mimo_rates);
439 } else {
440 rs_dflt = (bw == WLC_20_MHZ ?
441 &cck_ofdm_mimo_rates :
442 &cck_ofdm_40bw_mimo_rates);
443 }
444 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_LP)) {
445 rs_dflt = (BAND_5G(bandtype)) ? &ofdm_rates : &cck_ofdm_rates;
446 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_A)) {
447 rs_dflt = &ofdm_rates;
448 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_G)) {
449 rs_dflt = &cck_ofdm_rates;
450 } else {
451 ASSERT(0); /* should not happen */
452 rs_dflt = &cck_rates; /* force cck */
453 }
454
455 /* if hw rateset is not supplied, assign selected rateset to it */
456 if (!rs_hw)
457 rs_hw = rs_dflt;
458
459 wlc_rateset_copy(rs_dflt, &rs_sel);
460 wlc_rateset_mcs_upd(&rs_sel, txstreams);
461 wlc_rateset_filter(&rs_sel, rs_tgt, FALSE,
462 cck_only ? WLC_RATES_CCK : WLC_RATES_CCK_OFDM,
463 rate_mask, mcsallow);
464 wlc_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, FALSE,
465 mcsallow ? txstreams : 1);
466 }
467
468 int16 BCMFASTPATH wlc_rate_legacy_phyctl(uint rate)
469 {
470 uint i;
471 for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++)
472 if (rate == legacy_phycfg_table[i].rate_ofdm)
473 return legacy_phycfg_table[i].tx_phy_ctl3;
474
475 return -1;
476 }
477
478 void wlc_rateset_mcs_clear(wlc_rateset_t * rateset)
479 {
480 uint i;
481 for (i = 0; i < MCSSET_LEN; i++)
482 rateset->mcs[i] = 0;
483 }
484
485 void wlc_rateset_mcs_build(wlc_rateset_t * rateset, uint8 txstreams)
486 {
487 bcopy(&cck_ofdm_mimo_rates.mcs[0], &rateset->mcs[0], MCSSET_LEN);
488 wlc_rateset_mcs_upd(rateset, txstreams);
489 }
490
491 /* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */
492 void wlc_rateset_bw_mcs_filter(wlc_rateset_t * rateset, uint8 bw)
493 {
494 if (bw == WLC_40_MHZ)
495 setbit(rateset->mcs, 32);
496 else
497 clrbit(rateset->mcs, 32);
498 }