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[mirror_ubuntu-bionic-kernel.git] / drivers / staging / ccree / ssi_buffer_mgr.c
1 /*
2 * Copyright (C) 2012-2017 ARM Limited or its affiliates.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, see <http://www.gnu.org/licenses/>.
15 */
16
17 #include <linux/crypto.h>
18 #include <linux/version.h>
19 #include <crypto/algapi.h>
20 #include <crypto/internal/aead.h>
21 #include <crypto/hash.h>
22 #include <crypto/authenc.h>
23 #include <crypto/scatterwalk.h>
24 #include <linux/dmapool.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/crypto.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29
30 #include "ssi_buffer_mgr.h"
31 #include "cc_lli_defs.h"
32 #include "ssi_cipher.h"
33 #include "ssi_hash.h"
34 #include "ssi_aead.h"
35
36 #ifdef CC_DEBUG
37 #define GET_DMA_BUFFER_TYPE(buff_type) ( \
38 ((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \
39 ((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \
40 ((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID")
41 #else
42 #define GET_DMA_BUFFER_TYPE(buff_type)
43 #endif
44
45 enum dma_buffer_type {
46 DMA_NULL_TYPE = -1,
47 DMA_SGL_TYPE = 1,
48 DMA_BUFF_TYPE = 2,
49 };
50
51 struct buff_mgr_handle {
52 struct dma_pool *mlli_buffs_pool;
53 };
54
55 union buffer_array_entry {
56 struct scatterlist *sgl;
57 dma_addr_t buffer_dma;
58 };
59
60 struct buffer_array {
61 unsigned int num_of_buffers;
62 union buffer_array_entry entry[MAX_NUM_OF_BUFFERS_IN_MLLI];
63 unsigned int offset[MAX_NUM_OF_BUFFERS_IN_MLLI];
64 int nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
65 int total_data_len[MAX_NUM_OF_BUFFERS_IN_MLLI];
66 enum dma_buffer_type type[MAX_NUM_OF_BUFFERS_IN_MLLI];
67 bool is_last[MAX_NUM_OF_BUFFERS_IN_MLLI];
68 u32 *mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
69 };
70
71 /**
72 * ssi_buffer_mgr_get_sgl_nents() - Get scatterlist number of entries.
73 *
74 * @sg_list: SG list
75 * @nbytes: [IN] Total SGL data bytes.
76 * @lbytes: [OUT] Returns the amount of bytes at the last entry
77 */
78 static unsigned int ssi_buffer_mgr_get_sgl_nents(
79 struct scatterlist *sg_list, unsigned int nbytes, u32 *lbytes, bool *is_chained)
80 {
81 unsigned int nents = 0;
82
83 while (nbytes != 0) {
84 if (sg_is_chain(sg_list)) {
85 SSI_LOG_ERR("Unexpected chained entry "
86 "in sg (entry =0x%X)\n", nents);
87 BUG();
88 }
89 if (sg_list->length != 0) {
90 nents++;
91 /* get the number of bytes in the last entry */
92 *lbytes = nbytes;
93 nbytes -= (sg_list->length > nbytes) ? nbytes : sg_list->length;
94 sg_list = sg_next(sg_list);
95 } else {
96 sg_list = (struct scatterlist *)sg_page(sg_list);
97 if (is_chained)
98 *is_chained = true;
99 }
100 }
101 SSI_LOG_DEBUG("nents %d last bytes %d\n", nents, *lbytes);
102 return nents;
103 }
104
105 /**
106 * ssi_buffer_mgr_zero_sgl() - Zero scatter scatter list data.
107 *
108 * @sgl:
109 */
110 void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, u32 data_len)
111 {
112 struct scatterlist *current_sg = sgl;
113 int sg_index = 0;
114
115 while (sg_index <= data_len) {
116 if (!current_sg) {
117 /* reached the end of the sgl --> just return back */
118 return;
119 }
120 memset(sg_virt(current_sg), 0, current_sg->length);
121 sg_index += current_sg->length;
122 current_sg = sg_next(current_sg);
123 }
124 }
125
126 /**
127 * ssi_buffer_mgr_copy_scatterlist_portion() - Copy scatter list data,
128 * from to_skip to end, to dest and vice versa
129 *
130 * @dest:
131 * @sg:
132 * @to_skip:
133 * @end:
134 * @direct:
135 */
136 void ssi_buffer_mgr_copy_scatterlist_portion(
137 u8 *dest, struct scatterlist *sg,
138 u32 to_skip, u32 end,
139 enum ssi_sg_cpy_direct direct)
140 {
141 u32 nents, lbytes;
142
143 nents = ssi_buffer_mgr_get_sgl_nents(sg, end, &lbytes, NULL);
144 sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip + 1), to_skip,
145 (direct == SSI_SG_TO_BUF));
146 }
147
148 static inline int ssi_buffer_mgr_render_buff_to_mlli(
149 dma_addr_t buff_dma, u32 buff_size, u32 *curr_nents,
150 u32 **mlli_entry_pp)
151 {
152 u32 *mlli_entry_p = *mlli_entry_pp;
153 u32 new_nents;;
154
155 /* Verify there is no memory overflow*/
156 new_nents = (*curr_nents + buff_size / CC_MAX_MLLI_ENTRY_SIZE + 1);
157 if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES)
158 return -ENOMEM;
159
160 /*handle buffer longer than 64 kbytes */
161 while (buff_size > CC_MAX_MLLI_ENTRY_SIZE) {
162 cc_lli_set_addr(mlli_entry_p, buff_dma);
163 cc_lli_set_size(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE);
164 SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n", *curr_nents,
165 mlli_entry_p[LLI_WORD0_OFFSET],
166 mlli_entry_p[LLI_WORD1_OFFSET]);
167 buff_dma += CC_MAX_MLLI_ENTRY_SIZE;
168 buff_size -= CC_MAX_MLLI_ENTRY_SIZE;
169 mlli_entry_p = mlli_entry_p + 2;
170 (*curr_nents)++;
171 }
172 /*Last entry */
173 cc_lli_set_addr(mlli_entry_p, buff_dma);
174 cc_lli_set_size(mlli_entry_p, buff_size);
175 SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n", *curr_nents,
176 mlli_entry_p[LLI_WORD0_OFFSET],
177 mlli_entry_p[LLI_WORD1_OFFSET]);
178 mlli_entry_p = mlli_entry_p + 2;
179 *mlli_entry_pp = mlli_entry_p;
180 (*curr_nents)++;
181 return 0;
182 }
183
184 static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
185 struct scatterlist *sgl, u32 sgl_data_len, u32 sglOffset, u32 *curr_nents,
186 u32 **mlli_entry_pp)
187 {
188 struct scatterlist *curr_sgl = sgl;
189 u32 *mlli_entry_p = *mlli_entry_pp;
190 s32 rc = 0;
191
192 for ( ; (curr_sgl) && (sgl_data_len != 0);
193 curr_sgl = sg_next(curr_sgl)) {
194 u32 entry_data_len =
195 (sgl_data_len > sg_dma_len(curr_sgl) - sglOffset) ?
196 sg_dma_len(curr_sgl) - sglOffset : sgl_data_len;
197 sgl_data_len -= entry_data_len;
198 rc = ssi_buffer_mgr_render_buff_to_mlli(
199 sg_dma_address(curr_sgl) + sglOffset, entry_data_len, curr_nents,
200 &mlli_entry_p);
201 if (rc != 0)
202 return rc;
203
204 sglOffset = 0;
205 }
206 *mlli_entry_pp = mlli_entry_p;
207 return 0;
208 }
209
210 static int ssi_buffer_mgr_generate_mlli(
211 struct device *dev,
212 struct buffer_array *sg_data,
213 struct mlli_params *mlli_params)
214 {
215 u32 *mlli_p;
216 u32 total_nents = 0, prev_total_nents = 0;
217 int rc = 0, i;
218
219 SSI_LOG_DEBUG("NUM of SG's = %d\n", sg_data->num_of_buffers);
220
221 /* Allocate memory from the pointed pool */
222 mlli_params->mlli_virt_addr = dma_pool_alloc(
223 mlli_params->curr_pool, GFP_KERNEL,
224 &(mlli_params->mlli_dma_addr));
225 if (unlikely(!mlli_params->mlli_virt_addr)) {
226 SSI_LOG_ERR("dma_pool_alloc() failed\n");
227 rc = -ENOMEM;
228 goto build_mlli_exit;
229 }
230 /* Point to start of MLLI */
231 mlli_p = (u32 *)mlli_params->mlli_virt_addr;
232 /* go over all SG's and link it to one MLLI table */
233 for (i = 0; i < sg_data->num_of_buffers; i++) {
234 if (sg_data->type[i] == DMA_SGL_TYPE)
235 rc = ssi_buffer_mgr_render_scatterlist_to_mlli(
236 sg_data->entry[i].sgl,
237 sg_data->total_data_len[i], sg_data->offset[i], &total_nents,
238 &mlli_p);
239 else /*DMA_BUFF_TYPE*/
240 rc = ssi_buffer_mgr_render_buff_to_mlli(
241 sg_data->entry[i].buffer_dma,
242 sg_data->total_data_len[i], &total_nents,
243 &mlli_p);
244 if (rc != 0)
245 return rc;
246
247 /* set last bit in the current table */
248 if (sg_data->mlli_nents[i]) {
249 /*Calculate the current MLLI table length for the
250 *length field in the descriptor
251 */
252 *(sg_data->mlli_nents[i]) +=
253 (total_nents - prev_total_nents);
254 prev_total_nents = total_nents;
255 }
256 }
257
258 /* Set MLLI size for the bypass operation */
259 mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE);
260
261 SSI_LOG_DEBUG("MLLI params: "
262 "virt_addr=%pK dma_addr=0x%llX mlli_len=0x%X\n",
263 mlli_params->mlli_virt_addr,
264 (unsigned long long)mlli_params->mlli_dma_addr,
265 mlli_params->mlli_len);
266
267 build_mlli_exit:
268 return rc;
269 }
270
271 static inline void ssi_buffer_mgr_add_buffer_entry(
272 struct buffer_array *sgl_data,
273 dma_addr_t buffer_dma, unsigned int buffer_len,
274 bool is_last_entry, u32 *mlli_nents)
275 {
276 unsigned int index = sgl_data->num_of_buffers;
277
278 SSI_LOG_DEBUG("index=%u single_buff=0x%llX "
279 "buffer_len=0x%08X is_last=%d\n",
280 index, (unsigned long long)buffer_dma, buffer_len, is_last_entry);
281 sgl_data->nents[index] = 1;
282 sgl_data->entry[index].buffer_dma = buffer_dma;
283 sgl_data->offset[index] = 0;
284 sgl_data->total_data_len[index] = buffer_len;
285 sgl_data->type[index] = DMA_BUFF_TYPE;
286 sgl_data->is_last[index] = is_last_entry;
287 sgl_data->mlli_nents[index] = mlli_nents;
288 if (sgl_data->mlli_nents[index])
289 *sgl_data->mlli_nents[index] = 0;
290 sgl_data->num_of_buffers++;
291 }
292
293 static inline void ssi_buffer_mgr_add_scatterlist_entry(
294 struct buffer_array *sgl_data,
295 unsigned int nents,
296 struct scatterlist *sgl,
297 unsigned int data_len,
298 unsigned int data_offset,
299 bool is_last_table,
300 u32 *mlli_nents)
301 {
302 unsigned int index = sgl_data->num_of_buffers;
303
304 SSI_LOG_DEBUG("index=%u nents=%u sgl=%pK data_len=0x%08X is_last=%d\n",
305 index, nents, sgl, data_len, is_last_table);
306 sgl_data->nents[index] = nents;
307 sgl_data->entry[index].sgl = sgl;
308 sgl_data->offset[index] = data_offset;
309 sgl_data->total_data_len[index] = data_len;
310 sgl_data->type[index] = DMA_SGL_TYPE;
311 sgl_data->is_last[index] = is_last_table;
312 sgl_data->mlli_nents[index] = mlli_nents;
313 if (sgl_data->mlli_nents[index])
314 *sgl_data->mlli_nents[index] = 0;
315 sgl_data->num_of_buffers++;
316 }
317
318 static int
319 ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
320 enum dma_data_direction direction)
321 {
322 u32 i, j;
323 struct scatterlist *l_sg = sg;
324
325 for (i = 0; i < nents; i++) {
326 if (!l_sg)
327 break;
328 if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)) {
329 SSI_LOG_ERR("dma_map_page() sg buffer failed\n");
330 goto err;
331 }
332 l_sg = sg_next(l_sg);
333 }
334 return nents;
335
336 err:
337 /* Restore mapped parts */
338 for (j = 0; j < i; j++) {
339 if (!sg)
340 break;
341 dma_unmap_sg(dev, sg, 1, direction);
342 sg = sg_next(sg);
343 }
344 return 0;
345 }
346
347 static int ssi_buffer_mgr_map_scatterlist(
348 struct device *dev, struct scatterlist *sg,
349 unsigned int nbytes, int direction,
350 u32 *nents, u32 max_sg_nents,
351 u32 *lbytes, u32 *mapped_nents)
352 {
353 bool is_chained = false;
354
355 if (sg_is_last(sg)) {
356 /* One entry only case -set to DLLI */
357 if (unlikely(dma_map_sg(dev, sg, 1, direction) != 1)) {
358 SSI_LOG_ERR("dma_map_sg() single buffer failed\n");
359 return -ENOMEM;
360 }
361 SSI_LOG_DEBUG("Mapped sg: dma_address=0x%llX "
362 "page=%p addr=%pK offset=%u "
363 "length=%u\n",
364 (unsigned long long)sg_dma_address(sg),
365 sg_page(sg),
366 sg_virt(sg),
367 sg->offset, sg->length);
368 *lbytes = nbytes;
369 *nents = 1;
370 *mapped_nents = 1;
371 } else { /*sg_is_last*/
372 *nents = ssi_buffer_mgr_get_sgl_nents(sg, nbytes, lbytes,
373 &is_chained);
374 if (*nents > max_sg_nents) {
375 *nents = 0;
376 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
377 *nents, max_sg_nents);
378 return -ENOMEM;
379 }
380 if (!is_chained) {
381 /* In case of mmu the number of mapped nents might
382 * be changed from the original sgl nents
383 */
384 *mapped_nents = dma_map_sg(dev, sg, *nents, direction);
385 if (unlikely(*mapped_nents == 0)) {
386 *nents = 0;
387 SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
388 return -ENOMEM;
389 }
390 } else {
391 /*In this case the driver maps entry by entry so it
392 * must have the same nents before and after map
393 */
394 *mapped_nents = ssi_buffer_mgr_dma_map_sg(dev,
395 sg,
396 *nents,
397 direction);
398 if (unlikely(*mapped_nents != *nents)) {
399 *nents = *mapped_nents;
400 SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
401 return -ENOMEM;
402 }
403 }
404 }
405
406 return 0;
407 }
408
409 static inline int
410 ssi_aead_handle_config_buf(struct device *dev,
411 struct aead_req_ctx *areq_ctx,
412 u8 *config_data,
413 struct buffer_array *sg_data,
414 unsigned int assoclen)
415 {
416 SSI_LOG_DEBUG(" handle additional data config set to DLLI\n");
417 /* create sg for the current buffer */
418 sg_init_one(&areq_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size);
419 if (unlikely(dma_map_sg(dev, &areq_ctx->ccm_adata_sg, 1,
420 DMA_TO_DEVICE) != 1)) {
421 SSI_LOG_ERR("dma_map_sg() "
422 "config buffer failed\n");
423 return -ENOMEM;
424 }
425 SSI_LOG_DEBUG("Mapped curr_buff: dma_address=0x%llX "
426 "page=%p addr=%pK "
427 "offset=%u length=%u\n",
428 (unsigned long long)sg_dma_address(&areq_ctx->ccm_adata_sg),
429 sg_page(&areq_ctx->ccm_adata_sg),
430 sg_virt(&areq_ctx->ccm_adata_sg),
431 areq_ctx->ccm_adata_sg.offset,
432 areq_ctx->ccm_adata_sg.length);
433 /* prepare for case of MLLI */
434 if (assoclen > 0) {
435 ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1,
436 &areq_ctx->ccm_adata_sg,
437 (AES_BLOCK_SIZE +
438 areq_ctx->ccm_hdr_size), 0,
439 false, NULL);
440 }
441 return 0;
442 }
443
444 static inline int ssi_ahash_handle_curr_buf(struct device *dev,
445 struct ahash_req_ctx *areq_ctx,
446 u8 *curr_buff,
447 u32 curr_buff_cnt,
448 struct buffer_array *sg_data)
449 {
450 SSI_LOG_DEBUG(" handle curr buff %x set to DLLI\n", curr_buff_cnt);
451 /* create sg for the current buffer */
452 sg_init_one(areq_ctx->buff_sg, curr_buff, curr_buff_cnt);
453 if (unlikely(dma_map_sg(dev, areq_ctx->buff_sg, 1,
454 DMA_TO_DEVICE) != 1)) {
455 SSI_LOG_ERR("dma_map_sg() "
456 "src buffer failed\n");
457 return -ENOMEM;
458 }
459 SSI_LOG_DEBUG("Mapped curr_buff: dma_address=0x%llX "
460 "page=%p addr=%pK "
461 "offset=%u length=%u\n",
462 (unsigned long long)sg_dma_address(areq_ctx->buff_sg),
463 sg_page(areq_ctx->buff_sg),
464 sg_virt(areq_ctx->buff_sg),
465 areq_ctx->buff_sg->offset,
466 areq_ctx->buff_sg->length);
467 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
468 areq_ctx->curr_sg = areq_ctx->buff_sg;
469 areq_ctx->in_nents = 0;
470 /* prepare for case of MLLI */
471 ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1, areq_ctx->buff_sg,
472 curr_buff_cnt, 0, false, NULL);
473 return 0;
474 }
475
476 void ssi_buffer_mgr_unmap_blkcipher_request(
477 struct device *dev,
478 void *ctx,
479 unsigned int ivsize,
480 struct scatterlist *src,
481 struct scatterlist *dst)
482 {
483 struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
484
485 if (likely(req_ctx->gen_ctx.iv_dma_addr != 0)) {
486 SSI_LOG_DEBUG("Unmapped iv: iv_dma_addr=0x%llX iv_size=%u\n",
487 (unsigned long long)req_ctx->gen_ctx.iv_dma_addr,
488 ivsize);
489 dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr,
490 ivsize,
491 req_ctx->is_giv ? DMA_BIDIRECTIONAL :
492 DMA_TO_DEVICE);
493 }
494 /* Release pool */
495 if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) {
496 dma_pool_free(req_ctx->mlli_params.curr_pool,
497 req_ctx->mlli_params.mlli_virt_addr,
498 req_ctx->mlli_params.mlli_dma_addr);
499 }
500
501 dma_unmap_sg(dev, src, req_ctx->in_nents,
502 DMA_BIDIRECTIONAL);
503 SSI_LOG_DEBUG("Unmapped req->src=%pK\n",
504 sg_virt(src));
505
506 if (src != dst) {
507 dma_unmap_sg(dev, dst, req_ctx->out_nents,
508 DMA_BIDIRECTIONAL);
509 SSI_LOG_DEBUG("Unmapped req->dst=%pK\n",
510 sg_virt(dst));
511 }
512 }
513
514 int ssi_buffer_mgr_map_blkcipher_request(
515 struct ssi_drvdata *drvdata,
516 void *ctx,
517 unsigned int ivsize,
518 unsigned int nbytes,
519 void *info,
520 struct scatterlist *src,
521 struct scatterlist *dst)
522 {
523 struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
524 struct mlli_params *mlli_params = &req_ctx->mlli_params;
525 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
526 struct device *dev = &drvdata->plat_dev->dev;
527 struct buffer_array sg_data;
528 u32 dummy = 0;
529 int rc = 0;
530 u32 mapped_nents = 0;
531
532 req_ctx->dma_buf_type = SSI_DMA_BUF_DLLI;
533 mlli_params->curr_pool = NULL;
534 sg_data.num_of_buffers = 0;
535
536 /* Map IV buffer */
537 if (likely(ivsize != 0)) {
538 dump_byte_array("iv", (u8 *)info, ivsize);
539 req_ctx->gen_ctx.iv_dma_addr =
540 dma_map_single(dev, (void *)info,
541 ivsize,
542 req_ctx->is_giv ? DMA_BIDIRECTIONAL :
543 DMA_TO_DEVICE);
544 if (unlikely(dma_mapping_error(dev,
545 req_ctx->gen_ctx.iv_dma_addr))) {
546 SSI_LOG_ERR("Mapping iv %u B at va=%pK "
547 "for DMA failed\n", ivsize, info);
548 return -ENOMEM;
549 }
550 SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
551 ivsize, info,
552 (unsigned long long)req_ctx->gen_ctx.iv_dma_addr);
553 } else {
554 req_ctx->gen_ctx.iv_dma_addr = 0;
555 }
556
557 /* Map the src SGL */
558 rc = ssi_buffer_mgr_map_scatterlist(dev, src,
559 nbytes, DMA_BIDIRECTIONAL, &req_ctx->in_nents,
560 LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
561 if (unlikely(rc != 0)) {
562 rc = -ENOMEM;
563 goto ablkcipher_exit;
564 }
565 if (mapped_nents > 1)
566 req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI;
567
568 if (unlikely(src == dst)) {
569 /* Handle inplace operation */
570 if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
571 req_ctx->out_nents = 0;
572 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
573 req_ctx->in_nents, src,
574 nbytes, 0, true, &req_ctx->in_mlli_nents);
575 }
576 } else {
577 /* Map the dst sg */
578 if (unlikely(ssi_buffer_mgr_map_scatterlist(
579 dev, dst, nbytes,
580 DMA_BIDIRECTIONAL, &req_ctx->out_nents,
581 LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy,
582 &mapped_nents))){
583 rc = -ENOMEM;
584 goto ablkcipher_exit;
585 }
586 if (mapped_nents > 1)
587 req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI;
588
589 if (unlikely((req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI))) {
590 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
591 req_ctx->in_nents, src,
592 nbytes, 0, true,
593 &req_ctx->in_mlli_nents);
594 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
595 req_ctx->out_nents, dst,
596 nbytes, 0, true,
597 &req_ctx->out_mlli_nents);
598 }
599 }
600
601 if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
602 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
603 rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
604 if (unlikely(rc != 0))
605 goto ablkcipher_exit;
606 }
607
608 SSI_LOG_DEBUG("areq_ctx->dma_buf_type = %s\n",
609 GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type));
610
611 return 0;
612
613 ablkcipher_exit:
614 ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
615 return rc;
616 }
617
618 void ssi_buffer_mgr_unmap_aead_request(
619 struct device *dev, struct aead_request *req)
620 {
621 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
622 unsigned int hw_iv_size = areq_ctx->hw_iv_size;
623 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
624 struct ssi_drvdata *drvdata = dev_get_drvdata(dev);
625 u32 dummy;
626 bool chained;
627 u32 size_to_unmap = 0;
628
629 if (areq_ctx->mac_buf_dma_addr != 0) {
630 dma_unmap_single(dev, areq_ctx->mac_buf_dma_addr,
631 MAX_MAC_SIZE, DMA_BIDIRECTIONAL);
632 }
633
634 #if SSI_CC_HAS_AES_GCM
635 if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) {
636 if (areq_ctx->hkey_dma_addr != 0) {
637 dma_unmap_single(dev, areq_ctx->hkey_dma_addr,
638 AES_BLOCK_SIZE, DMA_BIDIRECTIONAL);
639 }
640
641 if (areq_ctx->gcm_block_len_dma_addr != 0) {
642 dma_unmap_single(dev, areq_ctx->gcm_block_len_dma_addr,
643 AES_BLOCK_SIZE, DMA_TO_DEVICE);
644 }
645
646 if (areq_ctx->gcm_iv_inc1_dma_addr != 0) {
647 dma_unmap_single(dev, areq_ctx->gcm_iv_inc1_dma_addr,
648 AES_BLOCK_SIZE, DMA_TO_DEVICE);
649 }
650
651 if (areq_ctx->gcm_iv_inc2_dma_addr != 0) {
652 dma_unmap_single(dev, areq_ctx->gcm_iv_inc2_dma_addr,
653 AES_BLOCK_SIZE, DMA_TO_DEVICE);
654 }
655 }
656 #endif
657
658 if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
659 if (areq_ctx->ccm_iv0_dma_addr != 0) {
660 dma_unmap_single(dev, areq_ctx->ccm_iv0_dma_addr,
661 AES_BLOCK_SIZE, DMA_TO_DEVICE);
662 }
663
664 dma_unmap_sg(dev, &areq_ctx->ccm_adata_sg, 1, DMA_TO_DEVICE);
665 }
666 if (areq_ctx->gen_ctx.iv_dma_addr != 0) {
667 dma_unmap_single(dev, areq_ctx->gen_ctx.iv_dma_addr,
668 hw_iv_size, DMA_BIDIRECTIONAL);
669 }
670
671 /*In case a pool was set, a table was
672 *allocated and should be released
673 */
674 if (areq_ctx->mlli_params.curr_pool) {
675 SSI_LOG_DEBUG("free MLLI buffer: dma=0x%08llX virt=%pK\n",
676 (unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
677 areq_ctx->mlli_params.mlli_virt_addr);
678 dma_pool_free(areq_ctx->mlli_params.curr_pool,
679 areq_ctx->mlli_params.mlli_virt_addr,
680 areq_ctx->mlli_params.mlli_dma_addr);
681 }
682
683 SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src), areq_ctx->src.nents, areq_ctx->assoc.nents, req->assoclen, req->cryptlen);
684 size_to_unmap = req->assoclen + req->cryptlen;
685 if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT)
686 size_to_unmap += areq_ctx->req_authsize;
687 if (areq_ctx->is_gcm4543)
688 size_to_unmap += crypto_aead_ivsize(tfm);
689
690 dma_unmap_sg(dev, req->src, ssi_buffer_mgr_get_sgl_nents(req->src, size_to_unmap, &dummy, &chained), DMA_BIDIRECTIONAL);
691 if (unlikely(req->src != req->dst)) {
692 SSI_LOG_DEBUG("Unmapping dst sgl: req->dst=%pK\n",
693 sg_virt(req->dst));
694 dma_unmap_sg(dev, req->dst, ssi_buffer_mgr_get_sgl_nents(req->dst, size_to_unmap, &dummy, &chained),
695 DMA_BIDIRECTIONAL);
696 }
697 if (drvdata->coherent &&
698 (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
699 likely(req->src == req->dst))
700 {
701 u32 size_to_skip = req->assoclen;
702
703 if (areq_ctx->is_gcm4543)
704 size_to_skip += crypto_aead_ivsize(tfm);
705
706 /* copy mac to a temporary location to deal with possible
707 * data memory overriding that caused by cache coherence problem.
708 */
709 ssi_buffer_mgr_copy_scatterlist_portion(
710 areq_ctx->backup_mac, req->src,
711 size_to_skip + req->cryptlen - areq_ctx->req_authsize,
712 size_to_skip + req->cryptlen, SSI_SG_FROM_BUF);
713 }
714 }
715
716 static inline int ssi_buffer_mgr_get_aead_icv_nents(
717 struct scatterlist *sgl,
718 unsigned int sgl_nents,
719 unsigned int authsize,
720 u32 last_entry_data_size,
721 bool *is_icv_fragmented)
722 {
723 unsigned int icv_max_size = 0;
724 unsigned int icv_required_size = authsize > last_entry_data_size ? (authsize - last_entry_data_size) : authsize;
725 unsigned int nents;
726 unsigned int i;
727
728 if (sgl_nents < MAX_ICV_NENTS_SUPPORTED) {
729 *is_icv_fragmented = false;
730 return 0;
731 }
732
733 for (i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
734 if (!sgl)
735 break;
736 sgl = sg_next(sgl);
737 }
738
739 if (sgl)
740 icv_max_size = sgl->length;
741
742 if (last_entry_data_size > authsize) {
743 nents = 0; /* ICV attached to data in last entry (not fragmented!) */
744 *is_icv_fragmented = false;
745 } else if (last_entry_data_size == authsize) {
746 nents = 1; /* ICV placed in whole last entry (not fragmented!) */
747 *is_icv_fragmented = false;
748 } else if (icv_max_size > icv_required_size) {
749 nents = 1;
750 *is_icv_fragmented = true;
751 } else if (icv_max_size == icv_required_size) {
752 nents = 2;
753 *is_icv_fragmented = true;
754 } else {
755 SSI_LOG_ERR("Unsupported num. of ICV fragments (> %d)\n",
756 MAX_ICV_NENTS_SUPPORTED);
757 nents = -1; /*unsupported*/
758 }
759 SSI_LOG_DEBUG("is_frag=%s icv_nents=%u\n",
760 (*is_icv_fragmented ? "true" : "false"), nents);
761
762 return nents;
763 }
764
765 static inline int ssi_buffer_mgr_aead_chain_iv(
766 struct ssi_drvdata *drvdata,
767 struct aead_request *req,
768 struct buffer_array *sg_data,
769 bool is_last, bool do_chain)
770 {
771 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
772 unsigned int hw_iv_size = areq_ctx->hw_iv_size;
773 struct device *dev = &drvdata->plat_dev->dev;
774 int rc = 0;
775
776 if (unlikely(!req->iv)) {
777 areq_ctx->gen_ctx.iv_dma_addr = 0;
778 goto chain_iv_exit;
779 }
780
781 areq_ctx->gen_ctx.iv_dma_addr = dma_map_single(dev, req->iv,
782 hw_iv_size, DMA_BIDIRECTIONAL);
783 if (unlikely(dma_mapping_error(dev, areq_ctx->gen_ctx.iv_dma_addr))) {
784 SSI_LOG_ERR("Mapping iv %u B at va=%pK for DMA failed\n",
785 hw_iv_size, req->iv);
786 rc = -ENOMEM;
787 goto chain_iv_exit;
788 }
789
790 SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
791 hw_iv_size, req->iv,
792 (unsigned long long)areq_ctx->gen_ctx.iv_dma_addr);
793 if (do_chain && areq_ctx->plaintext_authenticate_only) { // TODO: what about CTR?? ask Ron
794 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
795 unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm);
796 unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET;
797 /* Chain to given list */
798 ssi_buffer_mgr_add_buffer_entry(
799 sg_data, areq_ctx->gen_ctx.iv_dma_addr + iv_ofs,
800 iv_size_to_authenc, is_last,
801 &areq_ctx->assoc.mlli_nents);
802 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
803 }
804
805 chain_iv_exit:
806 return rc;
807 }
808
809 static inline int ssi_buffer_mgr_aead_chain_assoc(
810 struct ssi_drvdata *drvdata,
811 struct aead_request *req,
812 struct buffer_array *sg_data,
813 bool is_last, bool do_chain)
814 {
815 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
816 int rc = 0;
817 u32 mapped_nents = 0;
818 struct scatterlist *current_sg = req->src;
819 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
820 unsigned int sg_index = 0;
821 u32 size_of_assoc = req->assoclen;
822
823 if (areq_ctx->is_gcm4543)
824 size_of_assoc += crypto_aead_ivsize(tfm);
825
826 if (!sg_data) {
827 rc = -EINVAL;
828 goto chain_assoc_exit;
829 }
830
831 if (unlikely(req->assoclen == 0)) {
832 areq_ctx->assoc_buff_type = SSI_DMA_BUF_NULL;
833 areq_ctx->assoc.nents = 0;
834 areq_ctx->assoc.mlli_nents = 0;
835 SSI_LOG_DEBUG("Chain assoc of length 0: buff_type=%s nents=%u\n",
836 GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
837 areq_ctx->assoc.nents);
838 goto chain_assoc_exit;
839 }
840
841 //iterate over the sgl to see how many entries are for associated data
842 //it is assumed that if we reach here , the sgl is already mapped
843 sg_index = current_sg->length;
844 if (sg_index > size_of_assoc) { //the first entry in the scatter list contains all the associated data
845 mapped_nents++;
846 } else {
847 while (sg_index <= size_of_assoc) {
848 current_sg = sg_next(current_sg);
849 //if have reached the end of the sgl, then this is unexpected
850 if (!current_sg) {
851 SSI_LOG_ERR("reached end of sg list. unexpected\n");
852 BUG();
853 }
854 sg_index += current_sg->length;
855 mapped_nents++;
856 }
857 }
858 if (unlikely(mapped_nents > LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
859 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
860 mapped_nents, LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES);
861 return -ENOMEM;
862 }
863 areq_ctx->assoc.nents = mapped_nents;
864
865 /* in CCM case we have additional entry for
866 * ccm header configurations
867 */
868 if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
869 if (unlikely((mapped_nents + 1) >
870 LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
871 SSI_LOG_ERR("CCM case.Too many fragments. "
872 "Current %d max %d\n",
873 (areq_ctx->assoc.nents + 1),
874 LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES);
875 rc = -ENOMEM;
876 goto chain_assoc_exit;
877 }
878 }
879
880 if (likely(mapped_nents == 1) &&
881 (areq_ctx->ccm_hdr_size == ccm_header_size_null))
882 areq_ctx->assoc_buff_type = SSI_DMA_BUF_DLLI;
883 else
884 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
885
886 if (unlikely((do_chain) ||
887 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) {
888 SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n",
889 GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
890 areq_ctx->assoc.nents);
891 ssi_buffer_mgr_add_scatterlist_entry(
892 sg_data, areq_ctx->assoc.nents,
893 req->src, req->assoclen, 0, is_last,
894 &areq_ctx->assoc.mlli_nents);
895 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
896 }
897
898 chain_assoc_exit:
899 return rc;
900 }
901
902 static inline void ssi_buffer_mgr_prepare_aead_data_dlli(
903 struct aead_request *req,
904 u32 *src_last_bytes, u32 *dst_last_bytes)
905 {
906 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
907 enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
908 unsigned int authsize = areq_ctx->req_authsize;
909
910 areq_ctx->is_icv_fragmented = false;
911 if (likely(req->src == req->dst)) {
912 /*INPLACE*/
913 areq_ctx->icv_dma_addr = sg_dma_address(
914 areq_ctx->srcSgl) +
915 (*src_last_bytes - authsize);
916 areq_ctx->icv_virt_addr = sg_virt(
917 areq_ctx->srcSgl) +
918 (*src_last_bytes - authsize);
919 } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
920 /*NON-INPLACE and DECRYPT*/
921 areq_ctx->icv_dma_addr = sg_dma_address(
922 areq_ctx->srcSgl) +
923 (*src_last_bytes - authsize);
924 areq_ctx->icv_virt_addr = sg_virt(
925 areq_ctx->srcSgl) +
926 (*src_last_bytes - authsize);
927 } else {
928 /*NON-INPLACE and ENCRYPT*/
929 areq_ctx->icv_dma_addr = sg_dma_address(
930 areq_ctx->dstSgl) +
931 (*dst_last_bytes - authsize);
932 areq_ctx->icv_virt_addr = sg_virt(
933 areq_ctx->dstSgl) +
934 (*dst_last_bytes - authsize);
935 }
936 }
937
938 static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
939 struct ssi_drvdata *drvdata,
940 struct aead_request *req,
941 struct buffer_array *sg_data,
942 u32 *src_last_bytes, u32 *dst_last_bytes,
943 bool is_last_table)
944 {
945 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
946 enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
947 unsigned int authsize = areq_ctx->req_authsize;
948 int rc = 0, icv_nents;
949 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
950
951 if (likely(req->src == req->dst)) {
952 /*INPLACE*/
953 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
954 areq_ctx->src.nents, areq_ctx->srcSgl,
955 areq_ctx->cryptlen, areq_ctx->srcOffset, is_last_table,
956 &areq_ctx->src.mlli_nents);
957
958 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
959 areq_ctx->src.nents, authsize, *src_last_bytes,
960 &areq_ctx->is_icv_fragmented);
961 if (unlikely(icv_nents < 0)) {
962 rc = -ENOTSUPP;
963 goto prepare_data_mlli_exit;
964 }
965
966 if (unlikely(areq_ctx->is_icv_fragmented)) {
967 /* Backup happens only when ICV is fragmented, ICV
968 * verification is made by CPU compare in order to simplify
969 * MAC verification upon request completion
970 */
971 if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
972 if (!drvdata->coherent) {
973 /* In coherent platforms (e.g. ACP)
974 * already copying ICV for any
975 * INPLACE-DECRYPT operation, hence
976 * we must neglect this code.
977 */
978 u32 skip = req->assoclen;
979
980 if (areq_ctx->is_gcm4543)
981 skip += crypto_aead_ivsize(tfm);
982
983 ssi_buffer_mgr_copy_scatterlist_portion(
984 areq_ctx->backup_mac, req->src,
985 (skip + req->cryptlen -
986 areq_ctx->req_authsize),
987 skip + req->cryptlen,
988 SSI_SG_TO_BUF);
989 }
990 areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
991 } else {
992 areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
993 areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr;
994 }
995 } else { /* Contig. ICV */
996 /*Should hanlde if the sg is not contig.*/
997 areq_ctx->icv_dma_addr = sg_dma_address(
998 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
999 (*src_last_bytes - authsize);
1000 areq_ctx->icv_virt_addr = sg_virt(
1001 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1002 (*src_last_bytes - authsize);
1003 }
1004
1005 } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1006 /*NON-INPLACE and DECRYPT*/
1007 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1008 areq_ctx->src.nents, areq_ctx->srcSgl,
1009 areq_ctx->cryptlen, areq_ctx->srcOffset, is_last_table,
1010 &areq_ctx->src.mlli_nents);
1011 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1012 areq_ctx->dst.nents, areq_ctx->dstSgl,
1013 areq_ctx->cryptlen, areq_ctx->dstOffset, is_last_table,
1014 &areq_ctx->dst.mlli_nents);
1015
1016 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
1017 areq_ctx->src.nents, authsize, *src_last_bytes,
1018 &areq_ctx->is_icv_fragmented);
1019 if (unlikely(icv_nents < 0)) {
1020 rc = -ENOTSUPP;
1021 goto prepare_data_mlli_exit;
1022 }
1023
1024 if (unlikely(areq_ctx->is_icv_fragmented)) {
1025 /* Backup happens only when ICV is fragmented, ICV
1026 * verification is made by CPU compare in order to simplify
1027 * MAC verification upon request completion
1028 */
1029 u32 size_to_skip = req->assoclen;
1030
1031 if (areq_ctx->is_gcm4543)
1032 size_to_skip += crypto_aead_ivsize(tfm);
1033
1034 ssi_buffer_mgr_copy_scatterlist_portion(
1035 areq_ctx->backup_mac, req->src,
1036 size_to_skip + req->cryptlen - areq_ctx->req_authsize,
1037 size_to_skip + req->cryptlen, SSI_SG_TO_BUF);
1038 areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
1039 } else { /* Contig. ICV */
1040 /*Should hanlde if the sg is not contig.*/
1041 areq_ctx->icv_dma_addr = sg_dma_address(
1042 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1043 (*src_last_bytes - authsize);
1044 areq_ctx->icv_virt_addr = sg_virt(
1045 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1046 (*src_last_bytes - authsize);
1047 }
1048
1049 } else {
1050 /*NON-INPLACE and ENCRYPT*/
1051 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1052 areq_ctx->dst.nents, areq_ctx->dstSgl,
1053 areq_ctx->cryptlen, areq_ctx->dstOffset, is_last_table,
1054 &areq_ctx->dst.mlli_nents);
1055 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1056 areq_ctx->src.nents, areq_ctx->srcSgl,
1057 areq_ctx->cryptlen, areq_ctx->srcOffset, is_last_table,
1058 &areq_ctx->src.mlli_nents);
1059
1060 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->dstSgl,
1061 areq_ctx->dst.nents, authsize, *dst_last_bytes,
1062 &areq_ctx->is_icv_fragmented);
1063 if (unlikely(icv_nents < 0)) {
1064 rc = -ENOTSUPP;
1065 goto prepare_data_mlli_exit;
1066 }
1067
1068 if (likely(!areq_ctx->is_icv_fragmented)) {
1069 /* Contig. ICV */
1070 areq_ctx->icv_dma_addr = sg_dma_address(
1071 &areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
1072 (*dst_last_bytes - authsize);
1073 areq_ctx->icv_virt_addr = sg_virt(
1074 &areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
1075 (*dst_last_bytes - authsize);
1076 } else {
1077 areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr;
1078 areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
1079 }
1080 }
1081
1082 prepare_data_mlli_exit:
1083 return rc;
1084 }
1085
1086 static inline int ssi_buffer_mgr_aead_chain_data(
1087 struct ssi_drvdata *drvdata,
1088 struct aead_request *req,
1089 struct buffer_array *sg_data,
1090 bool is_last_table, bool do_chain)
1091 {
1092 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1093 struct device *dev = &drvdata->plat_dev->dev;
1094 enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1095 unsigned int authsize = areq_ctx->req_authsize;
1096 int src_last_bytes = 0, dst_last_bytes = 0;
1097 int rc = 0;
1098 u32 src_mapped_nents = 0, dst_mapped_nents = 0;
1099 u32 offset = 0;
1100 unsigned int size_for_map = req->assoclen + req->cryptlen; /*non-inplace mode*/
1101 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1102 u32 sg_index = 0;
1103 bool chained = false;
1104 bool is_gcm4543 = areq_ctx->is_gcm4543;
1105 u32 size_to_skip = req->assoclen;
1106
1107 if (is_gcm4543)
1108 size_to_skip += crypto_aead_ivsize(tfm);
1109
1110 offset = size_to_skip;
1111
1112 if (!sg_data) {
1113 rc = -EINVAL;
1114 goto chain_data_exit;
1115 }
1116 areq_ctx->srcSgl = req->src;
1117 areq_ctx->dstSgl = req->dst;
1118
1119 if (is_gcm4543)
1120 size_for_map += crypto_aead_ivsize(tfm);
1121
1122 size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
1123 src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src, size_for_map, &src_last_bytes, &chained);
1124 sg_index = areq_ctx->srcSgl->length;
1125 //check where the data starts
1126 while (sg_index <= size_to_skip) {
1127 offset -= areq_ctx->srcSgl->length;
1128 areq_ctx->srcSgl = sg_next(areq_ctx->srcSgl);
1129 //if have reached the end of the sgl, then this is unexpected
1130 if (!areq_ctx->srcSgl) {
1131 SSI_LOG_ERR("reached end of sg list. unexpected\n");
1132 BUG();
1133 }
1134 sg_index += areq_ctx->srcSgl->length;
1135 src_mapped_nents--;
1136 }
1137 if (unlikely(src_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
1138 {
1139 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
1140 src_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
1141 return -ENOMEM;
1142 }
1143
1144 areq_ctx->src.nents = src_mapped_nents;
1145
1146 areq_ctx->srcOffset = offset;
1147
1148 if (req->src != req->dst) {
1149 size_for_map = req->assoclen + req->cryptlen;
1150 size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
1151 if (is_gcm4543)
1152 size_for_map += crypto_aead_ivsize(tfm);
1153
1154 rc = ssi_buffer_mgr_map_scatterlist(dev, req->dst, size_for_map,
1155 DMA_BIDIRECTIONAL, &(areq_ctx->dst.nents),
1156 LLI_MAX_NUM_OF_DATA_ENTRIES, &dst_last_bytes,
1157 &dst_mapped_nents);
1158 if (unlikely(rc != 0)) {
1159 rc = -ENOMEM;
1160 goto chain_data_exit;
1161 }
1162 }
1163
1164 dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->dst, size_for_map, &dst_last_bytes, &chained);
1165 sg_index = areq_ctx->dstSgl->length;
1166 offset = size_to_skip;
1167
1168 //check where the data starts
1169 while (sg_index <= size_to_skip) {
1170 offset -= areq_ctx->dstSgl->length;
1171 areq_ctx->dstSgl = sg_next(areq_ctx->dstSgl);
1172 //if have reached the end of the sgl, then this is unexpected
1173 if (!areq_ctx->dstSgl) {
1174 SSI_LOG_ERR("reached end of sg list. unexpected\n");
1175 BUG();
1176 }
1177 sg_index += areq_ctx->dstSgl->length;
1178 dst_mapped_nents--;
1179 }
1180 if (unlikely(dst_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
1181 {
1182 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
1183 dst_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
1184 return -ENOMEM;
1185 }
1186 areq_ctx->dst.nents = dst_mapped_nents;
1187 areq_ctx->dstOffset = offset;
1188 if ((src_mapped_nents > 1) ||
1189 (dst_mapped_nents > 1) ||
1190 do_chain) {
1191 areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI;
1192 rc = ssi_buffer_mgr_prepare_aead_data_mlli(drvdata, req, sg_data,
1193 &src_last_bytes, &dst_last_bytes, is_last_table);
1194 } else {
1195 areq_ctx->data_buff_type = SSI_DMA_BUF_DLLI;
1196 ssi_buffer_mgr_prepare_aead_data_dlli(
1197 req, &src_last_bytes, &dst_last_bytes);
1198 }
1199
1200 chain_data_exit:
1201 return rc;
1202 }
1203
1204 static void ssi_buffer_mgr_update_aead_mlli_nents(struct ssi_drvdata *drvdata,
1205 struct aead_request *req)
1206 {
1207 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1208 u32 curr_mlli_size = 0;
1209
1210 if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) {
1211 areq_ctx->assoc.sram_addr = drvdata->mlli_sram_addr;
1212 curr_mlli_size = areq_ctx->assoc.mlli_nents *
1213 LLI_ENTRY_BYTE_SIZE;
1214 }
1215
1216 if (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) {
1217 /*Inplace case dst nents equal to src nents*/
1218 if (req->src == req->dst) {
1219 areq_ctx->dst.mlli_nents = areq_ctx->src.mlli_nents;
1220 areq_ctx->src.sram_addr = drvdata->mlli_sram_addr +
1221 curr_mlli_size;
1222 areq_ctx->dst.sram_addr = areq_ctx->src.sram_addr;
1223 if (!areq_ctx->is_single_pass)
1224 areq_ctx->assoc.mlli_nents +=
1225 areq_ctx->src.mlli_nents;
1226 } else {
1227 if (areq_ctx->gen_ctx.op_type ==
1228 DRV_CRYPTO_DIRECTION_DECRYPT) {
1229 areq_ctx->src.sram_addr =
1230 drvdata->mlli_sram_addr +
1231 curr_mlli_size;
1232 areq_ctx->dst.sram_addr =
1233 areq_ctx->src.sram_addr +
1234 areq_ctx->src.mlli_nents *
1235 LLI_ENTRY_BYTE_SIZE;
1236 if (!areq_ctx->is_single_pass)
1237 areq_ctx->assoc.mlli_nents +=
1238 areq_ctx->src.mlli_nents;
1239 } else {
1240 areq_ctx->dst.sram_addr =
1241 drvdata->mlli_sram_addr +
1242 curr_mlli_size;
1243 areq_ctx->src.sram_addr =
1244 areq_ctx->dst.sram_addr +
1245 areq_ctx->dst.mlli_nents *
1246 LLI_ENTRY_BYTE_SIZE;
1247 if (!areq_ctx->is_single_pass)
1248 areq_ctx->assoc.mlli_nents +=
1249 areq_ctx->dst.mlli_nents;
1250 }
1251 }
1252 }
1253 }
1254
1255 int ssi_buffer_mgr_map_aead_request(
1256 struct ssi_drvdata *drvdata, struct aead_request *req)
1257 {
1258 struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1259 struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1260 struct device *dev = &drvdata->plat_dev->dev;
1261 struct buffer_array sg_data;
1262 unsigned int authsize = areq_ctx->req_authsize;
1263 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1264 int rc = 0;
1265 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1266 bool is_gcm4543 = areq_ctx->is_gcm4543;
1267
1268 u32 mapped_nents = 0;
1269 u32 dummy = 0; /*used for the assoc data fragments */
1270 u32 size_to_map = 0;
1271
1272 mlli_params->curr_pool = NULL;
1273 sg_data.num_of_buffers = 0;
1274
1275 if (drvdata->coherent &&
1276 (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
1277 likely(req->src == req->dst))
1278 {
1279 u32 size_to_skip = req->assoclen;
1280
1281 if (is_gcm4543)
1282 size_to_skip += crypto_aead_ivsize(tfm);
1283
1284 /* copy mac to a temporary location to deal with possible
1285 * data memory overriding that caused by cache coherence problem.
1286 */
1287 ssi_buffer_mgr_copy_scatterlist_portion(
1288 areq_ctx->backup_mac, req->src,
1289 size_to_skip + req->cryptlen - areq_ctx->req_authsize,
1290 size_to_skip + req->cryptlen, SSI_SG_TO_BUF);
1291 }
1292
1293 /* cacluate the size for cipher remove ICV in decrypt*/
1294 areq_ctx->cryptlen = (areq_ctx->gen_ctx.op_type ==
1295 DRV_CRYPTO_DIRECTION_ENCRYPT) ?
1296 req->cryptlen :
1297 (req->cryptlen - authsize);
1298
1299 areq_ctx->mac_buf_dma_addr = dma_map_single(dev,
1300 areq_ctx->mac_buf, MAX_MAC_SIZE, DMA_BIDIRECTIONAL);
1301 if (unlikely(dma_mapping_error(dev, areq_ctx->mac_buf_dma_addr))) {
1302 SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK for DMA failed\n",
1303 MAX_MAC_SIZE, areq_ctx->mac_buf);
1304 rc = -ENOMEM;
1305 goto aead_map_failure;
1306 }
1307
1308 if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
1309 areq_ctx->ccm_iv0_dma_addr = dma_map_single(dev,
1310 (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET),
1311 AES_BLOCK_SIZE, DMA_TO_DEVICE);
1312
1313 if (unlikely(dma_mapping_error(dev, areq_ctx->ccm_iv0_dma_addr))) {
1314 SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK "
1315 "for DMA failed\n", AES_BLOCK_SIZE,
1316 (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET));
1317 areq_ctx->ccm_iv0_dma_addr = 0;
1318 rc = -ENOMEM;
1319 goto aead_map_failure;
1320 }
1321 if (ssi_aead_handle_config_buf(dev, areq_ctx,
1322 areq_ctx->ccm_config, &sg_data, req->assoclen) != 0) {
1323 rc = -ENOMEM;
1324 goto aead_map_failure;
1325 }
1326 }
1327
1328 #if SSI_CC_HAS_AES_GCM
1329 if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) {
1330 areq_ctx->hkey_dma_addr = dma_map_single(dev,
1331 areq_ctx->hkey, AES_BLOCK_SIZE, DMA_BIDIRECTIONAL);
1332 if (unlikely(dma_mapping_error(dev, areq_ctx->hkey_dma_addr))) {
1333 SSI_LOG_ERR("Mapping hkey %u B at va=%pK for DMA failed\n",
1334 AES_BLOCK_SIZE, areq_ctx->hkey);
1335 rc = -ENOMEM;
1336 goto aead_map_failure;
1337 }
1338
1339 areq_ctx->gcm_block_len_dma_addr = dma_map_single(dev,
1340 &areq_ctx->gcm_len_block, AES_BLOCK_SIZE, DMA_TO_DEVICE);
1341 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_block_len_dma_addr))) {
1342 SSI_LOG_ERR("Mapping gcm_len_block %u B at va=%pK for DMA failed\n",
1343 AES_BLOCK_SIZE, &areq_ctx->gcm_len_block);
1344 rc = -ENOMEM;
1345 goto aead_map_failure;
1346 }
1347
1348 areq_ctx->gcm_iv_inc1_dma_addr = dma_map_single(dev,
1349 areq_ctx->gcm_iv_inc1,
1350 AES_BLOCK_SIZE, DMA_TO_DEVICE);
1351
1352 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc1_dma_addr))) {
1353 SSI_LOG_ERR("Mapping gcm_iv_inc1 %u B at va=%pK "
1354 "for DMA failed\n", AES_BLOCK_SIZE,
1355 (areq_ctx->gcm_iv_inc1));
1356 areq_ctx->gcm_iv_inc1_dma_addr = 0;
1357 rc = -ENOMEM;
1358 goto aead_map_failure;
1359 }
1360
1361 areq_ctx->gcm_iv_inc2_dma_addr = dma_map_single(dev,
1362 areq_ctx->gcm_iv_inc2,
1363 AES_BLOCK_SIZE, DMA_TO_DEVICE);
1364
1365 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc2_dma_addr))) {
1366 SSI_LOG_ERR("Mapping gcm_iv_inc2 %u B at va=%pK "
1367 "for DMA failed\n", AES_BLOCK_SIZE,
1368 (areq_ctx->gcm_iv_inc2));
1369 areq_ctx->gcm_iv_inc2_dma_addr = 0;
1370 rc = -ENOMEM;
1371 goto aead_map_failure;
1372 }
1373 }
1374 #endif /*SSI_CC_HAS_AES_GCM*/
1375
1376 size_to_map = req->cryptlen + req->assoclen;
1377 if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT)
1378 size_to_map += authsize;
1379
1380 if (is_gcm4543)
1381 size_to_map += crypto_aead_ivsize(tfm);
1382 rc = ssi_buffer_mgr_map_scatterlist(dev, req->src,
1383 size_to_map, DMA_BIDIRECTIONAL, &(areq_ctx->src.nents),
1384 LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES + LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
1385 if (unlikely(rc != 0)) {
1386 rc = -ENOMEM;
1387 goto aead_map_failure;
1388 }
1389
1390 if (likely(areq_ctx->is_single_pass)) {
1391 /*
1392 * Create MLLI table for:
1393 * (1) Assoc. data
1394 * (2) Src/Dst SGLs
1395 * Note: IV is contg. buffer (not an SGL)
1396 */
1397 rc = ssi_buffer_mgr_aead_chain_assoc(drvdata, req, &sg_data, true, false);
1398 if (unlikely(rc != 0))
1399 goto aead_map_failure;
1400 rc = ssi_buffer_mgr_aead_chain_iv(drvdata, req, &sg_data, true, false);
1401 if (unlikely(rc != 0))
1402 goto aead_map_failure;
1403 rc = ssi_buffer_mgr_aead_chain_data(drvdata, req, &sg_data, true, false);
1404 if (unlikely(rc != 0))
1405 goto aead_map_failure;
1406 } else { /* DOUBLE-PASS flow */
1407 /*
1408 * Prepare MLLI table(s) in this order:
1409 *
1410 * If ENCRYPT/DECRYPT (inplace):
1411 * (1) MLLI table for assoc
1412 * (2) IV entry (chained right after end of assoc)
1413 * (3) MLLI for src/dst (inplace operation)
1414 *
1415 * If ENCRYPT (non-inplace)
1416 * (1) MLLI table for assoc
1417 * (2) IV entry (chained right after end of assoc)
1418 * (3) MLLI for dst
1419 * (4) MLLI for src
1420 *
1421 * If DECRYPT (non-inplace)
1422 * (1) MLLI table for assoc
1423 * (2) IV entry (chained right after end of assoc)
1424 * (3) MLLI for src
1425 * (4) MLLI for dst
1426 */
1427 rc = ssi_buffer_mgr_aead_chain_assoc(drvdata, req, &sg_data, false, true);
1428 if (unlikely(rc != 0))
1429 goto aead_map_failure;
1430 rc = ssi_buffer_mgr_aead_chain_iv(drvdata, req, &sg_data, false, true);
1431 if (unlikely(rc != 0))
1432 goto aead_map_failure;
1433 rc = ssi_buffer_mgr_aead_chain_data(drvdata, req, &sg_data, true, true);
1434 if (unlikely(rc != 0))
1435 goto aead_map_failure;
1436 }
1437
1438 /* Mlli support -start building the MLLI according to the above results */
1439 if (unlikely(
1440 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) ||
1441 (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI))) {
1442 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1443 rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
1444 if (unlikely(rc != 0))
1445 goto aead_map_failure;
1446
1447 ssi_buffer_mgr_update_aead_mlli_nents(drvdata, req);
1448 SSI_LOG_DEBUG("assoc params mn %d\n", areq_ctx->assoc.mlli_nents);
1449 SSI_LOG_DEBUG("src params mn %d\n", areq_ctx->src.mlli_nents);
1450 SSI_LOG_DEBUG("dst params mn %d\n", areq_ctx->dst.mlli_nents);
1451 }
1452 return 0;
1453
1454 aead_map_failure:
1455 ssi_buffer_mgr_unmap_aead_request(dev, req);
1456 return rc;
1457 }
1458
1459 int ssi_buffer_mgr_map_hash_request_final(
1460 struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, bool do_update)
1461 {
1462 struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1463 struct device *dev = &drvdata->plat_dev->dev;
1464 u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
1465 areq_ctx->buff0;
1466 u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
1467 &areq_ctx->buff0_cnt;
1468 struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1469 struct buffer_array sg_data;
1470 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1471 u32 dummy = 0;
1472 u32 mapped_nents = 0;
1473
1474 SSI_LOG_DEBUG(" final params : curr_buff=%pK "
1475 "curr_buff_cnt=0x%X nbytes = 0x%X "
1476 "src=%pK curr_index=%u\n",
1477 curr_buff, *curr_buff_cnt, nbytes,
1478 src, areq_ctx->buff_index);
1479 /* Init the type of the dma buffer */
1480 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL;
1481 mlli_params->curr_pool = NULL;
1482 sg_data.num_of_buffers = 0;
1483 areq_ctx->in_nents = 0;
1484
1485 if (unlikely(nbytes == 0 && *curr_buff_cnt == 0)) {
1486 /* nothing to do */
1487 return 0;
1488 }
1489
1490 /*TODO: copy data in case that buffer is enough for operation */
1491 /* map the previous buffer */
1492 if (*curr_buff_cnt != 0) {
1493 if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
1494 *curr_buff_cnt, &sg_data) != 0) {
1495 return -ENOMEM;
1496 }
1497 }
1498
1499 if (src && (nbytes > 0) && do_update) {
1500 if (unlikely(ssi_buffer_mgr_map_scatterlist(dev, src,
1501 nbytes,
1502 DMA_TO_DEVICE,
1503 &areq_ctx->in_nents,
1504 LLI_MAX_NUM_OF_DATA_ENTRIES,
1505 &dummy, &mapped_nents))){
1506 goto unmap_curr_buff;
1507 }
1508 if (src && (mapped_nents == 1)
1509 && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL)) {
1510 memcpy(areq_ctx->buff_sg, src,
1511 sizeof(struct scatterlist));
1512 areq_ctx->buff_sg->length = nbytes;
1513 areq_ctx->curr_sg = areq_ctx->buff_sg;
1514 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
1515 } else {
1516 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
1517 }
1518 }
1519
1520 /*build mlli */
1521 if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) {
1522 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1523 /* add the src data to the sg_data */
1524 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
1525 areq_ctx->in_nents,
1526 src,
1527 nbytes, 0,
1528 true, &areq_ctx->mlli_nents);
1529 if (unlikely(ssi_buffer_mgr_generate_mlli(dev, &sg_data,
1530 mlli_params) != 0)) {
1531 goto fail_unmap_din;
1532 }
1533 }
1534 /* change the buffer index for the unmap function */
1535 areq_ctx->buff_index = (areq_ctx->buff_index ^ 1);
1536 SSI_LOG_DEBUG("areq_ctx->data_dma_buf_type = %s\n",
1537 GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type));
1538 return 0;
1539
1540 fail_unmap_din:
1541 dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
1542
1543 unmap_curr_buff:
1544 if (*curr_buff_cnt != 0)
1545 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1546
1547 return -ENOMEM;
1548 }
1549
1550 int ssi_buffer_mgr_map_hash_request_update(
1551 struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, unsigned int block_size)
1552 {
1553 struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1554 struct device *dev = &drvdata->plat_dev->dev;
1555 u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
1556 areq_ctx->buff0;
1557 u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
1558 &areq_ctx->buff0_cnt;
1559 u8 *next_buff = areq_ctx->buff_index ? areq_ctx->buff0 :
1560 areq_ctx->buff1;
1561 u32 *next_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff0_cnt :
1562 &areq_ctx->buff1_cnt;
1563 struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1564 unsigned int update_data_len;
1565 u32 total_in_len = nbytes + *curr_buff_cnt;
1566 struct buffer_array sg_data;
1567 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1568 unsigned int swap_index = 0;
1569 u32 dummy = 0;
1570 u32 mapped_nents = 0;
1571
1572 SSI_LOG_DEBUG(" update params : curr_buff=%pK "
1573 "curr_buff_cnt=0x%X nbytes=0x%X "
1574 "src=%pK curr_index=%u\n",
1575 curr_buff, *curr_buff_cnt, nbytes,
1576 src, areq_ctx->buff_index);
1577 /* Init the type of the dma buffer */
1578 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL;
1579 mlli_params->curr_pool = NULL;
1580 areq_ctx->curr_sg = NULL;
1581 sg_data.num_of_buffers = 0;
1582 areq_ctx->in_nents = 0;
1583
1584 if (unlikely(total_in_len < block_size)) {
1585 SSI_LOG_DEBUG(" less than one block: curr_buff=%pK "
1586 "*curr_buff_cnt=0x%X copy_to=%pK\n",
1587 curr_buff, *curr_buff_cnt,
1588 &curr_buff[*curr_buff_cnt]);
1589 areq_ctx->in_nents =
1590 ssi_buffer_mgr_get_sgl_nents(src,
1591 nbytes,
1592 &dummy, NULL);
1593 sg_copy_to_buffer(src, areq_ctx->in_nents,
1594 &curr_buff[*curr_buff_cnt], nbytes);
1595 *curr_buff_cnt += nbytes;
1596 return 1;
1597 }
1598
1599 /* Calculate the residue size*/
1600 *next_buff_cnt = total_in_len & (block_size - 1);
1601 /* update data len */
1602 update_data_len = total_in_len - *next_buff_cnt;
1603
1604 SSI_LOG_DEBUG(" temp length : *next_buff_cnt=0x%X "
1605 "update_data_len=0x%X\n",
1606 *next_buff_cnt, update_data_len);
1607
1608 /* Copy the new residue to next buffer */
1609 if (*next_buff_cnt != 0) {
1610 SSI_LOG_DEBUG(" handle residue: next buff %pK skip data %u"
1611 " residue %u\n", next_buff,
1612 (update_data_len - *curr_buff_cnt),
1613 *next_buff_cnt);
1614 ssi_buffer_mgr_copy_scatterlist_portion(next_buff, src,
1615 (update_data_len - *curr_buff_cnt),
1616 nbytes, SSI_SG_TO_BUF);
1617 /* change the buffer index for next operation */
1618 swap_index = 1;
1619 }
1620
1621 if (*curr_buff_cnt != 0) {
1622 if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
1623 *curr_buff_cnt, &sg_data) != 0) {
1624 return -ENOMEM;
1625 }
1626 /* change the buffer index for next operation */
1627 swap_index = 1;
1628 }
1629
1630 if (update_data_len > *curr_buff_cnt) {
1631 if (unlikely(ssi_buffer_mgr_map_scatterlist(dev, src,
1632 (update_data_len - *curr_buff_cnt),
1633 DMA_TO_DEVICE,
1634 &areq_ctx->in_nents,
1635 LLI_MAX_NUM_OF_DATA_ENTRIES,
1636 &dummy, &mapped_nents))){
1637 goto unmap_curr_buff;
1638 }
1639 if ((mapped_nents == 1)
1640 && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL)) {
1641 /* only one entry in the SG and no previous data */
1642 memcpy(areq_ctx->buff_sg, src,
1643 sizeof(struct scatterlist));
1644 areq_ctx->buff_sg->length = update_data_len;
1645 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
1646 areq_ctx->curr_sg = areq_ctx->buff_sg;
1647 } else {
1648 areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
1649 }
1650 }
1651
1652 if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) {
1653 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1654 /* add the src data to the sg_data */
1655 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
1656 areq_ctx->in_nents,
1657 src,
1658 (update_data_len - *curr_buff_cnt), 0,
1659 true, &areq_ctx->mlli_nents);
1660 if (unlikely(ssi_buffer_mgr_generate_mlli(dev, &sg_data,
1661 mlli_params) != 0)) {
1662 goto fail_unmap_din;
1663 }
1664 }
1665 areq_ctx->buff_index = (areq_ctx->buff_index ^ swap_index);
1666
1667 return 0;
1668
1669 fail_unmap_din:
1670 dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
1671
1672 unmap_curr_buff:
1673 if (*curr_buff_cnt != 0)
1674 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1675
1676 return -ENOMEM;
1677 }
1678
1679 void ssi_buffer_mgr_unmap_hash_request(
1680 struct device *dev, void *ctx, struct scatterlist *src, bool do_revert)
1681 {
1682 struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1683 u32 *prev_len = areq_ctx->buff_index ? &areq_ctx->buff0_cnt :
1684 &areq_ctx->buff1_cnt;
1685
1686 /*In case a pool was set, a table was
1687 *allocated and should be released
1688 */
1689 if (areq_ctx->mlli_params.curr_pool) {
1690 SSI_LOG_DEBUG("free MLLI buffer: dma=0x%llX virt=%pK\n",
1691 (unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
1692 areq_ctx->mlli_params.mlli_virt_addr);
1693 dma_pool_free(areq_ctx->mlli_params.curr_pool,
1694 areq_ctx->mlli_params.mlli_virt_addr,
1695 areq_ctx->mlli_params.mlli_dma_addr);
1696 }
1697
1698 if ((src) && likely(areq_ctx->in_nents != 0)) {
1699 SSI_LOG_DEBUG("Unmapped sg src: virt=%pK dma=0x%llX len=0x%X\n",
1700 sg_virt(src),
1701 (unsigned long long)sg_dma_address(src),
1702 sg_dma_len(src));
1703 dma_unmap_sg(dev, src,
1704 areq_ctx->in_nents, DMA_TO_DEVICE);
1705 }
1706
1707 if (*prev_len != 0) {
1708 SSI_LOG_DEBUG("Unmapped buffer: areq_ctx->buff_sg=%pK"
1709 " dma=0x%llX len 0x%X\n",
1710 sg_virt(areq_ctx->buff_sg),
1711 (unsigned long long)sg_dma_address(areq_ctx->buff_sg),
1712 sg_dma_len(areq_ctx->buff_sg));
1713 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1714 if (!do_revert) {
1715 /* clean the previous data length for update operation */
1716 *prev_len = 0;
1717 } else {
1718 areq_ctx->buff_index ^= 1;
1719 }
1720 }
1721 }
1722
1723 int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
1724 {
1725 struct buff_mgr_handle *buff_mgr_handle;
1726 struct device *dev = &drvdata->plat_dev->dev;
1727
1728 buff_mgr_handle = (struct buff_mgr_handle *)
1729 kmalloc(sizeof(struct buff_mgr_handle), GFP_KERNEL);
1730 if (!buff_mgr_handle)
1731 return -ENOMEM;
1732
1733 drvdata->buff_mgr_handle = buff_mgr_handle;
1734
1735 buff_mgr_handle->mlli_buffs_pool = dma_pool_create(
1736 "dx_single_mlli_tables", dev,
1737 MAX_NUM_OF_TOTAL_MLLI_ENTRIES *
1738 LLI_ENTRY_BYTE_SIZE,
1739 MLLI_TABLE_MIN_ALIGNMENT, 0);
1740
1741 if (unlikely(!buff_mgr_handle->mlli_buffs_pool))
1742 goto error;
1743
1744 return 0;
1745
1746 error:
1747 ssi_buffer_mgr_fini(drvdata);
1748 return -ENOMEM;
1749 }
1750
1751 int ssi_buffer_mgr_fini(struct ssi_drvdata *drvdata)
1752 {
1753 struct buff_mgr_handle *buff_mgr_handle = drvdata->buff_mgr_handle;
1754
1755 if (buff_mgr_handle) {
1756 dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
1757 kfree(drvdata->buff_mgr_handle);
1758 drvdata->buff_mgr_handle = NULL;
1759 }
1760 return 0;
1761 }