drivers/staging/comedi/drivers/8255_pci.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * COMEDI driver for generic PCI based 8255 digital i/o boards
   4  * Copyright (C) 2012 H Hartley Sweeten <hsweeten@visionengravers.com>
   5  *
   6  * Based on the tested adl_pci7296 driver written by:
   7  *      Jon Grierson <jd@renko.co.uk>
   8  * and the experimental cb_pcidio driver written by:
   9  *      Yoshiya Matsuzaka
  10  *
  11  * COMEDI - Linux Control and Measurement Device Interface
  12  * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
  13  */
  14
  15 /*
  16  * Driver: 8255_pci
  17  * Description: Generic PCI based 8255 Digital I/O boards
  18  * Devices: [ADLink] PCI-7224 (adl_pci-7224), PCI-7248 (adl_pci-7248),
  19  *   PCI-7296 (adl_pci-7296),
  20  *   [Measurement Computing] PCI-DIO24 (cb_pci-dio24),
  21  *   PCI-DIO24H (cb_pci-dio24h), PCI-DIO48H (cb_pci-dio48h),
  22  *   PCI-DIO96H (cb_pci-dio96h),
  23  *   [National Instruments] PCI-DIO-96 (ni_pci-dio-96),
  24  *   PCI-DIO-96B (ni_pci-dio-96b), PXI-6508 (ni_pxi-6508),
  25  *   PCI-6503 (ni_pci-6503), PCI-6503B (ni_pci-6503b),
  26  *   PCI-6503X (ni_pci-6503x), PXI-6503 (ni_pxi-6503)
  27  * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
  28  * Updated: Wed, 12 Sep 2012 11:52:01 -0700
  29  * Status: untested
  30  *
  31  * These boards have one or more 8255 digital I/O chips, each of which
  32  * is supported as a separate 24-channel DIO subdevice.
  33  *
  34  * Boards with 24 DIO channels (1 DIO subdevice):
  35  *
  36  *   PCI-7224, PCI-DIO24, PCI-DIO24H, PCI-6503, PCI-6503B, PCI-6503X,
  37  *   PXI-6503
  38  *
  39  * Boards with 48 DIO channels (2 DIO subdevices):
  40  *
  41  *   PCI-7248, PCI-DIO48H
  42  *
  43  * Boards with 96 DIO channels (4 DIO subdevices):
  44  *
  45  *   PCI-7296, PCI-DIO96H, PCI-DIO-96, PCI-DIO-96B, PXI-6508
  46  *
  47  * Some of these boards also have an 8254 programmable timer/counter
  48  * chip.  This chip is not currently supported by this driver.
  49  *
  50  * Interrupt support for these boards is also not currently supported.
  51  *
  52  * Configuration Options: not applicable, uses PCI auto config.
  53  */
  54
  55 #include <linux/module.h>
  56
  57 #include "../comedi_pci.h"
  58
  59 #include "8255.h"
  60
  61 enum pci_8255_boardid {
  62         BOARD_ADLINK_PCI7224,
  63         BOARD_ADLINK_PCI7248,
  64         BOARD_ADLINK_PCI7296,
  65         BOARD_CB_PCIDIO24,
  66         BOARD_CB_PCIDIO24H,
  67         BOARD_CB_PCIDIO48H_OLD,
  68         BOARD_CB_PCIDIO48H_NEW,
  69         BOARD_CB_PCIDIO96H,
  70         BOARD_NI_PCIDIO96,
  71         BOARD_NI_PCIDIO96B,
  72         BOARD_NI_PXI6508,
  73         BOARD_NI_PCI6503,
  74         BOARD_NI_PCI6503B,
  75         BOARD_NI_PCI6503X,
  76         BOARD_NI_PXI_6503,
  77 };
  78
  79 struct pci_8255_boardinfo {
  80         const char *name;
  81         int dio_badr;
  82         int n_8255;
  83         unsigned int has_mite:1;
  84 };
  85
  86 static const struct pci_8255_boardinfo pci_8255_boards[] = {
  87         [BOARD_ADLINK_PCI7224] = {
  88                 .name           = "adl_pci-7224",
  89                 .dio_badr       = 2,
  90                 .n_8255         = 1,
  91         },
  92         [BOARD_ADLINK_PCI7248] = {
  93                 .name           = "adl_pci-7248",
  94                 .dio_badr       = 2,
  95                 .n_8255         = 2,
  96         },
  97         [BOARD_ADLINK_PCI7296] = {
  98                 .name           = "adl_pci-7296",
  99                 .dio_badr       = 2,
 100                 .n_8255         = 4,
 101         },
 102         [BOARD_CB_PCIDIO24] = {
 103                 .name           = "cb_pci-dio24",
 104                 .dio_badr       = 2,
 105                 .n_8255         = 1,
 106         },
 107         [BOARD_CB_PCIDIO24H] = {
 108                 .name           = "cb_pci-dio24h",
 109                 .dio_badr       = 2,
 110                 .n_8255         = 1,
 111         },
 112         [BOARD_CB_PCIDIO48H_OLD] = {
 113                 .name           = "cb_pci-dio48h",
 114                 .dio_badr       = 1,
 115                 .n_8255         = 2,
 116         },
 117         [BOARD_CB_PCIDIO48H_NEW] = {
 118                 .name           = "cb_pci-dio48h",
 119                 .dio_badr       = 2,
 120                 .n_8255         = 2,
 121         },
 122         [BOARD_CB_PCIDIO96H] = {
 123                 .name           = "cb_pci-dio96h",
 124                 .dio_badr       = 2,
 125                 .n_8255         = 4,
 126         },
 127         [BOARD_NI_PCIDIO96] = {
 128                 .name           = "ni_pci-dio-96",
 129                 .dio_badr       = 1,
 130                 .n_8255         = 4,
 131                 .has_mite       = 1,
 132         },
 133         [BOARD_NI_PCIDIO96B] = {
 134                 .name           = "ni_pci-dio-96b",
 135                 .dio_badr       = 1,
 136                 .n_8255         = 4,
 137                 .has_mite       = 1,
 138         },
 139         [BOARD_NI_PXI6508] = {
 140                 .name           = "ni_pxi-6508",
 141                 .dio_badr       = 1,
 142                 .n_8255         = 4,
 143                 .has_mite       = 1,
 144         },
 145         [BOARD_NI_PCI6503] = {
 146                 .name           = "ni_pci-6503",
 147                 .dio_badr       = 1,
 148                 .n_8255         = 1,
 149                 .has_mite       = 1,
 150         },
 151         [BOARD_NI_PCI6503B] = {
 152                 .name           = "ni_pci-6503b",
 153                 .dio_badr       = 1,
 154                 .n_8255         = 1,
 155                 .has_mite       = 1,
 156         },
 157         [BOARD_NI_PCI6503X] = {
 158                 .name           = "ni_pci-6503x",
 159                 .dio_badr       = 1,
 160                 .n_8255         = 1,
 161                 .has_mite       = 1,
 162         },
 163         [BOARD_NI_PXI_6503] = {
 164                 .name           = "ni_pxi-6503",
 165                 .dio_badr       = 1,
 166                 .n_8255         = 1,
 167                 .has_mite       = 1,
 168         },
 169 };
 170
 171 /* ripped from mite.h and mite_setup2() to avoid mite dependency */
 172 #define MITE_IODWBSR    0xc0    /* IO Device Window Base Size Register */
 173 #define WENAB           BIT(7)  /* window enable */
 174
 175 static int pci_8255_mite_init(struct pci_dev *pcidev)
 176 {
 177         void __iomem *mite_base;
 178         u32 main_phys_addr;
 179
 180         /* ioremap the MITE registers (BAR 0) temporarily */
 181         mite_base = pci_ioremap_bar(pcidev, 0);
 182         if (!mite_base)
 183                 return -ENOMEM;
 184
 185         /* set data window to main registers (BAR 1) */
 186         main_phys_addr = pci_resource_start(pcidev, 1);
 187         writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
 188
 189         /* finished with MITE registers */
 190         iounmap(mite_base);
 191         return 0;
 192 }
 193
 194 static int pci_8255_auto_attach(struct comedi_device *dev,
 195                                 unsigned long context)
 196 {
 197         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
 198         const struct pci_8255_boardinfo *board = NULL;
 199         struct comedi_subdevice *s;
 200         int ret;
 201         int i;
 202
 203         if (context < ARRAY_SIZE(pci_8255_boards))
 204                 board = &pci_8255_boards[context];
 205         if (!board)
 206                 return -ENODEV;
 207         dev->board_ptr = board;
 208         dev->board_name = board->name;
 209
 210         ret = comedi_pci_enable(dev);
 211         if (ret)
 212                 return ret;
 213
 214         if (board->has_mite) {
 215                 ret = pci_8255_mite_init(pcidev);
 216                 if (ret)
 217                         return ret;
 218         }
 219
 220         if ((pci_resource_flags(pcidev, board->dio_badr) & IORESOURCE_MEM)) {
 221                 dev->mmio = pci_ioremap_bar(pcidev, board->dio_badr);
 222                 if (!dev->mmio)
 223                         return -ENOMEM;
 224         } else {
 225                 dev->iobase = pci_resource_start(pcidev, board->dio_badr);
 226         }
 227
 228         /*
 229          * One, two, or four subdevices are setup by this driver depending
 230          * on the number of channels provided by the board. Each subdevice
 231          * has 24 channels supported by the 8255 module.
 232          */
 233         ret = comedi_alloc_subdevices(dev, board->n_8255);
 234         if (ret)
 235                 return ret;
 236
 237         for (i = 0; i < board->n_8255; i++) {
 238                 s = &dev->subdevices[i];
 239                 if (dev->mmio)
 240                         ret = subdev_8255_mm_init(dev, s, NULL, i * I8255_SIZE);
 241                 else
 242                         ret = subdev_8255_init(dev, s, NULL, i * I8255_SIZE);
 243                 if (ret)
 244                         return ret;
 245         }
 246
 247         return 0;
 248 }
 249
 250 static struct comedi_driver pci_8255_driver = {
 251         .driver_name    = "8255_pci",
 252         .module         = THIS_MODULE,
 253         .auto_attach    = pci_8255_auto_attach,
 254         .detach         = comedi_pci_detach,
 255 };
 256
 257 static int pci_8255_pci_probe(struct pci_dev *dev,
 258                               const struct pci_device_id *id)
 259 {
 260         return comedi_pci_auto_config(dev, &pci_8255_driver, id->driver_data);
 261 }
 262
 263 static const struct pci_device_id pci_8255_pci_table[] = {
 264         { PCI_VDEVICE(ADLINK, 0x7224), BOARD_ADLINK_PCI7224 },
 265         { PCI_VDEVICE(ADLINK, 0x7248), BOARD_ADLINK_PCI7248 },
 266         { PCI_VDEVICE(ADLINK, 0x7296), BOARD_ADLINK_PCI7296 },
 267         { PCI_VDEVICE(CB, 0x0028), BOARD_CB_PCIDIO24 },
 268         { PCI_VDEVICE(CB, 0x0014), BOARD_CB_PCIDIO24H },
 269         { PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, 0x0000, 0x0000),
 270           .driver_data = BOARD_CB_PCIDIO48H_OLD },
 271         { PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, PCI_VENDOR_ID_CB, 0x000b),
 272           .driver_data = BOARD_CB_PCIDIO48H_NEW },
 273         { PCI_VDEVICE(CB, 0x0017), BOARD_CB_PCIDIO96H },
 274         { PCI_VDEVICE(NI, 0x0160), BOARD_NI_PCIDIO96 },
 275         { PCI_VDEVICE(NI, 0x1630), BOARD_NI_PCIDIO96B },
 276         { PCI_VDEVICE(NI, 0x13c0), BOARD_NI_PXI6508 },
 277         { PCI_VDEVICE(NI, 0x0400), BOARD_NI_PCI6503 },
 278         { PCI_VDEVICE(NI, 0x1250), BOARD_NI_PCI6503B },
 279         { PCI_VDEVICE(NI, 0x17d0), BOARD_NI_PCI6503X },
 280         { PCI_VDEVICE(NI, 0x1800), BOARD_NI_PXI_6503 },
 281         { 0 }
 282 };
 283 MODULE_DEVICE_TABLE(pci, pci_8255_pci_table);
 284
 285 static struct pci_driver pci_8255_pci_driver = {
 286         .name           = "8255_pci",
 287         .id_table       = pci_8255_pci_table,
 288         .probe          = pci_8255_pci_probe,
 289         .remove         = comedi_pci_auto_unconfig,
 290 };
 291 module_comedi_pci_driver(pci_8255_driver, pci_8255_pci_driver);
 292
 293 MODULE_DESCRIPTION("COMEDI - Generic PCI based 8255 Digital I/O boards");
 294 MODULE_AUTHOR("Comedi http://www.comedi.org");
 295 MODULE_LICENSE("GPL");