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1 /*
2 comedi/drivers/amplc_pci224.c
3 Driver for Amplicon PCI224 and PCI234 AO boards.
4
5 Copyright (C) 2005 MEV Ltd. <http://www.mev.co.uk/>
6
7 COMEDI - Linux Control and Measurement Device Interface
8 Copyright (C) 1998,2000 David A. Schleef <ds@schleef.org>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24 */
25 /*
26 Driver: amplc_pci224
27 Description: Amplicon PCI224, PCI234
28 Author: Ian Abbott <abbotti@mev.co.uk>
29 Devices: [Amplicon] PCI224 (amplc_pci224 or pci224),
30 PCI234 (amplc_pci224 or pci234)
31 Updated: Wed, 22 Oct 2008 12:25:08 +0100
32 Status: works, but see caveats
33
34 Supports:
35
36 - ao_insn read/write
37 - ao_do_cmd mode with the following sources:
38
39 - start_src TRIG_INT TRIG_EXT
40 - scan_begin_src TRIG_TIMER TRIG_EXT
41 - convert_src TRIG_NOW
42 - scan_end_src TRIG_COUNT
43 - stop_src TRIG_COUNT TRIG_EXT TRIG_NONE
44
45 The channel list must contain at least one channel with no repeated
46 channels. The scan end count must equal the number of channels in
47 the channel list.
48
49 There is only one external trigger source so only one of start_src,
50 scan_begin_src or stop_src may use TRIG_EXT.
51
52 Configuration options - PCI224:
53 [0] - PCI bus of device (optional).
54 [1] - PCI slot of device (optional).
55 If bus/slot is not specified, the first available PCI device
56 will be used.
57 [2] - Select available ranges according to jumper LK1. All channels
58 are set to the same range:
59 0=Jumper position 1-2 (factory default), 4 software-selectable
60 internal voltage references, giving 4 bipolar and 4 unipolar
61 ranges:
62 [-10V,+10V], [-5V,+5V], [-2.5V,+2.5V], [-1.25V,+1.25V],
63 [0,+10V], [0,+5V], [0,+2.5V], [0,1.25V].
64 1=Jumper position 2-3, 1 external voltage reference, giving
65 1 bipolar and 1 unipolar range:
66 [-Vext,+Vext], [0,+Vext].
67
68 Configuration options - PCI234:
69 [0] - PCI bus of device (optional).
70 [1] - PCI slot of device (optional).
71 If bus/slot is not specified, the first available PCI device
72 will be used.
73 [2] - Select internal or external voltage reference according to
74 jumper LK1. This affects all channels:
75 0=Jumper position 1-2 (factory default), Vref=5V internal.
76 1=Jumper position 2-3, Vref=Vext external.
77 [3] - Select channel 0 range according to jumper LK2:
78 0=Jumper position 2-3 (factory default), range [-2*Vref,+2*Vref]
79 (10V bipolar when options[2]=0).
80 1=Jumper position 1-2, range [-Vref,+Vref]
81 (5V bipolar when options[2]=0).
82 [4] - Select channel 1 range according to jumper LK3: cf. options[3].
83 [5] - Select channel 2 range according to jumper LK4: cf. options[3].
84 [6] - Select channel 3 range according to jumper LK5: cf. options[3].
85
86 Passing a zero for an option is the same as leaving it unspecified.
87
88 Caveats:
89
90 1) All channels on the PCI224 share the same range. Any change to the
91 range as a result of insn_write or a streaming command will affect
92 the output voltages of all channels, including those not specified
93 by the instruction or command.
94
95 2) For the analog output command, the first scan may be triggered
96 falsely at the start of acquisition. This occurs when the DAC scan
97 trigger source is switched from 'none' to 'timer' (scan_begin_src =
98 TRIG_TIMER) or 'external' (scan_begin_src == TRIG_EXT) at the start
99 of acquisition and the trigger source is at logic level 1 at the
100 time of the switch. This is very likely for TRIG_TIMER. For
101 TRIG_EXT, it depends on the state of the external line and whether
102 the CR_INVERT flag has been set. The remaining scans are triggered
103 correctly.
104 */
105
106 #include <linux/interrupt.h>
107 #include <linux/slab.h>
108
109 #include "../comedidev.h"
110
111 #include "comedi_fc.h"
112 #include "8253.h"
113
114 #define DRIVER_NAME "amplc_pci224"
115
116 /*
117 * PCI IDs.
118 */
119 #define PCI_DEVICE_ID_AMPLICON_PCI224 0x0007
120 #define PCI_DEVICE_ID_AMPLICON_PCI234 0x0008
121 #define PCI_DEVICE_ID_INVALID 0xffff
122
123 /*
124 * PCI224/234 i/o space 1 (PCIBAR2) registers.
125 */
126 #define PCI224_IO1_SIZE 0x20 /* Size of i/o space 1 (8-bit registers) */
127 #define PCI224_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
128 #define PCI224_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
129 #define PCI224_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
130 #define PCI224_Z2_CTC 0x17 /* 82C54 counter/timer control word */
131 #define PCI224_ZCLK_SCE 0x1A /* Group Z Clock Configuration Register */
132 #define PCI224_ZGAT_SCE 0x1D /* Group Z Gate Configuration Register */
133 #define PCI224_INT_SCE 0x1E /* ISR Interrupt source mask register */
134 /* /Interrupt status */
135
136 /*
137 * PCI224/234 i/o space 2 (PCIBAR3) 16-bit registers.
138 */
139 #define PCI224_IO2_SIZE 0x10 /* Size of i/o space 2 (16-bit registers). */
140 #define PCI224_DACDATA 0x00 /* (w-o) DAC FIFO data. */
141 #define PCI224_SOFTTRIG 0x00 /* (r-o) DAC software scan trigger. */
142 #define PCI224_DACCON 0x02 /* (r/w) DAC status/configuration. */
143 #define PCI224_FIFOSIZ 0x04 /* (w-o) FIFO size for wraparound mode. */
144 #define PCI224_DACCEN 0x06 /* (w-o) DAC channel enable register. */
145
146 /*
147 * DACCON values.
148 */
149 /* (r/w) Scan trigger. */
150 #define PCI224_DACCON_TRIG_MASK (7 << 0)
151 #define PCI224_DACCON_TRIG_NONE (0 << 0) /* none */
152 #define PCI224_DACCON_TRIG_SW (1 << 0) /* software trig */
153 #define PCI224_DACCON_TRIG_EXTP (2 << 0) /* ext +ve edge */
154 #define PCI224_DACCON_TRIG_EXTN (3 << 0) /* ext -ve edge */
155 #define PCI224_DACCON_TRIG_Z2CT0 (4 << 0) /* Z2 CT0 out */
156 #define PCI224_DACCON_TRIG_Z2CT1 (5 << 0) /* Z2 CT1 out */
157 #define PCI224_DACCON_TRIG_Z2CT2 (6 << 0) /* Z2 CT2 out */
158 /* (r/w) Polarity (PCI224 only, PCI234 always bipolar!). */
159 #define PCI224_DACCON_POLAR_MASK (1 << 3)
160 #define PCI224_DACCON_POLAR_UNI (0 << 3) /* range [0,Vref] */
161 #define PCI224_DACCON_POLAR_BI (1 << 3) /* range [-Vref,Vref] */
162 /* (r/w) Internal Vref (PCI224 only, when LK1 in position 1-2). */
163 #define PCI224_DACCON_VREF_MASK (3 << 4)
164 #define PCI224_DACCON_VREF_1_25 (0 << 4) /* Vref = 1.25V */
165 #define PCI224_DACCON_VREF_2_5 (1 << 4) /* Vref = 2.5V */
166 #define PCI224_DACCON_VREF_5 (2 << 4) /* Vref = 5V */
167 #define PCI224_DACCON_VREF_10 (3 << 4) /* Vref = 10V */
168 /* (r/w) Wraparound mode enable (to play back stored waveform). */
169 #define PCI224_DACCON_FIFOWRAP (1 << 7)
170 /* (r/w) FIFO enable. It MUST be set! */
171 #define PCI224_DACCON_FIFOENAB (1 << 8)
172 /* (r/w) FIFO interrupt trigger level (most values are not very useful). */
173 #define PCI224_DACCON_FIFOINTR_MASK (7 << 9)
174 #define PCI224_DACCON_FIFOINTR_EMPTY (0 << 9) /* when empty */
175 #define PCI224_DACCON_FIFOINTR_NEMPTY (1 << 9) /* when not empty */
176 #define PCI224_DACCON_FIFOINTR_NHALF (2 << 9) /* when not half full */
177 #define PCI224_DACCON_FIFOINTR_HALF (3 << 9) /* when half full */
178 #define PCI224_DACCON_FIFOINTR_NFULL (4 << 9) /* when not full */
179 #define PCI224_DACCON_FIFOINTR_FULL (5 << 9) /* when full */
180 /* (r-o) FIFO fill level. */
181 #define PCI224_DACCON_FIFOFL_MASK (7 << 12)
182 #define PCI224_DACCON_FIFOFL_EMPTY (1 << 12) /* 0 */
183 #define PCI224_DACCON_FIFOFL_ONETOHALF (0 << 12) /* [1,2048] */
184 #define PCI224_DACCON_FIFOFL_HALFTOFULL (4 << 12) /* [2049,4095] */
185 #define PCI224_DACCON_FIFOFL_FULL (6 << 12) /* 4096 */
186 /* (r-o) DAC busy flag. */
187 #define PCI224_DACCON_BUSY (1 << 15)
188 /* (w-o) FIFO reset. */
189 #define PCI224_DACCON_FIFORESET (1 << 12)
190 /* (w-o) Global reset (not sure what it does). */
191 #define PCI224_DACCON_GLOBALRESET (1 << 13)
192
193 /*
194 * DAC FIFO size.
195 */
196 #define PCI224_FIFO_SIZE 4096
197
198 /*
199 * DAC FIFO guaranteed minimum room available, depending on reported fill level.
200 * The maximum room available depends on the reported fill level and how much
201 * has been written!
202 */
203 #define PCI224_FIFO_ROOM_EMPTY PCI224_FIFO_SIZE
204 #define PCI224_FIFO_ROOM_ONETOHALF (PCI224_FIFO_SIZE / 2)
205 #define PCI224_FIFO_ROOM_HALFTOFULL 1
206 #define PCI224_FIFO_ROOM_FULL 0
207
208 /*
209 * Counter/timer clock input configuration sources.
210 */
211 #define CLK_CLK 0 /* reserved (channel-specific clock) */
212 #define CLK_10MHZ 1 /* internal 10 MHz clock */
213 #define CLK_1MHZ 2 /* internal 1 MHz clock */
214 #define CLK_100KHZ 3 /* internal 100 kHz clock */
215 #define CLK_10KHZ 4 /* internal 10 kHz clock */
216 #define CLK_1KHZ 5 /* internal 1 kHz clock */
217 #define CLK_OUTNM1 6 /* output of channel-1 modulo total */
218 #define CLK_EXT 7 /* external clock */
219 /* Macro to construct clock input configuration register value. */
220 #define CLK_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
221 /* Timebases in ns. */
222 #define TIMEBASE_10MHZ 100
223 #define TIMEBASE_1MHZ 1000
224 #define TIMEBASE_100KHZ 10000
225 #define TIMEBASE_10KHZ 100000
226 #define TIMEBASE_1KHZ 1000000
227
228 /*
229 * Counter/timer gate input configuration sources.
230 */
231 #define GAT_VCC 0 /* VCC (i.e. enabled) */
232 #define GAT_GND 1 /* GND (i.e. disabled) */
233 #define GAT_EXT 2 /* reserved (external gate input) */
234 #define GAT_NOUTNM2 3 /* inverted output of channel-2 modulo total */
235 /* Macro to construct gate input configuration register value. */
236 #define GAT_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
237
238 /*
239 * Summary of CLK_OUTNM1 and GAT_NOUTNM2 connections for PCI224 and PCI234:
240 *
241 * Channel's Channel's
242 * clock input gate input
243 * Channel CLK_OUTNM1 GAT_NOUTNM2
244 * ------- ---------- -----------
245 * Z2-CT0 Z2-CT2-OUT /Z2-CT1-OUT
246 * Z2-CT1 Z2-CT0-OUT /Z2-CT2-OUT
247 * Z2-CT2 Z2-CT1-OUT /Z2-CT0-OUT
248 */
249
250 /*
251 * Interrupt enable/status bits
252 */
253 #define PCI224_INTR_EXT 0x01 /* rising edge on external input */
254 #define PCI224_INTR_DAC 0x04 /* DAC (FIFO) interrupt */
255 #define PCI224_INTR_Z2CT1 0x20 /* rising edge on Z2-CT1 output */
256
257 #define PCI224_INTR_EDGE_BITS (PCI224_INTR_EXT | PCI224_INTR_Z2CT1)
258 #define PCI224_INTR_LEVEL_BITS PCI224_INTR_DACFIFO
259
260 /*
261 * Handy macros.
262 */
263
264 /* Combine old and new bits. */
265 #define COMBINE(old, new, mask) (((old) & ~(mask)) | ((new) & (mask)))
266
267 /* Current CPU. XXX should this be hard_smp_processor_id()? */
268 #define THISCPU smp_processor_id()
269
270 /* State bits for use with atomic bit operations. */
271 #define AO_CMD_STARTED 0
272
273 /*
274 * Range tables.
275 */
276
277 /* The software selectable internal ranges for PCI224 (option[2] == 0). */
278 static const struct comedi_lrange range_pci224_internal = {
279 8,
280 {
281 BIP_RANGE(10),
282 BIP_RANGE(5),
283 BIP_RANGE(2.5),
284 BIP_RANGE(1.25),
285 UNI_RANGE(10),
286 UNI_RANGE(5),
287 UNI_RANGE(2.5),
288 UNI_RANGE(1.25),
289 }
290 };
291
292 static const unsigned short hwrange_pci224_internal[8] = {
293 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_10,
294 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_5,
295 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_2_5,
296 PCI224_DACCON_POLAR_BI | PCI224_DACCON_VREF_1_25,
297 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_10,
298 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_5,
299 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_2_5,
300 PCI224_DACCON_POLAR_UNI | PCI224_DACCON_VREF_1_25,
301 };
302
303 /* The software selectable external ranges for PCI224 (option[2] == 1). */
304 static const struct comedi_lrange range_pci224_external = {
305 2,
306 {
307 RANGE_ext(-1, 1), /* bipolar [-Vref,+Vref] */
308 RANGE_ext(0, 1), /* unipolar [0,+Vref] */
309 }
310 };
311
312 static const unsigned short hwrange_pci224_external[2] = {
313 PCI224_DACCON_POLAR_BI,
314 PCI224_DACCON_POLAR_UNI,
315 };
316
317 /* The hardware selectable Vref*2 external range for PCI234
318 * (option[2] == 1, option[3+n] == 0). */
319 static const struct comedi_lrange range_pci234_ext2 = {
320 1,
321 {
322 RANGE_ext(-2, 2),
323 }
324 };
325
326 /* The hardware selectable Vref external range for PCI234
327 * (option[2] == 1, option[3+n] == 1). */
328 static const struct comedi_lrange range_pci234_ext = {
329 1,
330 {
331 RANGE_ext(-1, 1),
332 }
333 };
334
335 /* This serves for all the PCI234 ranges. */
336 static const unsigned short hwrange_pci234[1] = {
337 PCI224_DACCON_POLAR_BI, /* bipolar - hardware ignores it! */
338 };
339
340 /*
341 * Board descriptions.
342 */
343
344 enum pci224_model { any_model, pci224_model, pci234_model };
345
346 struct pci224_board {
347 const char *name;
348 unsigned short devid;
349 enum pci224_model model;
350 unsigned int ao_chans;
351 unsigned int ao_bits;
352 };
353
354 static const struct pci224_board pci224_boards[] = {
355 {
356 .name = "pci224",
357 .devid = PCI_DEVICE_ID_AMPLICON_PCI224,
358 .model = pci224_model,
359 .ao_chans = 16,
360 .ao_bits = 12,
361 },
362 {
363 .name = "pci234",
364 .devid = PCI_DEVICE_ID_AMPLICON_PCI234,
365 .model = pci234_model,
366 .ao_chans = 4,
367 .ao_bits = 16,
368 },
369 {
370 .name = DRIVER_NAME,
371 .devid = PCI_DEVICE_ID_INVALID,
372 .model = any_model, /* wildcard */
373 },
374 };
375
376 /* this structure is for data unique to this hardware driver. If
377 several hardware drivers keep similar information in this structure,
378 feel free to suggest moving the variable to the struct comedi_device struct. */
379 struct pci224_private {
380 const unsigned short *hwrange;
381 unsigned long iobase1;
382 unsigned long state;
383 spinlock_t ao_spinlock;
384 unsigned int *ao_readback;
385 short *ao_scan_vals;
386 unsigned char *ao_scan_order;
387 int intr_cpuid;
388 short intr_running;
389 unsigned short daccon;
390 unsigned int cached_div1;
391 unsigned int cached_div2;
392 unsigned int ao_stop_count;
393 short ao_stop_continuous;
394 unsigned short ao_enab; /* max 16 channels so 'short' will do */
395 unsigned char intsce;
396 };
397
398 /*
399 * Called from the 'insn_write' function to perform a single write.
400 */
401 static void
402 pci224_ao_set_data(struct comedi_device *dev, int chan, int range,
403 unsigned int data)
404 {
405 const struct pci224_board *thisboard = comedi_board(dev);
406 struct pci224_private *devpriv = dev->private;
407 unsigned short mangled;
408
409 /* Store unmangled data for readback. */
410 devpriv->ao_readback[chan] = data;
411 /* Enable the channel. */
412 outw(1 << chan, dev->iobase + PCI224_DACCEN);
413 /* Set range and reset FIFO. */
414 devpriv->daccon = COMBINE(devpriv->daccon, devpriv->hwrange[range],
415 (PCI224_DACCON_POLAR_MASK |
416 PCI224_DACCON_VREF_MASK));
417 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
418 dev->iobase + PCI224_DACCON);
419 /*
420 * Mangle the data. The hardware expects:
421 * - bipolar: 16-bit 2's complement
422 * - unipolar: 16-bit unsigned
423 */
424 mangled = (unsigned short)data << (16 - thisboard->ao_bits);
425 if ((devpriv->daccon & PCI224_DACCON_POLAR_MASK) ==
426 PCI224_DACCON_POLAR_BI) {
427 mangled ^= 0x8000;
428 }
429 /* Write mangled data to the FIFO. */
430 outw(mangled, dev->iobase + PCI224_DACDATA);
431 /* Trigger the conversion. */
432 inw(dev->iobase + PCI224_SOFTTRIG);
433 }
434
435 /*
436 * 'insn_write' function for AO subdevice.
437 */
438 static int
439 pci224_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s,
440 struct comedi_insn *insn, unsigned int *data)
441 {
442 int i;
443 int chan, range;
444
445 /* Unpack channel and range. */
446 chan = CR_CHAN(insn->chanspec);
447 range = CR_RANGE(insn->chanspec);
448
449 /* Writing a list of values to an AO channel is probably not
450 * very useful, but that's how the interface is defined. */
451 for (i = 0; i < insn->n; i++)
452 pci224_ao_set_data(dev, chan, range, data[i]);
453
454 return i;
455 }
456
457 /*
458 * 'insn_read' function for AO subdevice.
459 *
460 * N.B. The value read will not be valid if the DAC channel has
461 * never been written successfully since the device was attached
462 * or since the channel has been used by an AO streaming write
463 * command.
464 */
465 static int
466 pci224_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
467 struct comedi_insn *insn, unsigned int *data)
468 {
469 struct pci224_private *devpriv = dev->private;
470 int i;
471 int chan;
472
473 chan = CR_CHAN(insn->chanspec);
474
475 for (i = 0; i < insn->n; i++)
476 data[i] = devpriv->ao_readback[chan];
477
478
479 return i;
480 }
481
482 /*
483 * Just a wrapper for the inline function 'i8253_cascade_ns_to_timer'.
484 */
485 static void
486 pci224_cascade_ns_to_timer(int osc_base, unsigned int *d1, unsigned int *d2,
487 unsigned int *nanosec, int round_mode)
488 {
489 i8253_cascade_ns_to_timer(osc_base, d1, d2, nanosec, round_mode);
490 }
491
492 /*
493 * Kills a command running on the AO subdevice.
494 */
495 static void pci224_ao_stop(struct comedi_device *dev,
496 struct comedi_subdevice *s)
497 {
498 struct pci224_private *devpriv = dev->private;
499 unsigned long flags;
500
501 if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state))
502 return;
503
504
505 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
506 /* Kill the interrupts. */
507 devpriv->intsce = 0;
508 outb(0, devpriv->iobase1 + PCI224_INT_SCE);
509 /*
510 * Interrupt routine may or may not be running. We may or may not
511 * have been called from the interrupt routine (directly or
512 * indirectly via a comedi_events() callback routine). It's highly
513 * unlikely that we've been called from some other interrupt routine
514 * but who knows what strange things coders get up to!
515 *
516 * If the interrupt routine is currently running, wait for it to
517 * finish, unless we appear to have been called via the interrupt
518 * routine.
519 */
520 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) {
521 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
522 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
523 }
524 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
525 /* Reconfigure DAC for insn_write usage. */
526 outw(0, dev->iobase + PCI224_DACCEN); /* Disable channels. */
527 devpriv->daccon = COMBINE(devpriv->daccon,
528 PCI224_DACCON_TRIG_SW |
529 PCI224_DACCON_FIFOINTR_EMPTY,
530 PCI224_DACCON_TRIG_MASK |
531 PCI224_DACCON_FIFOINTR_MASK);
532 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
533 dev->iobase + PCI224_DACCON);
534 }
535
536 /*
537 * Handles start of acquisition for the AO subdevice.
538 */
539 static void pci224_ao_start(struct comedi_device *dev,
540 struct comedi_subdevice *s)
541 {
542 struct pci224_private *devpriv = dev->private;
543 struct comedi_cmd *cmd = &s->async->cmd;
544 unsigned long flags;
545
546 set_bit(AO_CMD_STARTED, &devpriv->state);
547 if (!devpriv->ao_stop_continuous && devpriv->ao_stop_count == 0) {
548 /* An empty acquisition! */
549 pci224_ao_stop(dev, s);
550 s->async->events |= COMEDI_CB_EOA;
551 comedi_event(dev, s);
552 } else {
553 /* Enable interrupts. */
554 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
555 if (cmd->stop_src == TRIG_EXT)
556 devpriv->intsce = PCI224_INTR_EXT | PCI224_INTR_DAC;
557 else
558 devpriv->intsce = PCI224_INTR_DAC;
559
560 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE);
561 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
562 }
563 }
564
565 /*
566 * Handles interrupts from the DAC FIFO.
567 */
568 static void pci224_ao_handle_fifo(struct comedi_device *dev,
569 struct comedi_subdevice *s)
570 {
571 struct pci224_private *devpriv = dev->private;
572 struct comedi_cmd *cmd = &s->async->cmd;
573 unsigned int num_scans;
574 unsigned int room;
575 unsigned short dacstat;
576 unsigned int i, n;
577 unsigned int bytes_per_scan;
578
579 if (cmd->chanlist_len) {
580 bytes_per_scan = cmd->chanlist_len * sizeof(short);
581 } else {
582 /* Shouldn't get here! */
583 bytes_per_scan = sizeof(short);
584 }
585 /* Determine number of scans available in buffer. */
586 num_scans = comedi_buf_read_n_available(s->async) / bytes_per_scan;
587 if (!devpriv->ao_stop_continuous) {
588 /* Fixed number of scans. */
589 if (num_scans > devpriv->ao_stop_count)
590 num_scans = devpriv->ao_stop_count;
591
592 }
593
594 /* Determine how much room is in the FIFO (in samples). */
595 dacstat = inw(dev->iobase + PCI224_DACCON);
596 switch (dacstat & PCI224_DACCON_FIFOFL_MASK) {
597 case PCI224_DACCON_FIFOFL_EMPTY:
598 room = PCI224_FIFO_ROOM_EMPTY;
599 if (!devpriv->ao_stop_continuous && devpriv->ao_stop_count == 0) {
600 /* FIFO empty at end of counted acquisition. */
601 pci224_ao_stop(dev, s);
602 s->async->events |= COMEDI_CB_EOA;
603 comedi_event(dev, s);
604 return;
605 }
606 break;
607 case PCI224_DACCON_FIFOFL_ONETOHALF:
608 room = PCI224_FIFO_ROOM_ONETOHALF;
609 break;
610 case PCI224_DACCON_FIFOFL_HALFTOFULL:
611 room = PCI224_FIFO_ROOM_HALFTOFULL;
612 break;
613 default:
614 room = PCI224_FIFO_ROOM_FULL;
615 break;
616 }
617 if (room >= PCI224_FIFO_ROOM_ONETOHALF) {
618 /* FIFO is less than half-full. */
619 if (num_scans == 0) {
620 /* Nothing left to put in the FIFO. */
621 pci224_ao_stop(dev, s);
622 s->async->events |= COMEDI_CB_OVERFLOW;
623 dev_err(dev->class_dev, "AO buffer underrun\n");
624 }
625 }
626 /* Determine how many new scans can be put in the FIFO. */
627 if (cmd->chanlist_len)
628 room /= cmd->chanlist_len;
629
630 /* Determine how many scans to process. */
631 if (num_scans > room)
632 num_scans = room;
633
634 /* Process scans. */
635 for (n = 0; n < num_scans; n++) {
636 cfc_read_array_from_buffer(s, &devpriv->ao_scan_vals[0],
637 bytes_per_scan);
638 for (i = 0; i < cmd->chanlist_len; i++) {
639 outw(devpriv->ao_scan_vals[devpriv->ao_scan_order[i]],
640 dev->iobase + PCI224_DACDATA);
641 }
642 }
643 if (!devpriv->ao_stop_continuous) {
644 devpriv->ao_stop_count -= num_scans;
645 if (devpriv->ao_stop_count == 0) {
646 /*
647 * Change FIFO interrupt trigger level to wait
648 * until FIFO is empty.
649 */
650 devpriv->daccon = COMBINE(devpriv->daccon,
651 PCI224_DACCON_FIFOINTR_EMPTY,
652 PCI224_DACCON_FIFOINTR_MASK);
653 outw(devpriv->daccon, dev->iobase + PCI224_DACCON);
654 }
655 }
656 if ((devpriv->daccon & PCI224_DACCON_TRIG_MASK) ==
657 PCI224_DACCON_TRIG_NONE) {
658 unsigned short trig;
659
660 /*
661 * This is the initial DAC FIFO interrupt at the
662 * start of the acquisition. The DAC's scan trigger
663 * has been set to 'none' up until now.
664 *
665 * Now that data has been written to the FIFO, the
666 * DAC's scan trigger source can be set to the
667 * correct value.
668 *
669 * BUG: The first scan will be triggered immediately
670 * if the scan trigger source is at logic level 1.
671 */
672 if (cmd->scan_begin_src == TRIG_TIMER) {
673 trig = PCI224_DACCON_TRIG_Z2CT0;
674 } else {
675 /* cmd->scan_begin_src == TRIG_EXT */
676 if (cmd->scan_begin_arg & CR_INVERT)
677 trig = PCI224_DACCON_TRIG_EXTN;
678 else
679 trig = PCI224_DACCON_TRIG_EXTP;
680
681 }
682 devpriv->daccon = COMBINE(devpriv->daccon, trig,
683 PCI224_DACCON_TRIG_MASK);
684 outw(devpriv->daccon, dev->iobase + PCI224_DACCON);
685 }
686 if (s->async->events)
687 comedi_event(dev, s);
688
689 }
690
691 /*
692 * Internal trigger function to start acquisition on AO subdevice.
693 */
694 static int
695 pci224_ao_inttrig_start(struct comedi_device *dev, struct comedi_subdevice *s,
696 unsigned int trignum)
697 {
698 if (trignum != 0)
699 return -EINVAL;
700
701 s->async->inttrig = NULL;
702 pci224_ao_start(dev, s);
703
704 return 1;
705 }
706
707 #define MAX_SCAN_PERIOD 0xFFFFFFFFU
708 #define MIN_SCAN_PERIOD 2500
709 #define CONVERT_PERIOD 625
710
711 /*
712 * 'do_cmdtest' function for AO subdevice.
713 */
714 static int
715 pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
716 struct comedi_cmd *cmd)
717 {
718 struct pci224_private *devpriv = dev->private;
719 int err = 0;
720 unsigned int tmp;
721
722 /* Step 1 : check if triggers are trivially valid */
723
724 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
725 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
726 TRIG_EXT | TRIG_TIMER);
727 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
728 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
729 err |= cfc_check_trigger_src(&cmd->stop_src,
730 TRIG_COUNT | TRIG_EXT | TRIG_NONE);
731
732 if (err)
733 return 1;
734
735 /* Step 2a : make sure trigger sources are unique */
736
737 err |= cfc_check_trigger_is_unique(cmd->start_src);
738 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
739 err |= cfc_check_trigger_is_unique(cmd->stop_src);
740
741 /* Step 2b : and mutually compatible */
742
743 /*
744 * There's only one external trigger signal (which makes these
745 * tests easier). Only one thing can use it.
746 */
747 tmp = 0;
748 if (cmd->start_src & TRIG_EXT)
749 tmp++;
750 if (cmd->scan_begin_src & TRIG_EXT)
751 tmp++;
752 if (cmd->stop_src & TRIG_EXT)
753 tmp++;
754 if (tmp > 1)
755 err |= -EINVAL;
756
757 if (err)
758 return 2;
759
760 /* Step 3: check if arguments are trivially valid */
761
762 switch (cmd->start_src) {
763 case TRIG_INT:
764 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
765 break;
766 case TRIG_EXT:
767 /* Force to external trigger 0. */
768 if ((cmd->start_arg & ~CR_FLAGS_MASK) != 0) {
769 cmd->start_arg = COMBINE(cmd->start_arg, 0,
770 ~CR_FLAGS_MASK);
771 err |= -EINVAL;
772 }
773 /* The only flag allowed is CR_EDGE, which is ignored. */
774 if ((cmd->start_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
775 cmd->start_arg = COMBINE(cmd->start_arg, 0,
776 CR_FLAGS_MASK & ~CR_EDGE);
777 err |= -EINVAL;
778 }
779 break;
780 }
781
782 switch (cmd->scan_begin_src) {
783 case TRIG_TIMER:
784 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
785 MAX_SCAN_PERIOD);
786
787 tmp = cmd->chanlist_len * CONVERT_PERIOD;
788 if (tmp < MIN_SCAN_PERIOD)
789 tmp = MIN_SCAN_PERIOD;
790 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, tmp);
791 break;
792 case TRIG_EXT:
793 /* Force to external trigger 0. */
794 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
795 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
796 ~CR_FLAGS_MASK);
797 err |= -EINVAL;
798 }
799 /* Only allow flags CR_EDGE and CR_INVERT. Ignore CR_EDGE. */
800 if ((cmd->scan_begin_arg & CR_FLAGS_MASK &
801 ~(CR_EDGE | CR_INVERT)) != 0) {
802 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
803 CR_FLAGS_MASK &
804 ~(CR_EDGE | CR_INVERT));
805 err |= -EINVAL;
806 }
807 break;
808 }
809
810 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
811 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
812
813 switch (cmd->stop_src) {
814 case TRIG_COUNT:
815 /* Any count allowed. */
816 break;
817 case TRIG_EXT:
818 /* Force to external trigger 0. */
819 if ((cmd->stop_arg & ~CR_FLAGS_MASK) != 0) {
820 cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
821 ~CR_FLAGS_MASK);
822 err |= -EINVAL;
823 }
824 /* The only flag allowed is CR_EDGE, which is ignored. */
825 if ((cmd->stop_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
826 cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
827 CR_FLAGS_MASK & ~CR_EDGE);
828 }
829 break;
830 case TRIG_NONE:
831 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
832 break;
833 }
834
835 if (err)
836 return 3;
837
838 /* Step 4: fix up any arguments. */
839
840 if (cmd->scan_begin_src == TRIG_TIMER) {
841 unsigned int div1, div2, round;
842 int round_mode = cmd->flags & TRIG_ROUND_MASK;
843
844 tmp = cmd->scan_begin_arg;
845 /* Check whether to use a single timer. */
846 switch (round_mode) {
847 case TRIG_ROUND_NEAREST:
848 default:
849 round = TIMEBASE_10MHZ / 2;
850 break;
851 case TRIG_ROUND_DOWN:
852 round = 0;
853 break;
854 case TRIG_ROUND_UP:
855 round = TIMEBASE_10MHZ - 1;
856 break;
857 }
858 /* Be careful to avoid overflow! */
859 div2 = cmd->scan_begin_arg / TIMEBASE_10MHZ;
860 div2 += (round + cmd->scan_begin_arg % TIMEBASE_10MHZ) /
861 TIMEBASE_10MHZ;
862 if (div2 <= 0x10000) {
863 /* A single timer will suffice. */
864 if (div2 < 2)
865 div2 = 2;
866 cmd->scan_begin_arg = div2 * TIMEBASE_10MHZ;
867 if (cmd->scan_begin_arg < div2 ||
868 cmd->scan_begin_arg < TIMEBASE_10MHZ) {
869 /* Overflow! */
870 cmd->scan_begin_arg = MAX_SCAN_PERIOD;
871 }
872 } else {
873 /* Use two timers. */
874 div1 = devpriv->cached_div1;
875 div2 = devpriv->cached_div2;
876 pci224_cascade_ns_to_timer(TIMEBASE_10MHZ, &div1, &div2,
877 &cmd->scan_begin_arg,
878 round_mode);
879 devpriv->cached_div1 = div1;
880 devpriv->cached_div2 = div2;
881 }
882 if (tmp != cmd->scan_begin_arg)
883 err++;
884
885 }
886
887 if (err)
888 return 4;
889
890 /* Step 5: check channel list. */
891
892 if (cmd->chanlist && (cmd->chanlist_len > 0)) {
893 unsigned int range;
894 enum { range_err = 1, dupchan_err = 2, };
895 unsigned errors;
896 unsigned int n;
897 unsigned int ch;
898
899 /*
900 * Check all channels have the same range index. Don't care
901 * about analogue reference, as we can't configure it.
902 *
903 * Check the list has no duplicate channels.
904 */
905 range = CR_RANGE(cmd->chanlist[0]);
906 errors = 0;
907 tmp = 0;
908 for (n = 0; n < cmd->chanlist_len; n++) {
909 ch = CR_CHAN(cmd->chanlist[n]);
910 if (tmp & (1U << ch))
911 errors |= dupchan_err;
912
913 tmp |= (1U << ch);
914 if (CR_RANGE(cmd->chanlist[n]) != range)
915 errors |= range_err;
916
917 }
918 if (errors) {
919 if (errors & dupchan_err) {
920 DPRINTK("comedi%d: " DRIVER_NAME
921 ": ao_cmdtest: "
922 "entries in chanlist must contain no "
923 "duplicate channels\n", dev->minor);
924 }
925 if (errors & range_err) {
926 DPRINTK("comedi%d: " DRIVER_NAME
927 ": ao_cmdtest: "
928 "entries in chanlist must all have "
929 "the same range index\n", dev->minor);
930 }
931 err++;
932 }
933 }
934
935 if (err)
936 return 5;
937
938 return 0;
939 }
940
941 /*
942 * 'do_cmd' function for AO subdevice.
943 */
944 static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
945 {
946 struct pci224_private *devpriv = dev->private;
947 struct comedi_cmd *cmd = &s->async->cmd;
948 int range;
949 unsigned int i, j;
950 unsigned int ch;
951 unsigned int rank;
952 unsigned long flags;
953
954 /* Cannot handle null/empty chanlist. */
955 if (cmd->chanlist == NULL || cmd->chanlist_len == 0)
956 return -EINVAL;
957
958
959 /* Determine which channels are enabled and their load order. */
960 devpriv->ao_enab = 0;
961
962 for (i = 0; i < cmd->chanlist_len; i++) {
963 ch = CR_CHAN(cmd->chanlist[i]);
964 devpriv->ao_enab |= 1U << ch;
965 rank = 0;
966 for (j = 0; j < cmd->chanlist_len; j++) {
967 if (CR_CHAN(cmd->chanlist[j]) < ch)
968 rank++;
969
970 }
971 devpriv->ao_scan_order[rank] = i;
972 }
973
974 /* Set enabled channels. */
975 outw(devpriv->ao_enab, dev->iobase + PCI224_DACCEN);
976
977 /* Determine range and polarity. All channels the same. */
978 range = CR_RANGE(cmd->chanlist[0]);
979
980 /*
981 * Set DAC range and polarity.
982 * Set DAC scan trigger source to 'none'.
983 * Set DAC FIFO interrupt trigger level to 'not half full'.
984 * Reset DAC FIFO.
985 *
986 * N.B. DAC FIFO interrupts are currently disabled.
987 */
988 devpriv->daccon = COMBINE(devpriv->daccon,
989 (devpriv->
990 hwrange[range] | PCI224_DACCON_TRIG_NONE |
991 PCI224_DACCON_FIFOINTR_NHALF),
992 (PCI224_DACCON_POLAR_MASK |
993 PCI224_DACCON_VREF_MASK |
994 PCI224_DACCON_TRIG_MASK |
995 PCI224_DACCON_FIFOINTR_MASK));
996 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
997 dev->iobase + PCI224_DACCON);
998
999 if (cmd->scan_begin_src == TRIG_TIMER) {
1000 unsigned int div1, div2, round;
1001 unsigned int ns = cmd->scan_begin_arg;
1002 int round_mode = cmd->flags & TRIG_ROUND_MASK;
1003
1004 /* Check whether to use a single timer. */
1005 switch (round_mode) {
1006 case TRIG_ROUND_NEAREST:
1007 default:
1008 round = TIMEBASE_10MHZ / 2;
1009 break;
1010 case TRIG_ROUND_DOWN:
1011 round = 0;
1012 break;
1013 case TRIG_ROUND_UP:
1014 round = TIMEBASE_10MHZ - 1;
1015 break;
1016 }
1017 /* Be careful to avoid overflow! */
1018 div2 = cmd->scan_begin_arg / TIMEBASE_10MHZ;
1019 div2 += (round + cmd->scan_begin_arg % TIMEBASE_10MHZ) /
1020 TIMEBASE_10MHZ;
1021 if (div2 <= 0x10000) {
1022 /* A single timer will suffice. */
1023 if (div2 < 2)
1024 div2 = 2;
1025 div2 &= 0xffff;
1026 div1 = 1; /* Flag that single timer to be used. */
1027 } else {
1028 /* Use two timers. */
1029 div1 = devpriv->cached_div1;
1030 div2 = devpriv->cached_div2;
1031 pci224_cascade_ns_to_timer(TIMEBASE_10MHZ, &div1, &div2,
1032 &ns, round_mode);
1033 }
1034
1035 /*
1036 * The output of timer Z2-0 will be used as the scan trigger
1037 * source.
1038 */
1039 /* Make sure Z2-0 is gated on. */
1040 outb(GAT_CONFIG(0, GAT_VCC),
1041 devpriv->iobase1 + PCI224_ZGAT_SCE);
1042 if (div1 == 1) {
1043 /* Not cascading. Z2-0 needs 10 MHz clock. */
1044 outb(CLK_CONFIG(0, CLK_10MHZ),
1045 devpriv->iobase1 + PCI224_ZCLK_SCE);
1046 } else {
1047 /* Cascading with Z2-2. */
1048 /* Make sure Z2-2 is gated on. */
1049 outb(GAT_CONFIG(2, GAT_VCC),
1050 devpriv->iobase1 + PCI224_ZGAT_SCE);
1051 /* Z2-2 needs 10 MHz clock. */
1052 outb(CLK_CONFIG(2, CLK_10MHZ),
1053 devpriv->iobase1 + PCI224_ZCLK_SCE);
1054 /* Load Z2-2 mode (2) and counter (div1). */
1055 i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0,
1056 2, div1, 2);
1057 /* Z2-0 is clocked from Z2-2's output. */
1058 outb(CLK_CONFIG(0, CLK_OUTNM1),
1059 devpriv->iobase1 + PCI224_ZCLK_SCE);
1060 }
1061 /* Load Z2-0 mode (2) and counter (div2). */
1062 i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0, 0, div2, 2);
1063 }
1064
1065 /*
1066 * Sort out end of acquisition.
1067 */
1068 switch (cmd->stop_src) {
1069 case TRIG_COUNT:
1070 /* Fixed number of scans. */
1071 devpriv->ao_stop_continuous = 0;
1072 devpriv->ao_stop_count = cmd->stop_arg;
1073 break;
1074 default:
1075 /* Continuous scans. */
1076 devpriv->ao_stop_continuous = 1;
1077 devpriv->ao_stop_count = 0;
1078 break;
1079 }
1080
1081 /*
1082 * Sort out start of acquisition.
1083 */
1084 switch (cmd->start_src) {
1085 case TRIG_INT:
1086 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1087 s->async->inttrig = &pci224_ao_inttrig_start;
1088 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1089 break;
1090 case TRIG_EXT:
1091 /* Enable external interrupt trigger to start acquisition. */
1092 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1093 devpriv->intsce |= PCI224_INTR_EXT;
1094 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE);
1095 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1096 break;
1097 }
1098
1099 return 0;
1100 }
1101
1102 /*
1103 * 'cancel' function for AO subdevice.
1104 */
1105 static int pci224_ao_cancel(struct comedi_device *dev,
1106 struct comedi_subdevice *s)
1107 {
1108 pci224_ao_stop(dev, s);
1109 return 0;
1110 }
1111
1112 /*
1113 * 'munge' data for AO command.
1114 */
1115 static void
1116 pci224_ao_munge(struct comedi_device *dev, struct comedi_subdevice *s,
1117 void *data, unsigned int num_bytes, unsigned int chan_index)
1118 {
1119 const struct pci224_board *thisboard = comedi_board(dev);
1120 struct pci224_private *devpriv = dev->private;
1121 struct comedi_async *async = s->async;
1122 short *array = data;
1123 unsigned int length = num_bytes / sizeof(*array);
1124 unsigned int offset;
1125 unsigned int shift;
1126 unsigned int i;
1127
1128 /* The hardware expects 16-bit numbers. */
1129 shift = 16 - thisboard->ao_bits;
1130 /* Channels will be all bipolar or all unipolar. */
1131 if ((devpriv->hwrange[CR_RANGE(async->cmd.chanlist[0])] &
1132 PCI224_DACCON_POLAR_MASK) == PCI224_DACCON_POLAR_UNI) {
1133 /* Unipolar */
1134 offset = 0;
1135 } else {
1136 /* Bipolar */
1137 offset = 32768;
1138 }
1139 /* Munge the data. */
1140 for (i = 0; i < length; i++)
1141 array[i] = (array[i] << shift) - offset;
1142
1143 }
1144
1145 /*
1146 * Interrupt handler.
1147 */
1148 static irqreturn_t pci224_interrupt(int irq, void *d)
1149 {
1150 struct comedi_device *dev = d;
1151 struct pci224_private *devpriv = dev->private;
1152 struct comedi_subdevice *s = &dev->subdevices[0];
1153 struct comedi_cmd *cmd;
1154 unsigned char intstat, valid_intstat;
1155 unsigned char curenab;
1156 int retval = 0;
1157 unsigned long flags;
1158
1159 intstat = inb(devpriv->iobase1 + PCI224_INT_SCE) & 0x3F;
1160 if (intstat) {
1161 retval = 1;
1162 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1163 valid_intstat = devpriv->intsce & intstat;
1164 /* Temporarily disable interrupt sources. */
1165 curenab = devpriv->intsce & ~intstat;
1166 outb(curenab, devpriv->iobase1 + PCI224_INT_SCE);
1167 devpriv->intr_running = 1;
1168 devpriv->intr_cpuid = THISCPU;
1169 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1170 if (valid_intstat != 0) {
1171 cmd = &s->async->cmd;
1172 if (valid_intstat & PCI224_INTR_EXT) {
1173 devpriv->intsce &= ~PCI224_INTR_EXT;
1174 if (cmd->start_src == TRIG_EXT)
1175 pci224_ao_start(dev, s);
1176 else if (cmd->stop_src == TRIG_EXT)
1177 pci224_ao_stop(dev, s);
1178
1179 }
1180 if (valid_intstat & PCI224_INTR_DAC)
1181 pci224_ao_handle_fifo(dev, s);
1182
1183 }
1184 /* Reenable interrupt sources. */
1185 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
1186 if (curenab != devpriv->intsce) {
1187 outb(devpriv->intsce,
1188 devpriv->iobase1 + PCI224_INT_SCE);
1189 }
1190 devpriv->intr_running = 0;
1191 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
1192 }
1193 return IRQ_RETVAL(retval);
1194 }
1195
1196 /*
1197 * This function looks for a board matching the supplied PCI device.
1198 */
1199 static const struct pci224_board
1200 *pci224_find_pci_board(struct pci_dev *pci_dev)
1201 {
1202 int i;
1203
1204 for (i = 0; i < ARRAY_SIZE(pci224_boards); i++)
1205 if (pci_dev->device == pci224_boards[i].devid)
1206 return &pci224_boards[i];
1207 return NULL;
1208 }
1209
1210 /*
1211 * This function looks for a PCI device matching the requested board name,
1212 * bus and slot.
1213 */
1214 static struct pci_dev *pci224_find_pci_dev(struct comedi_device *dev,
1215 struct comedi_devconfig *it)
1216 {
1217 const struct pci224_board *thisboard = comedi_board(dev);
1218 struct pci_dev *pci_dev = NULL;
1219 int bus = it->options[0];
1220 int slot = it->options[1];
1221
1222 for_each_pci_dev(pci_dev) {
1223 if (bus || slot) {
1224 if (bus != pci_dev->bus->number ||
1225 slot != PCI_SLOT(pci_dev->devfn))
1226 continue;
1227 }
1228 if (pci_dev->vendor != PCI_VENDOR_ID_AMPLICON)
1229 continue;
1230
1231 if (thisboard->model == any_model) {
1232 /* Match any supported model. */
1233 const struct pci224_board *board_ptr;
1234
1235 board_ptr = pci224_find_pci_board(pci_dev);
1236 if (board_ptr == NULL)
1237 continue;
1238 /* Change board_ptr to matched board. */
1239 dev->board_ptr = board_ptr;
1240 } else {
1241 /* Match specific model name. */
1242 if (thisboard->devid != pci_dev->device)
1243 continue;
1244 }
1245 return pci_dev;
1246 }
1247 dev_err(dev->class_dev,
1248 "No supported board found! (req. bus %d, slot %d)\n",
1249 bus, slot);
1250 return NULL;
1251 }
1252
1253 static void pci224_report_attach(struct comedi_device *dev, unsigned int irq)
1254 {
1255 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1256 char tmpbuf[30];
1257
1258 if (irq)
1259 snprintf(tmpbuf, sizeof(tmpbuf), "irq %u%s", irq,
1260 (dev->irq ? "" : " UNAVAILABLE"));
1261 else
1262 snprintf(tmpbuf, sizeof(tmpbuf), "no irq");
1263 dev_info(dev->class_dev, "%s (pci %s) (%s) attached\n",
1264 dev->board_name, pci_name(pcidev), tmpbuf);
1265 }
1266
1267 /*
1268 * Common part of attach and auto_attach.
1269 */
1270 static int pci224_attach_common(struct comedi_device *dev,
1271 struct pci_dev *pci_dev, int *options)
1272 {
1273 const struct pci224_board *thisboard = comedi_board(dev);
1274 struct pci224_private *devpriv = dev->private;
1275 struct comedi_subdevice *s;
1276 unsigned int irq;
1277 unsigned n;
1278 int ret;
1279
1280 comedi_set_hw_dev(dev, &pci_dev->dev);
1281
1282 ret = comedi_pci_enable(pci_dev, DRIVER_NAME);
1283 if (ret < 0) {
1284 dev_err(dev->class_dev,
1285 "error! cannot enable PCI device and request regions!\n"
1286 );
1287 return ret;
1288 }
1289 spin_lock_init(&devpriv->ao_spinlock);
1290
1291 devpriv->iobase1 = pci_resource_start(pci_dev, 2);
1292 dev->iobase = pci_resource_start(pci_dev, 3);
1293 irq = pci_dev->irq;
1294
1295 /* Allocate readback buffer for AO channels. */
1296 devpriv->ao_readback = kmalloc(sizeof(devpriv->ao_readback[0]) *
1297 thisboard->ao_chans, GFP_KERNEL);
1298 if (!devpriv->ao_readback)
1299 return -ENOMEM;
1300
1301
1302 /* Allocate buffer to hold values for AO channel scan. */
1303 devpriv->ao_scan_vals = kmalloc(sizeof(devpriv->ao_scan_vals[0]) *
1304 thisboard->ao_chans, GFP_KERNEL);
1305 if (!devpriv->ao_scan_vals)
1306 return -ENOMEM;
1307
1308
1309 /* Allocate buffer to hold AO channel scan order. */
1310 devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) *
1311 thisboard->ao_chans, GFP_KERNEL);
1312 if (!devpriv->ao_scan_order)
1313 return -ENOMEM;
1314
1315
1316 /* Disable interrupt sources. */
1317 devpriv->intsce = 0;
1318 outb(0, devpriv->iobase1 + PCI224_INT_SCE);
1319
1320 /* Initialize the DAC hardware. */
1321 outw(PCI224_DACCON_GLOBALRESET, dev->iobase + PCI224_DACCON);
1322 outw(0, dev->iobase + PCI224_DACCEN);
1323 outw(0, dev->iobase + PCI224_FIFOSIZ);
1324 devpriv->daccon = (PCI224_DACCON_TRIG_SW | PCI224_DACCON_POLAR_BI |
1325 PCI224_DACCON_FIFOENAB |
1326 PCI224_DACCON_FIFOINTR_EMPTY);
1327 outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
1328 dev->iobase + PCI224_DACCON);
1329
1330 ret = comedi_alloc_subdevices(dev, 1);
1331 if (ret)
1332 return ret;
1333
1334 s = &dev->subdevices[0];
1335 /* Analog output subdevice. */
1336 s->type = COMEDI_SUBD_AO;
1337 s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_CMD_WRITE;
1338 s->n_chan = thisboard->ao_chans;
1339 s->maxdata = (1 << thisboard->ao_bits) - 1;
1340 s->insn_write = &pci224_ao_insn_write;
1341 s->insn_read = &pci224_ao_insn_read;
1342 s->len_chanlist = s->n_chan;
1343
1344 dev->write_subdev = s;
1345 s->do_cmd = &pci224_ao_cmd;
1346 s->do_cmdtest = &pci224_ao_cmdtest;
1347 s->cancel = &pci224_ao_cancel;
1348 s->munge = &pci224_ao_munge;
1349
1350 /* Sort out channel range options. */
1351 if (thisboard->model == pci234_model) {
1352 /* PCI234 range options. */
1353 const struct comedi_lrange **range_table_list;
1354
1355 s->range_table_list = range_table_list =
1356 kmalloc(sizeof(struct comedi_lrange *) * s->n_chan,
1357 GFP_KERNEL);
1358 if (!s->range_table_list)
1359 return -ENOMEM;
1360
1361 if (options) {
1362 for (n = 2; n < 3 + s->n_chan; n++) {
1363 if (options[n] < 0 || options[n] > 1) {
1364 dev_warn(dev->class_dev, DRIVER_NAME
1365 ": warning! bad options[%u]=%d\n",
1366 n, options[n]);
1367 }
1368 }
1369 }
1370 for (n = 0; n < s->n_chan; n++) {
1371 if (n < COMEDI_NDEVCONFOPTS - 3 && options &&
1372 options[3 + n] == 1) {
1373 if (options[2] == 1)
1374 range_table_list[n] = &range_pci234_ext;
1375 else
1376 range_table_list[n] = &range_bipolar5;
1377
1378 } else {
1379 if (options && options[2] == 1) {
1380 range_table_list[n] =
1381 &range_pci234_ext2;
1382 } else {
1383 range_table_list[n] = &range_bipolar10;
1384 }
1385 }
1386 }
1387 devpriv->hwrange = hwrange_pci234;
1388 } else {
1389 /* PCI224 range options. */
1390 if (options && options[2] == 1) {
1391 s->range_table = &range_pci224_external;
1392 devpriv->hwrange = hwrange_pci224_external;
1393 } else {
1394 if (options && options[2] != 0) {
1395 dev_warn(dev->class_dev, DRIVER_NAME
1396 ": warning! bad options[2]=%d\n",
1397 options[2]);
1398 }
1399 s->range_table = &range_pci224_internal;
1400 devpriv->hwrange = hwrange_pci224_internal;
1401 }
1402 }
1403
1404 dev->board_name = thisboard->name;
1405
1406 if (irq) {
1407 ret = request_irq(irq, pci224_interrupt, IRQF_SHARED,
1408 DRIVER_NAME, dev);
1409 if (ret < 0) {
1410 dev_err(dev->class_dev,
1411 "error! unable to allocate irq %u\n", irq);
1412 return ret;
1413 } else {
1414 dev->irq = irq;
1415 }
1416 }
1417
1418 pci224_report_attach(dev, irq);
1419 return 1;
1420 }
1421
1422 static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1423 {
1424 struct pci224_private *devpriv;
1425 struct pci_dev *pci_dev;
1426
1427 dev_info(dev->class_dev, DRIVER_NAME ": attach\n");
1428
1429 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1430 if (!devpriv)
1431 return -ENOMEM;
1432 dev->private = devpriv;
1433
1434 pci_dev = pci224_find_pci_dev(dev, it);
1435 if (!pci_dev)
1436 return -EIO;
1437
1438 return pci224_attach_common(dev, pci_dev, it->options);
1439 }
1440
1441 static int
1442 pci224_auto_attach(struct comedi_device *dev, unsigned long context_unused)
1443 {
1444 struct pci_dev *pci_dev = comedi_to_pci_dev(dev);
1445 struct pci224_private *devpriv;
1446
1447 dev_info(dev->class_dev, DRIVER_NAME ": attach pci %s\n",
1448 pci_name(pci_dev));
1449
1450 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1451 if (!devpriv)
1452 return -ENOMEM;
1453 dev->private = devpriv;
1454
1455 dev->board_ptr = pci224_find_pci_board(pci_dev);
1456 if (dev->board_ptr == NULL) {
1457 dev_err(dev->class_dev,
1458 DRIVER_NAME ": BUG! cannot determine board type!\n");
1459 return -EINVAL;
1460 }
1461 /*
1462 * Need to 'get' the PCI device to match the 'put' in pci224_detach().
1463 * TODO: Remove the pci_dev_get() and matching pci_dev_put() once
1464 * support for manual attachment of PCI devices via pci224_attach()
1465 * has been removed.
1466 */
1467 pci_dev_get(pci_dev);
1468 return pci224_attach_common(dev, pci_dev, NULL);
1469 }
1470
1471 static void pci224_detach(struct comedi_device *dev)
1472 {
1473 struct pci224_private *devpriv = dev->private;
1474 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1475
1476 if (dev->irq)
1477 free_irq(dev->irq, dev);
1478 if (dev->subdevices) {
1479 struct comedi_subdevice *s;
1480
1481 s = &dev->subdevices[0];
1482 /* AO subdevice */
1483 kfree(s->range_table_list);
1484 }
1485 if (devpriv) {
1486 kfree(devpriv->ao_readback);
1487 kfree(devpriv->ao_scan_vals);
1488 kfree(devpriv->ao_scan_order);
1489 }
1490 if (pcidev) {
1491 if (dev->iobase)
1492 comedi_pci_disable(pcidev);
1493 pci_dev_put(pcidev);
1494 }
1495 }
1496
1497 static struct comedi_driver amplc_pci224_driver = {
1498 .driver_name = "amplc_pci224",
1499 .module = THIS_MODULE,
1500 .attach = pci224_attach,
1501 .detach = pci224_detach,
1502 .auto_attach = pci224_auto_attach,
1503 .board_name = &pci224_boards[0].name,
1504 .offset = sizeof(struct pci224_board),
1505 .num_names = ARRAY_SIZE(pci224_boards),
1506 };
1507
1508 static int amplc_pci224_pci_probe(struct pci_dev *dev,
1509 const struct pci_device_id
1510 *ent)
1511 {
1512 return comedi_pci_auto_config(dev, &amplc_pci224_driver);
1513 }
1514
1515 static void amplc_pci224_pci_remove(struct pci_dev *dev)
1516 {
1517 comedi_pci_auto_unconfig(dev);
1518 }
1519
1520 static DEFINE_PCI_DEVICE_TABLE(amplc_pci224_pci_table) = {
1521 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI224) },
1522 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI234) },
1523 { 0 }
1524 };
1525 MODULE_DEVICE_TABLE(pci, amplc_pci224_pci_table);
1526
1527 static struct pci_driver amplc_pci224_pci_driver = {
1528 .name = "amplc_pci224",
1529 .id_table = amplc_pci224_pci_table,
1530 .probe = amplc_pci224_pci_probe,
1531 .remove = amplc_pci224_pci_remove,
1532 };
1533 module_comedi_pci_driver(amplc_pci224_driver, amplc_pci224_pci_driver);
1534
1535 MODULE_AUTHOR("Comedi http://www.comedi.org");
1536 MODULE_DESCRIPTION("Comedi low-level driver");
1537 MODULE_LICENSE("GPL");