drivers/staging/fbtft/fb_st7735r.c

   1 /*
   2  * FB driver for the ST7735R LCD Controller
   3  *
   4  * Copyright (C) 2013 Noralf Tronnes
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20
  21 #include "fbtft.h"
  22
  23 #define DRVNAME "fb_st7735r"
  24 #define DEFAULT_GAMMA   "0F 1A 0F 18 2F 28 20 22 1F 1B 23 37 00 07 02 10\n" \
  25                         "0F 1B 0F 17 33 2C 29 2E 30 30 39 3F 00 07 03 10"
  26
  27 static int default_init_sequence[] = {
  28         /* SWRESET - Software reset */
  29         -1, 0x01,
  30         -2, 150,                               /* delay */
  31
  32         /* SLPOUT - Sleep out & booster on */
  33         -1, 0x11,
  34         -2, 500,                               /* delay */
  35
  36         /* FRMCTR1 - frame rate control: normal mode
  37              frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */
  38         -1, 0xB1, 0x01, 0x2C, 0x2D,
  39
  40         /* FRMCTR2 - frame rate control: idle mode
  41              frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */
  42         -1, 0xB2, 0x01, 0x2C, 0x2D,
  43
  44         /* FRMCTR3 - frame rate control - partial mode
  45              dot inversion mode, line inversion mode */
  46         -1, 0xB3, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D,
  47
  48         /* INVCTR - display inversion control
  49              no inversion */
  50         -1, 0xB4, 0x07,
  51
  52         /* PWCTR1 - Power Control
  53              -4.6V, AUTO mode */
  54         -1, 0xC0, 0xA2, 0x02, 0x84,
  55
  56         /* PWCTR2 - Power Control
  57              VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD */
  58         -1, 0xC1, 0xC5,
  59
  60         /* PWCTR3 - Power Control
  61              Opamp current small, Boost frequency */
  62         -1, 0xC2, 0x0A, 0x00,
  63
  64         /* PWCTR4 - Power Control
  65              BCLK/2, Opamp current small & Medium low */
  66         -1, 0xC3, 0x8A, 0x2A,
  67
  68         /* PWCTR5 - Power Control */
  69         -1, 0xC4, 0x8A, 0xEE,
  70
  71         /* VMCTR1 - Power Control */
  72         -1, 0xC5, 0x0E,
  73
  74         /* INVOFF - Display inversion off */
  75         -1, 0x20,
  76
  77         /* COLMOD - Interface pixel format */
  78         -1, 0x3A, 0x05,
  79
  80         /* DISPON - Display On */
  81         -1, 0x29,
  82         -2, 100,                               /* delay */
  83
  84         /* NORON - Partial off (Normal) */
  85         -1, 0x13,
  86         -2, 10,                               /* delay */
  87
  88         /* end marker */
  89         -3
  90 };
  91
  92 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
  93 {
  94         /* Column address */
  95         write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
  96
  97         /* Row address */
  98         write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
  99
 100         /* Memory write */
 101         write_reg(par, 0x2C);
 102 }
 103
 104 #define MY BIT(7)
 105 #define MX BIT(6)
 106 #define MV BIT(5)
 107 static int set_var(struct fbtft_par *par)
 108 {
 109         fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
 110
 111         /* MADCTL - Memory data access control
 112              RGB/BGR:
 113              1. Mode selection pin SRGB
 114                 RGB H/W pin for color filter setting: 0=RGB, 1=BGR
 115              2. MADCTL RGB bit
 116                 RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR */
 117         switch (par->info->var.rotate) {
 118         case 0:
 119                 write_reg(par, 0x36, MX | MY | (par->bgr << 3));
 120                 break;
 121         case 270:
 122                 write_reg(par, 0x36, MY | MV | (par->bgr << 3));
 123                 break;
 124         case 180:
 125                 write_reg(par, 0x36, par->bgr << 3);
 126                 break;
 127         case 90:
 128                 write_reg(par, 0x36, MX | MV | (par->bgr << 3));
 129                 break;
 130         }
 131
 132         return 0;
 133 }
 134
 135 /*
 136   Gamma string format:
 137     VRF0P VOS0P PK0P PK1P PK2P PK3P PK4P PK5P PK6P PK7P PK8P PK9P SELV0P SELV1P SELV62P SELV63P
 138     VRF0N VOS0N PK0N PK1N PK2N PK3N PK4N PK5N PK6N PK7N PK8N PK9N SELV0N SELV1N SELV62N SELV63N
 139 */
 140 #define CURVE(num, idx)  curves[num * par->gamma.num_values + idx]
 141 static int set_gamma(struct fbtft_par *par, unsigned long *curves)
 142 {
 143         int i, j;
 144
 145         fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
 146
 147         /* apply mask */
 148         for (i = 0; i < par->gamma.num_curves; i++)
 149                 for (j = 0; j < par->gamma.num_values; j++)
 150                         CURVE(i, j) &= 0x3f;
 151
 152         for (i = 0; i < par->gamma.num_curves; i++)
 153                 write_reg(par, 0xE0 + i,
 154                         CURVE(i, 0), CURVE(i, 1), CURVE(i, 2), CURVE(i, 3),
 155                         CURVE(i, 4), CURVE(i, 5), CURVE(i, 6), CURVE(i, 7),
 156                         CURVE(i, 8), CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
 157                         CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i, 15));
 158
 159         return 0;
 160 }
 161 #undef CURVE
 162
 163 static struct fbtft_display display = {
 164         .regwidth = 8,
 165         .width = 128,
 166         .height = 160,
 167         .init_sequence = default_init_sequence,
 168         .gamma_num = 2,
 169         .gamma_len = 16,
 170         .gamma = DEFAULT_GAMMA,
 171         .fbtftops = {
 172                 .set_addr_win = set_addr_win,
 173                 .set_var = set_var,
 174                 .set_gamma = set_gamma,
 175         },
 176 };
 177
 178 FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7735r", &display);
 179
 180 MODULE_ALIAS("spi:" DRVNAME);
 181 MODULE_ALIAS("platform:" DRVNAME);
 182 MODULE_ALIAS("spi:st7735r");
 183 MODULE_ALIAS("platform:st7735r");
 184
 185 MODULE_DESCRIPTION("FB driver for the ST7735R LCD Controller");
 186 MODULE_AUTHOR("Noralf Tronnes");
 187 MODULE_LICENSE("GPL");