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1 /*
2 * FB driver for the TLS8204 LCD Controller
3 *
4 * The display is monochrome and the video memory is RGB565.
5 * Any pixel value except 0 turns the pixel on.
6 *
7 * Copyright (C) 2013 Noralf Tronnes
8 * Copyright (C) 2014 Michael Hope (adapted for the TLS8204)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/gpio.h>
25 #include <linux/spi/spi.h>
26 #include <linux/delay.h>
27
28 #include "fbtft.h"
29
30 #define DRVNAME "fb_tls8204"
31 #define WIDTH 84
32 #define HEIGHT 48
33 #define TXBUFLEN WIDTH
34
35 /* gamma is used to control contrast in this driver */
36 #define DEFAULT_GAMMA "40"
37
38 static unsigned bs = 4;
39 module_param(bs, uint, 0);
40 MODULE_PARM_DESC(bs, "BS[2:0] Bias voltage level: 0-7 (default: 4)");
41
42 static int init_display(struct fbtft_par *par)
43 {
44 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
45
46 par->fbtftops.reset(par);
47
48 /* Enter extended command mode */
49 write_reg(par, 0x21); /* 5:1 1
50 2:0 PD - Powerdown control: chip is active
51 1:0 V - Entry mode: horizontal addressing
52 0:1 H - Extended instruction set control:
53 extended
54 */
55
56 /* H=1 Bias system */
57 write_reg(par, 0x10 | (bs & 0x7)); /*
58 4:1 1
59 3:0 0
60 2:x BS2 - Bias System
61 1:x BS1
62 0:x BS0
63 */
64
65 /* Set the address of the first display line. */
66 write_reg(par, 0x04 | (64 >> 6));
67 write_reg(par, 0x40 | (64 & 0x3F));
68
69 /* Enter H=0 standard command mode */
70 write_reg(par, 0x20);
71
72 /* H=0 Display control */
73 write_reg(par, 0x08 | 4); /*
74 3:1 1
75 2:1 D - DE: 10=normal mode
76 1:0 0
77 0:0 E
78 */
79
80 return 0;
81 }
82
83 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
84 {
85 /* H=0 Set X address of RAM */
86 write_reg(par, 0x80); /* 7:1 1
87 6-0: X[6:0] - 0x00
88 */
89
90 /* H=0 Set Y address of RAM */
91 write_reg(par, 0x40); /* 7:0 0
92 6:1 1
93 2-0: Y[2:0] - 0x0
94 */
95 }
96
97 static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
98 {
99 u16 *vmem16 = (u16 *)par->info->screen_base;
100 int x, y, i;
101 int ret = 0;
102
103 fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__);
104
105 for (y = 0; y < HEIGHT / 8; y++) {
106 u8 *buf = par->txbuf.buf;
107 /* The display is 102x68 but the LCD is 84x48. Set
108 the write pointer at the start of each row. */
109 gpio_set_value(par->gpio.dc, 0);
110 write_reg(par, 0x80 | 0);
111 write_reg(par, 0x40 | y);
112
113 for (x = 0; x < WIDTH; x++) {
114 u8 ch = 0;
115
116 for (i = 0; i < 8 * WIDTH; i += WIDTH) {
117 ch >>= 1;
118 if (vmem16[(y * 8 * WIDTH) + i + x])
119 ch |= 0x80;
120 }
121 *buf++ = ch;
122 }
123 /* Write the row */
124 gpio_set_value(par->gpio.dc, 1);
125 ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH);
126 if (ret < 0) {
127 dev_err(par->info->device,
128 "write failed and returned: %d\n", ret);
129 break;
130 }
131 }
132
133 return ret;
134 }
135
136 static int set_gamma(struct fbtft_par *par, unsigned long *curves)
137 {
138 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
139
140 /* apply mask */
141 curves[0] &= 0x7F;
142
143 write_reg(par, 0x21); /* turn on extended instruction set */
144 write_reg(par, 0x80 | curves[0]);
145 write_reg(par, 0x20); /* turn off extended instruction set */
146
147 return 0;
148 }
149
150 static struct fbtft_display display = {
151 .regwidth = 8,
152 .width = WIDTH,
153 .height = HEIGHT,
154 .txbuflen = TXBUFLEN,
155 .gamma_num = 1,
156 .gamma_len = 1,
157 .gamma = DEFAULT_GAMMA,
158 .fbtftops = {
159 .init_display = init_display,
160 .set_addr_win = set_addr_win,
161 .write_vmem = write_vmem,
162 .set_gamma = set_gamma,
163 },
164 .backlight = 1,
165 };
166
167 FBTFT_REGISTER_DRIVER(DRVNAME, "teralane,tls8204", &display);
168
169 MODULE_ALIAS("spi:" DRVNAME);
170 MODULE_ALIAS("spi:tls8204");
171
172 MODULE_DESCRIPTION("FB driver for the TLS8204 LCD Controller");
173 MODULE_AUTHOR("Michael Hope");
174 MODULE_LICENSE("GPL");