drivers/staging/fbtft/fb_uc1611.c

   1 /*
   2  * FB driver for the UltraChip UC1611 LCD controller
   3  *
   4  * The display is 4-bit grayscale (16 shades) 240x160.
   5  *
   6  * Copyright (C) 2015 Henri Chain
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/gpio.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/delay.h>
  25
  26 #include "fbtft.h"
  27
  28 #define DRVNAME         "fb_uc1611"
  29 #define WIDTH           240
  30 #define HEIGHT          160
  31 #define BPP             8
  32 #define FPS             40
  33
  34 /*
  35  * LCD voltage is a combination of ratio, gain, pot and temp
  36  *
  37  * V_LCD = V_BIAS * ratio
  38  * V_LCD = (C_V0 + C_PM × pot) * (1 + (T - 25) * temp)
  39  * C_V0 and C_PM depend on ratio and gain
  40  * T is ambient temperature
  41  */
  42
  43 /* BR -> actual ratio: 0-3 -> 5, 10, 11, 13 */
  44 static unsigned ratio = 2;
  45 module_param(ratio, uint, 0);
  46 MODULE_PARM_DESC(ratio, "BR[1:0] Bias voltage ratio: 0-3 (default: 2)");
  47
  48 static unsigned gain = 3;
  49 module_param(gain, uint, 0);
  50 MODULE_PARM_DESC(gain, "GN[1:0] Bias voltage gain: 0-3 (default: 3)");
  51
  52 static unsigned pot = 16;
  53 module_param(pot, uint, 0);
  54 MODULE_PARM_DESC(pot, "PM[6:0] Bias voltage pot.: 0-63 (default: 16)");
  55
  56 /* TC -> % compensation per deg C: 0-3 -> -.05, -.10, -.015, -.20 */
  57 static unsigned temp;
  58 module_param(temp, uint, 0);
  59 MODULE_PARM_DESC(temp, "TC[1:0] Temperature compensation: 0-3 (default: 0)");
  60
  61 /* PC[1:0] -> LCD capacitance: 0-3 -> <20nF, 20-28 nF, 29-40 nF, 40-56 nF */
  62 static unsigned load = 1;
  63 module_param(load, uint, 0);
  64 MODULE_PARM_DESC(load, "PC[1:0] Panel Loading: 0-3 (default: 1)");
  65
  66 /* PC[3:2] -> V_LCD: 0, 1, 3 -> ext., int. with ratio = 5, int. standard */
  67 static unsigned pump = 3;
  68 module_param(pump, uint, 0);
  69 MODULE_PARM_DESC(pump, "PC[3:2] Pump control: 0,1,3 (default: 3)");
  70
  71 static int init_display(struct fbtft_par *par)
  72 {
  73         int ret;
  74
  75         fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
  76
  77         /* Set CS active high */
  78         par->spi->mode |= SPI_CS_HIGH;
  79         ret = par->spi->master->setup(par->spi);
  80         if (ret) {
  81                 dev_err(par->info->device, "Could not set SPI_CS_HIGH\n");
  82                 return ret;
  83         }
  84
  85         /* Reset controller */
  86         write_reg(par, 0xE2);
  87
  88         /* Set bias ratio */
  89         write_reg(par, 0xE8 | (ratio & 0x03));
  90
  91         /* Set bias gain and potentiometer */
  92         write_reg(par, 0x81);
  93         write_reg(par, (gain & 0x03) << 6 | (pot & 0x3F));
  94
  95         /* Set temperature compensation */
  96         write_reg(par, 0x24 | (temp & 0x03));
  97
  98         /* Set panel loading */
  99         write_reg(par, 0x28 | (load & 0x03));
 100
 101         /* Set pump control */
 102         write_reg(par, 0x2C | (pump & 0x03));
 103
 104         /* Set inverse display */
 105         write_reg(par, 0xA6 | (0x01 & 0x01));
 106
 107         /* Set 4-bit grayscale mode */
 108         write_reg(par, 0xD0 | (0x02 & 0x03));
 109
 110         /* Set Display enable */
 111         write_reg(par, 0xA8 | 0x07);
 112
 113         return 0;
 114 }
 115
 116 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
 117 {
 118         fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
 119                       "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n",
 120                       __func__, xs, ys, xe, ye);
 121
 122         switch (par->info->var.rotate) {
 123         case 90:
 124         case 270:
 125                 /* Set column address */
 126                 write_reg(par, ys & 0x0F);
 127                 write_reg(par, 0x10 | (ys >> 4));
 128
 129                 /* Set page address (divide xs by 2) (not used by driver) */
 130                 write_reg(par, 0x60 | ((xs >> 1) & 0x0F));
 131                 write_reg(par, 0x70 | (xs >> 5));
 132                 break;
 133         default:
 134                 /* Set column address (not used by driver) */
 135                 write_reg(par, xs & 0x0F);
 136                 write_reg(par, 0x10 | (xs >> 4));
 137
 138                 /* Set page address (divide ys by 2) */
 139                 write_reg(par, 0x60 | ((ys >> 1) & 0x0F));
 140                 write_reg(par, 0x70 | (ys >> 5));
 141                 break;
 142         }
 143 }
 144
 145 static int blank(struct fbtft_par *par, bool on)
 146 {
 147         fbtft_par_dbg(DEBUG_BLANK, par, "%s(blank=%s)\n",
 148                       __func__, on ? "true" : "false");
 149
 150         if (on)
 151                 write_reg(par, 0xA8 | 0x00);
 152         else
 153                 write_reg(par, 0xA8 | 0x07);
 154         return 0;
 155 }
 156
 157 static int set_var(struct fbtft_par *par)
 158 {
 159         fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
 160
 161         /* par->info->fix.visual = FB_VISUAL_PSEUDOCOLOR; */
 162         par->info->var.grayscale = 1;
 163         par->info->var.red.offset    = 0;
 164         par->info->var.red.length    = 8;
 165         par->info->var.green.offset  = 0;
 166         par->info->var.green.length  = 8;
 167         par->info->var.blue.offset   = 0;
 168         par->info->var.blue.length   = 8;
 169         par->info->var.transp.offset = 0;
 170         par->info->var.transp.length = 0;
 171
 172         switch (par->info->var.rotate) {
 173         case 90:
 174                 /* Set RAM address control */
 175                 write_reg(par, 0x88
 176                         | (0x0 & 0x1) << 2 /* Increment positively */
 177                         | (0x1 & 0x1) << 1 /* Increment page first */
 178                         | (0x1 & 0x1));    /* Wrap around (default) */
 179
 180                 /* Set LCD mapping */
 181                 write_reg(par, 0xC0
 182                         | (0x0 & 0x1) << 2 /* Mirror Y OFF */
 183                         | (0x0 & 0x1) << 1 /* Mirror X OFF */
 184                         | (0x0 & 0x1));    /* MS nibble last (default) */
 185                 break;
 186         case 180:
 187                 /* Set RAM address control */
 188                 write_reg(par, 0x88
 189                         | (0x0 & 0x1) << 2 /* Increment positively */
 190                         | (0x0 & 0x1) << 1 /* Increment column first */
 191                         | (0x1 & 0x1));    /* Wrap around (default) */
 192
 193                 /* Set LCD mapping */
 194                 write_reg(par, 0xC0
 195                         | (0x1 & 0x1) << 2 /* Mirror Y ON */
 196                         | (0x0 & 0x1) << 1 /* Mirror X OFF */
 197                         | (0x0 & 0x1));    /* MS nibble last (default) */
 198                 break;
 199         case 270:
 200                 /* Set RAM address control */
 201                 write_reg(par, 0x88
 202                         | (0x0 & 0x1) << 2 /* Increment positively */
 203                         | (0x1 & 0x1) << 1 /* Increment page first */
 204                         | (0x1 & 0x1));    /* Wrap around (default) */
 205
 206                 /* Set LCD mapping */
 207                 write_reg(par, 0xC0
 208                         | (0x1 & 0x1) << 2 /* Mirror Y ON */
 209                         | (0x1 & 0x1) << 1 /* Mirror X ON */
 210                         | (0x0 & 0x1));    /* MS nibble last (default) */
 211                 break;
 212         default:
 213                 /* Set RAM address control */
 214                 write_reg(par, 0x88
 215                         | (0x0 & 0x1) << 2 /* Increment positively */
 216                         | (0x0 & 0x1) << 1 /* Increment column first */
 217                         | (0x1 & 0x1));    /* Wrap around (default) */
 218
 219                 /* Set LCD mapping */
 220                 write_reg(par, 0xC0
 221                         | (0x0 & 0x1) << 2 /* Mirror Y OFF */
 222                         | (0x1 & 0x1) << 1 /* Mirror X ON */
 223                         | (0x0 & 0x1));    /* MS nibble last (default) */
 224                 break;
 225         }
 226
 227         return 0;
 228 }
 229
 230 static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
 231 {
 232         u8 *vmem8 = (u8 *)(par->info->screen_base);
 233         u8 *buf8 = (u8 *)(par->txbuf.buf);
 234         u16 *buf16 = (u16 *)(par->txbuf.buf);
 235         int line_length = par->info->fix.line_length;
 236         int y_start = (offset / line_length);
 237         int y_end = (offset + len - 1) / line_length;
 238         int x, y, i;
 239         int ret = 0;
 240
 241         fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__);
 242
 243         switch (par->pdata->display.buswidth) {
 244         case 8:
 245                 switch (par->info->var.rotate) {
 246                 case 90:
 247                 case 270:
 248                         i = y_start * line_length;
 249                         for (y = y_start; y <= y_end; y++) {
 250                                 for (x = 0; x < line_length; x += 2) {
 251                                         *buf8 = vmem8[i] >> 4;
 252                                         *buf8 |= vmem8[i + 1] & 0xF0;
 253                                         buf8++;
 254                                         i += 2;
 255                                 }
 256                         }
 257                         break;
 258                 default:
 259                         /* Must be even because pages are two lines */
 260                         y_start &= 0xFE;
 261                         i = y_start * line_length;
 262                         for (y = y_start; y <= y_end; y += 2) {
 263                                 for (x = 0; x < line_length; x++) {
 264                                         *buf8 = vmem8[i] >> 4;
 265                                         *buf8 |= vmem8[i + line_length] & 0xF0;
 266                                         buf8++;
 267                                         i++;
 268                                 }
 269                                 i += line_length;
 270                         }
 271                         break;
 272                 }
 273                 gpio_set_value(par->gpio.dc, 1);
 274
 275                 /* Write data */
 276                 ret = par->fbtftops.write(par, par->txbuf.buf, len / 2);
 277                 break;
 278         case 9:
 279                 switch (par->info->var.rotate) {
 280                 case 90:
 281                 case 270:
 282                         i = y_start * line_length;
 283                         for (y = y_start; y <= y_end; y++) {
 284                                 for (x = 0; x < line_length; x += 2) {
 285                                         *buf16 = 0x100;
 286                                         *buf16 |= vmem8[i] >> 4;
 287                                         *buf16 |= vmem8[i + 1] & 0xF0;
 288                                         buf16++;
 289                                         i += 2;
 290                                 }
 291                         }
 292                         break;
 293                 default:
 294                         /* Must be even because pages are two lines */
 295                         y_start &= 0xFE;
 296                         i = y_start * line_length;
 297                         for (y = y_start; y <= y_end; y += 2) {
 298                                 for (x = 0; x < line_length; x++) {
 299                                         *buf16 = 0x100;
 300                                         *buf16 |= vmem8[i] >> 4;
 301                                         *buf16 |= vmem8[i + line_length] & 0xF0;
 302                                         buf16++;
 303                                         i++;
 304                                 }
 305                                 i += line_length;
 306                         }
 307                         break;
 308                 }
 309
 310                 /* Write data */
 311                 ret = par->fbtftops.write(par, par->txbuf.buf, len);
 312                 break;
 313         default:
 314                 dev_err(par->info->device, "unsupported buswidth %d\n",
 315                         par->pdata->display.buswidth);
 316         }
 317
 318         if (ret < 0)
 319                 dev_err(par->info->device, "write failed and returned: %d\n",
 320                         ret);
 321
 322         return ret;
 323 }
 324
 325 static struct fbtft_display display = {
 326         .txbuflen = -1,
 327         .regwidth = 8,
 328         .width = WIDTH,
 329         .height = HEIGHT,
 330         .bpp = BPP,
 331         .fps = FPS,
 332         .fbtftops = {
 333                 .write_vmem = write_vmem,
 334                 .init_display = init_display,
 335                 .set_addr_win = set_addr_win,
 336                 .set_var = set_var,
 337                 .blank = blank,
 338         },
 339 };
 340
 341 FBTFT_REGISTER_DRIVER(DRVNAME, "ultrachip,uc1611", &display);
 342
 343 MODULE_ALIAS("spi:" DRVNAME);
 344 MODULE_ALIAS("platform:" DRVNAME);
 345 MODULE_ALIAS("spi:uc1611");
 346 MODULE_ALIAS("platform:uc1611");
 347
 348 MODULE_DESCRIPTION("FB driver for the UC1611 LCD controller");
 349 MODULE_AUTHOR("Henri Chain");
 350 MODULE_LICENSE("GPL");