2 * lis3l02dq.c support STMicroelectronics LISD02DQ
3 * 3d 2g Linear Accelerometers via SPI
5 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * 16 bit left justified mode used.
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/gpio.h>
18 #include <linux/workqueue.h>
19 #include <linux/mutex.h>
20 #include <linux/device.h>
21 #include <linux/kernel.h>
22 #include <linux/spi/spi.h>
23 #include <linux/slab.h>
25 #include <linux/sysfs.h>
26 #include <linux/list.h>
30 #include "../ring_generic.h"
31 #include "../ring_sw.h"
35 #include "lis3l02dq.h"
37 /* At the moment the spi framework doesn't allow global setting of cs_change.
38 * It's in the likely to be added comment at the top of spi.h.
39 * This means that use cannot be made of spi_write etc.
43 * lis3l02dq_spi_read_reg_8() - read single byte from a single register
44 * @dev: device asosciated with child of actual device (iio_dev or iio_trig)
45 * @reg_address: the address of the register to be read
46 * @val: pass back the resulting value
48 int lis3l02dq_spi_read_reg_8(struct device
*dev
, u8 reg_address
, u8
*val
)
51 struct spi_message msg
;
52 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
53 struct iio_sw_ring_helper_state
*h
= iio_dev_get_devdata(indio_dev
);
54 struct lis3l02dq_state
*st
= lis3l02dq_h_to_s(h
);
56 struct spi_transfer xfer
= {
64 mutex_lock(&st
->buf_lock
);
65 st
->tx
[0] = LIS3L02DQ_READ_REG(reg_address
);
68 spi_message_init(&msg
);
69 spi_message_add_tail(&xfer
, &msg
);
70 ret
= spi_sync(st
->us
, &msg
);
72 mutex_unlock(&st
->buf_lock
);
78 * lis3l02dq_spi_write_reg_8() - write single byte to a register
79 * @dev: device associated with child of actual device (iio_dev or iio_trig)
80 * @reg_address: the address of the register to be written
81 * @val: the value to write
83 int lis3l02dq_spi_write_reg_8(struct device
*dev
,
88 struct spi_message msg
;
89 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
90 struct iio_sw_ring_helper_state
*h
91 = iio_dev_get_devdata(indio_dev
);
92 struct lis3l02dq_state
*st
= lis3l02dq_h_to_s(h
);
93 struct spi_transfer xfer
= {
100 mutex_lock(&st
->buf_lock
);
101 st
->tx
[0] = LIS3L02DQ_WRITE_REG(reg_address
);
104 spi_message_init(&msg
);
105 spi_message_add_tail(&xfer
, &msg
);
106 ret
= spi_sync(st
->us
, &msg
);
107 mutex_unlock(&st
->buf_lock
);
113 * lisl302dq_spi_write_reg_s16() - write 2 bytes to a pair of registers
114 * @dev: device associated with child of actual device (iio_dev or iio_trig)
115 * @reg_address: the address of the lower of the two registers. Second register
116 * is assumed to have address one greater.
117 * @val: value to be written
119 static int lis3l02dq_spi_write_reg_s16(struct device
*dev
,
120 u8 lower_reg_address
,
124 struct spi_message msg
;
125 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
126 struct iio_sw_ring_helper_state
*h
127 = iio_dev_get_devdata(indio_dev
);
128 struct lis3l02dq_state
*st
= lis3l02dq_h_to_s(h
);
129 struct spi_transfer xfers
[] = { {
135 .tx_buf
= st
->tx
+ 2,
142 mutex_lock(&st
->buf_lock
);
143 st
->tx
[0] = LIS3L02DQ_WRITE_REG(lower_reg_address
);
144 st
->tx
[1] = value
& 0xFF;
145 st
->tx
[2] = LIS3L02DQ_WRITE_REG(lower_reg_address
+ 1);
146 st
->tx
[3] = (value
>> 8) & 0xFF;
148 spi_message_init(&msg
);
149 spi_message_add_tail(&xfers
[0], &msg
);
150 spi_message_add_tail(&xfers
[1], &msg
);
151 ret
= spi_sync(st
->us
, &msg
);
152 mutex_unlock(&st
->buf_lock
);
158 * lisl302dq_spi_read_reg_s16() - write 2 bytes to a pair of registers
159 * @dev: device associated with child of actual device (iio_dev or iio_trig)
160 * @reg_address: the address of the lower of the two registers. Second register
161 * is assumed to have address one greater.
162 * @val: somewhere to pass back the value read
164 static int lis3l02dq_spi_read_reg_s16(struct device
*dev
,
165 u8 lower_reg_address
,
168 struct spi_message msg
;
169 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
170 struct iio_sw_ring_helper_state
*h
171 = iio_dev_get_devdata(indio_dev
);
172 struct lis3l02dq_state
*st
= lis3l02dq_h_to_s(h
);
174 struct spi_transfer xfers
[] = { {
181 .tx_buf
= st
->tx
+ 2,
182 .rx_buf
= st
->rx
+ 2,
190 mutex_lock(&st
->buf_lock
);
191 st
->tx
[0] = LIS3L02DQ_READ_REG(lower_reg_address
);
193 st
->tx
[2] = LIS3L02DQ_READ_REG(lower_reg_address
+1);
196 spi_message_init(&msg
);
197 spi_message_add_tail(&xfers
[0], &msg
);
198 spi_message_add_tail(&xfers
[1], &msg
);
199 ret
= spi_sync(st
->us
, &msg
);
201 dev_err(&st
->us
->dev
, "problem when reading 16 bit register");
204 *val
= (s16
)(st
->rx
[1]) | ((s16
)(st
->rx
[3]) << 8);
207 mutex_unlock(&st
->buf_lock
);
212 * lis3l02dq_read_signed() - attribute function used for 8 bit signed values
213 * @dev: the child device associated with the iio_dev or iio_trigger
214 * @attr: the attribute being processed
215 * @buf: buffer into which put the output string
217 static ssize_t
lis3l02dq_read_signed(struct device
*dev
,
218 struct device_attribute
*attr
,
223 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
225 ret
= lis3l02dq_spi_read_reg_8(dev
, this_attr
->address
, (u8
*)&val
);
227 return ret
? ret
: sprintf(buf
, "%d\n", val
);
230 static ssize_t
lis3l02dq_read_unsigned(struct device
*dev
,
231 struct device_attribute
*attr
,
236 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
238 ret
= lis3l02dq_spi_read_reg_8(dev
, this_attr
->address
, &val
);
240 return ret
? ret
: sprintf(buf
, "%d\n", val
);
243 static ssize_t
lis3l02dq_write_signed(struct device
*dev
,
244 struct device_attribute
*attr
,
251 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
253 ret
= strict_strtol(buf
, 10, &valin
);
257 ret
= lis3l02dq_spi_write_reg_8(dev
, this_attr
->address
, (u8
*)&val
);
260 return ret
? ret
: len
;
263 static ssize_t
lis3l02dq_write_unsigned(struct device
*dev
,
264 struct device_attribute
*attr
,
271 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
273 ret
= strict_strtoul(buf
, 10, &valin
);
277 ret
= lis3l02dq_spi_write_reg_8(dev
, this_attr
->address
, &val
);
280 return ret
? ret
: len
;
283 static ssize_t
lis3l02dq_read_16bit_signed(struct device
*dev
,
284 struct device_attribute
*attr
,
289 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
291 ret
= lis3l02dq_spi_read_reg_s16(dev
, this_attr
->address
, &val
);
296 return sprintf(buf
, "%d\n", val
);
299 static ssize_t
lis3l02dq_read_accel(struct device
*dev
,
300 struct device_attribute
*attr
,
303 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
306 /* Take the iio_dev status lock */
307 mutex_lock(&indio_dev
->mlock
);
308 if (indio_dev
->currentmode
== INDIO_RING_TRIGGERED
)
309 ret
= lis3l02dq_read_accel_from_ring(dev
, attr
, buf
);
311 ret
= lis3l02dq_read_16bit_signed(dev
, attr
, buf
);
312 mutex_unlock(&indio_dev
->mlock
);
317 static ssize_t
lis3l02dq_write_16bit_signed(struct device
*dev
,
318 struct device_attribute
*attr
,
322 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
326 ret
= strict_strtol(buf
, 10, &val
);
329 ret
= lis3l02dq_spi_write_reg_s16(dev
, this_attr
->address
, val
);
332 return ret
? ret
: len
;
335 static ssize_t
lis3l02dq_read_frequency(struct device
*dev
,
336 struct device_attribute
*attr
,
341 ret
= lis3l02dq_spi_read_reg_8(dev
,
342 LIS3L02DQ_REG_CTRL_1_ADDR
,
346 t
&= LIS3L02DQ_DEC_MASK
;
348 case LIS3L02DQ_REG_CTRL_1_DF_128
:
349 len
= sprintf(buf
, "280\n");
351 case LIS3L02DQ_REG_CTRL_1_DF_64
:
352 len
= sprintf(buf
, "560\n");
354 case LIS3L02DQ_REG_CTRL_1_DF_32
:
355 len
= sprintf(buf
, "1120\n");
357 case LIS3L02DQ_REG_CTRL_1_DF_8
:
358 len
= sprintf(buf
, "4480\n");
364 static ssize_t
lis3l02dq_write_frequency(struct device
*dev
,
365 struct device_attribute
*attr
,
369 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
374 ret
= strict_strtol(buf
, 10, &val
);
378 mutex_lock(&indio_dev
->mlock
);
379 ret
= lis3l02dq_spi_read_reg_8(dev
,
380 LIS3L02DQ_REG_CTRL_1_ADDR
,
383 goto error_ret_mutex
;
384 /* Wipe the bits clean */
385 t
&= ~LIS3L02DQ_DEC_MASK
;
388 t
|= LIS3L02DQ_REG_CTRL_1_DF_128
;
391 t
|= LIS3L02DQ_REG_CTRL_1_DF_64
;
394 t
|= LIS3L02DQ_REG_CTRL_1_DF_32
;
397 t
|= LIS3L02DQ_REG_CTRL_1_DF_8
;
401 goto error_ret_mutex
;
404 ret
= lis3l02dq_spi_write_reg_8(dev
,
405 LIS3L02DQ_REG_CTRL_1_ADDR
,
409 mutex_unlock(&indio_dev
->mlock
);
411 return ret
? ret
: len
;
414 static int lis3l02dq_initial_setup(struct lis3l02dq_state
*st
)
419 st
->us
->mode
= SPI_MODE_3
;
423 val
= LIS3L02DQ_DEFAULT_CTRL1
;
424 /* Write suitable defaults to ctrl1 */
425 ret
= lis3l02dq_spi_write_reg_8(&st
->help
.indio_dev
->dev
,
426 LIS3L02DQ_REG_CTRL_1_ADDR
,
429 dev_err(&st
->us
->dev
, "problem with setup control register 1");
432 /* Repeat as sometimes doesn't work first time?*/
433 ret
= lis3l02dq_spi_write_reg_8(&st
->help
.indio_dev
->dev
,
434 LIS3L02DQ_REG_CTRL_1_ADDR
,
437 dev_err(&st
->us
->dev
, "problem with setup control register 1");
441 /* Read back to check this has worked acts as loose test of correct
443 ret
= lis3l02dq_spi_read_reg_8(&st
->help
.indio_dev
->dev
,
444 LIS3L02DQ_REG_CTRL_1_ADDR
,
446 if (ret
|| (valtest
!= val
)) {
447 dev_err(&st
->help
.indio_dev
->dev
, "device not playing ball");
452 val
= LIS3L02DQ_DEFAULT_CTRL2
;
453 ret
= lis3l02dq_spi_write_reg_8(&st
->help
.indio_dev
->dev
,
454 LIS3L02DQ_REG_CTRL_2_ADDR
,
457 dev_err(&st
->us
->dev
, "problem with setup control register 2");
461 val
= LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC
;
462 ret
= lis3l02dq_spi_write_reg_8(&st
->help
.indio_dev
->dev
,
463 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR
,
466 dev_err(&st
->us
->dev
, "problem with interrupt cfg register");
472 #define LIS3L02DQ_SIGNED_ATTR(name, reg) \
473 IIO_DEVICE_ATTR(name, \
475 lis3l02dq_read_signed, \
476 lis3l02dq_write_signed, \
479 #define LIS3L02DQ_UNSIGNED_ATTR(name, reg) \
480 IIO_DEVICE_ATTR(name, \
482 lis3l02dq_read_unsigned, \
483 lis3l02dq_write_unsigned, \
486 static LIS3L02DQ_SIGNED_ATTR(accel_x_calibbias
,
487 LIS3L02DQ_REG_OFFSET_X_ADDR
);
488 static LIS3L02DQ_SIGNED_ATTR(accel_y_calibbias
,
489 LIS3L02DQ_REG_OFFSET_Y_ADDR
);
490 static LIS3L02DQ_SIGNED_ATTR(accel_z_calibbias
,
491 LIS3L02DQ_REG_OFFSET_Z_ADDR
);
493 static LIS3L02DQ_UNSIGNED_ATTR(accel_x_calibscale
,
494 LIS3L02DQ_REG_GAIN_X_ADDR
);
495 static LIS3L02DQ_UNSIGNED_ATTR(accel_y_calibscale
,
496 LIS3L02DQ_REG_GAIN_Y_ADDR
);
497 static LIS3L02DQ_UNSIGNED_ATTR(accel_z_calibscale
,
498 LIS3L02DQ_REG_GAIN_Z_ADDR
);
500 static IIO_DEVICE_ATTR(accel_raw_mag_value
,
502 lis3l02dq_read_16bit_signed
,
503 lis3l02dq_write_16bit_signed
,
504 LIS3L02DQ_REG_THS_L_ADDR
);
505 /* RFC The reading method for these will change depending on whether
506 * ring buffer capture is in use. Is it worth making these take two
507 * functions and let the core handle which to call, or leave as in this
508 * driver where it is the drivers problem to manage this?
511 static IIO_DEV_ATTR_ACCEL_X(lis3l02dq_read_accel
,
512 LIS3L02DQ_REG_OUT_X_L_ADDR
);
514 static IIO_DEV_ATTR_ACCEL_Y(lis3l02dq_read_accel
,
515 LIS3L02DQ_REG_OUT_Y_L_ADDR
);
517 static IIO_DEV_ATTR_ACCEL_Z(lis3l02dq_read_accel
,
518 LIS3L02DQ_REG_OUT_Z_L_ADDR
);
520 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR
| S_IRUGO
,
521 lis3l02dq_read_frequency
,
522 lis3l02dq_write_frequency
);
524 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("280 560 1120 4480");
526 static ssize_t
lis3l02dq_read_interrupt_config(struct device
*dev
,
527 struct device_attribute
*attr
,
532 struct iio_event_attr
*this_attr
= to_iio_event_attr(attr
);
534 ret
= lis3l02dq_spi_read_reg_8(dev
->parent
,
535 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR
,
538 return ret
? ret
: sprintf(buf
, "%d\n", !!(val
& this_attr
->mask
));
541 static ssize_t
lis3l02dq_write_interrupt_config(struct device
*dev
,
542 struct device_attribute
*attr
,
546 struct iio_event_attr
*this_attr
= to_iio_event_attr(attr
);
547 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
548 int ret
, currentlyset
, changed
= 0;
549 u8 valold
, controlold
;
552 val
= !(buf
[0] == '0');
554 mutex_lock(&indio_dev
->mlock
);
555 /* read current value */
556 ret
= lis3l02dq_spi_read_reg_8(dev
->parent
,
557 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR
,
560 goto error_mutex_unlock
;
562 /* read current control */
563 ret
= lis3l02dq_spi_read_reg_8(dev
,
564 LIS3L02DQ_REG_CTRL_2_ADDR
,
567 goto error_mutex_unlock
;
568 currentlyset
= !!(valold
& this_attr
->mask
);
569 if (val
== false && currentlyset
) {
570 valold
&= ~this_attr
->mask
;
572 iio_remove_event_from_list(this_attr
->listel
,
573 &indio_dev
->interrupts
[0]
575 } else if (val
== true && !currentlyset
) {
577 valold
|= this_attr
->mask
;
578 iio_add_event_to_list(this_attr
->listel
,
579 &indio_dev
->interrupts
[0]->ev_list
);
583 ret
= lis3l02dq_spi_write_reg_8(dev
,
584 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR
,
587 goto error_mutex_unlock
;
588 /* This always enables the interrupt, even if we've remove the
589 * last thing using it. For this device we can use the reference
590 * count on the handler to tell us if anyone wants the interrupt
592 controlold
= this_attr
->listel
->refcount
?
593 (controlold
| LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT
) :
594 (controlold
& ~LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT
);
595 ret
= lis3l02dq_spi_write_reg_8(dev
,
596 LIS3L02DQ_REG_CTRL_2_ADDR
,
599 goto error_mutex_unlock
;
602 mutex_unlock(&indio_dev
->mlock
);
604 return ret
? ret
: len
;
608 static int lis3l02dq_thresh_handler_th(struct iio_dev
*indio_dev
,
613 struct iio_sw_ring_helper_state
*h
614 = iio_dev_get_devdata(indio_dev
);
615 struct lis3l02dq_state
*st
= lis3l02dq_h_to_s(h
);
617 /* Stash the timestamp somewhere convenient for the bh */
618 st
->thresh_timestamp
= timestamp
;
619 schedule_work(&st
->work_thresh
);
625 /* Unforunately it appears the interrupt won't clear unless you read from the
628 static void lis3l02dq_thresh_handler_bh_no_check(struct work_struct
*work_s
)
630 struct lis3l02dq_state
*st
631 = container_of(work_s
,
632 struct lis3l02dq_state
, work_thresh
);
636 lis3l02dq_spi_read_reg_8(&st
->help
.indio_dev
->dev
,
637 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR
,
640 if (t
& LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_HIGH
)
641 iio_push_event(st
->help
.indio_dev
, 0,
642 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL
,
647 st
->thresh_timestamp
);
649 if (t
& LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_LOW
)
650 iio_push_event(st
->help
.indio_dev
, 0,
651 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL
,
656 st
->thresh_timestamp
);
658 if (t
& LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_HIGH
)
659 iio_push_event(st
->help
.indio_dev
, 0,
660 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL
,
665 st
->thresh_timestamp
);
667 if (t
& LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_LOW
)
668 iio_push_event(st
->help
.indio_dev
, 0,
669 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL
,
674 st
->thresh_timestamp
);
676 if (t
& LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_HIGH
)
677 iio_push_event(st
->help
.indio_dev
, 0,
678 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL
,
683 st
->thresh_timestamp
);
685 if (t
& LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_LOW
)
686 iio_push_event(st
->help
.indio_dev
, 0,
687 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL
,
692 st
->thresh_timestamp
);
693 /* reenable the irq */
694 enable_irq(st
->us
->irq
);
695 /* Ack and allow for new interrupts */
696 lis3l02dq_spi_read_reg_8(&st
->help
.indio_dev
->dev
,
697 LIS3L02DQ_REG_WAKE_UP_ACK_ADDR
,
703 /* A shared handler for a number of threshold types */
704 IIO_EVENT_SH(threshold
, &lis3l02dq_thresh_handler_th
);
706 IIO_EVENT_ATTR_SH(accel_x_thresh_rising_en
,
708 lis3l02dq_read_interrupt_config
,
709 lis3l02dq_write_interrupt_config
,
710 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_HIGH
);
712 IIO_EVENT_ATTR_SH(accel_y_thresh_rising_en
,
714 lis3l02dq_read_interrupt_config
,
715 lis3l02dq_write_interrupt_config
,
716 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_HIGH
);
718 IIO_EVENT_ATTR_SH(accel_z_thresh_rising_en
,
720 lis3l02dq_read_interrupt_config
,
721 lis3l02dq_write_interrupt_config
,
722 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_HIGH
);
724 IIO_EVENT_ATTR_SH(accel_x_thresh_falling_en
,
726 lis3l02dq_read_interrupt_config
,
727 lis3l02dq_write_interrupt_config
,
728 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_LOW
);
730 IIO_EVENT_ATTR_SH(accel_y_thresh_falling_en
,
732 lis3l02dq_read_interrupt_config
,
733 lis3l02dq_write_interrupt_config
,
734 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_LOW
);
736 IIO_EVENT_ATTR_SH(accel_z_thresh_falling_en
,
738 lis3l02dq_read_interrupt_config
,
739 lis3l02dq_write_interrupt_config
,
740 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_LOW
);
743 static struct attribute
*lis3l02dq_event_attributes
[] = {
744 &iio_event_attr_accel_x_thresh_rising_en
.dev_attr
.attr
,
745 &iio_event_attr_accel_y_thresh_rising_en
.dev_attr
.attr
,
746 &iio_event_attr_accel_z_thresh_rising_en
.dev_attr
.attr
,
747 &iio_event_attr_accel_x_thresh_falling_en
.dev_attr
.attr
,
748 &iio_event_attr_accel_y_thresh_falling_en
.dev_attr
.attr
,
749 &iio_event_attr_accel_z_thresh_falling_en
.dev_attr
.attr
,
750 &iio_dev_attr_accel_raw_mag_value
.dev_attr
.attr
,
754 static struct attribute_group lis3l02dq_event_attribute_group
= {
755 .attrs
= lis3l02dq_event_attributes
,
758 static IIO_CONST_ATTR_NAME("lis3l02dq");
759 static IIO_CONST_ATTR(accel_scale
, "0.00958");
761 static struct attribute
*lis3l02dq_attributes
[] = {
762 &iio_dev_attr_accel_x_calibbias
.dev_attr
.attr
,
763 &iio_dev_attr_accel_y_calibbias
.dev_attr
.attr
,
764 &iio_dev_attr_accel_z_calibbias
.dev_attr
.attr
,
765 &iio_dev_attr_accel_x_calibscale
.dev_attr
.attr
,
766 &iio_dev_attr_accel_y_calibscale
.dev_attr
.attr
,
767 &iio_dev_attr_accel_z_calibscale
.dev_attr
.attr
,
768 &iio_const_attr_accel_scale
.dev_attr
.attr
,
769 &iio_dev_attr_accel_x_raw
.dev_attr
.attr
,
770 &iio_dev_attr_accel_y_raw
.dev_attr
.attr
,
771 &iio_dev_attr_accel_z_raw
.dev_attr
.attr
,
772 &iio_dev_attr_sampling_frequency
.dev_attr
.attr
,
773 &iio_const_attr_sampling_frequency_available
.dev_attr
.attr
,
774 &iio_const_attr_name
.dev_attr
.attr
,
778 static const struct attribute_group lis3l02dq_attribute_group
= {
779 .attrs
= lis3l02dq_attributes
,
782 static int __devinit
lis3l02dq_probe(struct spi_device
*spi
)
784 int ret
, regdone
= 0;
785 struct lis3l02dq_state
*st
= kzalloc(sizeof *st
, GFP_KERNEL
);
790 INIT_WORK(&st
->work_thresh
, lis3l02dq_thresh_handler_bh_no_check
);
791 /* this is only used tor removal purposes */
792 spi_set_drvdata(spi
, st
);
794 /* Allocate the comms buffers */
795 st
->rx
= kzalloc(sizeof(*st
->rx
)*LIS3L02DQ_MAX_RX
, GFP_KERNEL
);
796 if (st
->rx
== NULL
) {
800 st
->tx
= kzalloc(sizeof(*st
->tx
)*LIS3L02DQ_MAX_TX
, GFP_KERNEL
);
801 if (st
->tx
== NULL
) {
806 mutex_init(&st
->buf_lock
);
807 /* setup the industrialio driver allocated elements */
808 st
->help
.indio_dev
= iio_allocate_device();
809 if (st
->help
.indio_dev
== NULL
) {
814 st
->help
.indio_dev
->dev
.parent
= &spi
->dev
;
815 st
->help
.indio_dev
->num_interrupt_lines
= 1;
816 st
->help
.indio_dev
->event_attrs
= &lis3l02dq_event_attribute_group
;
817 st
->help
.indio_dev
->attrs
= &lis3l02dq_attribute_group
;
818 st
->help
.indio_dev
->dev_data
= (void *)(&st
->help
);
819 st
->help
.indio_dev
->driver_module
= THIS_MODULE
;
820 st
->help
.indio_dev
->modes
= INDIO_DIRECT_MODE
;
822 ret
= lis3l02dq_configure_ring(st
->help
.indio_dev
);
826 ret
= iio_device_register(st
->help
.indio_dev
);
828 goto error_unreg_ring_funcs
;
831 ret
= iio_ring_buffer_register(st
->help
.indio_dev
->ring
, 0);
833 printk(KERN_ERR
"failed to initialize the ring\n");
834 goto error_unreg_ring_funcs
;
837 if (spi
->irq
&& gpio_is_valid(irq_to_gpio(spi
->irq
)) > 0) {
839 ret
= iio_register_interrupt_line(spi
->irq
,
845 goto error_uninitialize_ring
;
847 ret
= lis3l02dq_probe_trigger(st
->help
.indio_dev
);
849 goto error_unregister_line
;
852 /* Get the device into a sane initial state */
853 ret
= lis3l02dq_initial_setup(st
);
855 goto error_remove_trigger
;
858 error_remove_trigger
:
859 if (st
->help
.indio_dev
->modes
& INDIO_RING_TRIGGERED
)
860 lis3l02dq_remove_trigger(st
->help
.indio_dev
);
861 error_unregister_line
:
862 if (st
->help
.indio_dev
->modes
& INDIO_RING_TRIGGERED
)
863 iio_unregister_interrupt_line(st
->help
.indio_dev
, 0);
864 error_uninitialize_ring
:
865 iio_ring_buffer_unregister(st
->help
.indio_dev
->ring
);
866 error_unreg_ring_funcs
:
867 lis3l02dq_unconfigure_ring(st
->help
.indio_dev
);
870 iio_device_unregister(st
->help
.indio_dev
);
872 iio_free_device(st
->help
.indio_dev
);
883 /* Power down the device */
884 static int lis3l02dq_stop_device(struct iio_dev
*indio_dev
)
887 struct iio_sw_ring_helper_state
*h
888 = iio_dev_get_devdata(indio_dev
);
889 struct lis3l02dq_state
*st
= lis3l02dq_h_to_s(h
);
892 mutex_lock(&indio_dev
->mlock
);
893 ret
= lis3l02dq_spi_write_reg_8(&indio_dev
->dev
,
894 LIS3L02DQ_REG_CTRL_1_ADDR
,
897 dev_err(&st
->us
->dev
, "problem with turning device off: ctrl1");
901 ret
= lis3l02dq_spi_write_reg_8(&indio_dev
->dev
,
902 LIS3L02DQ_REG_CTRL_2_ADDR
,
905 dev_err(&st
->us
->dev
, "problem with turning device off: ctrl2");
907 mutex_unlock(&indio_dev
->mlock
);
911 /* fixme, confirm ordering in this function */
912 static int lis3l02dq_remove(struct spi_device
*spi
)
915 struct lis3l02dq_state
*st
= spi_get_drvdata(spi
);
916 struct iio_dev
*indio_dev
= st
->help
.indio_dev
;
918 ret
= lis3l02dq_stop_device(indio_dev
);
922 flush_scheduled_work();
924 lis3l02dq_remove_trigger(indio_dev
);
925 if (spi
->irq
&& gpio_is_valid(irq_to_gpio(spi
->irq
)) > 0)
926 iio_unregister_interrupt_line(indio_dev
, 0);
928 iio_ring_buffer_unregister(indio_dev
->ring
);
929 lis3l02dq_unconfigure_ring(indio_dev
);
930 iio_device_unregister(indio_dev
);
941 static struct spi_driver lis3l02dq_driver
= {
944 .owner
= THIS_MODULE
,
946 .probe
= lis3l02dq_probe
,
947 .remove
= __devexit_p(lis3l02dq_remove
),
950 static __init
int lis3l02dq_init(void)
952 return spi_register_driver(&lis3l02dq_driver
);
954 module_init(lis3l02dq_init
);
956 static __exit
void lis3l02dq_exit(void)
958 spi_unregister_driver(&lis3l02dq_driver
);
960 module_exit(lis3l02dq_exit
);
962 MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>");
963 MODULE_DESCRIPTION("ST LIS3L02DQ Accelerometer SPI driver");
964 MODULE_LICENSE("GPL v2");