2 * Freescale MXS LRADC driver
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/bitops.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/device.h>
22 #include <linux/err.h>
23 #include <linux/input.h>
24 #include <linux/interrupt.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/mutex.h>
30 #include <linux/of_device.h>
31 #include <linux/platform_device.h>
32 #include <linux/slab.h>
33 #include <linux/stmp_device.h>
34 #include <linux/sysfs.h>
36 #include <linux/iio/buffer.h>
37 #include <linux/iio/iio.h>
38 #include <linux/iio/trigger.h>
39 #include <linux/iio/trigger_consumer.h>
40 #include <linux/iio/triggered_buffer.h>
41 #include <linux/iio/sysfs.h>
43 #define DRIVER_NAME "mxs-lradc"
45 #define LRADC_MAX_DELAY_CHANS 4
46 #define LRADC_MAX_MAPPED_CHANS 8
47 #define LRADC_MAX_TOTAL_CHANS 16
49 #define LRADC_DELAY_TIMER_HZ 2000
52 * Make this runtime configurable if necessary. Currently, if the buffered mode
53 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
54 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
55 * seconds. The result is that the samples arrive every 500mS.
57 #define LRADC_DELAY_TIMER_PER 200
58 #define LRADC_DELAY_TIMER_LOOP 5
61 * Once the pen touches the touchscreen, the touchscreen switches from
62 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
63 * is realized by worker thread, which is called every 20 or so milliseconds.
64 * This gives the touchscreen enough fluency and does not strain the system
67 #define LRADC_TS_SAMPLE_DELAY_MS 5
70 * The LRADC reads the following amount of samples from each touchscreen
71 * channel and the driver then computes average of these.
73 #define LRADC_TS_SAMPLE_AMOUNT 4
80 static const char * const mx23_lradc_irq_names
[] = {
81 "mxs-lradc-touchscreen",
92 static const char * const mx28_lradc_irq_names
[] = {
93 "mxs-lradc-touchscreen",
100 "mxs-lradc-channel4",
101 "mxs-lradc-channel5",
102 "mxs-lradc-channel6",
103 "mxs-lradc-channel7",
108 struct mxs_lradc_of_config
{
110 const char * const *irq_name
;
114 #define VREF_MV_BASE 1850
116 static const u32 mx23_vref_mv
[LRADC_MAX_TOTAL_CHANS
] = {
117 VREF_MV_BASE
, /* CH0 */
118 VREF_MV_BASE
, /* CH1 */
119 VREF_MV_BASE
, /* CH2 */
120 VREF_MV_BASE
, /* CH3 */
121 VREF_MV_BASE
, /* CH4 */
122 VREF_MV_BASE
, /* CH5 */
123 VREF_MV_BASE
* 2, /* CH6 VDDIO */
124 VREF_MV_BASE
* 4, /* CH7 VBATT */
125 VREF_MV_BASE
, /* CH8 Temp sense 0 */
126 VREF_MV_BASE
, /* CH9 Temp sense 1 */
127 VREF_MV_BASE
, /* CH10 */
128 VREF_MV_BASE
, /* CH11 */
129 VREF_MV_BASE
, /* CH12 USB_DP */
130 VREF_MV_BASE
, /* CH13 USB_DN */
131 VREF_MV_BASE
, /* CH14 VBG */
132 VREF_MV_BASE
* 4, /* CH15 VDD5V */
135 static const u32 mx28_vref_mv
[LRADC_MAX_TOTAL_CHANS
] = {
136 VREF_MV_BASE
, /* CH0 */
137 VREF_MV_BASE
, /* CH1 */
138 VREF_MV_BASE
, /* CH2 */
139 VREF_MV_BASE
, /* CH3 */
140 VREF_MV_BASE
, /* CH4 */
141 VREF_MV_BASE
, /* CH5 */
142 VREF_MV_BASE
, /* CH6 */
143 VREF_MV_BASE
* 4, /* CH7 VBATT */
144 VREF_MV_BASE
, /* CH8 Temp sense 0 */
145 VREF_MV_BASE
, /* CH9 Temp sense 1 */
146 VREF_MV_BASE
* 2, /* CH10 VDDIO */
147 VREF_MV_BASE
, /* CH11 VTH */
148 VREF_MV_BASE
* 2, /* CH12 VDDA */
149 VREF_MV_BASE
, /* CH13 VDDD */
150 VREF_MV_BASE
, /* CH14 VBG */
151 VREF_MV_BASE
* 4, /* CH15 VDD5V */
154 static const struct mxs_lradc_of_config mxs_lradc_of_config
[] = {
156 .irq_count
= ARRAY_SIZE(mx23_lradc_irq_names
),
157 .irq_name
= mx23_lradc_irq_names
,
158 .vref_mv
= mx23_vref_mv
,
161 .irq_count
= ARRAY_SIZE(mx28_lradc_irq_names
),
162 .irq_name
= mx28_lradc_irq_names
,
163 .vref_mv
= mx28_vref_mv
,
168 MXS_LRADC_TOUCHSCREEN_NONE
= 0,
169 MXS_LRADC_TOUCHSCREEN_4WIRE
,
170 MXS_LRADC_TOUCHSCREEN_5WIRE
,
174 * Touchscreen handling
176 enum lradc_ts_plate
{
180 LRADC_SAMPLE_PRESSURE
,
184 enum mxs_lradc_divbytwo
{
185 MXS_LRADC_DIV_DISABLED
= 0,
186 MXS_LRADC_DIV_ENABLED
,
189 struct mxs_lradc_scale
{
190 unsigned int integer
;
202 struct iio_trigger
*trig
;
206 struct completion completion
;
209 struct mxs_lradc_scale scale_avail
[LRADC_MAX_TOTAL_CHANS
][2];
210 unsigned long is_divided
;
213 * When the touchscreen is enabled, we give it two private virtual
214 * channels: #6 and #7. This means that only 6 virtual channels (instead
215 * of 8) will be available for buffered capture.
217 #define TOUCHSCREEN_VCHANNEL1 7
218 #define TOUCHSCREEN_VCHANNEL2 6
219 #define BUFFER_VCHANS_LIMITED 0x3f
220 #define BUFFER_VCHANS_ALL 0xff
224 * Furthermore, certain LRADC channels are shared between touchscreen
225 * and/or touch-buttons and generic LRADC block. Therefore when using
226 * either of these, these channels are not available for the regular
227 * sampling. The shared channels are as follows:
229 * CH0 -- Touch button #0
230 * CH1 -- Touch button #1
231 * CH2 -- Touch screen XPUL
232 * CH3 -- Touch screen YPLL
233 * CH4 -- Touch screen XNUL
234 * CH5 -- Touch screen YNLR
235 * CH6 -- Touch screen WIPER (5-wire only)
237 * The bit fields below represents which parts of the LRADC block are
238 * switched into special mode of operation. These channels can not
239 * be sampled as regular LRADC channels. The driver will refuse any
240 * attempt to sample these channels.
242 #define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))
243 #define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
244 #define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
245 enum mxs_lradc_ts use_touchscreen
;
246 bool use_touchbutton
;
248 struct input_dev
*ts_input
;
250 enum mxs_lradc_id soc
;
251 enum lradc_ts_plate cur_plate
; /* state machine */
255 unsigned ts_pressure
;
257 /* handle touchscreen's physical behaviour */
258 /* samples per coordinate */
259 unsigned over_sample_cnt
;
260 /* time clocks between samples */
261 unsigned over_sample_delay
;
262 /* time in clocks to wait after the plates where switched */
263 unsigned settling_delay
;
266 #define LRADC_CTRL0 0x00
267 # define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)
268 # define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)
269 # define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21)
270 # define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20)
271 # define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19)
272 # define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18)
273 # define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17)
274 # define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16)
276 # define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)
277 # define LRADC_CTRL0_MX23_YM BIT(19)
278 # define LRADC_CTRL0_MX23_XM BIT(18)
279 # define LRADC_CTRL0_MX23_YP BIT(17)
280 # define LRADC_CTRL0_MX23_XP BIT(16)
282 # define LRADC_CTRL0_MX28_PLATE_MASK \
283 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
284 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
285 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
286 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
288 # define LRADC_CTRL0_MX23_PLATE_MASK \
289 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
290 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
291 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
293 #define LRADC_CTRL1 0x10
294 #define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)
295 #define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
296 #define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
297 #define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
298 #define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
299 #define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)
300 #define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
301 #define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
302 #define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
303 #define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
305 #define LRADC_CTRL2 0x20
306 #define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
307 #define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)
309 #define LRADC_STATUS 0x40
310 #define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)
312 #define LRADC_CH(n) (0x50 + (0x10 * (n)))
313 #define LRADC_CH_ACCUMULATE BIT(29)
314 #define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
315 #define LRADC_CH_NUM_SAMPLES_OFFSET 24
316 #define LRADC_CH_NUM_SAMPLES(x) \
317 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
318 #define LRADC_CH_VALUE_MASK 0x3ffff
319 #define LRADC_CH_VALUE_OFFSET 0
321 #define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
322 #define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
323 #define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
324 #define LRADC_DELAY_TRIGGER(x) \
325 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
326 LRADC_DELAY_TRIGGER_LRADCS_MASK)
327 #define LRADC_DELAY_KICK BIT(20)
328 #define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
329 #define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
330 #define LRADC_DELAY_TRIGGER_DELAYS(x) \
331 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
332 LRADC_DELAY_TRIGGER_DELAYS_MASK)
333 #define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
334 #define LRADC_DELAY_LOOP_COUNT_OFFSET 11
335 #define LRADC_DELAY_LOOP(x) \
336 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
337 LRADC_DELAY_LOOP_COUNT_MASK)
338 #define LRADC_DELAY_DELAY_MASK 0x7ff
339 #define LRADC_DELAY_DELAY_OFFSET 0
340 #define LRADC_DELAY_DELAY(x) \
341 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
342 LRADC_DELAY_DELAY_MASK)
344 #define LRADC_CTRL4 0x140
345 #define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
346 #define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
347 #define LRADC_CTRL4_LRADCSELECT(n, x) \
348 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
349 LRADC_CTRL4_LRADCSELECT_MASK(n))
351 #define LRADC_RESOLUTION 12
352 #define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
354 static void mxs_lradc_reg_set(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
356 writel(val
, lradc
->base
+ reg
+ STMP_OFFSET_REG_SET
);
359 static void mxs_lradc_reg_clear(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
361 writel(val
, lradc
->base
+ reg
+ STMP_OFFSET_REG_CLR
);
364 static void mxs_lradc_reg_wrt(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
366 writel(val
, lradc
->base
+ reg
);
369 static u32
mxs_lradc_plate_mask(struct mxs_lradc
*lradc
)
371 if (lradc
->soc
== IMX23_LRADC
)
372 return LRADC_CTRL0_MX23_PLATE_MASK
;
373 return LRADC_CTRL0_MX28_PLATE_MASK
;
376 static u32
mxs_lradc_irq_en_mask(struct mxs_lradc
*lradc
)
378 if (lradc
->soc
== IMX23_LRADC
)
379 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK
;
380 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
;
383 static u32
mxs_lradc_irq_mask(struct mxs_lradc
*lradc
)
385 if (lradc
->soc
== IMX23_LRADC
)
386 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK
;
387 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK
;
390 static u32
mxs_lradc_touch_detect_bit(struct mxs_lradc
*lradc
)
392 if (lradc
->soc
== IMX23_LRADC
)
393 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE
;
394 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE
;
397 static u32
mxs_lradc_drive_x_plate(struct mxs_lradc
*lradc
)
399 if (lradc
->soc
== IMX23_LRADC
)
400 return LRADC_CTRL0_MX23_XP
| LRADC_CTRL0_MX23_XM
;
401 return LRADC_CTRL0_MX28_XPPSW
| LRADC_CTRL0_MX28_XNNSW
;
404 static u32
mxs_lradc_drive_y_plate(struct mxs_lradc
*lradc
)
406 if (lradc
->soc
== IMX23_LRADC
)
407 return LRADC_CTRL0_MX23_YP
| LRADC_CTRL0_MX23_YM
;
408 return LRADC_CTRL0_MX28_YPPSW
| LRADC_CTRL0_MX28_YNNSW
;
411 static u32
mxs_lradc_drive_pressure(struct mxs_lradc
*lradc
)
413 if (lradc
->soc
== IMX23_LRADC
)
414 return LRADC_CTRL0_MX23_YP
| LRADC_CTRL0_MX23_XM
;
415 return LRADC_CTRL0_MX28_YPPSW
| LRADC_CTRL0_MX28_XNNSW
;
418 static bool mxs_lradc_check_touch_event(struct mxs_lradc
*lradc
)
420 return !!(readl(lradc
->base
+ LRADC_STATUS
) &
421 LRADC_STATUS_TOUCH_DETECT_RAW
);
424 static void mxs_lradc_map_channel(struct mxs_lradc
*lradc
, unsigned vch
,
427 mxs_lradc_reg_clear(lradc
, LRADC_CTRL4_LRADCSELECT_MASK(vch
),
429 mxs_lradc_reg_set(lradc
, LRADC_CTRL4_LRADCSELECT(vch
, ch
), LRADC_CTRL4
);
432 static void mxs_lradc_setup_ts_channel(struct mxs_lradc
*lradc
, unsigned ch
)
435 * prepare for oversampling conversion
437 * from the datasheet:
438 * "The ACCUMULATE bit in the appropriate channel register
439 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
440 * otherwise, the IRQs will not fire."
442 mxs_lradc_reg_wrt(lradc
, LRADC_CH_ACCUMULATE
|
443 LRADC_CH_NUM_SAMPLES(lradc
->over_sample_cnt
- 1),
446 /* from the datasheet:
447 * "Software must clear this register in preparation for a
448 * multi-cycle accumulation.
450 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch
));
453 * prepare the delay/loop unit according to the oversampling count
455 * from the datasheet:
456 * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1,
457 * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise,
458 * the LRADC will not trigger the delay group."
460 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_TRIGGER(1 << ch
) |
461 LRADC_DELAY_TRIGGER_DELAYS(0) |
462 LRADC_DELAY_LOOP(lradc
->over_sample_cnt
- 1) |
463 LRADC_DELAY_DELAY(lradc
->over_sample_delay
- 1),
466 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(ch
), LRADC_CTRL1
);
469 * after changing the touchscreen plates setting
470 * the signals need some initial time to settle. Start the
471 * SoC's delay unit and start the conversion later
476 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
477 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
479 LRADC_DELAY_DELAY(lradc
->settling_delay
),
484 * Pressure detection is special:
485 * We want to do both required measurements for the pressure detection in
486 * one turn. Use the hardware features to chain both conversions and let the
487 * hardware report one interrupt if both conversions are done
489 static void mxs_lradc_setup_ts_pressure(struct mxs_lradc
*lradc
, unsigned ch1
,
495 * prepare for oversampling conversion
497 * from the datasheet:
498 * "The ACCUMULATE bit in the appropriate channel register
499 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
500 * otherwise, the IRQs will not fire."
502 reg
= LRADC_CH_ACCUMULATE
|
503 LRADC_CH_NUM_SAMPLES(lradc
->over_sample_cnt
- 1);
504 mxs_lradc_reg_wrt(lradc
, reg
, LRADC_CH(ch1
));
505 mxs_lradc_reg_wrt(lradc
, reg
, LRADC_CH(ch2
));
507 /* from the datasheet:
508 * "Software must clear this register in preparation for a
509 * multi-cycle accumulation.
511 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch1
));
512 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch2
));
514 /* prepare the delay/loop unit according to the oversampling count */
517 LRADC_DELAY_TRIGGER(1 << ch1
) |
518 LRADC_DELAY_TRIGGER(1 << ch2
) | /* start both channels */
519 LRADC_DELAY_TRIGGER_DELAYS(0) |
520 LRADC_DELAY_LOOP(lradc
->over_sample_cnt
- 1) |
521 LRADC_DELAY_DELAY(lradc
->over_sample_delay
- 1),
524 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(ch2
), LRADC_CTRL1
);
527 * after changing the touchscreen plates setting
528 * the signals need some initial time to settle. Start the
529 * SoC's delay unit and start the conversion later
534 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
535 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
537 LRADC_DELAY_DELAY(lradc
->settling_delay
), LRADC_DELAY(2));
540 static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc
*lradc
,
544 unsigned num_samples
, val
;
546 reg
= readl(lradc
->base
+ LRADC_CH(channel
));
547 if (reg
& LRADC_CH_ACCUMULATE
)
548 num_samples
= lradc
->over_sample_cnt
;
552 val
= (reg
& LRADC_CH_VALUE_MASK
) >> LRADC_CH_VALUE_OFFSET
;
553 return val
/ num_samples
;
556 static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc
*lradc
,
557 unsigned ch1
, unsigned ch2
)
560 unsigned pressure
, m1
, m2
;
562 mask
= LRADC_CTRL1_LRADC_IRQ(ch1
) | LRADC_CTRL1_LRADC_IRQ(ch2
);
563 reg
= readl(lradc
->base
+ LRADC_CTRL1
) & mask
;
565 while (reg
!= mask
) {
566 reg
= readl(lradc
->base
+ LRADC_CTRL1
) & mask
;
567 dev_dbg(lradc
->dev
, "One channel is still busy: %X\n", reg
);
570 m1
= mxs_lradc_read_raw_channel(lradc
, ch1
);
571 m2
= mxs_lradc_read_raw_channel(lradc
, ch2
);
574 dev_warn(lradc
->dev
, "Cannot calculate pressure\n");
575 return 1 << (LRADC_RESOLUTION
- 1);
578 /* simply scale the value from 0 ... max ADC resolution */
580 pressure
*= (1 << LRADC_RESOLUTION
);
583 dev_dbg(lradc
->dev
, "Pressure = %u\n", pressure
);
593 * YP(open)--+-------------+
596 * YM(-)--+-------------+ |
601 * "weak+" means 200k Ohm VDDIO
604 static void mxs_lradc_setup_touch_detection(struct mxs_lradc
*lradc
)
607 * In order to detect a touch event the 'touch detect enable' bit
609 * - a weak pullup to the X+ connector
610 * - a strong ground at the Y- connector
612 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
613 mxs_lradc_reg_set(lradc
, mxs_lradc_touch_detect_bit(lradc
),
618 * YP(meas)--+-------------+
621 * YM(open)--+-------------+ |
626 * (+) means here 1.85 V
629 static void mxs_lradc_prepare_x_pos(struct mxs_lradc
*lradc
)
631 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
632 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_x_plate(lradc
), LRADC_CTRL0
);
634 lradc
->cur_plate
= LRADC_SAMPLE_X
;
635 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL1
, TS_CH_YP
);
636 mxs_lradc_setup_ts_channel(lradc
, TOUCHSCREEN_VCHANNEL1
);
640 * YP(+)--+-------------+
643 * YM(-)--+-------------+ |
648 * (+) means here 1.85 V
651 static void mxs_lradc_prepare_y_pos(struct mxs_lradc
*lradc
)
653 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
654 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_y_plate(lradc
), LRADC_CTRL0
);
656 lradc
->cur_plate
= LRADC_SAMPLE_Y
;
657 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL1
, TS_CH_XM
);
658 mxs_lradc_setup_ts_channel(lradc
, TOUCHSCREEN_VCHANNEL1
);
662 * YP(+)--+-------------+
665 * YM(meas)--+-------------+ |
670 * (+) means here 1.85 V
673 static void mxs_lradc_prepare_pressure(struct mxs_lradc
*lradc
)
675 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
676 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_pressure(lradc
), LRADC_CTRL0
);
678 lradc
->cur_plate
= LRADC_SAMPLE_PRESSURE
;
679 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL1
, TS_CH_YM
);
680 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL2
, TS_CH_XP
);
681 mxs_lradc_setup_ts_pressure(lradc
, TOUCHSCREEN_VCHANNEL2
,
682 TOUCHSCREEN_VCHANNEL1
);
685 static void mxs_lradc_enable_touch_detection(struct mxs_lradc
*lradc
)
687 mxs_lradc_setup_touch_detection(lradc
);
689 lradc
->cur_plate
= LRADC_TOUCH
;
690 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
|
691 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
692 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
695 static void mxs_lradc_start_touch_event(struct mxs_lradc
*lradc
)
697 mxs_lradc_reg_clear(lradc
,
698 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
,
700 mxs_lradc_reg_set(lradc
,
701 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1
),
704 * start with the Y-pos, because it uses nearly the same plate
705 * settings like the touch detection
707 mxs_lradc_prepare_y_pos(lradc
);
710 static void mxs_lradc_report_ts_event(struct mxs_lradc
*lradc
)
712 input_report_abs(lradc
->ts_input
, ABS_X
, lradc
->ts_x_pos
);
713 input_report_abs(lradc
->ts_input
, ABS_Y
, lradc
->ts_y_pos
);
714 input_report_abs(lradc
->ts_input
, ABS_PRESSURE
, lradc
->ts_pressure
);
715 input_report_key(lradc
->ts_input
, BTN_TOUCH
, 1);
716 input_sync(lradc
->ts_input
);
719 static void mxs_lradc_complete_touch_event(struct mxs_lradc
*lradc
)
721 mxs_lradc_setup_touch_detection(lradc
);
722 lradc
->cur_plate
= LRADC_SAMPLE_VALID
;
724 * start a dummy conversion to burn time to settle the signals
725 * note: we are not interested in the conversion's value
727 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1
));
728 mxs_lradc_reg_clear(lradc
,
729 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
) |
730 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2
),
734 LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1
) |
735 LRADC_DELAY_KICK
| LRADC_DELAY_DELAY(10), /* waste 5 ms */
740 * in order to avoid false measurements, report only samples where
741 * the surface is still touched after the position measurement
743 static void mxs_lradc_finish_touch_event(struct mxs_lradc
*lradc
, bool valid
)
745 /* if it is still touched, report the sample */
746 if (valid
&& mxs_lradc_check_touch_event(lradc
)) {
747 lradc
->ts_valid
= true;
748 mxs_lradc_report_ts_event(lradc
);
751 /* if it is even still touched, continue with the next measurement */
752 if (mxs_lradc_check_touch_event(lradc
)) {
753 mxs_lradc_prepare_y_pos(lradc
);
757 if (lradc
->ts_valid
) {
758 /* signal the release */
759 lradc
->ts_valid
= false;
760 input_report_key(lradc
->ts_input
, BTN_TOUCH
, 0);
761 input_sync(lradc
->ts_input
);
764 /* if it is released, wait for the next touch via IRQ */
765 lradc
->cur_plate
= LRADC_TOUCH
;
766 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(2));
767 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(3));
768 mxs_lradc_reg_clear(lradc
,
769 LRADC_CTRL1_TOUCH_DETECT_IRQ
|
770 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1
) |
771 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
),
773 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
776 /* touchscreen's state machine */
777 static void mxs_lradc_handle_touch(struct mxs_lradc
*lradc
)
779 switch (lradc
->cur_plate
) {
781 if (mxs_lradc_check_touch_event(lradc
))
782 mxs_lradc_start_touch_event(lradc
);
783 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
,
789 mxs_lradc_read_raw_channel(lradc
,
790 TOUCHSCREEN_VCHANNEL1
);
791 mxs_lradc_prepare_x_pos(lradc
);
796 mxs_lradc_read_raw_channel(lradc
,
797 TOUCHSCREEN_VCHANNEL1
);
798 mxs_lradc_prepare_pressure(lradc
);
801 case LRADC_SAMPLE_PRESSURE
:
803 mxs_lradc_read_ts_pressure(lradc
,
804 TOUCHSCREEN_VCHANNEL2
,
805 TOUCHSCREEN_VCHANNEL1
);
806 mxs_lradc_complete_touch_event(lradc
);
809 case LRADC_SAMPLE_VALID
:
810 mxs_lradc_finish_touch_event(lradc
, 1);
818 static int mxs_lradc_read_single(struct iio_dev
*iio_dev
, int chan
, int *val
)
820 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
824 * See if there is no buffered operation in progress. If there is, simply
825 * bail out. This can be improved to support both buffered and raw IO at
826 * the same time, yet the code becomes horribly complicated. Therefore I
827 * applied KISS principle here.
829 ret
= mutex_trylock(&lradc
->lock
);
833 reinit_completion(&lradc
->completion
);
836 * No buffered operation in progress, map the channel and trigger it.
837 * Virtual channel 0 is always used here as the others are always not
838 * used if doing raw sampling.
840 if (lradc
->soc
== IMX28_LRADC
)
841 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0),
843 mxs_lradc_reg_clear(lradc
, 0x1, LRADC_CTRL0
);
845 /* Enable / disable the divider per requirement */
846 if (test_bit(chan
, &lradc
->is_divided
))
847 mxs_lradc_reg_set(lradc
,
848 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
,
851 mxs_lradc_reg_clear(lradc
,
852 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
,
855 /* Clean the slot's previous content, then set new one. */
856 mxs_lradc_reg_clear(lradc
, LRADC_CTRL4_LRADCSELECT_MASK(0),
858 mxs_lradc_reg_set(lradc
, chan
, LRADC_CTRL4
);
860 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CH(0));
862 /* Enable the IRQ and start sampling the channel. */
863 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1
);
864 mxs_lradc_reg_set(lradc
, BIT(0), LRADC_CTRL0
);
866 /* Wait for completion on the channel, 1 second max. */
867 ret
= wait_for_completion_killable_timeout(&lradc
->completion
, HZ
);
874 *val
= readl(lradc
->base
+ LRADC_CH(0)) & LRADC_CH_VALUE_MASK
;
878 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1
);
880 mutex_unlock(&lradc
->lock
);
885 static int mxs_lradc_read_temp(struct iio_dev
*iio_dev
, int *val
)
889 ret
= mxs_lradc_read_single(iio_dev
, 8, &min
);
890 if (ret
!= IIO_VAL_INT
)
893 ret
= mxs_lradc_read_single(iio_dev
, 9, &max
);
894 if (ret
!= IIO_VAL_INT
)
902 static int mxs_lradc_read_raw(struct iio_dev
*iio_dev
,
903 const struct iio_chan_spec
*chan
,
904 int *val
, int *val2
, long m
)
906 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
909 case IIO_CHAN_INFO_RAW
:
910 if (chan
->type
== IIO_TEMP
)
911 return mxs_lradc_read_temp(iio_dev
, val
);
913 return mxs_lradc_read_single(iio_dev
, chan
->channel
, val
);
915 case IIO_CHAN_INFO_SCALE
:
916 if (chan
->type
== IIO_TEMP
) {
917 /* From the datasheet, we have to multiply by 1.012 and
922 return IIO_VAL_INT_PLUS_MICRO
;
925 *val
= lradc
->vref_mv
[chan
->channel
];
926 *val2
= chan
->scan_type
.realbits
-
927 test_bit(chan
->channel
, &lradc
->is_divided
);
928 return IIO_VAL_FRACTIONAL_LOG2
;
930 case IIO_CHAN_INFO_OFFSET
:
931 if (chan
->type
== IIO_TEMP
) {
932 /* The calculated value from the ADC is in Kelvin, we
933 * want Celsius for hwmon so the offset is -273.15
934 * The offset is applied before scaling so it is
935 * actually -213.15 * 4 / 1.012 = -1079.644268
940 return IIO_VAL_INT_PLUS_MICRO
;
952 static int mxs_lradc_write_raw(struct iio_dev
*iio_dev
,
953 const struct iio_chan_spec
*chan
,
954 int val
, int val2
, long m
)
956 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
957 struct mxs_lradc_scale
*scale_avail
=
958 lradc
->scale_avail
[chan
->channel
];
961 ret
= mutex_trylock(&lradc
->lock
);
966 case IIO_CHAN_INFO_SCALE
:
968 if (val
== scale_avail
[MXS_LRADC_DIV_DISABLED
].integer
&&
969 val2
== scale_avail
[MXS_LRADC_DIV_DISABLED
].nano
) {
970 /* divider by two disabled */
971 clear_bit(chan
->channel
, &lradc
->is_divided
);
973 } else if (val
== scale_avail
[MXS_LRADC_DIV_ENABLED
].integer
&&
974 val2
== scale_avail
[MXS_LRADC_DIV_ENABLED
].nano
) {
975 /* divider by two enabled */
976 set_bit(chan
->channel
, &lradc
->is_divided
);
986 mutex_unlock(&lradc
->lock
);
991 static int mxs_lradc_write_raw_get_fmt(struct iio_dev
*iio_dev
,
992 const struct iio_chan_spec
*chan
,
995 return IIO_VAL_INT_PLUS_NANO
;
998 static ssize_t
mxs_lradc_show_scale_available_ch(struct device
*dev
,
999 struct device_attribute
*attr
,
1003 struct iio_dev
*iio
= dev_to_iio_dev(dev
);
1004 struct mxs_lradc
*lradc
= iio_priv(iio
);
1007 for (i
= 0; i
< ARRAY_SIZE(lradc
->scale_avail
[ch
]); i
++)
1008 len
+= sprintf(buf
+ len
, "%u.%09u ",
1009 lradc
->scale_avail
[ch
][i
].integer
,
1010 lradc
->scale_avail
[ch
][i
].nano
);
1012 len
+= sprintf(buf
+ len
, "\n");
1017 static ssize_t
mxs_lradc_show_scale_available(struct device
*dev
,
1018 struct device_attribute
*attr
,
1021 struct iio_dev_attr
*iio_attr
= to_iio_dev_attr(attr
);
1023 return mxs_lradc_show_scale_available_ch(dev
, attr
, buf
,
1027 #define SHOW_SCALE_AVAILABLE_ATTR(ch) \
1028 static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \
1029 mxs_lradc_show_scale_available, NULL, ch)
1031 SHOW_SCALE_AVAILABLE_ATTR(0);
1032 SHOW_SCALE_AVAILABLE_ATTR(1);
1033 SHOW_SCALE_AVAILABLE_ATTR(2);
1034 SHOW_SCALE_AVAILABLE_ATTR(3);
1035 SHOW_SCALE_AVAILABLE_ATTR(4);
1036 SHOW_SCALE_AVAILABLE_ATTR(5);
1037 SHOW_SCALE_AVAILABLE_ATTR(6);
1038 SHOW_SCALE_AVAILABLE_ATTR(7);
1039 SHOW_SCALE_AVAILABLE_ATTR(10);
1040 SHOW_SCALE_AVAILABLE_ATTR(11);
1041 SHOW_SCALE_AVAILABLE_ATTR(12);
1042 SHOW_SCALE_AVAILABLE_ATTR(13);
1043 SHOW_SCALE_AVAILABLE_ATTR(14);
1044 SHOW_SCALE_AVAILABLE_ATTR(15);
1046 static struct attribute
*mxs_lradc_attributes
[] = {
1047 &iio_dev_attr_in_voltage0_scale_available
.dev_attr
.attr
,
1048 &iio_dev_attr_in_voltage1_scale_available
.dev_attr
.attr
,
1049 &iio_dev_attr_in_voltage2_scale_available
.dev_attr
.attr
,
1050 &iio_dev_attr_in_voltage3_scale_available
.dev_attr
.attr
,
1051 &iio_dev_attr_in_voltage4_scale_available
.dev_attr
.attr
,
1052 &iio_dev_attr_in_voltage5_scale_available
.dev_attr
.attr
,
1053 &iio_dev_attr_in_voltage6_scale_available
.dev_attr
.attr
,
1054 &iio_dev_attr_in_voltage7_scale_available
.dev_attr
.attr
,
1055 &iio_dev_attr_in_voltage10_scale_available
.dev_attr
.attr
,
1056 &iio_dev_attr_in_voltage11_scale_available
.dev_attr
.attr
,
1057 &iio_dev_attr_in_voltage12_scale_available
.dev_attr
.attr
,
1058 &iio_dev_attr_in_voltage13_scale_available
.dev_attr
.attr
,
1059 &iio_dev_attr_in_voltage14_scale_available
.dev_attr
.attr
,
1060 &iio_dev_attr_in_voltage15_scale_available
.dev_attr
.attr
,
1064 static const struct attribute_group mxs_lradc_attribute_group
= {
1065 .attrs
= mxs_lradc_attributes
,
1068 static const struct iio_info mxs_lradc_iio_info
= {
1069 .driver_module
= THIS_MODULE
,
1070 .read_raw
= mxs_lradc_read_raw
,
1071 .write_raw
= mxs_lradc_write_raw
,
1072 .write_raw_get_fmt
= mxs_lradc_write_raw_get_fmt
,
1073 .attrs
= &mxs_lradc_attribute_group
,
1076 static int mxs_lradc_ts_open(struct input_dev
*dev
)
1078 struct mxs_lradc
*lradc
= input_get_drvdata(dev
);
1080 /* Enable the touch-detect circuitry. */
1081 mxs_lradc_enable_touch_detection(lradc
);
1086 static void mxs_lradc_disable_ts(struct mxs_lradc
*lradc
)
1088 /* stop all interrupts from firing */
1089 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
|
1090 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1
) |
1091 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2
), LRADC_CTRL1
);
1093 /* Power-down touchscreen touch-detect circuitry. */
1094 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
1097 static void mxs_lradc_ts_close(struct input_dev
*dev
)
1099 struct mxs_lradc
*lradc
= input_get_drvdata(dev
);
1101 mxs_lradc_disable_ts(lradc
);
1104 static int mxs_lradc_ts_register(struct mxs_lradc
*lradc
)
1106 struct input_dev
*input
;
1107 struct device
*dev
= lradc
->dev
;
1110 if (!lradc
->use_touchscreen
)
1113 input
= input_allocate_device();
1117 input
->name
= DRIVER_NAME
;
1118 input
->id
.bustype
= BUS_HOST
;
1119 input
->dev
.parent
= dev
;
1120 input
->open
= mxs_lradc_ts_open
;
1121 input
->close
= mxs_lradc_ts_close
;
1123 __set_bit(EV_ABS
, input
->evbit
);
1124 __set_bit(EV_KEY
, input
->evbit
);
1125 __set_bit(BTN_TOUCH
, input
->keybit
);
1126 input_set_abs_params(input
, ABS_X
, 0, LRADC_SINGLE_SAMPLE_MASK
, 0, 0);
1127 input_set_abs_params(input
, ABS_Y
, 0, LRADC_SINGLE_SAMPLE_MASK
, 0, 0);
1128 input_set_abs_params(input
, ABS_PRESSURE
, 0, LRADC_SINGLE_SAMPLE_MASK
,
1131 lradc
->ts_input
= input
;
1132 input_set_drvdata(input
, lradc
);
1133 ret
= input_register_device(input
);
1135 input_free_device(lradc
->ts_input
);
1140 static void mxs_lradc_ts_unregister(struct mxs_lradc
*lradc
)
1142 if (!lradc
->use_touchscreen
)
1145 mxs_lradc_disable_ts(lradc
);
1146 input_unregister_device(lradc
->ts_input
);
1152 static irqreturn_t
mxs_lradc_handle_irq(int irq
, void *data
)
1154 struct iio_dev
*iio
= data
;
1155 struct mxs_lradc
*lradc
= iio_priv(iio
);
1156 unsigned long reg
= readl(lradc
->base
+ LRADC_CTRL1
);
1157 u32 clr_irq
= mxs_lradc_irq_mask(lradc
);
1158 const u32 ts_irq_mask
=
1159 LRADC_CTRL1_TOUCH_DETECT_IRQ
|
1160 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
) |
1161 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2
);
1163 if (!(reg
& mxs_lradc_irq_mask(lradc
)))
1166 if (lradc
->use_touchscreen
&& (reg
& ts_irq_mask
)) {
1167 mxs_lradc_handle_touch(lradc
);
1169 /* Make sure we don't clear the next conversion's interrupt. */
1170 clr_irq
&= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
) |
1171 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2
));
1174 if (iio_buffer_enabled(iio
)) {
1175 if (reg
& lradc
->buffer_vchans
)
1176 iio_trigger_poll(iio
->trig
);
1177 } else if (reg
& LRADC_CTRL1_LRADC_IRQ(0)) {
1178 complete(&lradc
->completion
);
1181 mxs_lradc_reg_clear(lradc
, reg
& clr_irq
, LRADC_CTRL1
);
1189 static irqreturn_t
mxs_lradc_trigger_handler(int irq
, void *p
)
1191 struct iio_poll_func
*pf
= p
;
1192 struct iio_dev
*iio
= pf
->indio_dev
;
1193 struct mxs_lradc
*lradc
= iio_priv(iio
);
1194 const u32 chan_value
= LRADC_CH_ACCUMULATE
|
1195 ((LRADC_DELAY_TIMER_LOOP
- 1) << LRADC_CH_NUM_SAMPLES_OFFSET
);
1196 unsigned int i
, j
= 0;
1198 for_each_set_bit(i
, iio
->active_scan_mask
, LRADC_MAX_TOTAL_CHANS
) {
1199 lradc
->buffer
[j
] = readl(lradc
->base
+ LRADC_CH(j
));
1200 mxs_lradc_reg_wrt(lradc
, chan_value
, LRADC_CH(j
));
1201 lradc
->buffer
[j
] &= LRADC_CH_VALUE_MASK
;
1202 lradc
->buffer
[j
] /= LRADC_DELAY_TIMER_LOOP
;
1206 iio_push_to_buffers_with_timestamp(iio
, lradc
->buffer
, pf
->timestamp
);
1208 iio_trigger_notify_done(iio
->trig
);
1213 static int mxs_lradc_configure_trigger(struct iio_trigger
*trig
, bool state
)
1215 struct iio_dev
*iio
= iio_trigger_get_drvdata(trig
);
1216 struct mxs_lradc
*lradc
= iio_priv(iio
);
1217 const u32 st
= state
? STMP_OFFSET_REG_SET
: STMP_OFFSET_REG_CLR
;
1219 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_KICK
, LRADC_DELAY(0) + st
);
1224 static const struct iio_trigger_ops mxs_lradc_trigger_ops
= {
1225 .owner
= THIS_MODULE
,
1226 .set_trigger_state
= &mxs_lradc_configure_trigger
,
1229 static int mxs_lradc_trigger_init(struct iio_dev
*iio
)
1232 struct iio_trigger
*trig
;
1233 struct mxs_lradc
*lradc
= iio_priv(iio
);
1235 trig
= iio_trigger_alloc("%s-dev%i", iio
->name
, iio
->id
);
1239 trig
->dev
.parent
= lradc
->dev
;
1240 iio_trigger_set_drvdata(trig
, iio
);
1241 trig
->ops
= &mxs_lradc_trigger_ops
;
1243 ret
= iio_trigger_register(trig
);
1245 iio_trigger_free(trig
);
1254 static void mxs_lradc_trigger_remove(struct iio_dev
*iio
)
1256 struct mxs_lradc
*lradc
= iio_priv(iio
);
1258 iio_trigger_unregister(lradc
->trig
);
1259 iio_trigger_free(lradc
->trig
);
1262 static int mxs_lradc_buffer_preenable(struct iio_dev
*iio
)
1264 struct mxs_lradc
*lradc
= iio_priv(iio
);
1265 int ret
= 0, chan
, ofs
= 0;
1266 unsigned long enable
= 0;
1270 const u32 chan_value
= LRADC_CH_ACCUMULATE
|
1271 ((LRADC_DELAY_TIMER_LOOP
- 1) << LRADC_CH_NUM_SAMPLES_OFFSET
);
1272 const int len
= bitmap_weight(iio
->active_scan_mask
,
1273 LRADC_MAX_TOTAL_CHANS
);
1279 * Lock the driver so raw access can not be done during buffered
1280 * operation. This simplifies the code a lot.
1282 ret
= mutex_trylock(&lradc
->lock
);
1286 lradc
->buffer
= kmalloc_array(len
, sizeof(*lradc
->buffer
), GFP_KERNEL
);
1287 if (!lradc
->buffer
) {
1292 if (lradc
->soc
== IMX28_LRADC
)
1293 mxs_lradc_reg_clear(
1295 lradc
->buffer_vchans
<< LRADC_CTRL1_LRADC_IRQ_EN_OFFSET
,
1297 mxs_lradc_reg_clear(lradc
, lradc
->buffer_vchans
, LRADC_CTRL0
);
1299 for_each_set_bit(chan
, iio
->active_scan_mask
, LRADC_MAX_TOTAL_CHANS
) {
1300 ctrl4_set
|= chan
<< LRADC_CTRL4_LRADCSELECT_OFFSET(ofs
);
1301 ctrl4_clr
|= LRADC_CTRL4_LRADCSELECT_MASK(ofs
);
1302 ctrl1_irq
|= LRADC_CTRL1_LRADC_IRQ_EN(ofs
);
1303 mxs_lradc_reg_wrt(lradc
, chan_value
, LRADC_CH(ofs
));
1304 bitmap_set(&enable
, ofs
, 1);
1308 mxs_lradc_reg_clear(lradc
, LRADC_DELAY_TRIGGER_LRADCS_MASK
|
1309 LRADC_DELAY_KICK
, LRADC_DELAY(0));
1310 mxs_lradc_reg_clear(lradc
, ctrl4_clr
, LRADC_CTRL4
);
1311 mxs_lradc_reg_set(lradc
, ctrl4_set
, LRADC_CTRL4
);
1312 mxs_lradc_reg_set(lradc
, ctrl1_irq
, LRADC_CTRL1
);
1313 mxs_lradc_reg_set(lradc
, enable
<< LRADC_DELAY_TRIGGER_LRADCS_OFFSET
,
1319 mutex_unlock(&lradc
->lock
);
1323 static int mxs_lradc_buffer_postdisable(struct iio_dev
*iio
)
1325 struct mxs_lradc
*lradc
= iio_priv(iio
);
1327 mxs_lradc_reg_clear(lradc
, LRADC_DELAY_TRIGGER_LRADCS_MASK
|
1328 LRADC_DELAY_KICK
, LRADC_DELAY(0));
1330 mxs_lradc_reg_clear(lradc
, lradc
->buffer_vchans
, LRADC_CTRL0
);
1331 if (lradc
->soc
== IMX28_LRADC
)
1332 mxs_lradc_reg_clear(
1334 lradc
->buffer_vchans
<< LRADC_CTRL1_LRADC_IRQ_EN_OFFSET
,
1337 kfree(lradc
->buffer
);
1338 mutex_unlock(&lradc
->lock
);
1343 static bool mxs_lradc_validate_scan_mask(struct iio_dev
*iio
,
1344 const unsigned long *mask
)
1346 struct mxs_lradc
*lradc
= iio_priv(iio
);
1347 const int map_chans
= bitmap_weight(mask
, LRADC_MAX_TOTAL_CHANS
);
1349 unsigned long rsvd_mask
= 0;
1351 if (lradc
->use_touchbutton
)
1352 rsvd_mask
|= CHAN_MASK_TOUCHBUTTON
;
1353 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_4WIRE
)
1354 rsvd_mask
|= CHAN_MASK_TOUCHSCREEN_4WIRE
;
1355 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_5WIRE
)
1356 rsvd_mask
|= CHAN_MASK_TOUCHSCREEN_5WIRE
;
1358 if (lradc
->use_touchbutton
)
1360 if (lradc
->use_touchscreen
)
1363 /* Test for attempts to map channels with special mode of operation. */
1364 if (bitmap_intersects(mask
, &rsvd_mask
, LRADC_MAX_TOTAL_CHANS
))
1367 /* Test for attempts to map more channels then available slots. */
1368 if (map_chans
+ rsvd_chans
> LRADC_MAX_MAPPED_CHANS
)
1374 static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops
= {
1375 .preenable
= &mxs_lradc_buffer_preenable
,
1376 .postenable
= &iio_triggered_buffer_postenable
,
1377 .predisable
= &iio_triggered_buffer_predisable
,
1378 .postdisable
= &mxs_lradc_buffer_postdisable
,
1379 .validate_scan_mask
= &mxs_lradc_validate_scan_mask
,
1383 * Driver initialization
1386 #define MXS_ADC_CHAN(idx, chan_type, name) { \
1387 .type = (chan_type), \
1389 .scan_index = (idx), \
1390 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1391 BIT(IIO_CHAN_INFO_SCALE), \
1396 .realbits = LRADC_RESOLUTION, \
1397 .storagebits = 32, \
1399 .datasheet_name = (name), \
1402 static const struct iio_chan_spec mx23_lradc_chan_spec
[] = {
1403 MXS_ADC_CHAN(0, IIO_VOLTAGE
, "LRADC0"),
1404 MXS_ADC_CHAN(1, IIO_VOLTAGE
, "LRADC1"),
1405 MXS_ADC_CHAN(2, IIO_VOLTAGE
, "LRADC2"),
1406 MXS_ADC_CHAN(3, IIO_VOLTAGE
, "LRADC3"),
1407 MXS_ADC_CHAN(4, IIO_VOLTAGE
, "LRADC4"),
1408 MXS_ADC_CHAN(5, IIO_VOLTAGE
, "LRADC5"),
1409 MXS_ADC_CHAN(6, IIO_VOLTAGE
, "VDDIO"),
1410 MXS_ADC_CHAN(7, IIO_VOLTAGE
, "VBATT"),
1411 /* Combined Temperature sensors */
1416 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
) |
1417 BIT(IIO_CHAN_INFO_OFFSET
) |
1418 BIT(IIO_CHAN_INFO_SCALE
),
1420 .scan_type
= {.sign
= 'u', .realbits
= 18, .storagebits
= 32,},
1421 .datasheet_name
= "TEMP_DIE",
1423 /* Hidden channel to keep indexes */
1430 MXS_ADC_CHAN(10, IIO_VOLTAGE
, NULL
),
1431 MXS_ADC_CHAN(11, IIO_VOLTAGE
, NULL
),
1432 MXS_ADC_CHAN(12, IIO_VOLTAGE
, "USB_DP"),
1433 MXS_ADC_CHAN(13, IIO_VOLTAGE
, "USB_DN"),
1434 MXS_ADC_CHAN(14, IIO_VOLTAGE
, "VBG"),
1435 MXS_ADC_CHAN(15, IIO_VOLTAGE
, "VDD5V"),
1438 static const struct iio_chan_spec mx28_lradc_chan_spec
[] = {
1439 MXS_ADC_CHAN(0, IIO_VOLTAGE
, "LRADC0"),
1440 MXS_ADC_CHAN(1, IIO_VOLTAGE
, "LRADC1"),
1441 MXS_ADC_CHAN(2, IIO_VOLTAGE
, "LRADC2"),
1442 MXS_ADC_CHAN(3, IIO_VOLTAGE
, "LRADC3"),
1443 MXS_ADC_CHAN(4, IIO_VOLTAGE
, "LRADC4"),
1444 MXS_ADC_CHAN(5, IIO_VOLTAGE
, "LRADC5"),
1445 MXS_ADC_CHAN(6, IIO_VOLTAGE
, "LRADC6"),
1446 MXS_ADC_CHAN(7, IIO_VOLTAGE
, "VBATT"),
1447 /* Combined Temperature sensors */
1452 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
) |
1453 BIT(IIO_CHAN_INFO_OFFSET
) |
1454 BIT(IIO_CHAN_INFO_SCALE
),
1456 .scan_type
= {.sign
= 'u', .realbits
= 18, .storagebits
= 32,},
1457 .datasheet_name
= "TEMP_DIE",
1459 /* Hidden channel to keep indexes */
1466 MXS_ADC_CHAN(10, IIO_VOLTAGE
, "VDDIO"),
1467 MXS_ADC_CHAN(11, IIO_VOLTAGE
, "VTH"),
1468 MXS_ADC_CHAN(12, IIO_VOLTAGE
, "VDDA"),
1469 MXS_ADC_CHAN(13, IIO_VOLTAGE
, "VDDD"),
1470 MXS_ADC_CHAN(14, IIO_VOLTAGE
, "VBG"),
1471 MXS_ADC_CHAN(15, IIO_VOLTAGE
, "VDD5V"),
1474 static int mxs_lradc_hw_init(struct mxs_lradc
*lradc
)
1476 /* The ADC always uses DELAY CHANNEL 0. */
1478 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET
+ 0)) |
1479 (LRADC_DELAY_TIMER_PER
<< LRADC_DELAY_DELAY_OFFSET
);
1481 int ret
= stmp_reset_block(lradc
->base
);
1486 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
1487 mxs_lradc_reg_wrt(lradc
, adc_cfg
, LRADC_DELAY(0));
1489 /* Disable remaining DELAY CHANNELs */
1490 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(1));
1491 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(2));
1492 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(3));
1494 /* Configure the touchscreen type */
1495 if (lradc
->soc
== IMX28_LRADC
) {
1496 mxs_lradc_reg_clear(lradc
, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
,
1499 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_5WIRE
)
1500 mxs_lradc_reg_set(lradc
, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
,
1504 /* Start internal temperature sensing. */
1505 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CTRL2
);
1510 static void mxs_lradc_hw_stop(struct mxs_lradc
*lradc
)
1514 mxs_lradc_reg_clear(lradc
, mxs_lradc_irq_en_mask(lradc
), LRADC_CTRL1
);
1516 for (i
= 0; i
< LRADC_MAX_DELAY_CHANS
; i
++)
1517 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(i
));
1520 static const struct of_device_id mxs_lradc_dt_ids
[] = {
1521 { .compatible
= "fsl,imx23-lradc", .data
= (void *)IMX23_LRADC
, },
1522 { .compatible
= "fsl,imx28-lradc", .data
= (void *)IMX28_LRADC
, },
1525 MODULE_DEVICE_TABLE(of
, mxs_lradc_dt_ids
);
1527 static int mxs_lradc_probe_touchscreen(struct mxs_lradc
*lradc
,
1528 struct device_node
*lradc_node
)
1531 u32 ts_wires
= 0, adapt
;
1533 ret
= of_property_read_u32(lradc_node
, "fsl,lradc-touchscreen-wires",
1536 return -ENODEV
; /* touchscreen feature disabled */
1540 lradc
->use_touchscreen
= MXS_LRADC_TOUCHSCREEN_4WIRE
;
1543 if (lradc
->soc
== IMX28_LRADC
) {
1544 lradc
->use_touchscreen
= MXS_LRADC_TOUCHSCREEN_5WIRE
;
1547 /* fall through an error message for i.MX23 */
1550 "Unsupported number of touchscreen wires (%d)\n",
1555 if (of_property_read_u32(lradc_node
, "fsl,ave-ctrl", &adapt
)) {
1556 lradc
->over_sample_cnt
= 4;
1558 if (adapt
< 1 || adapt
> 32) {
1559 dev_err(lradc
->dev
, "Invalid sample count (%u)\n",
1563 lradc
->over_sample_cnt
= adapt
;
1566 if (of_property_read_u32(lradc_node
, "fsl,ave-delay", &adapt
)) {
1567 lradc
->over_sample_delay
= 2;
1569 if (adapt
< 2 || adapt
> LRADC_DELAY_DELAY_MASK
+ 1) {
1570 dev_err(lradc
->dev
, "Invalid sample delay (%u)\n",
1574 lradc
->over_sample_delay
= adapt
;
1577 if (of_property_read_u32(lradc_node
, "fsl,settling", &adapt
)) {
1578 lradc
->settling_delay
= 10;
1580 if (adapt
< 1 || adapt
> LRADC_DELAY_DELAY_MASK
) {
1581 dev_err(lradc
->dev
, "Invalid settling delay (%u)\n",
1585 lradc
->settling_delay
= adapt
;
1591 static int mxs_lradc_probe(struct platform_device
*pdev
)
1593 const struct of_device_id
*of_id
=
1594 of_match_device(mxs_lradc_dt_ids
, &pdev
->dev
);
1595 const struct mxs_lradc_of_config
*of_cfg
=
1596 &mxs_lradc_of_config
[(enum mxs_lradc_id
)of_id
->data
];
1597 struct device
*dev
= &pdev
->dev
;
1598 struct device_node
*node
= dev
->of_node
;
1599 struct mxs_lradc
*lradc
;
1600 struct iio_dev
*iio
;
1601 struct resource
*iores
;
1602 int ret
= 0, touch_ret
;
1606 /* Allocate the IIO device. */
1607 iio
= devm_iio_device_alloc(dev
, sizeof(*lradc
));
1609 dev_err(dev
, "Failed to allocate IIO device\n");
1613 lradc
= iio_priv(iio
);
1614 lradc
->soc
= (enum mxs_lradc_id
)of_id
->data
;
1616 /* Grab the memory area */
1617 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1618 lradc
->dev
= &pdev
->dev
;
1619 lradc
->base
= devm_ioremap_resource(dev
, iores
);
1620 if (IS_ERR(lradc
->base
))
1621 return PTR_ERR(lradc
->base
);
1623 lradc
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
1624 if (IS_ERR(lradc
->clk
)) {
1625 dev_err(dev
, "Failed to get the delay unit clock\n");
1626 return PTR_ERR(lradc
->clk
);
1628 ret
= clk_prepare_enable(lradc
->clk
);
1630 dev_err(dev
, "Failed to enable the delay unit clock\n");
1634 touch_ret
= mxs_lradc_probe_touchscreen(lradc
, node
);
1637 lradc
->buffer_vchans
= BUFFER_VCHANS_LIMITED
;
1639 lradc
->buffer_vchans
= BUFFER_VCHANS_ALL
;
1641 /* Grab all IRQ sources */
1642 for (i
= 0; i
< of_cfg
->irq_count
; i
++) {
1643 lradc
->irq
[i
] = platform_get_irq(pdev
, i
);
1644 if (lradc
->irq
[i
] < 0) {
1645 ret
= lradc
->irq
[i
];
1649 ret
= devm_request_irq(dev
, lradc
->irq
[i
],
1650 mxs_lradc_handle_irq
, 0,
1651 of_cfg
->irq_name
[i
], iio
);
1656 lradc
->vref_mv
= of_cfg
->vref_mv
;
1658 platform_set_drvdata(pdev
, iio
);
1660 init_completion(&lradc
->completion
);
1661 mutex_init(&lradc
->lock
);
1663 iio
->name
= pdev
->name
;
1664 iio
->dev
.parent
= &pdev
->dev
;
1665 iio
->info
= &mxs_lradc_iio_info
;
1666 iio
->modes
= INDIO_DIRECT_MODE
;
1667 iio
->masklength
= LRADC_MAX_TOTAL_CHANS
;
1669 if (lradc
->soc
== IMX23_LRADC
) {
1670 iio
->channels
= mx23_lradc_chan_spec
;
1671 iio
->num_channels
= ARRAY_SIZE(mx23_lradc_chan_spec
);
1673 iio
->channels
= mx28_lradc_chan_spec
;
1674 iio
->num_channels
= ARRAY_SIZE(mx28_lradc_chan_spec
);
1677 ret
= iio_triggered_buffer_setup(iio
, &iio_pollfunc_store_time
,
1678 &mxs_lradc_trigger_handler
,
1679 &mxs_lradc_buffer_ops
);
1683 ret
= mxs_lradc_trigger_init(iio
);
1687 /* Populate available ADC input ranges */
1688 for (i
= 0; i
< LRADC_MAX_TOTAL_CHANS
; i
++) {
1689 for (s
= 0; s
< ARRAY_SIZE(lradc
->scale_avail
[i
]); s
++) {
1691 * [s=0] = optional divider by two disabled (default)
1692 * [s=1] = optional divider by two enabled
1694 * The scale is calculated by doing:
1695 * Vref >> (realbits - s)
1696 * which multiplies by two on the second component
1699 scale_uv
= ((u64
)lradc
->vref_mv
[i
] * 100000000) >>
1700 (LRADC_RESOLUTION
- s
);
1701 lradc
->scale_avail
[i
][s
].nano
=
1702 do_div(scale_uv
, 100000000) * 10;
1703 lradc
->scale_avail
[i
][s
].integer
= scale_uv
;
1707 /* Configure the hardware. */
1708 ret
= mxs_lradc_hw_init(lradc
);
1712 /* Register the touchscreen input device. */
1713 if (touch_ret
== 0) {
1714 ret
= mxs_lradc_ts_register(lradc
);
1716 goto err_ts_register
;
1719 /* Register IIO device. */
1720 ret
= iio_device_register(iio
);
1722 dev_err(dev
, "Failed to register IIO device\n");
1729 mxs_lradc_ts_unregister(lradc
);
1731 mxs_lradc_hw_stop(lradc
);
1733 mxs_lradc_trigger_remove(iio
);
1735 iio_triggered_buffer_cleanup(iio
);
1737 clk_disable_unprepare(lradc
->clk
);
1741 static int mxs_lradc_remove(struct platform_device
*pdev
)
1743 struct iio_dev
*iio
= platform_get_drvdata(pdev
);
1744 struct mxs_lradc
*lradc
= iio_priv(iio
);
1746 iio_device_unregister(iio
);
1747 mxs_lradc_ts_unregister(lradc
);
1748 mxs_lradc_hw_stop(lradc
);
1749 mxs_lradc_trigger_remove(iio
);
1750 iio_triggered_buffer_cleanup(iio
);
1752 clk_disable_unprepare(lradc
->clk
);
1756 static struct platform_driver mxs_lradc_driver
= {
1758 .name
= DRIVER_NAME
,
1759 .of_match_table
= mxs_lradc_dt_ids
,
1761 .probe
= mxs_lradc_probe
,
1762 .remove
= mxs_lradc_remove
,
1765 module_platform_driver(mxs_lradc_driver
);
1767 MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1768 MODULE_DESCRIPTION("Freescale MXS LRADC driver");
1769 MODULE_LICENSE("GPL v2");
1770 MODULE_ALIAS("platform:" DRIVER_NAME
);