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[mirror_ubuntu-artful-kernel.git] / drivers / staging / iio / resolver / ad2s1210.c
1 /*
2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
3 *
4 * Copyright (c) 2010-2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <linux/types.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/delay.h>
18 #include <linux/gpio.h>
19 #include <linux/module.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include "ad2s1210.h"
24
25 #define DRV_NAME "ad2s1210"
26
27 #define AD2S1210_DEF_CONTROL 0x7E
28
29 #define AD2S1210_MSB_IS_HIGH 0x80
30 #define AD2S1210_MSB_IS_LOW 0x7F
31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
32 #define AD2S1210_ENABLE_HYSTERESIS 0x10
33 #define AD2S1210_SET_ENRES1 0x08
34 #define AD2S1210_SET_ENRES0 0x04
35 #define AD2S1210_SET_RES1 0x02
36 #define AD2S1210_SET_RES0 0x01
37
38 #define AD2S1210_SET_ENRESOLUTION (AD2S1210_SET_ENRES1 | \
39 AD2S1210_SET_ENRES0)
40 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
41
42 #define AD2S1210_REG_POSITION 0x80
43 #define AD2S1210_REG_VELOCITY 0x82
44 #define AD2S1210_REG_LOS_THRD 0x88
45 #define AD2S1210_REG_DOS_OVR_THRD 0x89
46 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
47 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
48 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
49 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
50 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
51 #define AD2S1210_REG_EXCIT_FREQ 0x91
52 #define AD2S1210_REG_CONTROL 0x92
53 #define AD2S1210_REG_SOFT_RESET 0xF0
54 #define AD2S1210_REG_FAULT 0xFF
55
56 /* pin SAMPLE, A0, A1, RES0, RES1, is controlled by driver */
57 #define AD2S1210_SAA 3
58 #define AD2S1210_PN (AD2S1210_SAA + AD2S1210_RES)
59
60 #define AD2S1210_MIN_CLKIN 6144000
61 #define AD2S1210_MAX_CLKIN 10240000
62 #define AD2S1210_MIN_EXCIT 2000
63 #define AD2S1210_MAX_EXCIT 20000
64 #define AD2S1210_MIN_FCW 0x4
65 #define AD2S1210_MAX_FCW 0x50
66
67 /* default input clock on serial interface */
68 #define AD2S1210_DEF_CLKIN 8192000
69 /* clock period in nano second */
70 #define AD2S1210_DEF_TCK (1000000000/AD2S1210_DEF_CLKIN)
71 #define AD2S1210_DEF_EXCIT 10000
72
73 enum ad2s1210_mode {
74 MOD_POS = 0,
75 MOD_VEL,
76 MOD_CONFIG,
77 MOD_RESERVED,
78 };
79
80 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
81
82 struct ad2s1210_state {
83 const struct ad2s1210_platform_data *pdata;
84 struct mutex lock;
85 struct spi_device *sdev;
86 unsigned int fclkin;
87 unsigned int fexcit;
88 bool hysteresis;
89 bool old_data;
90 u8 resolution;
91 enum ad2s1210_mode mode;
92 u8 rx[2] ____cacheline_aligned;
93 u8 tx[2] ____cacheline_aligned;
94 };
95
96 static const int ad2s1210_mode_vals[4][2] = {
97 [MOD_POS] = { 0, 0 },
98 [MOD_VEL] = { 0, 1 },
99 [MOD_CONFIG] = { 1, 0 },
100 };
101 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
102 struct ad2s1210_state *st)
103 {
104 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]);
105 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]);
106 st->mode = mode;
107 }
108
109 /* write 1 bytes (address or data) to the chip */
110 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
111 {
112 int ret;
113
114 ad2s1210_set_mode(MOD_CONFIG, st);
115 st->tx[0] = data;
116 ret = spi_write(st->sdev, st->tx, 1);
117 if (ret < 0)
118 return ret;
119 st->old_data = true;
120
121 return 0;
122 }
123
124 /* read value from one of the registers */
125 static int ad2s1210_config_read(struct ad2s1210_state *st,
126 unsigned char address)
127 {
128 struct spi_transfer xfer = {
129 .len = 2,
130 .rx_buf = st->rx,
131 .tx_buf = st->tx,
132 };
133 int ret = 0;
134
135 ad2s1210_set_mode(MOD_CONFIG, st);
136 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
137 st->tx[1] = AD2S1210_REG_FAULT;
138 ret = spi_sync_transfer(st->sdev, &xfer, 1);
139 if (ret < 0)
140 return ret;
141 st->old_data = true;
142
143 return st->rx[1];
144 }
145
146 static inline
147 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
148 {
149 int ret;
150 unsigned char fcw;
151
152 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
153 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
154 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
155 return -ERANGE;
156 }
157
158 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
159 if (ret < 0)
160 return ret;
161
162 return ad2s1210_config_write(st, fcw);
163 }
164
165 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st)
166 {
167 return ad2s1210_resolution_value[
168 (gpio_get_value(st->pdata->res[0]) << 1) |
169 gpio_get_value(st->pdata->res[1])];
170 }
171
172 static const int ad2s1210_res_pins[4][2] = {
173 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
174 };
175
176 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
177 {
178 gpio_set_value(st->pdata->res[0],
179 ad2s1210_res_pins[(st->resolution - 10)/2][0]);
180 gpio_set_value(st->pdata->res[1],
181 ad2s1210_res_pins[(st->resolution - 10)/2][1]);
182 }
183
184 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
185 {
186 int ret;
187
188 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
189 if (ret < 0)
190 return ret;
191
192 return ad2s1210_config_write(st, 0x0);
193 }
194
195 static ssize_t ad2s1210_show_fclkin(struct device *dev,
196 struct device_attribute *attr,
197 char *buf)
198 {
199 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
200
201 return sprintf(buf, "%u\n", st->fclkin);
202 }
203
204 static ssize_t ad2s1210_store_fclkin(struct device *dev,
205 struct device_attribute *attr,
206 const char *buf,
207 size_t len)
208 {
209 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
210 unsigned int fclkin;
211 int ret;
212
213 ret = kstrtouint(buf, 10, &fclkin);
214 if (ret)
215 return ret;
216 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
217 dev_err(dev, "ad2s1210: fclkin out of range\n");
218 return -EINVAL;
219 }
220
221 mutex_lock(&st->lock);
222 st->fclkin = fclkin;
223
224 ret = ad2s1210_update_frequency_control_word(st);
225 if (ret < 0)
226 goto error_ret;
227 ret = ad2s1210_soft_reset(st);
228 error_ret:
229 mutex_unlock(&st->lock);
230
231 return ret < 0 ? ret : len;
232 }
233
234 static ssize_t ad2s1210_show_fexcit(struct device *dev,
235 struct device_attribute *attr,
236 char *buf)
237 {
238 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
239
240 return sprintf(buf, "%u\n", st->fexcit);
241 }
242
243 static ssize_t ad2s1210_store_fexcit(struct device *dev,
244 struct device_attribute *attr,
245 const char *buf, size_t len)
246 {
247 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
248 unsigned int fexcit;
249 int ret;
250
251 ret = kstrtouint(buf, 10, &fexcit);
252 if (ret < 0)
253 return ret;
254 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
255 dev_err(dev,
256 "ad2s1210: excitation frequency out of range\n");
257 return -EINVAL;
258 }
259 mutex_lock(&st->lock);
260 st->fexcit = fexcit;
261 ret = ad2s1210_update_frequency_control_word(st);
262 if (ret < 0)
263 goto error_ret;
264 ret = ad2s1210_soft_reset(st);
265 error_ret:
266 mutex_unlock(&st->lock);
267
268 return ret < 0 ? ret : len;
269 }
270
271 static ssize_t ad2s1210_show_control(struct device *dev,
272 struct device_attribute *attr,
273 char *buf)
274 {
275 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
276 int ret;
277
278 mutex_lock(&st->lock);
279 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
280 mutex_unlock(&st->lock);
281 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
282 }
283
284 static ssize_t ad2s1210_store_control(struct device *dev,
285 struct device_attribute *attr,
286 const char *buf, size_t len)
287 {
288 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
289 unsigned char udata;
290 unsigned char data;
291 int ret;
292
293 ret = kstrtou8(buf, 16, &udata);
294 if (ret)
295 return -EINVAL;
296
297 mutex_lock(&st->lock);
298 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
299 if (ret < 0)
300 goto error_ret;
301 data = udata & AD2S1210_MSB_IS_LOW;
302 ret = ad2s1210_config_write(st, data);
303 if (ret < 0)
304 goto error_ret;
305
306 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
307 if (ret < 0)
308 goto error_ret;
309 if (ret & AD2S1210_MSB_IS_HIGH) {
310 ret = -EIO;
311 dev_err(dev,
312 "ad2s1210: write control register fail\n");
313 goto error_ret;
314 }
315 st->resolution
316 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
317 if (st->pdata->gpioin) {
318 data = ad2s1210_read_resolution_pin(st);
319 if (data != st->resolution)
320 dev_warn(dev, "ad2s1210: resolution settings not match\n");
321 } else
322 ad2s1210_set_resolution_pin(st);
323
324 ret = len;
325 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
326
327 error_ret:
328 mutex_unlock(&st->lock);
329 return ret;
330 }
331
332 static ssize_t ad2s1210_show_resolution(struct device *dev,
333 struct device_attribute *attr, char *buf)
334 {
335 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
336
337 return sprintf(buf, "%d\n", st->resolution);
338 }
339
340 static ssize_t ad2s1210_store_resolution(struct device *dev,
341 struct device_attribute *attr,
342 const char *buf, size_t len)
343 {
344 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
345 unsigned char data;
346 unsigned char udata;
347 int ret;
348
349 ret = kstrtou8(buf, 10, &udata);
350 if (ret || udata < 10 || udata > 16) {
351 dev_err(dev, "ad2s1210: resolution out of range\n");
352 return -EINVAL;
353 }
354 mutex_lock(&st->lock);
355 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
356 if (ret < 0)
357 goto error_ret;
358 data = ret;
359 data &= ~AD2S1210_SET_RESOLUTION;
360 data |= (udata - 10) >> 1;
361 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
362 if (ret < 0)
363 goto error_ret;
364 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
365 if (ret < 0)
366 goto error_ret;
367 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
368 if (ret < 0)
369 goto error_ret;
370 data = ret;
371 if (data & AD2S1210_MSB_IS_HIGH) {
372 ret = -EIO;
373 dev_err(dev, "ad2s1210: setting resolution fail\n");
374 goto error_ret;
375 }
376 st->resolution
377 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
378 if (st->pdata->gpioin) {
379 data = ad2s1210_read_resolution_pin(st);
380 if (data != st->resolution)
381 dev_warn(dev, "ad2s1210: resolution settings not match\n");
382 } else
383 ad2s1210_set_resolution_pin(st);
384 ret = len;
385 error_ret:
386 mutex_unlock(&st->lock);
387 return ret;
388 }
389
390 /* read the fault register since last sample */
391 static ssize_t ad2s1210_show_fault(struct device *dev,
392 struct device_attribute *attr, char *buf)
393 {
394 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
395 int ret;
396
397 mutex_lock(&st->lock);
398 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
399 mutex_unlock(&st->lock);
400
401 return ret ? ret : sprintf(buf, "0x%x\n", ret);
402 }
403
404 static ssize_t ad2s1210_clear_fault(struct device *dev,
405 struct device_attribute *attr,
406 const char *buf,
407 size_t len)
408 {
409 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
410 int ret;
411
412 mutex_lock(&st->lock);
413 gpio_set_value(st->pdata->sample, 0);
414 /* delay (2 * tck + 20) nano seconds */
415 udelay(1);
416 gpio_set_value(st->pdata->sample, 1);
417 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
418 if (ret < 0)
419 goto error_ret;
420 gpio_set_value(st->pdata->sample, 0);
421 gpio_set_value(st->pdata->sample, 1);
422 error_ret:
423 mutex_unlock(&st->lock);
424
425 return ret < 0 ? ret : len;
426 }
427
428 static ssize_t ad2s1210_show_reg(struct device *dev,
429 struct device_attribute *attr,
430 char *buf)
431 {
432 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
433 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
434 int ret;
435
436 mutex_lock(&st->lock);
437 ret = ad2s1210_config_read(st, iattr->address);
438 mutex_unlock(&st->lock);
439
440 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
441 }
442
443 static ssize_t ad2s1210_store_reg(struct device *dev,
444 struct device_attribute *attr, const char *buf, size_t len)
445 {
446 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
447 unsigned char data;
448 int ret;
449 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
450
451 ret = kstrtou8(buf, 10, &data);
452 if (ret)
453 return -EINVAL;
454 mutex_lock(&st->lock);
455 ret = ad2s1210_config_write(st, iattr->address);
456 if (ret < 0)
457 goto error_ret;
458 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
459 error_ret:
460 mutex_unlock(&st->lock);
461 return ret < 0 ? ret : len;
462 }
463
464 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
465 struct iio_chan_spec const *chan,
466 int *val,
467 int *val2,
468 long m)
469 {
470 struct ad2s1210_state *st = iio_priv(indio_dev);
471 bool negative;
472 int ret = 0;
473 u16 pos;
474 s16 vel;
475
476 mutex_lock(&st->lock);
477 gpio_set_value(st->pdata->sample, 0);
478 /* delay (6 * tck + 20) nano seconds */
479 udelay(1);
480
481 switch (chan->type) {
482 case IIO_ANGL:
483 ad2s1210_set_mode(MOD_POS, st);
484 break;
485 case IIO_ANGL_VEL:
486 ad2s1210_set_mode(MOD_VEL, st);
487 break;
488 default:
489 ret = -EINVAL;
490 break;
491 }
492 if (ret < 0)
493 goto error_ret;
494 ret = spi_read(st->sdev, st->rx, 2);
495 if (ret < 0)
496 goto error_ret;
497
498 switch (chan->type) {
499 case IIO_ANGL:
500 pos = be16_to_cpup((__be16 *) st->rx);
501 if (st->hysteresis)
502 pos >>= 16 - st->resolution;
503 *val = pos;
504 ret = IIO_VAL_INT;
505 break;
506 case IIO_ANGL_VEL:
507 negative = st->rx[0] & 0x80;
508 vel = be16_to_cpup((__be16 *) st->rx);
509 vel >>= 16 - st->resolution;
510 if (vel & 0x8000) {
511 negative = (0xffff >> st->resolution) << st->resolution;
512 vel |= negative;
513 }
514 *val = vel;
515 ret = IIO_VAL_INT;
516 break;
517 default:
518 mutex_unlock(&st->lock);
519 return -EINVAL;
520 }
521
522 error_ret:
523 gpio_set_value(st->pdata->sample, 1);
524 /* delay (2 * tck + 20) nano seconds */
525 udelay(1);
526 mutex_unlock(&st->lock);
527 return ret;
528 }
529
530 static IIO_DEVICE_ATTR(fclkin, S_IRUGO | S_IWUSR,
531 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
532 static IIO_DEVICE_ATTR(fexcit, S_IRUGO | S_IWUSR,
533 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
534 static IIO_DEVICE_ATTR(control, S_IRUGO | S_IWUSR,
535 ad2s1210_show_control, ad2s1210_store_control, 0);
536 static IIO_DEVICE_ATTR(bits, S_IRUGO | S_IWUSR,
537 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
538 static IIO_DEVICE_ATTR(fault, S_IRUGO | S_IWUSR,
539 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
540
541 static IIO_DEVICE_ATTR(los_thrd, S_IRUGO | S_IWUSR,
542 ad2s1210_show_reg, ad2s1210_store_reg,
543 AD2S1210_REG_LOS_THRD);
544 static IIO_DEVICE_ATTR(dos_ovr_thrd, S_IRUGO | S_IWUSR,
545 ad2s1210_show_reg, ad2s1210_store_reg,
546 AD2S1210_REG_DOS_OVR_THRD);
547 static IIO_DEVICE_ATTR(dos_mis_thrd, S_IRUGO | S_IWUSR,
548 ad2s1210_show_reg, ad2s1210_store_reg,
549 AD2S1210_REG_DOS_MIS_THRD);
550 static IIO_DEVICE_ATTR(dos_rst_max_thrd, S_IRUGO | S_IWUSR,
551 ad2s1210_show_reg, ad2s1210_store_reg,
552 AD2S1210_REG_DOS_RST_MAX_THRD);
553 static IIO_DEVICE_ATTR(dos_rst_min_thrd, S_IRUGO | S_IWUSR,
554 ad2s1210_show_reg, ad2s1210_store_reg,
555 AD2S1210_REG_DOS_RST_MIN_THRD);
556 static IIO_DEVICE_ATTR(lot_high_thrd, S_IRUGO | S_IWUSR,
557 ad2s1210_show_reg, ad2s1210_store_reg,
558 AD2S1210_REG_LOT_HIGH_THRD);
559 static IIO_DEVICE_ATTR(lot_low_thrd, S_IRUGO | S_IWUSR,
560 ad2s1210_show_reg, ad2s1210_store_reg,
561 AD2S1210_REG_LOT_LOW_THRD);
562
563
564 static const struct iio_chan_spec ad2s1210_channels[] = {
565 {
566 .type = IIO_ANGL,
567 .indexed = 1,
568 .channel = 0,
569 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
570 }, {
571 .type = IIO_ANGL_VEL,
572 .indexed = 1,
573 .channel = 0,
574 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
575 }
576 };
577
578 static struct attribute *ad2s1210_attributes[] = {
579 &iio_dev_attr_fclkin.dev_attr.attr,
580 &iio_dev_attr_fexcit.dev_attr.attr,
581 &iio_dev_attr_control.dev_attr.attr,
582 &iio_dev_attr_bits.dev_attr.attr,
583 &iio_dev_attr_fault.dev_attr.attr,
584 &iio_dev_attr_los_thrd.dev_attr.attr,
585 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
586 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
587 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
588 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
589 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
590 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
591 NULL,
592 };
593
594 static const struct attribute_group ad2s1210_attribute_group = {
595 .attrs = ad2s1210_attributes,
596 };
597
598 static int ad2s1210_initial(struct ad2s1210_state *st)
599 {
600 unsigned char data;
601 int ret;
602
603 mutex_lock(&st->lock);
604 if (st->pdata->gpioin)
605 st->resolution = ad2s1210_read_resolution_pin(st);
606 else
607 ad2s1210_set_resolution_pin(st);
608
609 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
610 if (ret < 0)
611 goto error_ret;
612 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
613 data |= (st->resolution - 10) >> 1;
614 ret = ad2s1210_config_write(st, data);
615 if (ret < 0)
616 goto error_ret;
617 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
618 if (ret < 0)
619 goto error_ret;
620
621 if (ret & AD2S1210_MSB_IS_HIGH) {
622 ret = -EIO;
623 goto error_ret;
624 }
625
626 ret = ad2s1210_update_frequency_control_word(st);
627 if (ret < 0)
628 goto error_ret;
629 ret = ad2s1210_soft_reset(st);
630 error_ret:
631 mutex_unlock(&st->lock);
632 return ret;
633 }
634
635 static const struct iio_info ad2s1210_info = {
636 .read_raw = &ad2s1210_read_raw,
637 .attrs = &ad2s1210_attribute_group,
638 .driver_module = THIS_MODULE,
639 };
640
641 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
642 {
643 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
644 struct gpio ad2s1210_gpios[] = {
645 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
646 { st->pdata->a[0], flags, "a0" },
647 { st->pdata->a[1], flags, "a1" },
648 { st->pdata->res[0], flags, "res0" },
649 { st->pdata->res[0], flags, "res1" },
650 };
651
652 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
653 }
654
655 static void ad2s1210_free_gpios(struct ad2s1210_state *st)
656 {
657 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
658 struct gpio ad2s1210_gpios[] = {
659 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
660 { st->pdata->a[0], flags, "a0" },
661 { st->pdata->a[1], flags, "a1" },
662 { st->pdata->res[0], flags, "res0" },
663 { st->pdata->res[0], flags, "res1" },
664 };
665
666 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
667 }
668
669 static int ad2s1210_probe(struct spi_device *spi)
670 {
671 struct iio_dev *indio_dev;
672 struct ad2s1210_state *st;
673 int ret;
674
675 if (spi->dev.platform_data == NULL)
676 return -EINVAL;
677
678 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
679 if (!indio_dev)
680 return -ENOMEM;
681 st = iio_priv(indio_dev);
682 st->pdata = spi->dev.platform_data;
683 ret = ad2s1210_setup_gpios(st);
684 if (ret < 0)
685 return ret;
686
687 spi_set_drvdata(spi, indio_dev);
688
689 mutex_init(&st->lock);
690 st->sdev = spi;
691 st->hysteresis = true;
692 st->mode = MOD_CONFIG;
693 st->resolution = 12;
694 st->fexcit = AD2S1210_DEF_EXCIT;
695
696 indio_dev->dev.parent = &spi->dev;
697 indio_dev->info = &ad2s1210_info;
698 indio_dev->modes = INDIO_DIRECT_MODE;
699 indio_dev->channels = ad2s1210_channels;
700 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
701 indio_dev->name = spi_get_device_id(spi)->name;
702
703 ret = iio_device_register(indio_dev);
704 if (ret)
705 goto error_free_gpios;
706
707 st->fclkin = spi->max_speed_hz;
708 spi->mode = SPI_MODE_3;
709 spi_setup(spi);
710 ad2s1210_initial(st);
711
712 return 0;
713
714 error_free_gpios:
715 ad2s1210_free_gpios(st);
716 return ret;
717 }
718
719 static int ad2s1210_remove(struct spi_device *spi)
720 {
721 struct iio_dev *indio_dev = spi_get_drvdata(spi);
722
723 iio_device_unregister(indio_dev);
724 ad2s1210_free_gpios(iio_priv(indio_dev));
725
726 return 0;
727 }
728
729 static const struct spi_device_id ad2s1210_id[] = {
730 { "ad2s1210" },
731 {}
732 };
733 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
734
735 static struct spi_driver ad2s1210_driver = {
736 .driver = {
737 .name = DRV_NAME,
738 .owner = THIS_MODULE,
739 },
740 .probe = ad2s1210_probe,
741 .remove = ad2s1210_remove,
742 .id_table = ad2s1210_id,
743 };
744 module_spi_driver(ad2s1210_driver);
745
746 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
747 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
748 MODULE_LICENSE("GPL v2");