drivers/staging/media/atomisp/i2c/ap1302.h

   1 /*
   2  *
   3  * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version
   7  * 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17  * 02110-1301, USA.
  18  *
  19  */
  20
  21 #ifndef __AP1302_H__
  22 #define __AP1302_H__
  23
  24 #include "../include/linux/atomisp_platform.h"
  25 #include <linux/regmap.h>
  26 #include <linux/types.h>
  27 #include <media/v4l2-ctrls.h>
  28 #include <media/v4l2-subdev.h>
  29
  30 #define AP1302_NAME             "ap1302"
  31 #define AP1302_CHIP_ID          0x265
  32 #define AP1302_I2C_MAX_LEN      65534
  33 #define AP1302_FW_WINDOW_OFFSET 0x8000
  34 #define AP1302_FW_WINDOW_SIZE   0x2000
  35
  36 #define AP1302_REG16            2
  37 #define AP1302_REG32            4
  38
  39 #define REG_CHIP_VERSION        0x0000
  40 #define REG_CHIP_REV            0x0050
  41 #define REG_MF_ID               0x0004
  42 #define REG_ERROR               0x0006
  43 #define REG_CTRL                0x1000
  44 #define REG_DZ_TGT_FCT          0x1010
  45 #define REG_SFX_MODE            0x1016
  46 #define REG_SS_HEAD_PT0         0x1174
  47 #define REG_AE_BV_OFF           0x5014
  48 #define REG_AE_BV_BIAS          0x5016
  49 #define REG_AWB_CTRL            0x5100
  50 #define REG_FLICK_CTRL          0x5440
  51 #define REG_SCENE_CTRL          0x5454
  52 #define REG_BOOTDATA_STAGE      0x6002
  53 #define REG_SENSOR_SELECT       0x600C
  54 #define REG_SYS_START           0x601A
  55 #define REG_SIP_CRC             0xF052
  56
  57 #define REG_PREVIEW_BASE        0x2000
  58 #define REG_SNAPSHOT_BASE       0x3000
  59 #define REG_VIDEO_BASE          0x4000
  60 #define CNTX_WIDTH              0x00
  61 #define CNTX_HEIGHT             0x02
  62 #define CNTX_ROI_X0             0x04
  63 #define CNTX_ROI_Y0             0x06
  64 #define CNTX_ROI_X1             0x08
  65 #define CNTX_ROI_Y1             0x0A
  66 #define CNTX_ASPECT             0x0C
  67 #define CNTX_LOCK               0x0E
  68 #define CNTX_ENABLE             0x10
  69 #define CNTX_OUT_FMT            0x12
  70 #define CNTX_SENSOR_MODE        0x14
  71 #define CNTX_MIPI_CTRL          0x16
  72 #define CNTX_MIPI_II_CTRL       0x18
  73 #define CNTX_LINE_TIME          0x1C
  74 #define CNTX_MAX_FPS            0x20
  75 #define CNTX_AE_USG             0x22
  76 #define CNTX_AE_UPPER_ET        0x24
  77 #define CNTX_AE_MAX_ET          0x28
  78 #define CNTX_SS                 0x2C
  79 #define CNTX_S1_SENSOR_MODE     0x2E
  80 #define CNTX_HINF_CTRL          0x30
  81
  82 #define CTRL_CNTX_MASK          0x03
  83 #define CTRL_CNTX_OFFSET        0x00
  84 #define HINF_CTRL_LANE_MASK     0x07
  85 #define HINF_CTRL_LANE_OFFSET   0x00
  86 #define MIPI_CTRL_IMGVC_MASK    0xC0
  87 #define MIPI_CTRL_IMGVC_OFFSET  0x06
  88 #define MIPI_CTRL_IMGTYPE_AUTO  0x3F
  89 #define MIPI_CTRL_SSVC_MASK     0xC000
  90 #define MIPI_CTRL_SSVC_OFFSET   0x0E
  91 #define MIPI_CTRL_SSTYPE_MASK   0x3F00
  92 #define MIPI_CTRL_SSTYPE_OFFSET 0x08
  93 #define OUT_FMT_IIS_MASK        0x30
  94 #define OUT_FMT_IIS_OFFSET      0x08
  95 #define OUT_FMT_SS_MASK         0x1000
  96 #define OUT_FMT_SS_OFFSET       0x12
  97 #define OUT_FMT_TYPE_MASK       0xFF
  98 #define SENSOR_SELECT_MASK      0x03
  99 #define SENSOR_SELECT_OFFSET    0x00
 100 #define AWB_CTRL_MODE_MASK      0x0F
 101 #define AWB_CTRL_MODE_OFFSET    0x00
 102 #define AWB_CTRL_FLASH_MASK     0x100
 103
 104 #define AP1302_FMT_UYVY422      0x50
 105
 106 #define AP1302_SYS_ACTIVATE     0x8010
 107 #define AP1302_SYS_SWITCH       0x8140
 108 #define AP1302_SENSOR_PRI       0x01
 109 #define AP1302_SENSOR_SEC       0x02
 110 #define AP1302_SS_CTRL          0x31
 111
 112 #define AP1302_MAX_RATIO_MISMATCH       10 /* Unit in percentage */
 113 #define AP1302_MAX_EV           2
 114 #define AP1302_MIN_EV           -2
 115
 116 enum ap1302_contexts {
 117         CONTEXT_PREVIEW = 0,
 118         CONTEXT_SNAPSHOT,
 119         CONTEXT_VIDEO,
 120         CONTEXT_NUM
 121 };
 122
 123 /* The context registers are defined according to preview/video registers.
 124    Preview and video context have the same register definition.
 125    But snapshot context does not have register S1_SENSOR_MODE.
 126    When setting snapshot registers, if the offset exceeds
 127    S1_SENSOR_MODE, the actual offset needs to minus 2. */
 128 struct ap1302_context_config {
 129         u16 width;
 130         u16 height;
 131         u16 roi_x0;
 132         u16 roi_y0;
 133         u16 roi_x1;
 134         u16 roi_y1;
 135         u16 aspect_factor;
 136         u16 lock;
 137         u16 enable;
 138         u16 out_fmt;
 139         u16 sensor_mode;
 140         u16 mipi_ctrl;
 141         u16 mipi_ii_ctrl;
 142         u16 padding;
 143         u32 line_time;
 144         u16 max_fps;
 145         u16 ae_usg;
 146         u32 ae_upper_et;
 147         u32 ae_max_et;
 148         u16 ss;
 149         u16 s1_sensor_mode;
 150         u16 hinf_ctrl;
 151         u32 reserved;
 152 };
 153
 154 struct ap1302_res_struct {
 155         u16 width;
 156         u16 height;
 157         u16 fps;
 158 };
 159
 160 struct ap1302_context_res {
 161         u32 res_num;
 162         u32 cur_res;
 163         struct ap1302_res_struct *res_table;
 164 };
 165
 166 struct ap1302_device {
 167         struct v4l2_subdev sd;
 168         struct media_pad pad;
 169         struct camera_sensor_platform_data *platform_data;
 170         const struct firmware *fw;
 171         struct mutex input_lock; /* serialize sensor's ioctl */
 172         struct v4l2_mbus_framefmt format;
 173         struct v4l2_ctrl_handler ctrl_handler;
 174         struct v4l2_ctrl *run_mode;
 175         struct ap1302_context_config cntx_config[CONTEXT_NUM];
 176         struct ap1302_context_res cntx_res[CONTEXT_NUM];
 177         enum ap1302_contexts cur_context;
 178         unsigned int num_lanes;
 179         struct regmap *regmap16;
 180         struct regmap *regmap32;
 181         bool sys_activated;
 182         bool power_on;
 183 };
 184
 185 struct ap1302_firmware {
 186         u32 crc;
 187         u32 pll_init_size;
 188         u32 total_size;
 189         u32 reserved;
 190 };
 191
 192 struct ap1302_context_info {
 193         u16 offset;
 194         u16 len;
 195         char *name;
 196 };
 197
 198 #endif