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[mirror_ubuntu-bionic-kernel.git] / drivers / staging / media / atomisp / pci / atomisp2 / atomisp_v4l2.c
1 /*
2 * Support for Medifield PNW Camera Imaging ISP subsystem.
3 *
4 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
5 *
6 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/pm_qos.h>
27 #include <linux/timer.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30
31 #include <asm/intel-mid.h>
32 #include <asm/iosf_mbi.h>
33
34 #include "../../include/linux/atomisp_gmin_platform.h"
35
36 #include "atomisp_cmd.h"
37 #include "atomisp_common.h"
38 #include "atomisp_fops.h"
39 #include "atomisp_file.h"
40 #include "atomisp_ioctl.h"
41 #include "atomisp_internal.h"
42 #include "atomisp_acc.h"
43 #include "atomisp-regs.h"
44 #include "atomisp_dfs_tables.h"
45 #include "atomisp_drvfs.h"
46 #include "hmm/hmm.h"
47 #include "atomisp_trace_event.h"
48
49 #include "hrt/hive_isp_css_mm_hrt.h"
50
51 #include "device_access.h"
52
53 /* G-Min addition: pull this in from intel_mid_pm.h */
54 #define CSTATE_EXIT_LATENCY_C1 1
55
56 static uint skip_fwload;
57 module_param(skip_fwload, uint, 0644);
58 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
59
60 /* set reserved memory pool size in page */
61 static unsigned int repool_pgnr;
62 module_param(repool_pgnr, uint, 0644);
63 MODULE_PARM_DESC(repool_pgnr,
64 "Set the reserved memory pool size in page (default:0)");
65
66 /* set dynamic memory pool size in page */
67 unsigned int dypool_pgnr = UINT_MAX;
68 module_param(dypool_pgnr, uint, 0644);
69 MODULE_PARM_DESC(dypool_pgnr,
70 "Set the dynamic memory pool size in page (default:0)");
71
72 bool dypool_enable;
73 module_param(dypool_enable, bool, 0644);
74 MODULE_PARM_DESC(dypool_enable,
75 "dynamic memory pool enable/disable (default:disable)");
76
77 /* memory optimization: deferred firmware loading */
78 bool defer_fw_load;
79 module_param(defer_fw_load, bool, 0644);
80 MODULE_PARM_DESC(defer_fw_load,
81 "Defer FW loading until device is opened (default:disable)");
82
83 /* cross componnet debug message flag */
84 int dbg_level;
85 module_param(dbg_level, int, 0644);
86 MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)");
87
88 /* log function switch */
89 int dbg_func = 2;
90 module_param(dbg_func, int, 0644);
91 MODULE_PARM_DESC(dbg_func,
92 "log function switch non/trace_printk/printk (default:printk)");
93
94 int mipicsi_flag;
95 module_param(mipicsi_flag, int, 0644);
96 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
97
98 /*set to 16x16 since this is the amount of lines and pixels the sensor
99 exports extra. If these are kept at the 10x8 that they were on, in yuv
100 downscaling modes incorrect resolutions where requested to the sensor
101 driver with strange outcomes as a result. The proper way tot do this
102 would be to have a list of tables the specify the sensor res, mipi rec,
103 output res, and isp output res. however since we do not have this yet,
104 the chosen solution is the next best thing. */
105 int pad_w = 16;
106 module_param(pad_w, int, 0644);
107 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
108
109 int pad_h = 16;
110 module_param(pad_h, int, 0644);
111 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
112
113 struct device *atomisp_dev;
114
115 void __iomem *atomisp_io_base;
116
117 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name)
118 {
119 int ret;
120 const char *direction;
121
122 switch (video->type) {
123 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
124 direction = "output";
125 video->pad.flags = MEDIA_PAD_FL_SINK;
126 video->vdev.fops = &atomisp_fops;
127 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
128 break;
129 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
130 direction = "input";
131 video->pad.flags = MEDIA_PAD_FL_SOURCE;
132 video->vdev.fops = &atomisp_file_fops;
133 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
134 break;
135 default:
136 return -EINVAL;
137 }
138
139 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
140 if (ret < 0)
141 return ret;
142
143 /* Initialize the video device. */
144 snprintf(video->vdev.name, sizeof(video->vdev.name),
145 "ATOMISP ISP %s %s", name, direction);
146 video->vdev.release = video_device_release_empty;
147 video_set_drvdata(&video->vdev, video->isp);
148
149 return 0;
150 }
151
152 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
153 {
154 video->vdev.fops = &atomisp_fops;
155 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
156
157 /* Initialize the video device. */
158 snprintf(video->vdev.name, sizeof(video->vdev.name),
159 "ATOMISP ISP %s", name);
160 video->vdev.release = video_device_release_empty;
161 video_set_drvdata(&video->vdev, video->isp);
162 }
163
164 int atomisp_video_register(struct atomisp_video_pipe *video,
165 struct v4l2_device *vdev)
166 {
167 int ret;
168
169 video->vdev.v4l2_dev = vdev;
170
171 ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1);
172 if (ret < 0)
173 dev_err(vdev->dev, "%s: could not register video device (%d)\n",
174 __func__, ret);
175
176 return ret;
177 }
178
179 int atomisp_acc_register(struct atomisp_acc_pipe *video,
180 struct v4l2_device *vdev)
181 {
182 int ret;
183
184 video->vdev.v4l2_dev = vdev;
185
186 ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1);
187 if (ret < 0)
188 dev_err(vdev->dev, "%s: could not register video device (%d)\n",
189 __func__, ret);
190
191 return ret;
192 }
193
194 void atomisp_video_unregister(struct atomisp_video_pipe *video)
195 {
196 if (video_is_registered(&video->vdev)) {
197 media_entity_cleanup(&video->vdev.entity);
198 video_unregister_device(&video->vdev);
199 }
200 }
201
202 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
203 {
204 if (video_is_registered(&video->vdev))
205 video_unregister_device(&video->vdev);
206 }
207
208 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
209 {
210 struct pci_dev *dev = isp->pdev;
211
212 dev_dbg(isp->dev, "%s\n", __func__);
213
214 pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
215 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
216 pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
217 pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
218 pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
219 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
220 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
221 &isp->saved_regs.interrupt_control);
222
223 pci_read_config_dword(dev, MRFLD_PCI_PMCS,
224 &isp->saved_regs.pmcs);
225 /* Ensure read/write combining is enabled. */
226 pci_read_config_dword(dev, PCI_I_CONTROL,
227 &isp->saved_regs.i_control);
228 isp->saved_regs.i_control |=
229 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
230 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
231 pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
232 &isp->saved_regs.csi_access_viol);
233 pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
234 &isp->saved_regs.csi_rcomp_config);
235 /*
236 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
237 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
238 * and sensor sending "continuous clock".
239 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
240 * is missed, and IUNIT can hang.
241 * For both issues, setting this bit is a workaround.
242 */
243 isp->saved_regs.csi_rcomp_config |=
244 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
245 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
246 &isp->saved_regs.csi_afe_dly);
247 pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
248 &isp->saved_regs.csi_control);
249 if (isp->media_dev.hw_revision >=
250 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
251 isp->saved_regs.csi_control |=
252 MRFLD_PCI_CSI_CONTROL_PARPATHEN;
253 /*
254 * On CHT CSI_READY bit should be enabled before stream on
255 */
256 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
257 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
258 isp->saved_regs.csi_control |=
259 MRFLD_PCI_CSI_CONTROL_CSI_READY;
260 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
261 &isp->saved_regs.csi_afe_rcomp_config);
262 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
263 &isp->saved_regs.csi_afe_hs_control);
264 pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
265 &isp->saved_regs.csi_deadline_control);
266 return 0;
267 }
268
269 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
270 {
271 struct pci_dev *dev = isp->pdev;
272
273 dev_dbg(isp->dev, "%s\n", __func__);
274
275 pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
276 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
277 isp->saved_regs.ispmmadr);
278 pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
279 pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
280 pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
281 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
282 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
283 isp->saved_regs.interrupt_control);
284 pci_write_config_dword(dev, PCI_I_CONTROL,
285 isp->saved_regs.i_control);
286
287 pci_write_config_dword(dev, MRFLD_PCI_PMCS,
288 isp->saved_regs.pmcs);
289 pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
290 isp->saved_regs.csi_access_viol);
291 pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
292 isp->saved_regs.csi_rcomp_config);
293 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
294 isp->saved_regs.csi_afe_dly);
295 pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
296 isp->saved_regs.csi_control);
297 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
298 isp->saved_regs.csi_afe_rcomp_config);
299 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
300 isp->saved_regs.csi_afe_hs_control);
301 pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
302 isp->saved_regs.csi_deadline_control);
303
304 /*
305 * for MRFLD, Software/firmware needs to write a 1 to bit0
306 * of the register at CSI_RECEIVER_SELECTION_REG to enable
307 * SH CSI backend write 0 will enable Arasan CSI backend,
308 * which has bugs(like sighting:4567697 and 4567699) and
309 * will be removed in B0
310 */
311 atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
312 return 0;
313 }
314
315 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
316 {
317 struct pci_dev *dev = isp->pdev;
318 u32 irq;
319 unsigned long flags;
320
321 spin_lock_irqsave(&isp->lock, flags);
322 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
323 spin_unlock_irqrestore(&isp->lock, flags);
324 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
325 return 0;
326 }
327 /*
328 * MRFLD HAS requirement: cannot power off i-unit if
329 * ISP has IRQ not serviced.
330 * So, here we need to check if there is any pending
331 * IRQ, if so, waiting for it to be served
332 */
333 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
334 irq = irq & 1 << INTR_IIR;
335 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
336
337 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
338 if (!(irq & (1 << INTR_IIR)))
339 goto done;
340
341 atomisp_store_uint32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
342 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
343 if (irq != 0) {
344 dev_err(isp->dev,
345 "%s: fail to clear isp interrupt status reg=0x%x\n",
346 __func__, irq);
347 spin_unlock_irqrestore(&isp->lock, flags);
348 return -EAGAIN;
349 } else {
350 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
351 irq = irq & 1 << INTR_IIR;
352 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
353
354 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
355 if (!(irq & (1 << INTR_IIR))) {
356 atomisp_store_uint32(MRFLD_INTR_ENABLE_REG, 0x0);
357 goto done;
358 }
359 dev_err(isp->dev,
360 "%s: error in iunit interrupt. status reg=0x%x\n",
361 __func__, irq);
362 spin_unlock_irqrestore(&isp->lock, flags);
363 return -EAGAIN;
364 }
365 done:
366 /*
367 * MRFLD WORKAROUND:
368 * before powering off IUNIT, clear the pending interrupts
369 * and disable the interrupt. driver should avoid writing 0
370 * to IIR. It could block subsequent interrupt messages.
371 * HW sighting:4568410.
372 */
373 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
374 irq &= ~(1 << INTR_IER);
375 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
376
377 atomisp_msi_irq_uninit(isp, dev);
378 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
379 spin_unlock_irqrestore(&isp->lock, flags);
380
381 return 0;
382 }
383
384
385 /*
386 * WA for DDR DVFS enable/disable
387 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
388 */
389 static void punit_ddr_dvfs_enable(bool enable)
390 {
391 int door_bell = 1 << 8;
392 int max_wait = 30;
393 int reg;
394
395 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, &reg);
396 if (enable) {
397 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
398 } else {
399 reg |= (MRFLD_BIT1 | door_bell);
400 reg &= ~(MRFLD_BIT0);
401 }
402 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
403
404 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
405 while ((reg & door_bell) && max_wait--) {
406 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, &reg);
407 usleep_range(100, 500);
408 }
409
410 if (max_wait == -1)
411 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
412 }
413
414 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
415 int atomisp_mrfld_power_down(struct atomisp_device *isp)
416 {
417 unsigned long timeout;
418 u32 reg_value;
419
420 /* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
421 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
422 reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
423 reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
424 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
425
426 /*WA:Enable DVFS*/
427 if (IS_CHT)
428 punit_ddr_dvfs_enable(true);
429
430 /*
431 * There should be no iunit access while power-down is
432 * in progress HW sighting: 4567865
433 * FIXME: msecs_to_jiffies(50)- experienced value
434 */
435 timeout = jiffies + msecs_to_jiffies(50);
436 while (1) {
437 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
438 dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n",
439 reg_value);
440 /* wait until ISPSSPM0 bit[25:24] shows 0x3 */
441 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
442 MRFLD_ISPSSPM0_IUNIT_POWER_OFF) {
443 trace_ipu_cstate(0);
444 return 0;
445 }
446
447 if (time_after(jiffies, timeout)) {
448 dev_err(isp->dev, "power-off iunit timeout.\n");
449 return -EBUSY;
450 }
451 /* FIXME: experienced value for delay */
452 usleep_range(100, 150);
453 }
454 }
455
456
457 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
458 int atomisp_mrfld_power_up(struct atomisp_device *isp)
459 {
460 unsigned long timeout;
461 u32 reg_value;
462
463 /*WA for PUNIT, if DVFS enabled, ISP timeout observed*/
464 if (IS_CHT)
465 punit_ddr_dvfs_enable(false);
466
467 /*
468 * FIXME:WA for ECS28A, with this sleep, CTS
469 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
470 * PASS, no impact on other platforms
471 */
472 if (IS_BYT)
473 msleep(10);
474
475 /* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */
476 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
477 reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
478 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
479
480 /* FIXME: experienced value for delay */
481 timeout = jiffies + msecs_to_jiffies(50);
482 while (1) {
483 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
484 dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n",
485 reg_value);
486 /* wait until ISPSSPM0 bit[25:24] shows 0x0 */
487 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
488 MRFLD_ISPSSPM0_IUNIT_POWER_ON) {
489 trace_ipu_cstate(1);
490 return 0;
491 }
492
493 if (time_after(jiffies, timeout)) {
494 dev_err(isp->dev, "power-on iunit timeout.\n");
495 return -EBUSY;
496 }
497 /* FIXME: experienced value for delay */
498 usleep_range(100, 150);
499 }
500 }
501
502 int atomisp_runtime_suspend(struct device *dev)
503 {
504 struct atomisp_device *isp = (struct atomisp_device *)
505 dev_get_drvdata(dev);
506 int ret;
507
508 ret = atomisp_mrfld_pre_power_down(isp);
509 if (ret)
510 return ret;
511
512 /*Turn off the ISP d-phy*/
513 ret = atomisp_ospm_dphy_down(isp);
514 if (ret)
515 return ret;
516 pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
517 return atomisp_mrfld_power_down(isp);
518 }
519
520 int atomisp_runtime_resume(struct device *dev)
521 {
522 struct atomisp_device *isp = (struct atomisp_device *)
523 dev_get_drvdata(dev);
524 int ret;
525
526 ret = atomisp_mrfld_power_up(isp);
527 if (ret)
528 return ret;
529
530 pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
531 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
532 /*Turn on ISP d-phy */
533 ret = atomisp_ospm_dphy_up(isp);
534 if (ret) {
535 dev_err(isp->dev, "Failed to power up ISP!.\n");
536 return -EINVAL;
537 }
538 }
539
540 /*restore register values for iUnit and iUnitPHY registers*/
541 if (isp->saved_regs.pcicmdsts)
542 atomisp_restore_iunit_reg(isp);
543
544 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
545 return 0;
546 }
547
548 static int __maybe_unused atomisp_suspend(struct device *dev)
549 {
550 struct atomisp_device *isp = (struct atomisp_device *)
551 dev_get_drvdata(dev);
552 /* FIXME: only has one isp_subdev at present */
553 struct atomisp_sub_device *asd = &isp->asd[0];
554 unsigned long flags;
555 int ret;
556
557 /*
558 * FIXME: Suspend is not supported by sensors. Abort if any video
559 * node was opened.
560 */
561 if (atomisp_dev_users(isp))
562 return -EBUSY;
563
564 spin_lock_irqsave(&isp->lock, flags);
565 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
566 spin_unlock_irqrestore(&isp->lock, flags);
567 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
568 return -EINVAL;
569 }
570 spin_unlock_irqrestore(&isp->lock, flags);
571
572 ret = atomisp_mrfld_pre_power_down(isp);
573 if (ret)
574 return ret;
575
576 /*Turn off the ISP d-phy */
577 ret = atomisp_ospm_dphy_down(isp);
578 if (ret) {
579 dev_err(isp->dev, "fail to power off ISP\n");
580 return ret;
581 }
582 pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
583 return atomisp_mrfld_power_down(isp);
584 }
585
586 static int __maybe_unused atomisp_resume(struct device *dev)
587 {
588 struct atomisp_device *isp = (struct atomisp_device *)
589 dev_get_drvdata(dev);
590 int ret;
591
592 ret = atomisp_mrfld_power_up(isp);
593 if (ret)
594 return ret;
595
596 pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
597
598 /*Turn on ISP d-phy */
599 ret = atomisp_ospm_dphy_up(isp);
600 if (ret) {
601 dev_err(isp->dev, "Failed to power up ISP!.\n");
602 return -EINVAL;
603 }
604
605 /*restore register values for iUnit and iUnitPHY registers*/
606 if (isp->saved_regs.pcicmdsts)
607 atomisp_restore_iunit_reg(isp);
608
609 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
610 return 0;
611 }
612
613 int atomisp_csi_lane_config(struct atomisp_device *isp)
614 {
615 static const struct {
616 u8 code;
617 u8 lanes[MRFLD_PORT_NUM];
618 } portconfigs[] = {
619 /* Tangier/Merrifield available lane configurations */
620 { 0x00, { 4, 1, 0 } }, /* 00000 */
621 { 0x01, { 3, 1, 0 } }, /* 00001 */
622 { 0x02, { 2, 1, 0 } }, /* 00010 */
623 { 0x03, { 1, 1, 0 } }, /* 00011 */
624 { 0x04, { 2, 1, 2 } }, /* 00100 */
625 { 0x08, { 3, 1, 1 } }, /* 01000 */
626 { 0x09, { 2, 1, 1 } }, /* 01001 */
627 { 0x0a, { 1, 1, 1 } }, /* 01010 */
628
629 /* Anniedale/Moorefield only configurations */
630 { 0x10, { 4, 2, 0 } }, /* 10000 */
631 { 0x11, { 3, 2, 0 } }, /* 10001 */
632 { 0x12, { 2, 2, 0 } }, /* 10010 */
633 { 0x13, { 1, 2, 0 } }, /* 10011 */
634 { 0x14, { 2, 2, 2 } }, /* 10100 */
635 { 0x18, { 3, 2, 1 } }, /* 11000 */
636 { 0x19, { 2, 2, 1 } }, /* 11001 */
637 { 0x1a, { 1, 2, 1 } }, /* 11010 */
638 };
639
640 unsigned int i, j;
641 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
642 u32 csi_control;
643 int nportconfigs;
644 u32 port_config_mask;
645 int port3_lanes_shift;
646
647 if (isp->media_dev.hw_revision <
648 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
649 ATOMISP_HW_REVISION_SHIFT) {
650 /* Merrifield */
651 port_config_mask = MRFLD_PORT_CONFIG_MASK;
652 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
653 } else {
654 /* Moorefield / Cherryview */
655 port_config_mask = CHV_PORT_CONFIG_MASK;
656 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
657 }
658
659 if (isp->media_dev.hw_revision <
660 ATOMISP_HW_REVISION_ISP2401 <<
661 ATOMISP_HW_REVISION_SHIFT) {
662 /* Merrifield / Moorefield legacy input system */
663 nportconfigs = MRFLD_PORT_CONFIG_NUM;
664 } else {
665 /* Moorefield / Cherryview new input system */
666 nportconfigs = ARRAY_SIZE(portconfigs);
667 }
668
669 for (i = 0; i < isp->input_cnt; i++) {
670 struct camera_mipi_info *mipi_info;
671
672 if (isp->inputs[i].type != RAW_CAMERA &&
673 isp->inputs[i].type != SOC_CAMERA)
674 continue;
675
676 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
677 if (!mipi_info)
678 continue;
679
680 switch (mipi_info->port) {
681 case ATOMISP_CAMERA_PORT_PRIMARY:
682 sensor_lanes[0] = mipi_info->num_lanes;
683 break;
684 case ATOMISP_CAMERA_PORT_SECONDARY:
685 sensor_lanes[1] = mipi_info->num_lanes;
686 break;
687 case ATOMISP_CAMERA_PORT_TERTIARY:
688 sensor_lanes[2] = mipi_info->num_lanes;
689 break;
690 default:
691 dev_err(isp->dev,
692 "%s: invalid port: %d for the %dth sensor\n",
693 __func__, mipi_info->port, i);
694 return -EINVAL;
695 }
696 }
697
698 for (i = 0; i < nportconfigs; i++) {
699 for (j = 0; j < MRFLD_PORT_NUM; j++)
700 if (sensor_lanes[j] &&
701 sensor_lanes[j] != portconfigs[i].lanes[j])
702 break;
703
704 if (j == MRFLD_PORT_NUM)
705 break; /* Found matching setting */
706 }
707
708 if (i >= nportconfigs) {
709 dev_err(isp->dev,
710 "%s: could not find the CSI port setting for %d-%d-%d\n",
711 __func__,
712 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
713 return -EINVAL;
714 }
715
716 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
717 csi_control &= ~port_config_mask;
718 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
719 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
720 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
721 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
722 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
723 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
724 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
725
726 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
727
728 dev_dbg(isp->dev,
729 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
730 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
731 portconfigs[i].lanes[2], csi_control);
732
733 return 0;
734 }
735
736 static int atomisp_subdev_probe(struct atomisp_device *isp)
737 {
738 const struct atomisp_platform_data *pdata;
739 struct intel_v4l2_subdev_table *subdevs;
740 int ret, raw_index = -1;
741
742 pdata = atomisp_get_platform_data();
743 if (pdata == NULL) {
744 dev_err(isp->dev, "no platform data available\n");
745 return 0;
746 }
747
748 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
749 struct v4l2_subdev *subdev;
750 struct i2c_board_info *board_info =
751 &subdevs->v4l2_subdev.board_info;
752 struct i2c_adapter *adapter =
753 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
754 struct camera_sensor_platform_data *sensor_pdata;
755 int sensor_num, i;
756
757 if (adapter == NULL) {
758 dev_err(isp->dev,
759 "Failed to find i2c adapter for subdev %s\n",
760 board_info->type);
761 break;
762 }
763
764 /* In G-Min, the sensor devices will already be probed
765 * (via ACPI) and registered, do not create new
766 * ones */
767 subdev = atomisp_gmin_find_subdev(adapter, board_info);
768 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
769 if (ret) {
770 dev_warn(isp->dev, "Subdev %s detection fail\n",
771 board_info->type);
772 continue;
773 }
774
775 if (subdev == NULL) {
776 dev_warn(isp->dev, "Subdev %s detection fail\n",
777 board_info->type);
778 continue;
779 }
780
781 dev_info(isp->dev, "Subdev %s successfully register\n",
782 board_info->type);
783
784 switch (subdevs->type) {
785 case RAW_CAMERA:
786 raw_index = isp->input_cnt;
787 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
788 case SOC_CAMERA:
789 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
790 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
791 dev_warn(isp->dev,
792 "too many atomisp inputs, ignored\n");
793 break;
794 }
795
796 isp->inputs[isp->input_cnt].type = subdevs->type;
797 isp->inputs[isp->input_cnt].port = subdevs->port;
798 isp->inputs[isp->input_cnt].camera = subdev;
799 isp->inputs[isp->input_cnt].sensor_index = 0;
800 /*
801 * initialize the subdev frame size, then next we can
802 * judge whether frame_size store effective value via
803 * pixel_format.
804 */
805 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
806 sensor_pdata = (struct camera_sensor_platform_data *)
807 board_info->platform_data;
808 if (sensor_pdata->get_camera_caps)
809 isp->inputs[isp->input_cnt].camera_caps =
810 sensor_pdata->get_camera_caps();
811 else
812 isp->inputs[isp->input_cnt].camera_caps =
813 atomisp_get_default_camera_caps();
814 sensor_num = isp->inputs[isp->input_cnt]
815 .camera_caps->sensor_num;
816 isp->input_cnt++;
817 for (i = 1; i < sensor_num; i++) {
818 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
819 dev_warn(isp->dev,
820 "atomisp inputs out of range\n");
821 break;
822 }
823 isp->inputs[isp->input_cnt] =
824 isp->inputs[isp->input_cnt - 1];
825 isp->inputs[isp->input_cnt].sensor_index = i;
826 isp->input_cnt++;
827 }
828 break;
829 case CAMERA_MOTOR:
830 isp->motor = subdev;
831 break;
832 case LED_FLASH:
833 case XENON_FLASH:
834 isp->flash = subdev;
835 break;
836 default:
837 dev_dbg(isp->dev, "unknown subdev probed\n");
838 break;
839 }
840
841 }
842
843 /*
844 * HACK: Currently VCM belongs to primary sensor only, but correct
845 * approach must be to acquire from platform code which sensor
846 * owns it.
847 */
848 if (isp->motor && raw_index >= 0)
849 isp->inputs[raw_index].motor = isp->motor;
850
851 /* Proceed even if no modules detected. For COS mode and no modules. */
852 if (!isp->inputs[0].camera)
853 dev_warn(isp->dev, "no camera attached or fail to detect\n");
854
855 return atomisp_csi_lane_config(isp);
856 }
857
858 static void atomisp_unregister_entities(struct atomisp_device *isp)
859 {
860 unsigned int i;
861 struct v4l2_subdev *sd, *next;
862
863 for (i = 0; i < isp->num_of_streams; i++)
864 atomisp_subdev_unregister_entities(&isp->asd[i]);
865 atomisp_tpg_unregister_entities(&isp->tpg);
866 atomisp_file_input_unregister_entities(&isp->file_dev);
867 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
868 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
869
870 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
871 v4l2_device_unregister_subdev(sd);
872
873 v4l2_device_unregister(&isp->v4l2_dev);
874 media_device_unregister(&isp->media_dev);
875 }
876
877 static int atomisp_register_entities(struct atomisp_device *isp)
878 {
879 int ret = 0;
880 unsigned int i;
881
882 isp->media_dev.dev = isp->dev;
883
884 strlcpy(isp->media_dev.model, "Intel Atom ISP",
885 sizeof(isp->media_dev.model));
886
887 media_device_init(&isp->media_dev);
888 isp->v4l2_dev.mdev = &isp->media_dev;
889 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
890 if (ret < 0) {
891 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
892 __func__, ret);
893 goto v4l2_device_failed;
894 }
895
896 ret = atomisp_subdev_probe(isp);
897 if (ret < 0)
898 goto csi_and_subdev_probe_failed;
899
900 /* Register internal entities */
901 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
902 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
903 &isp->v4l2_dev);
904 if (ret == 0)
905 continue;
906
907 /* error case */
908 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
909 /* deregister all registered CSI ports */
910 while (i--)
911 atomisp_mipi_csi2_unregister_entities(
912 &isp->csi2_port[i]);
913
914 goto csi_and_subdev_probe_failed;
915 }
916
917 ret =
918 atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
919 if (ret < 0) {
920 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
921 goto file_input_register_failed;
922 }
923
924 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
925 if (ret < 0) {
926 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
927 goto tpg_register_failed;
928 }
929
930 for (i = 0; i < isp->num_of_streams; i++) {
931 struct atomisp_sub_device *asd = &isp->asd[i];
932
933 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
934 if (ret < 0) {
935 dev_err(isp->dev,
936 "atomisp_subdev_register_entities fail\n");
937 for (; i > 0; i--)
938 atomisp_subdev_unregister_entities(
939 &isp->asd[i - 1]);
940 goto subdev_register_failed;
941 }
942 }
943
944 for (i = 0; i < isp->num_of_streams; i++) {
945 struct atomisp_sub_device *asd = &isp->asd[i];
946
947 init_completion(&asd->init_done);
948
949 asd->delayed_init_workq =
950 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
951 1);
952 if (asd->delayed_init_workq == NULL) {
953 dev_err(isp->dev,
954 "Failed to initialize delayed init workq\n");
955 ret = -ENOMEM;
956
957 for (; i > 0; i--)
958 destroy_workqueue(isp->asd[i - 1].
959 delayed_init_workq);
960 goto wq_alloc_failed;
961 }
962 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
963 }
964
965 for (i = 0; i < isp->input_cnt; i++) {
966 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
967 dev_err(isp->dev, "isp->inputs port %d not supported\n",
968 isp->inputs[i].port);
969 ret = -EINVAL;
970 goto link_failed;
971 }
972 }
973
974 dev_dbg(isp->dev,
975 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
976 isp->inputs[isp->input_cnt].type = FILE_INPUT;
977 isp->inputs[isp->input_cnt].port = -1;
978 isp->inputs[isp->input_cnt].camera_caps =
979 atomisp_get_default_camera_caps();
980 isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
981
982 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
983 dev_dbg(isp->dev,
984 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
985 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
986 isp->inputs[isp->input_cnt].port = -1;
987 isp->inputs[isp->input_cnt].camera_caps =
988 atomisp_get_default_camera_caps();
989 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
990 } else {
991 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
992 }
993
994 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
995 if (ret < 0)
996 goto link_failed;
997
998 return media_device_register(&isp->media_dev);
999
1000 link_failed:
1001 for (i = 0; i < isp->num_of_streams; i++)
1002 destroy_workqueue(isp->asd[i].
1003 delayed_init_workq);
1004 wq_alloc_failed:
1005 for (i = 0; i < isp->num_of_streams; i++)
1006 atomisp_subdev_unregister_entities(
1007 &isp->asd[i]);
1008 subdev_register_failed:
1009 atomisp_tpg_unregister_entities(&isp->tpg);
1010 tpg_register_failed:
1011 atomisp_file_input_unregister_entities(&isp->file_dev);
1012 file_input_register_failed:
1013 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1014 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1015 csi_and_subdev_probe_failed:
1016 v4l2_device_unregister(&isp->v4l2_dev);
1017 v4l2_device_failed:
1018 media_device_unregister(&isp->media_dev);
1019 media_device_cleanup(&isp->media_dev);
1020 return ret;
1021 }
1022
1023 static int atomisp_initialize_modules(struct atomisp_device *isp)
1024 {
1025 int ret;
1026
1027 ret = atomisp_mipi_csi2_init(isp);
1028 if (ret < 0) {
1029 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1030 goto error_mipi_csi2;
1031 }
1032
1033 ret = atomisp_file_input_init(isp);
1034 if (ret < 0) {
1035 dev_err(isp->dev,
1036 "file input device initialization failed\n");
1037 goto error_file_input;
1038 }
1039
1040 ret = atomisp_tpg_init(isp);
1041 if (ret < 0) {
1042 dev_err(isp->dev, "tpg initialization failed\n");
1043 goto error_tpg;
1044 }
1045
1046 ret = atomisp_subdev_init(isp);
1047 if (ret < 0) {
1048 dev_err(isp->dev, "ISP subdev initialization failed\n");
1049 goto error_isp_subdev;
1050 }
1051
1052
1053 return 0;
1054
1055 error_isp_subdev:
1056 error_tpg:
1057 atomisp_tpg_cleanup(isp);
1058 error_file_input:
1059 atomisp_file_input_cleanup(isp);
1060 error_mipi_csi2:
1061 atomisp_mipi_csi2_cleanup(isp);
1062 return ret;
1063 }
1064
1065 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1066 {
1067 atomisp_tpg_cleanup(isp);
1068 atomisp_file_input_cleanup(isp);
1069 atomisp_mipi_csi2_cleanup(isp);
1070 }
1071
1072 const struct firmware *
1073 atomisp_load_firmware(struct atomisp_device *isp)
1074 {
1075 const struct firmware *fw;
1076 int rc;
1077 char *fw_path = NULL;
1078
1079 if (skip_fwload)
1080 return NULL;
1081
1082 if (isp->media_dev.hw_revision ==
1083 ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)
1084 | ATOMISP_HW_STEPPING_A0))
1085 fw_path = "shisp_2401a0_v21.bin";
1086
1087 if (isp->media_dev.hw_revision ==
1088 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1089 | ATOMISP_HW_STEPPING_A0))
1090 fw_path = "shisp_2401a0_legacy_v21.bin";
1091
1092 if (isp->media_dev.hw_revision ==
1093 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1094 | ATOMISP_HW_STEPPING_B0))
1095 fw_path = "shisp_2400b0_v21.bin";
1096
1097 if (!fw_path) {
1098 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1099 isp->media_dev.hw_revision);
1100 return NULL;
1101 }
1102
1103 rc = request_firmware(&fw, fw_path, isp->dev);
1104 if (rc) {
1105 dev_err(isp->dev,
1106 "atomisp: Error %d while requesting firmware %s\n",
1107 rc, fw_path);
1108 return NULL;
1109 }
1110
1111 return fw;
1112 }
1113
1114 /*
1115 * Check for flags the driver was compiled with against the PCI
1116 * device. Always returns true on other than ISP 2400.
1117 */
1118 static bool is_valid_device(struct pci_dev *dev,
1119 const struct pci_device_id *id)
1120 {
1121 unsigned int a0_max_id;
1122
1123 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1124 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1125 a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX;
1126 break;
1127 case ATOMISP_PCI_DEVICE_SOC_BYT:
1128 a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX;
1129 break;
1130 default:
1131 return true;
1132 }
1133
1134 return dev->revision > a0_max_id;
1135 }
1136
1137 static int init_atomisp_wdts(struct atomisp_device *isp)
1138 {
1139 int i, err;
1140
1141 atomic_set(&isp->wdt_work_queued, 0);
1142 isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1143 if (isp->wdt_work_queue == NULL) {
1144 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1145 err = -ENOMEM;
1146 goto alloc_fail;
1147 }
1148 INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1149
1150 for (i = 0; i < isp->num_of_streams; i++) {
1151 struct atomisp_sub_device *asd = &isp->asd[i];
1152 asd = &isp->asd[i];
1153 #ifndef ISP2401
1154 setup_timer(&asd->wdt, atomisp_wdt, (unsigned long)isp);
1155 #else
1156 setup_timer(&asd->video_out_capture.wdt,
1157 atomisp_wdt, (unsigned long)&asd->video_out_capture);
1158 setup_timer(&asd->video_out_preview.wdt,
1159 atomisp_wdt, (unsigned long)&asd->video_out_preview);
1160 setup_timer(&asd->video_out_vf.wdt,
1161 atomisp_wdt, (unsigned long)&asd->video_out_vf);
1162 setup_timer(&asd->video_out_video_capture.wdt,
1163 atomisp_wdt,
1164 (unsigned long)&asd->video_out_video_capture);
1165 #endif
1166 }
1167 return 0;
1168 alloc_fail:
1169 return err;
1170 }
1171
1172 static struct pci_driver atomisp_pci_driver;
1173
1174 #define ATOM_ISP_PCI_BAR 0
1175
1176 static int atomisp_pci_probe(struct pci_dev *dev,
1177 const struct pci_device_id *id)
1178 {
1179 const struct atomisp_platform_data *pdata;
1180 struct atomisp_device *isp;
1181 unsigned int start;
1182 void __iomem *base;
1183 int err, val;
1184 u32 irq;
1185
1186 if (!dev) {
1187 dev_err(&dev->dev, "atomisp: error device ptr\n");
1188 return -EINVAL;
1189 }
1190
1191 if (!is_valid_device(dev, id))
1192 return -ENODEV;
1193 /* Pointer to struct device. */
1194 atomisp_dev = &dev->dev;
1195
1196 pdata = atomisp_get_platform_data();
1197 if (pdata == NULL)
1198 dev_warn(&dev->dev, "no platform data available\n");
1199
1200 err = pcim_enable_device(dev);
1201 if (err) {
1202 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1203 err);
1204 return err;
1205 }
1206
1207 start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1208 dev_dbg(&dev->dev, "start: 0x%x\n", start);
1209
1210 err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1211 if (err) {
1212 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1213 err);
1214 return err;
1215 }
1216
1217 base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1218 dev_dbg(&dev->dev, "base: %p\n", base);
1219
1220 atomisp_io_base = base;
1221
1222 dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1223
1224 isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1225 if (!isp) {
1226 dev_err(&dev->dev, "Failed to alloc CI ISP structure\n");
1227 return -ENOMEM;
1228 }
1229 isp->pdev = dev;
1230 isp->dev = &dev->dev;
1231 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1232 isp->pci_root = pci_get_bus_and_slot(0, 0);
1233 if (!isp->pci_root) {
1234 dev_err(&dev->dev, "Unable to find PCI host\n");
1235 return -ENODEV;
1236 }
1237 isp->saved_regs.ispmmadr = start;
1238
1239 rt_mutex_init(&isp->mutex);
1240 mutex_init(&isp->streamoff_mutex);
1241 spin_lock_init(&isp->lock);
1242
1243 /* This is not a true PCI device on SoC, so the delay is not needed. */
1244 isp->pdev->d3_delay = 0;
1245
1246 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1247 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1248 isp->media_dev.hw_revision =
1249 (ATOMISP_HW_REVISION_ISP2400
1250 << ATOMISP_HW_REVISION_SHIFT) |
1251 ATOMISP_HW_STEPPING_B0;
1252
1253 switch (id->device) {
1254 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1255 isp->dfs = &dfs_config_merr_1179;
1256 break;
1257 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1258 isp->dfs = &dfs_config_merr_117a;
1259 break;
1260 default:
1261 isp->dfs = &dfs_config_merr;
1262 break;
1263 }
1264 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1265 break;
1266 case ATOMISP_PCI_DEVICE_SOC_BYT:
1267 isp->media_dev.hw_revision =
1268 (ATOMISP_HW_REVISION_ISP2400
1269 << ATOMISP_HW_REVISION_SHIFT) |
1270 ATOMISP_HW_STEPPING_B0;
1271 #ifdef FIXME
1272 if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
1273 INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
1274 isp->dfs = &dfs_config_byt_cr;
1275 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1276 } else
1277 #endif
1278 {
1279 isp->dfs = &dfs_config_byt;
1280 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1281 }
1282 /* HPLL frequency is known to be device-specific, but we don't
1283 * have specs yet for exactly how it varies. Default to
1284 * BYT-CR but let provisioning set it via EFI variable */
1285 isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq",
1286 HPLL_FREQ_2000MHZ);
1287
1288 /*
1289 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1290 * in power off. Set d3cold_delay to 0 since default 100ms is not
1291 * necessary.
1292 */
1293 isp->pdev->d3cold_delay = 0;
1294 break;
1295 case ATOMISP_PCI_DEVICE_SOC_ANN:
1296 isp->media_dev.hw_revision = (
1297 #ifdef ISP2401_NEW_INPUT_SYSTEM
1298 ATOMISP_HW_REVISION_ISP2401
1299 #else
1300 ATOMISP_HW_REVISION_ISP2401_LEGACY
1301 #endif
1302 << ATOMISP_HW_REVISION_SHIFT);
1303 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1304 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1305 isp->dfs = &dfs_config_merr;
1306 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1307 break;
1308 case ATOMISP_PCI_DEVICE_SOC_CHT:
1309 isp->media_dev.hw_revision = (
1310 #ifdef ISP2401_NEW_INPUT_SYSTEM
1311 ATOMISP_HW_REVISION_ISP2401
1312 #else
1313 ATOMISP_HW_REVISION_ISP2401_LEGACY
1314 #endif
1315 << ATOMISP_HW_REVISION_SHIFT);
1316 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1317 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1318
1319 isp->dfs = &dfs_config_cht;
1320 isp->pdev->d3cold_delay = 0;
1321
1322 iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1323 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1324 case 0x00:
1325 isp->hpll_freq = HPLL_FREQ_800MHZ;
1326 break;
1327 case 0x01:
1328 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1329 break;
1330 case 0x02:
1331 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1332 break;
1333 default:
1334 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1335 dev_warn(isp->dev,
1336 "read HPLL from cck failed.default 1600MHz.\n");
1337 }
1338 break;
1339 default:
1340 dev_err(&dev->dev, "un-supported IUNIT device\n");
1341 return -ENODEV;
1342 }
1343
1344 dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1345 isp->hpll_freq);
1346
1347 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1348
1349 /* Load isp firmware from user space */
1350 if (!defer_fw_load) {
1351 isp->firmware = atomisp_load_firmware(isp);
1352 if (!isp->firmware) {
1353 err = -ENOENT;
1354 goto load_fw_fail;
1355 }
1356
1357 err = atomisp_css_check_firmware_version(isp);
1358 if (err) {
1359 dev_dbg(&dev->dev, "Firmware version check failed\n");
1360 goto fw_validation_fail;
1361 }
1362 }
1363
1364 pci_set_master(dev);
1365 pci_set_drvdata(dev, isp);
1366
1367 err = pci_enable_msi(dev);
1368 if (err) {
1369 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1370 goto enable_msi_fail;
1371 }
1372
1373 atomisp_msi_irq_init(isp, dev);
1374
1375 pm_qos_add_request(&isp->pm_qos, PM_QOS_CPU_DMA_LATENCY,
1376 PM_QOS_DEFAULT_VALUE);
1377
1378 /*
1379 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1380 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1381 * backend write 0 will enable Arasan CSI backend, which has
1382 * bugs(like sighting:4567697 and 4567699) and will be removed
1383 * in B0
1384 */
1385 atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1386
1387 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1388 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1389 u32 csi_afe_trim;
1390
1391 /*
1392 * Workaround for imbalance data eye issue which is observed
1393 * on TNG B0.
1394 */
1395 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1396 &csi_afe_trim);
1397 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1398 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1399 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1400 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1401 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1402 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1403 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1404 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1405 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1406 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1407 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1408 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1409 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1410 csi_afe_trim);
1411 }
1412
1413 err = atomisp_initialize_modules(isp);
1414 if (err < 0) {
1415 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1416 goto initialize_modules_fail;
1417 }
1418
1419 err = atomisp_register_entities(isp);
1420 if (err < 0) {
1421 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1422 err);
1423 goto register_entities_fail;
1424 }
1425 err = atomisp_create_pads_links(isp);
1426 if (err < 0)
1427 goto register_entities_fail;
1428 /* init atomisp wdts */
1429 if (init_atomisp_wdts(isp) != 0)
1430 goto wdt_work_queue_fail;
1431
1432 /* save the iunit context only once after all the values are init'ed. */
1433 atomisp_save_iunit_reg(isp);
1434
1435 pm_runtime_put_noidle(&dev->dev);
1436 pm_runtime_allow(&dev->dev);
1437
1438 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1439 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1440 if (err) {
1441 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1442 goto hmm_pool_fail;
1443 }
1444
1445 /* Init ISP memory management */
1446 hmm_init();
1447
1448 err = devm_request_threaded_irq(&dev->dev, dev->irq,
1449 atomisp_isr, atomisp_isr_thread,
1450 IRQF_SHARED, "isp_irq", isp);
1451 if (err) {
1452 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1453 goto request_irq_fail;
1454 }
1455
1456 /* Load firmware into ISP memory */
1457 if (!defer_fw_load) {
1458 err = atomisp_css_load_firmware(isp);
1459 if (err) {
1460 dev_err(&dev->dev, "Failed to init css.\n");
1461 goto css_init_fail;
1462 }
1463 } else {
1464 dev_dbg(&dev->dev, "Skip css init.\n");
1465 }
1466 /* Clear FW image from memory */
1467 release_firmware(isp->firmware);
1468 isp->firmware = NULL;
1469 isp->css_env.isp_css_fw.data = NULL;
1470
1471 atomisp_drvfs_init(&atomisp_pci_driver, isp);
1472
1473 return 0;
1474
1475 css_init_fail:
1476 devm_free_irq(&dev->dev, dev->irq, isp);
1477 request_irq_fail:
1478 hmm_cleanup();
1479 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1480 hmm_pool_fail:
1481 destroy_workqueue(isp->wdt_work_queue);
1482 wdt_work_queue_fail:
1483 atomisp_acc_cleanup(isp);
1484 atomisp_unregister_entities(isp);
1485 register_entities_fail:
1486 atomisp_uninitialize_modules(isp);
1487 initialize_modules_fail:
1488 pm_qos_remove_request(&isp->pm_qos);
1489 atomisp_msi_irq_uninit(isp, dev);
1490 enable_msi_fail:
1491 fw_validation_fail:
1492 release_firmware(isp->firmware);
1493 load_fw_fail:
1494 /*
1495 * Switch off ISP, as keeping it powered on would prevent
1496 * reaching S0ix states.
1497 *
1498 * The following lines have been copied from atomisp suspend path
1499 */
1500
1501 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1502 irq = irq & 1 << INTR_IIR;
1503 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1504
1505 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1506 irq &= ~(1 << INTR_IER);
1507 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1508
1509 atomisp_msi_irq_uninit(isp, dev);
1510
1511 atomisp_ospm_dphy_down(isp);
1512
1513 /* Address later when we worry about the ...field chips */
1514 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1515 dev_err(&dev->dev, "Failed to switch off ISP\n");
1516 pci_dev_put(isp->pci_root);
1517 return err;
1518 }
1519
1520 static void atomisp_pci_remove(struct pci_dev *dev)
1521 {
1522 struct atomisp_device *isp = (struct atomisp_device *)
1523 pci_get_drvdata(dev);
1524
1525 atomisp_drvfs_exit();
1526
1527 atomisp_acc_cleanup(isp);
1528
1529 atomisp_css_unload_firmware(isp);
1530 hmm_cleanup();
1531
1532 pm_runtime_forbid(&dev->dev);
1533 pm_runtime_get_noresume(&dev->dev);
1534 pm_qos_remove_request(&isp->pm_qos);
1535
1536 atomisp_msi_irq_uninit(isp, dev);
1537 pci_dev_put(isp->pci_root);
1538
1539 atomisp_unregister_entities(isp);
1540
1541 destroy_workqueue(isp->wdt_work_queue);
1542 atomisp_file_input_cleanup(isp);
1543
1544 release_firmware(isp->firmware);
1545
1546 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1547 }
1548
1549 static const struct pci_device_id atomisp_pci_tbl[] = {
1550 #if defined(ISP2400) || defined(ISP2400B0)
1551 /* Merrifield */
1552 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178)},
1553 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179)},
1554 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a)},
1555 /* Baytrail */
1556 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38)},
1557 #elif defined(ISP2401)
1558 /* Anniedale (Merrifield+ / Moorefield) */
1559 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478)},
1560 /* Cherrytrail */
1561 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8)},
1562 #endif
1563 {0,}
1564 };
1565
1566 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1567
1568 static const struct dev_pm_ops atomisp_pm_ops = {
1569 .runtime_suspend = atomisp_runtime_suspend,
1570 .runtime_resume = atomisp_runtime_resume,
1571 .suspend = atomisp_suspend,
1572 .resume = atomisp_resume,
1573 };
1574
1575 static struct pci_driver atomisp_pci_driver = {
1576 .driver = {
1577 .pm = &atomisp_pm_ops,
1578 },
1579 .name = "atomisp-isp2",
1580 .id_table = atomisp_pci_tbl,
1581 .probe = atomisp_pci_probe,
1582 .remove = atomisp_pci_remove,
1583 };
1584
1585 static int __init atomisp_init(void)
1586 {
1587 return pci_register_driver(&atomisp_pci_driver);
1588 }
1589
1590 static void __exit atomisp_exit(void)
1591 {
1592 pci_unregister_driver(&atomisp_pci_driver);
1593 }
1594
1595 module_init(atomisp_init);
1596 module_exit(atomisp_exit);
1597
1598 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1599 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1600 MODULE_LICENSE("GPL");
1601 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");
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