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git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blob - drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h
2 * Support for Intel Camera Imaging ISP subsystem.
3 * Copyright (c) 2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #define ISP_CELL_TYPE isp2401_mamoiada
20 #define ISP_VMEM simd_vmem
21 #define _HRT_ISP_VMEM isp2401_mamoiada_simd_vmem
23 /* instruction pipeline depth */
24 #define ISP_BRANCHDELAY 5
27 #define ISP_BUS_WIDTH 32
28 #define ISP_BUS_ADDR_WIDTH 32
29 #define ISP_BUS_BURST_SIZE 1
32 #define ISP_SCALAR_WIDTH 32
33 #define ISP_SLICE_NELEMS 4
34 #define ISP_VEC_NELEMS 64
35 #define ISP_VEC_ELEMBITS 14
36 #define ISP_VEC_ELEM8BITS 16
37 #define ISP_CLONE_DATAPATH_IS_16 1
40 #define ISP_DMEM_DEPTH 4096
41 #define ISP_DMEM_BSEL_DOWNSAMPLE 8
42 #define ISP_VMEM_DEPTH 3072
43 #define ISP_VMEM_BSEL_DOWNSAMPLE 8
44 #define ISP_VMEM_ELEMBITS 14
45 #define ISP_VMEM_ELEM_PRECISION 14
46 #define ISP_VMEM_IS_BAMEM 1
48 #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8
49 #define ISP_VMEM_BAMEM_LATENCY 5
50 #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2
51 #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8
52 #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16
53 #define ISP_VMEM_BAMEM_LININT 0
54 #define ISP_VMEM_BAMEM_DAP_BITS 3
55 #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0
56 #define ISP_VMEM_BAMEM_PID_BITS 3
57 #define ISP_VMEM_BAMEM_OFFSET_BITS 19
58 #define ISP_VMEM_BAMEM_ADDRESS_BITS 25
59 #define ISP_VMEM_BAMEM_RID_BITS 4
60 #define ISP_VMEM_BAMEM_TRANSPOSITION 1
61 #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1
62 #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1
63 #define ISP_VMEM_BAMEM_LUT_ELEMS 16
64 #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14
65 #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1
66 #define ISP_VMEM_BAMEM_SMART_FETCH 1
67 #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0
68 #endif /* ISP_VMEM_IS_BAMEM */
69 #define ISP_PMEM_DEPTH 2048
70 #define ISP_PMEM_WIDTH 640
71 #define ISP_VAMEM_ADDRESS_BITS 12
72 #define ISP_VAMEM_ELEMBITS 12
73 #define ISP_VAMEM_DEPTH 2048
74 #define ISP_VAMEM_ALIGNMENT 2
75 #define ISP_VA_ADDRESS_WIDTH 896
76 #define ISP_VEC_VALSU_LATENCY ISP_VEC_NELEMS
77 #define ISP_HIST_ADDRESS_BITS 12
78 #define ISP_HIST_ALIGNMENT 4
79 #define ISP_HIST_COMP_IN_PREC 12
80 #define ISP_HIST_DEPTH 1024
81 #define ISP_HIST_WIDTH 24
82 #define ISP_HIST_COMPONENTS 4
85 #define ISP_PC_WIDTH 13
87 /* Template switches */
88 #define ISP_SHIELD_INPUT_DMEM 0
89 #define ISP_SHIELD_OUTPUT_DMEM 1
90 #define ISP_SHIELD_INPUT_VMEM 0
91 #define ISP_SHIELD_OUTPUT_VMEM 0
92 #define ISP_SHIELD_INPUT_PMEM 1
93 #define ISP_SHIELD_OUTPUT_PMEM 1
94 #define ISP_SHIELD_INPUT_HIST 1
95 #define ISP_SHIELD_OUTPUT_HIST 1
96 /* When LUT is select the shielding is always on */
97 #define ISP_SHIELD_INPUT_VAMEM 1
98 #define ISP_SHIELD_OUTPUT_VAMEM 1
100 #define ISP_HAS_IRQ 1
101 #define ISP_HAS_SOFT_RESET 1
102 #define ISP_HAS_VEC_DIV 0
103 #define ISP_HAS_VFU_W_2O 1
104 #define ISP_HAS_DEINT3 1
105 #define ISP_HAS_LUT 1
106 #define ISP_HAS_HIST 1
107 #define ISP_HAS_VALSU 1
108 #define ISP_HAS_3rdVALSU 1
109 #define ISP_VRF1_HAS_2P 1
111 #define ISP_SRU_GUARDING 1
112 #define ISP_VLSU_GUARDING 1
114 #define ISP_VRF_RAM 1
115 #define ISP_SRF_RAM 1
117 #define ISP_SPLIT_VMUL_VADD_IS 0
118 #define ISP_RFSPLIT_FPGA 0
120 /* RSN or Bus pipelining */
121 #define ISP_RSN_PIPE 1
122 #define ISP_VSF_BUS_PIPE 0
124 /* extra slave port to vmem */
125 #define ISP_IF_VMEM 0
126 #define ISP_GDC_VMEM 0
128 /* Streaming ports */
136 /* Removing Issue Slot(s) */
137 #define ISP_HAS_NOT_SIMD_IS2 0
138 #define ISP_HAS_NOT_SIMD_IS3 0
139 #define ISP_HAS_NOT_SIMD_IS4 0
140 #define ISP_HAS_NOT_SIMD_IS4_VADD 0
141 #define ISP_HAS_NOT_SIMD_IS5 0
142 #define ISP_HAS_NOT_SIMD_IS6 0
143 #define ISP_HAS_NOT_SIMD_IS7 0
144 #define ISP_HAS_NOT_SIMD_IS8 0
148 #define ISP_ICACHE_ONLY 0
149 #define ISP_ICACHE_PREFETCH 1
150 #define ISP_ICACHE_INDEX_BITS 8
151 #define ISP_ICACHE_SET_BITS 5
152 #define ISP_ICACHE_BLOCKS_PER_SET_BITS 1
154 /* Experimental Flags */
163 #define ISP_LOG2_PMEM_WIDTH 10
164 #define ISP_VEC_WIDTH 896
165 #define ISP_SLICE_WIDTH 56
166 #define ISP_VMEM_WIDTH 896
167 #define ISP_VMEM_ALIGN 128
168 #if ISP_VMEM_IS_BAMEM
169 #define ISP_VMEM_ALIGN_ELEM 2
170 #endif /* ISP_VMEM_IS_BAMEM */
171 #define ISP_SIMDLSU 1
172 #define ISP_LSU_IMM_BITS 12
174 /* convenient shortcuts for software*/
175 #define ISP_NWAY ISP_VEC_NELEMS
176 #define NBITS ISP_VEC_ELEMBITS
178 #define _isp_ceil_div(a,b) (((a)+(b)-1)/(b))
181 #define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64)*8)
183 #define ISP_VEC_ALIGN ISP_VMEM_ALIGN
186 /* HRT specific vector support */
187 #define isp2401_mamoiada_vector_alignment ISP_VEC_ALIGN
188 #define isp2401_mamoiada_vector_elem_bits ISP_VMEM_ELEMBITS
189 #define isp2401_mamoiada_vector_elem_precision ISP_VMEM_ELEM_PRECISION
190 #define isp2401_mamoiada_vector_num_elems ISP_VEC_NELEMS
192 /* register file sizes */
193 #define ISP_RF0_SIZE 64
194 #define ISP_RF1_SIZE 16
195 #define ISP_RF2_SIZE 64
196 #define ISP_RF3_SIZE 4
197 #define ISP_RF4_SIZE 64
198 #define ISP_RF5_SIZE 16
199 #define ISP_RF6_SIZE 16
200 #define ISP_RF7_SIZE 16
201 #define ISP_RF8_SIZE 16
202 #define ISP_RF9_SIZE 16
203 #define ISP_RF10_SIZE 16
204 #define ISP_RF11_SIZE 16
205 #define ISP_VRF1_SIZE 32
206 #define ISP_VRF2_SIZE 32
207 #define ISP_VRF3_SIZE 32
208 #define ISP_VRF4_SIZE 32
209 #define ISP_VRF5_SIZE 32
210 #define ISP_VRF6_SIZE 32
211 #define ISP_VRF7_SIZE 32
212 #define ISP_VRF8_SIZE 32
213 #define ISP_SRF1_SIZE 4
214 #define ISP_SRF2_SIZE 64
215 #define ISP_SRF3_SIZE 64
216 #define ISP_SRF4_SIZE 32
217 #define ISP_SRF5_SIZE 64
218 #define ISP_FRF0_SIZE 16
219 #define ISP_FRF1_SIZE 4
220 #define ISP_FRF2_SIZE 16
221 #define ISP_FRF3_SIZE 4
222 #define ISP_FRF4_SIZE 4
223 #define ISP_FRF5_SIZE 8
224 #define ISP_FRF6_SIZE 4
225 /* register file read latency */
226 #define ISP_VRF1_READ_LAT 1
227 #define ISP_VRF2_READ_LAT 1
228 #define ISP_VRF3_READ_LAT 1
229 #define ISP_VRF4_READ_LAT 1
230 #define ISP_VRF5_READ_LAT 1
231 #define ISP_VRF6_READ_LAT 1
232 #define ISP_VRF7_READ_LAT 1
233 #define ISP_VRF8_READ_LAT 1
234 #define ISP_SRF1_READ_LAT 1
235 #define ISP_SRF2_READ_LAT 1
236 #define ISP_SRF3_READ_LAT 1
237 #define ISP_SRF4_READ_LAT 1
238 #define ISP_SRF5_READ_LAT 1
239 #define ISP_SRF5_READ_LAT 1
240 /* immediate sizes */
241 #define ISP_IS1_IMM_BITS 14
242 #define ISP_IS2_IMM_BITS 13
243 #define ISP_IS3_IMM_BITS 14
244 #define ISP_IS4_IMM_BITS 14
245 #define ISP_IS5_IMM_BITS 9
246 #define ISP_IS6_IMM_BITS 16
247 #define ISP_IS7_IMM_BITS 9
248 #define ISP_IS8_IMM_BITS 16
249 #define ISP_IS9_IMM_BITS 11
251 #define ISP_IF_FIFO_DEPTH 0
252 #define ISP_IF_B_FIFO_DEPTH 0
253 #define ISP_DMA_FIFO_DEPTH 0
254 #define ISP_OF_FIFO_DEPTH 0
255 #define ISP_GDC_FIFO_DEPTH 0
256 #define ISP_SCL_FIFO_DEPTH 0
257 #define ISP_GPFIFO_FIFO_DEPTH 0
258 #define ISP_SP_FIFO_DEPTH 0