drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_host_ids_hrt.h

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef _hive_isp_css_host_ids_hrt_h_
  16 #define _hive_isp_css_host_ids_hrt_h_
  17
  18 /* ISP_CSS identifiers */
  19 #define INP_SYS       testbench_isp_isp_css_part_is_2400_inp_sys
  20 #define ISYS_GP_REGS  testbench_isp_isp_css_part_is_2400_inp_sys_gpreg
  21 #define ISYS_IRQ_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_irq_ctrl
  22 #define ISYS_CAP_A    testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_a
  23 #define ISYS_CAP_B    testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_b
  24 #define ISYS_CAP_C    testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_c
  25 #define ISYS_INP_BUF  testbench_isp_isp_css_part_input_buffer
  26 #define ISYS_INP_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_inp_ctrl
  27 #define ISYS_ACQ      testbench_isp_isp_css_part_is_2400_inp_sys_acq_unit
  28
  29 #define ISP           testbench_isp_isp_css_sec_part_isp
  30 #define SP            testbench_isp_isp_css_sec_part_scp
  31
  32 #define IF_PRIM       testbench_isp_isp_css_part_is_2400_ifmt_ift_prim
  33 #define IF_PRIM_B     testbench_isp_isp_css_part_is_2400_ifmt_ift_prim_b
  34 #define IF_SEC        testbench_isp_isp_css_part_is_2400_ifmt_ift_sec
  35 #define IF_SEC_MASTER testbench_isp_isp_css_part_is_2400_ifmt_ift_sec_mt_out
  36 #define STR_TO_MEM    testbench_isp_isp_css_part_is_2400_ifmt_mem_cpy
  37 #define IFMT_GP_REGS  testbench_isp_isp_css_part_is_2400_ifmt_gp_reg
  38 #define IFMT_IRQ_CTRL testbench_isp_isp_css_part_is_2400_ifmt_irq_ctrl
  39
  40 #define CSS_RECEIVER  testbench_isp_isp_css_part_is_2400_inp_sys_csi_receiver
  41
  42 #define TC            testbench_isp_isp_css_sec_part_gpd_tc
  43 #define GPTIMER       testbench_isp_isp_css_sec_part_gpd_gptimer
  44 #define DMA           testbench_isp_isp_css_sec_part_isp_dma
  45 #define GDC           testbench_isp_isp_css_sec_part_gdc1
  46 #define GDC2          testbench_isp_isp_css_sec_part_gdc2
  47 #define IRQ_CTRL      testbench_isp_isp_css_sec_part_gpd_irq_ctrl
  48 #define GPIO          testbench_isp_isp_css_sec_part_gpd_c_gpio
  49 #define GP_REGS       testbench_isp_isp_css_sec_part_gpd_gp_reg
  50 #define ISEL_GP_REGS  testbench_isp_isp_css_part_is_2400_isel_gpr
  51 #define ISEL_IRQ_CTRL testbench_isp_isp_css_part_is_2400_isel_irq_ctrl
  52 #define DATA_MMU      testbench_isp_isp_css_sec_part_data_out_sys_c_mmu
  53 #define ICACHE_MMU    testbench_isp_isp_css_sec_part_icache_out_sys_c_mmu
  54
  55 /* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */
  56 #define ISP_SP_FIFO   testbench_isp_isp_css_sec_part_fa_sp_isp
  57 #define ISEL_FIFO     testbench_isp_isp_css_part_is_2400_isel_sf_fa_in
  58
  59 #define FIFO_GPF_SP   testbench_isp_isp_css_sec_part_sf_fa2sp_in
  60 #define FIFO_GPF_ISP  testbench_isp_isp_css_sec_part_sf_fa2isp_in
  61 #define FIFO_SP_GPF   testbench_isp_isp_css_sec_part_sf_sp2fa_in
  62 #define FIFO_ISP_GPF  testbench_isp_isp_css_sec_part_sf_isp2fa_in
  63
  64 #define DATA_OCP_MASTER    testbench_isp_isp_css_sec_part_data_out_sys_cio2ocp_wide_data_out_mt
  65 #define ICACHE_OCP_MASTER  testbench_isp_isp_css_sec_part_icache_out_sys_cio2ocp_wide_data_out_mt
  66
  67 #define SP_IN_FIFO    testbench_isp_isp_css_sec_part_sf_fa2sp_in
  68 #define SP_OUT_FIFO   testbench_isp_isp_css_sec_part_sf_sp2fa_out
  69 #define ISP_IN_FIFO   testbench_isp_isp_css_sec_part_sf_fa2isp_in
  70 #define ISP_OUT_FIFO  testbench_isp_isp_css_sec_part_sf_isp2fa_out
  71 #define GEN_SHORT_PACK_PORT testbench_isp_isp_css_part_is_2400_inp_sys_csi_str_mon_fa_gensh_out
  72
  73 /* input_system_2401 identifiers */
  74 #define ISYS2401_GP_REGS    testbench_isp_isp_css_part_is_2401_gpreg
  75 #define ISYS2401_DMA        testbench_isp_isp_css_part_is_2401_dma
  76 #define ISYS2401_IRQ_CTRL   testbench_isp_isp_css_part_is_2401_isys_irq_ctrl
  77
  78 #define ISYS2401_CSI_RX_A     testbench_isp_isp_css_part_is_2401_is_pipe_a_csi_rx
  79 #define ISYS2401_MIPI_BE_A    testbench_isp_isp_css_part_is_2401_is_pipe_a_mipi_be
  80 #define ISYS2401_S2M_A        testbench_isp_isp_css_part_is_2401_is_pipe_a_s2m
  81 #define ISYS2401_PXG_A        testbench_isp_isp_css_part_is_2401_is_pipe_a_pxlgen
  82 #define ISYS2401_IBUF_CNTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_ibuf_ctrl
  83 #define ISYS2401_IRQ_CTRL_A   testbench_isp_isp_css_part_is_2401_is_pipe_a_irq_ctrl_pipe
  84
  85 #define ISYS2401_CSI_RX_B     testbench_isp_isp_css_part_is_2401_is_pipe_b_csi_rx
  86 #define ISYS2401_MIPI_BE_B    testbench_isp_isp_css_part_is_2401_is_pipe_b_mipi_be
  87 #define ISYS2401_S2M_B        testbench_isp_isp_css_part_is_2401_is_pipe_b_s2m
  88 #define ISYS2401_PXG_B        testbench_isp_isp_css_part_is_2401_is_pipe_b_pxlgen
  89 #define ISYS2401_IBUF_CNTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_ibuf_ctrl
  90 #define ISYS2401_IRQ_CTRL_B   testbench_isp_isp_css_part_is_2401_is_pipe_b_irq_ctrl_pipe
  91
  92 #define ISYS2401_CSI_RX_C     testbench_isp_isp_css_part_is_2401_is_pipe_c_csi_rx
  93 #define ISYS2401_MIPI_BE_C    testbench_isp_isp_css_part_is_2401_is_pipe_c_mipi_be
  94 #define ISYS2401_S2M_C        testbench_isp_isp_css_part_is_2401_is_pipe_c_s2m
  95 #define ISYS2401_PXG_C        testbench_isp_isp_css_part_is_2401_is_pipe_c_pxlgen
  96 #define ISYS2401_IBUF_CNTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_ibuf_ctrl
  97 #define ISYS2401_IRQ_CTRL_C   testbench_isp_isp_css_part_is_2401_is_pipe_c_irq_ctrl_pipe
  98
  99
 100 /* Testbench identifiers */
 101 #define DDR             testbench_ddram
 102 #define DDR_SMALL       testbench_ddram_small
 103 #define XMEM            DDR
 104 #define GPIO_ADAPTER    testbench_gp_adapter
 105 #define SIG_MONITOR     testbench_sig_mon
 106 #define DDR_SLAVE       testbench_ddram_ip0
 107 #define DDR_SMALL_SLAVE testbench_ddram_small_ip0
 108 #define HOST_MASTER     host_op0
 109
 110 #define CSI_SENSOR         testbench_vied_sensor
 111 #define CSI_SENSOR_GP_REGS testbench_vied_sensor_gpreg
 112 #define CSI_STR_IN_A       testbench_vied_sensor_tx_a_csi_tx_data_in
 113 #define CSI_STR_IN_B       testbench_vied_sensor_tx_b_csi_tx_data_in
 114 #define CSI_STR_IN_C       testbench_vied_sensor_tx_c_csi_tx_data_in
 115 #define CSI_SENSOR_TX_A    testbench_vied_sensor_tx_a
 116 #define CSI_SENSOR_TX_B    testbench_vied_sensor_tx_b
 117 #define CSI_SENSOR_TX_C    testbench_vied_sensor_tx_c
 118
 119 #endif /* _hive_isp_css_host_ids_hrt_h_ */