drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef __ISP_GLOBAL_H_INCLUDED__
  16 #define __ISP_GLOBAL_H_INCLUDED__
  17
  18 #include <system_types.h>
  19
  20 #if defined (HAS_ISP_2401_MAMOIADA)
  21 #define IS_ISP_2401_MAMOIADA
  22
  23 #include "isp2401_mamoiada_params.h"
  24 #elif defined (HAS_ISP_2400_MAMOIADA)
  25 #define IS_ISP_2400_MAMOIADA
  26
  27 #include "isp2400_mamoiada_params.h"
  28 #else
  29 #error "isp_global_h: ISP_2400_MAMOIDA must be one of {2400, 2401 }"
  30 #endif
  31
  32 #define ISP_PMEM_WIDTH_LOG2             ISP_LOG2_PMEM_WIDTH
  33 #define ISP_PMEM_SIZE                   ISP_PMEM_DEPTH
  34
  35 #define ISP_NWAY_LOG2                   6
  36 #define ISP_VEC_NELEMS_LOG2             ISP_NWAY_LOG2
  37
  38 #ifdef ISP2401
  39 #ifdef PIPE_GENERATION
  40 #define PIPEMEM(x) MEM(x)
  41 #define ISP_NWAY   (1<<ISP_NWAY_LOG2)
  42 #else
  43 #define PIPEMEM(x)
  44 #endif
  45
  46 #endif
  47 /* The number of data bytes in a vector disregarding the reduced precision */
  48 #define ISP_VEC_BYTES                   (ISP_VEC_NELEMS*sizeof(uint16_t))
  49
  50 /* ISP SC Registers */
  51 #define ISP_SC_REG                      0x00
  52 #define ISP_PC_REG                      0x07
  53 #define ISP_IRQ_READY_REG               0x00
  54 #define ISP_IRQ_CLEAR_REG               0x00
  55
  56 /* ISP SC Register bits */
  57 #define ISP_RST_BIT                     0x00
  58 #define ISP_START_BIT                   0x01
  59 #define ISP_BREAK_BIT                   0x02
  60 #define ISP_RUN_BIT                     0x03
  61 #define ISP_BROKEN_BIT                  0x04
  62 #define ISP_IDLE_BIT                    0x05     /* READY */
  63 #define ISP_SLEEPING_BIT                0x06
  64 #define ISP_STALLING_BIT                0x07
  65 #define ISP_IRQ_CLEAR_BIT               0x08
  66 #define ISP_IRQ_READY_BIT               0x0A
  67 #define ISP_IRQ_SLEEPING_BIT            0x0B
  68
  69 /* ISP Register bits */
  70 #define ISP_CTRL_SINK_BIT               0x00
  71 #define ISP_PMEM_SINK_BIT               0x01
  72 #define ISP_DMEM_SINK_BIT               0x02
  73 #define ISP_FIFO0_SINK_BIT              0x03
  74 #define ISP_FIFO1_SINK_BIT              0x04
  75 #define ISP_FIFO2_SINK_BIT              0x05
  76 #define ISP_FIFO3_SINK_BIT              0x06
  77 #define ISP_FIFO4_SINK_BIT              0x07
  78 #define ISP_FIFO5_SINK_BIT              0x08
  79 #define ISP_FIFO6_SINK_BIT              0x09
  80 #define ISP_VMEM_SINK_BIT               0x0A
  81 #define ISP_VAMEM1_SINK_BIT             0x0B
  82 #define ISP_VAMEM2_SINK_BIT             0x0C
  83 #define ISP_VAMEM3_SINK_BIT             0x0D
  84 #define ISP_HMEM_SINK_BIT               0x0E
  85
  86 #define ISP_CTRL_SINK_REG               0x08
  87 #define ISP_PMEM_SINK_REG               0x08
  88 #define ISP_DMEM_SINK_REG               0x08
  89 #define ISP_FIFO0_SINK_REG              0x08
  90 #define ISP_FIFO1_SINK_REG              0x08
  91 #define ISP_FIFO2_SINK_REG              0x08
  92 #define ISP_FIFO3_SINK_REG              0x08
  93 #define ISP_FIFO4_SINK_REG              0x08
  94 #define ISP_FIFO5_SINK_REG              0x08
  95 #define ISP_FIFO6_SINK_REG              0x08
  96 #define ISP_VMEM_SINK_REG               0x08
  97 #define ISP_VAMEM1_SINK_REG             0x08
  98 #define ISP_VAMEM2_SINK_REG             0x08
  99 #define ISP_VAMEM3_SINK_REG             0x08
 100 #define ISP_HMEM_SINK_REG               0x08
 101
 102 #ifdef ISP2401
 103 #define ISP_BAMEM_ALIGN_ELEM ISP_VMEM_ALIGN_ELEM
 104 #define BAMEM VMEM
 105
 106 #define XNR3_DOWN_BAMEM_BASE_ADDRESS    (0x16880)
 107 #define XNR3_UP_BAMEM_BASE_ADDRESS      (0x12880)
 108
 109 #define bmem_ldrow(fu, pid, offset, data) bmem_ldrow_s(fu, pid, offset, data)
 110 #define bmem_strow(fu, pid, offset, data) bmem_strow_s(fu, pid, offset, data)
 111 #define bmem_ldblk(fu, pid, offset, data) bmem_ldblk_s(fu, pid, offset, data)
 112 #define bmem_stblk(fu, pid, offset, data) bmem_stblk_s(fu, pid, offset, data)
 113
 114 #endif
 115 #endif /* __ISP_GLOBAL_H_INCLUDED__ */