drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ref_vector_func_types.h

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef __REF_VECTOR_FUNC_TYPES_H_INCLUDED__
  16 #define __REF_VECTOR_FUNC_TYPES_H_INCLUDED__
  17
  18
  19 /*
  20  * Prerequisites:
  21  *
  22  */
  23 #include "mpmath.h"
  24 #include "bbb_config.h"
  25 #include "isp_op1w_types.h"
  26 #include "isp_op2w_types.h"
  27
  28 /* Defines for the Config Unit */
  29 #define MAX_CONFIG_POINTS 5
  30 #define INPUT_OFFSET_FACTOR 10
  31 #define INPUT_SCALE_FACTOR 10
  32 #define OUTPUT_SCALE_FACTOR 10
  33 #define SLOPE_A_RESOLUTION 10
  34 #define CONFIG_UNIT_LUT_SIZE_32 32 /*XCU works for ISP_NWAY = 32 */
  35 #define LXCU_LUT_SIZE      16
  36 #ifdef ISP2401
  37 #define IMAX32_ELEM_SIZE   32
  38 #endif
  39
  40 #define ONE_IN_Q14 (1<<(NUM_BITS-2))
  41 #define Q29_TO_Q15_SHIFT_VAL (NUM_BITS-2)
  42 #define Q28_TO_Q15_SHIFT_VAL (NUM_BITS-3)
  43 #define MAX_ELEM(width_in_bits) ((1<<(width_in_bits))-1)
  44
  45 /* Block matching algorithm related data */
  46 /* NUM_OF_SADS = ((SEARCH_AREA_HEIGHT - REF_BLOCK_HEIGHT)/PIXEL_SHIFT + 1)* \
  47                                         ((SEARCH_AREA_WIDTH - REF_BLOCK_WIDTH)/PIXEL_SHIFT + 1) */
  48
  49 #define SADS(sw_h,sw_w, ref_h, ref_w, p_sh) (((sw_h - ref_h)/p_sh + 1)*((sw_w - ref_w)/p_sh + 1))
  50 #define SADS_16x16_1    SADS(16, 16, 8, 8, 1)
  51 #define SADS_16x16_2    SADS(16, 16, 8, 8, 2)
  52 #define SADS_14x14_1    SADS(14, 14, 8, 8, 1)
  53 #define SADS_14x14_2    SADS(14, 14, 8, 8, 2)
  54
  55 #define BMA_OUTPUT_MATRIX_DIM(sw_h, ref_h, p_sh)        ((sw_h - ref_h)/p_sh + 1)
  56 #define BMA_OUT_16x16_2_32              BMA_OUTPUT_MATRIX_DIM(16, 8, 2)
  57 #define BMA_OUT_14x14_2_32              BMA_OUTPUT_MATRIX_DIM(14, 8, 2)
  58 #define BMA_OUT_16x16_1_32              BMA_OUTPUT_MATRIX_DIM(16, 8, 1)
  59 #define BMA_OUT_14x14_1_32              BMA_OUTPUT_MATRIX_DIM(14, 8, 1)
  60 #define BMA_SEARCH_BLOCK_SZ_16  16
  61 #define BMA_REF_BLOCK_SZ_8      8
  62 #define PIXEL_SHIFT_2           2
  63 #define PIXEL_SHIFT_1           1
  64 #define BMA_SEARCH_WIN_SZ_16    16
  65 #define BMA_SEARCH_WIN_SZ_14    14
  66
  67
  68 /*
  69  * Struct type specification
  70  */
  71
  72 typedef unsigned short tscalar1w_3bit;       /* tscalar1w in interval [0, 2^3)                       */
  73 typedef short tscalar1w_5bit_signed;         /* tscalar1w in interval [-2^(5-1), 2^(5-1))            */
  74 typedef unsigned short tscalar1w_5bit;       /* tscalar1w in interval [0, 2^5)                       */
  75 typedef short tscalar1w_range1wbit;          /* tscalar1w in interval [-NUM_BITS, NUM_BITS]          */
  76 typedef short tscalar1w_unsigned_range1wbit; /* tscalar1w in interval [0, NUM_BITS]                  */
  77 typedef unsigned short tvector_8bit;            /* 8 bit positive number */
  78 typedef unsigned short tvector_5bit;
  79 typedef unsigned short tvector_4bit;
  80 typedef unsigned short tscalar1w_16bit;
  81 typedef unsigned short tscalar1w_4bit_bma_shift;
  82
  83 typedef struct {
  84   tvector1w     v0  ;
  85   tvector1w     v1 ;
  86 } s_1w_2x1_matrix;
  87
  88 #define S_1W_2X1_MATRIX_DEFAULT ((s_1w_2x1_matrix)\
  89         { 0, 0 })
  90
  91 typedef struct {
  92         tvector1w v00;
  93         tvector1w v01;
  94 } s_1w_1x2_matrix;
  95
  96 #define S_1W_1X2_MATRIX_DEFAULT ((s_1w_1x2_matrix)\
  97         { 0, 0 })
  98
  99 typedef struct {
 100   tvector1w     v00  ;
 101   tvector1w     v01 ;
 102   tvector1w     v02 ;
 103 } s_1w_1x3_matrix;
 104
 105 #define S_1W_1X3_MATRIX_DEFAULT ((s_1w_1x3_matrix)\
 106         { 0, 0, 0, })
 107
 108 typedef struct {
 109   tvector1w v00; tvector1w v01; tvector1w v02;
 110   tvector1w v10; tvector1w v11; tvector1w v12;
 111 } s_1w_2x3_matrix;
 112
 113 #define S_1W_2X3_MATRIX_DEFAULT ((s_1w_2x3_matrix)\
 114         { 0, 0, 0, \
 115           0, 0, 0 })
 116
 117 typedef struct {
 118   tvector1w     v00  ; tvector1w     v01 ; tvector1w     v02  ;
 119   tvector1w     v10  ; tvector1w     v11 ; tvector1w     v12  ;
 120   tvector1w     v20  ; tvector1w     v21 ; tvector1w     v22  ;
 121 } s_1w_3x3_matrix;
 122
 123 #define S_1W_3X3_MATRIX_DEFAULT ((s_1w_3x3_matrix)\
 124         { 0, 0, 0, \
 125           0, 0, 0, \
 126           0, 0, 0 })
 127
 128 typedef struct {
 129   tvector1w     v00  ; tvector1w     v01 ; tvector1w     v02  ;
 130   tvector1w     v10  ; tvector1w     v11 ; tvector1w     v12  ;
 131   tvector1w     v20  ; tvector1w     v21 ; tvector1w     v22  ;
 132   tvector1w     v30  ; tvector1w     v31 ; tvector1w     v32  ;
 133 } s_1w_4x3_matrix;
 134
 135 #define S_1W_4X3_MATRIX_DEFAULT ((s_1w_4x3_matrix)\
 136         { 0, 0, 0, \
 137           0, 0, 0, \
 138           0, 0, 0, \
 139           0, 0, 0 })
 140
 141 typedef struct {
 142   tvector1w     v00 ;
 143   tvector1w     v01 ;
 144   tvector1w     v02 ;
 145   tvector1w     v03 ;
 146   tvector1w     v04 ;
 147 } s_1w_1x5_matrix;
 148
 149 #define S_1W_1X5_MATRIX_DEFAULT ((s_1w_1x5_matrix)\
 150         { 0, 0, 0, 0, 0 })
 151
 152 typedef struct {
 153   tvector1w     v00  ; tvector1w     v01 ; tvector1w     v02  ; tvector1w     v03 ; tvector1w     v04  ;
 154   tvector1w     v10  ; tvector1w     v11 ; tvector1w     v12  ; tvector1w     v13 ; tvector1w     v14  ;
 155   tvector1w     v20  ; tvector1w     v21 ; tvector1w     v22  ; tvector1w     v23 ; tvector1w     v24  ;
 156   tvector1w     v30  ; tvector1w     v31 ; tvector1w     v32  ; tvector1w     v33 ; tvector1w     v34  ;
 157   tvector1w     v40  ; tvector1w     v41 ; tvector1w     v42  ; tvector1w     v43 ; tvector1w     v44  ;
 158 } s_1w_5x5_matrix;
 159
 160 #define S_1W_5X5_MATRIX_DEFAULT ((s_1w_5x5_matrix)\
 161         { 0, 0, 0, 0, 0, \
 162           0, 0, 0, 0, 0, \
 163           0, 0, 0, 0, 0, \
 164           0, 0, 0, 0, 0, \
 165           0, 0, 0, 0, 0 })
 166 #ifndef ISP2401
 167
 168 #else
 169
 170 #endif
 171 typedef struct {
 172         tvector1w v00;
 173         tvector1w v01;
 174         tvector1w v02;
 175         tvector1w v03;
 176         tvector1w v04;
 177         tvector1w v05;
 178         tvector1w v06;
 179 } s_1w_1x7_matrix;
 180
 181 #define S_1W_1X7_MATRIX_DEFAULT ((s_1w_1x7_matrix)\
 182         { 0, 0, 0, 0, 0, 0, 0 })
 183
 184 typedef struct {
 185         tvector1w v00;
 186         tvector1w v01;
 187         tvector1w v02;
 188         tvector1w v03;
 189         tvector1w v04;
 190         tvector1w v05;
 191         tvector1w v06;
 192         tvector1w v07;
 193         tvector1w v08;
 194 } s_1w_1x9_matrix;
 195
 196 #define S_1W_1X9_MATRIX_DEFAULT ((s_1w_1x9_matrix)\
 197         { 0, 0, 0, 0, 0, 0, 0, 0, 0 })
 198
 199 typedef struct {
 200         tvector1w v00;
 201         tvector1w v01;
 202         tvector1w v02;
 203         tvector1w v03;
 204 } s_1w_1x4_matrix;
 205
 206 #define S_1W_1X4_MATRIX ((s_1w_1x4_matrix)\
 207         { 0, 0, 0, 0 })
 208
 209 typedef struct {
 210         tvector1w v00; tvector1w v01; tvector1w v02; tvector1w v03;
 211         tvector1w v10; tvector1w v11; tvector1w v12; tvector1w v13;
 212         tvector1w v20; tvector1w v21; tvector1w v22; tvector1w v23;
 213         tvector1w v30; tvector1w v31; tvector1w v32; tvector1w v33;
 214 } s_1w_4x4_matrix;
 215
 216 #define S_1W_4X4_MATRIX_DEFAULT ((s_1w_4x4_matrix)\
 217         { 0, 0, 0, 0, \
 218           0, 0, 0, 0, \
 219           0, 0, 0, 0, \
 220           0, 0, 0, 0 })
 221
 222 typedef struct {
 223         tvector1w v00;
 224         tvector1w v01;
 225         tvector1w v02;
 226         tvector1w v03;
 227         tvector1w v04;
 228         tvector1w v05;
 229 } s_1w_1x6_matrix;
 230
 231 #define S_1W_1X6_MATRIX_DEFAULT ((s_1w_1x6_matrix)\
 232         { 0, 0, 0, 0, 0, 0 })
 233
 234 typedef struct {
 235         tvector1w v00; tvector1w v01; tvector1w v02; tvector1w v03; tvector1w v04; tvector1w v05;
 236         tvector1w v10; tvector1w v11; tvector1w v12; tvector1w v13; tvector1w v14; tvector1w v15;
 237         tvector1w v20; tvector1w v21; tvector1w v22; tvector1w v23; tvector1w v24; tvector1w v25;
 238         tvector1w v30; tvector1w v31; tvector1w v32; tvector1w v33; tvector1w v34; tvector1w v35;
 239         tvector1w v40; tvector1w v41; tvector1w v42; tvector1w v43; tvector1w v44; tvector1w v45;
 240         tvector1w v50; tvector1w v51; tvector1w v52; tvector1w v53; tvector1w v54; tvector1w v55;
 241 } s_1w_6x6_matrix;
 242
 243 #define S_1W_6X6_MATRIX_DEFAULT ((s_1w_6x6_matrix)\
 244         { 0, 0, 0, 0, 0, 0, \
 245           0, 0, 0, 0, 0, 0, \
 246           0, 0, 0, 0, 0, 0, \
 247           0, 0, 0, 0, 0, 0, \
 248           0, 0, 0, 0, 0, 0, \
 249           0, 0, 0, 0, 0, 0 })
 250
 251 typedef struct {
 252         tvector1w v00; tvector1w v01; tvector1w v02; tvector1w v03; tvector1w v04;
 253         tvector1w v05; tvector1w v06; tvector1w v07; tvector1w v08;
 254         tvector1w v10; tvector1w v11; tvector1w v12; tvector1w v13; tvector1w v14;
 255         tvector1w v15; tvector1w v16; tvector1w v17; tvector1w v18;
 256         tvector1w v20; tvector1w v21; tvector1w v22; tvector1w v23; tvector1w v24;
 257         tvector1w v25; tvector1w v26; tvector1w v27; tvector1w v28;
 258         tvector1w v30; tvector1w v31; tvector1w v32; tvector1w v33; tvector1w v34;
 259         tvector1w v35; tvector1w v36; tvector1w v37; tvector1w v38;
 260         tvector1w v40; tvector1w v41; tvector1w v42; tvector1w v43; tvector1w v44;
 261         tvector1w v45; tvector1w v46; tvector1w v47; tvector1w v48;
 262         tvector1w v50; tvector1w v51; tvector1w v52; tvector1w v53; tvector1w v54;
 263         tvector1w v55; tvector1w v56; tvector1w v57; tvector1w v58;
 264         tvector1w v60; tvector1w v61; tvector1w v62; tvector1w v63; tvector1w v64;
 265         tvector1w v65; tvector1w v66; tvector1w v67; tvector1w v68;
 266         tvector1w v70; tvector1w v71; tvector1w v72; tvector1w v73; tvector1w v74;
 267         tvector1w v75; tvector1w v76; tvector1w v77; tvector1w v78;
 268         tvector1w v80; tvector1w v81; tvector1w v82; tvector1w v83; tvector1w v84;
 269         tvector1w v85; tvector1w v86; tvector1w v87; tvector1w v88;
 270 } s_1w_9x9_matrix;
 271
 272 #define S_1W_9X9_MATRIX_DEFAULT ((s_1w_9x9_matrix)\
 273         { 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 274           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 275           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 276           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 277           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 278           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 279           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 280           0, 0, 0, 0, 0, 0, 0, 0, 0, \
 281           0, 0, 0, 0, 0, 0, 0, 0, 0 })
 282
 283 typedef struct {
 284         tvector1w v00; tvector1w v01; tvector1w v02; tvector1w v03; tvector1w v04;
 285         tvector1w v05; tvector1w v06;
 286         tvector1w v10; tvector1w v11; tvector1w v12; tvector1w v13; tvector1w v14;
 287         tvector1w v15; tvector1w v16;
 288         tvector1w v20; tvector1w v21; tvector1w v22; tvector1w v23; tvector1w v24;
 289         tvector1w v25; tvector1w v26;
 290         tvector1w v30; tvector1w v31; tvector1w v32; tvector1w v33; tvector1w v34;
 291         tvector1w v35; tvector1w v36;
 292         tvector1w v40; tvector1w v41; tvector1w v42; tvector1w v43; tvector1w v44;
 293         tvector1w v45; tvector1w v46;
 294         tvector1w v50; tvector1w v51; tvector1w v52; tvector1w v53; tvector1w v54;
 295         tvector1w v55; tvector1w v56;
 296         tvector1w v60; tvector1w v61; tvector1w v62; tvector1w v63; tvector1w v64;
 297         tvector1w v65; tvector1w v66;
 298 } s_1w_7x7_matrix;
 299
 300 #define S_1W_7X7_MATRIX_DEFAULT ((s_1w_7x7_matrix)\
 301         { 0, 0, 0, 0, 0, 0, 0, \
 302           0, 0, 0, 0, 0, 0, 0, \
 303           0, 0, 0, 0, 0, 0, 0, \
 304           0, 0, 0, 0, 0, 0, 0, \
 305           0, 0, 0, 0, 0, 0, 0, \
 306           0, 0, 0, 0, 0, 0, 0, \
 307           0, 0, 0, 0, 0, 0, 0 })
 308
 309 typedef struct {
 310         tvector1w v0_0;
 311         tvector1w v0_1;
 312         tvector1w v0_2;
 313         tvector1w v0_3;
 314         tvector1w v0_4;
 315         tvector1w v0_5;
 316         tvector1w v0_6;
 317         tvector1w v0_7;
 318         tvector1w v0_8;
 319         tvector1w v0_9;
 320         tvector1w v0_10;
 321 } s_1w_1x11_matrix;
 322
 323 #define S_1W_1X11_MATRIX_DEFAULT ((s_1w_1x11_matrix)\
 324         { 0, 0, 0, 0, 0, 0, 0, 0, 0 })
 325
 326 typedef struct {
 327         tvector1w x_cord[MAX_CONFIG_POINTS];
 328         tvector1w slope[MAX_CONFIG_POINTS-1];
 329         tvector1w y_offset[MAX_CONFIG_POINTS-1];
 330 } ref_config_points;
 331
 332 typedef struct {
 333         tscalar1w_range1wbit slope_vec[CONFIG_UNIT_LUT_SIZE_32];
 334         tscalar1w_range1wbit offset_vec[CONFIG_UNIT_LUT_SIZE_32];
 335         tscalar1w_16bit x_cord_vec[CONFIG_UNIT_LUT_SIZE_32];
 336         tscalar1w_16bit x_cord_max;
 337         tscalar1w_5bit exponent;
 338         tscalar1w_5bit slope_resolution;
 339 } xcu_ref_init_vectors;
 340
 341 typedef struct {
 342 #ifdef ISP2401
 343         tvector1w elem[IMAX32_ELEM_SIZE];
 344 } imax32_ref_in_vector;
 345
 346 typedef struct {
 347 #endif
 348         tscalar1w search[BMA_SEARCH_BLOCK_SZ_16][BMA_SEARCH_BLOCK_SZ_16];
 349 } bma_16x16_search_window;
 350
 351 typedef struct {
 352         tscalar1w ref[BMA_REF_BLOCK_SZ_8][BMA_REF_BLOCK_SZ_8];
 353 } ref_block_8x8;
 354
 355 typedef struct {
 356         tscalar1w sads[SADS_16x16_1];
 357 } bma_output_16_1;
 358
 359 typedef struct {
 360         tscalar1w sads[SADS_16x16_2];
 361 } bma_output_16_2;
 362
 363 typedef struct {
 364         tscalar1w sads[SADS_14x14_2];
 365 } bma_output_14_2;
 366
 367 typedef struct {
 368         tscalar1w sads[SADS_14x14_1];
 369 } bma_output_14_1;
 370
 371 typedef struct {
 372         tvector1w spatial_weight_lut[BFA_MAX_KWAY]; /* spatial weight LUT */
 373         /* range weight LUT, (BFA_RW_LUT_SIZE + 1) numbers of LUT values are compressed in BFA_RW_LUT_SIZE buffer.
 374          * range_weight_lut[k] = packed(drop[k], range_weight[k])
 375          * where, drop[k] = range_weight[k+1] - range_weight[k]
 376          * pack(msb, lsb): two 8bits numbers packed in one 16bits number */
 377         tvector1w range_weight_lut[BFA_RW_LUT_SIZE];
 378 } bfa_weights;
 379
 380 /* Return type for BFA BBBs */
 381 typedef struct {
 382         tvector2w sop; /* weighted sum of pixels */
 383         tvector1w sow; /* sum of weights */
 384 } bfa_7x7_output;
 385 #endif /* __REF_VECTOR_FUNC_TYPES_H_INCLUDED__ */