1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Medifield PNW Camera Imaging ISP subsystem.
5 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
7 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License version
11 * 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/pm_qos.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27 #include <linux/interrupt.h>
29 #include <asm/iosf_mbi.h>
31 #include "../../include/linux/atomisp_gmin_platform.h"
33 #include "atomisp_cmd.h"
34 #include "atomisp_common.h"
35 #include "atomisp_fops.h"
36 #include "atomisp_file.h"
37 #include "atomisp_ioctl.h"
38 #include "atomisp_internal.h"
39 #include "atomisp_acc.h"
40 #include "atomisp-regs.h"
41 #include "atomisp_dfs_tables.h"
42 #include "atomisp_drvfs.h"
44 #include "atomisp_trace_event.h"
46 #include "sh_css_firmware.h"
48 #include "device_access.h"
50 /* Timeouts to wait for all subdevs to be registered */
51 #define SUBDEV_WAIT_TIMEOUT 50 /* ms */
52 #define SUBDEV_WAIT_TIMEOUT_MAX_COUNT 40 /* up to 2 seconds */
54 /* G-Min addition: pull this in from intel_mid_pm.h */
55 #define CSTATE_EXIT_LATENCY_C1 1
57 static uint skip_fwload
;
58 module_param(skip_fwload
, uint
, 0644);
59 MODULE_PARM_DESC(skip_fwload
, "Skip atomisp firmware load");
61 /* set reserved memory pool size in page */
62 static unsigned int repool_pgnr
= 32768;
63 module_param(repool_pgnr
, uint
, 0644);
64 MODULE_PARM_DESC(repool_pgnr
,
65 "Set the reserved memory pool size in page (default:32768)");
67 /* set dynamic memory pool size in page */
68 unsigned int dypool_pgnr
= UINT_MAX
;
69 module_param(dypool_pgnr
, uint
, 0644);
70 MODULE_PARM_DESC(dypool_pgnr
,
71 "Set the dynamic memory pool size in page (default: unlimited)");
73 bool dypool_enable
= true;
74 module_param(dypool_enable
, bool, 0644);
75 MODULE_PARM_DESC(dypool_enable
,
76 "dynamic memory pool enable/disable (default:enabled)");
78 /* memory optimization: deferred firmware loading */
80 module_param(defer_fw_load
, bool, 0644);
81 MODULE_PARM_DESC(defer_fw_load
,
82 "Defer FW loading until device is opened (default:disable)");
84 /* cross componnet debug message flag */
86 module_param(dbg_level
, int, 0644);
87 MODULE_PARM_DESC(dbg_level
, "debug message level (default:0)");
89 /* log function switch */
91 module_param(dbg_func
, int, 0644);
92 MODULE_PARM_DESC(dbg_func
,
93 "log function switch non/trace_printk/printk (default:printk)");
96 module_param(mipicsi_flag
, int, 0644);
97 MODULE_PARM_DESC(mipicsi_flag
, "mipi csi compression predictor algorithm");
99 static char firmware_name
[256];
100 module_param_string(firmware_name
, firmware_name
, sizeof(firmware_name
), 0);
101 MODULE_PARM_DESC(firmware_name
, "Firmware file name. Allows overriding the default firmware name.");
103 /*set to 16x16 since this is the amount of lines and pixels the sensor
104 exports extra. If these are kept at the 10x8 that they were on, in yuv
105 downscaling modes incorrect resolutions where requested to the sensor
106 driver with strange outcomes as a result. The proper way tot do this
107 would be to have a list of tables the specify the sensor res, mipi rec,
108 output res, and isp output res. however since we do not have this yet,
109 the chosen solution is the next best thing. */
111 module_param(pad_w
, int, 0644);
112 MODULE_PARM_DESC(pad_w
, "extra data for ISP processing");
115 module_param(pad_h
, int, 0644);
116 MODULE_PARM_DESC(pad_h
, "extra data for ISP processing");
119 * FIXME: this is a hack to make easier to support ISP2401 variant.
120 * As a given system will either be ISP2401 or not, we can just use
121 * a boolean, in order to replace existing #ifdef ISP2401 everywhere.
123 * Once this driver gets into a better shape, however, the best would
124 * be to replace this to something stored inside atomisp allocated
128 struct device
*atomisp_dev
;
130 static const struct atomisp_freq_scaling_rule dfs_rules_merr
[] = {
132 .width
= ISP_FREQ_RULE_ANY
,
133 .height
= ISP_FREQ_RULE_ANY
,
134 .fps
= ISP_FREQ_RULE_ANY
,
135 .isp_freq
= ISP_FREQ_400MHZ
,
136 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
139 .width
= ISP_FREQ_RULE_ANY
,
140 .height
= ISP_FREQ_RULE_ANY
,
141 .fps
= ISP_FREQ_RULE_ANY
,
142 .isp_freq
= ISP_FREQ_400MHZ
,
143 .run_mode
= ATOMISP_RUN_MODE_STILL_CAPTURE
,
146 .width
= ISP_FREQ_RULE_ANY
,
147 .height
= ISP_FREQ_RULE_ANY
,
148 .fps
= ISP_FREQ_RULE_ANY
,
149 .isp_freq
= ISP_FREQ_400MHZ
,
150 .run_mode
= ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE
,
153 .width
= ISP_FREQ_RULE_ANY
,
154 .height
= ISP_FREQ_RULE_ANY
,
155 .fps
= ISP_FREQ_RULE_ANY
,
156 .isp_freq
= ISP_FREQ_400MHZ
,
157 .run_mode
= ATOMISP_RUN_MODE_PREVIEW
,
160 .width
= ISP_FREQ_RULE_ANY
,
161 .height
= ISP_FREQ_RULE_ANY
,
162 .fps
= ISP_FREQ_RULE_ANY
,
163 .isp_freq
= ISP_FREQ_457MHZ
,
164 .run_mode
= ATOMISP_RUN_MODE_SDV
,
168 /* Merrifield and Moorefield DFS rules */
169 static const struct atomisp_dfs_config dfs_config_merr
= {
170 .lowest_freq
= ISP_FREQ_200MHZ
,
171 .max_freq_at_vmin
= ISP_FREQ_400MHZ
,
172 .highest_freq
= ISP_FREQ_457MHZ
,
173 .dfs_table
= dfs_rules_merr
,
174 .dfs_table_size
= ARRAY_SIZE(dfs_rules_merr
),
177 static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179
[] = {
179 .width
= ISP_FREQ_RULE_ANY
,
180 .height
= ISP_FREQ_RULE_ANY
,
181 .fps
= ISP_FREQ_RULE_ANY
,
182 .isp_freq
= ISP_FREQ_400MHZ
,
183 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
186 .width
= ISP_FREQ_RULE_ANY
,
187 .height
= ISP_FREQ_RULE_ANY
,
188 .fps
= ISP_FREQ_RULE_ANY
,
189 .isp_freq
= ISP_FREQ_400MHZ
,
190 .run_mode
= ATOMISP_RUN_MODE_STILL_CAPTURE
,
193 .width
= ISP_FREQ_RULE_ANY
,
194 .height
= ISP_FREQ_RULE_ANY
,
195 .fps
= ISP_FREQ_RULE_ANY
,
196 .isp_freq
= ISP_FREQ_400MHZ
,
197 .run_mode
= ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE
,
200 .width
= ISP_FREQ_RULE_ANY
,
201 .height
= ISP_FREQ_RULE_ANY
,
202 .fps
= ISP_FREQ_RULE_ANY
,
203 .isp_freq
= ISP_FREQ_400MHZ
,
204 .run_mode
= ATOMISP_RUN_MODE_PREVIEW
,
207 .width
= ISP_FREQ_RULE_ANY
,
208 .height
= ISP_FREQ_RULE_ANY
,
209 .fps
= ISP_FREQ_RULE_ANY
,
210 .isp_freq
= ISP_FREQ_400MHZ
,
211 .run_mode
= ATOMISP_RUN_MODE_SDV
,
215 static const struct atomisp_dfs_config dfs_config_merr_1179
= {
216 .lowest_freq
= ISP_FREQ_200MHZ
,
217 .max_freq_at_vmin
= ISP_FREQ_400MHZ
,
218 .highest_freq
= ISP_FREQ_400MHZ
,
219 .dfs_table
= dfs_rules_merr_1179
,
220 .dfs_table_size
= ARRAY_SIZE(dfs_rules_merr_1179
),
223 static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a
[] = {
228 .isp_freq
= ISP_FREQ_266MHZ
,
229 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
235 .isp_freq
= ISP_FREQ_266MHZ
,
236 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
242 .isp_freq
= ISP_FREQ_320MHZ
,
243 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
249 .isp_freq
= ISP_FREQ_320MHZ
,
250 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
253 .width
= ISP_FREQ_RULE_ANY
,
254 .height
= ISP_FREQ_RULE_ANY
,
256 .isp_freq
= ISP_FREQ_356MHZ
,
257 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
260 .width
= ISP_FREQ_RULE_ANY
,
261 .height
= ISP_FREQ_RULE_ANY
,
262 .fps
= ISP_FREQ_RULE_ANY
,
263 .isp_freq
= ISP_FREQ_200MHZ
,
264 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
267 .width
= ISP_FREQ_RULE_ANY
,
268 .height
= ISP_FREQ_RULE_ANY
,
269 .fps
= ISP_FREQ_RULE_ANY
,
270 .isp_freq
= ISP_FREQ_400MHZ
,
271 .run_mode
= ATOMISP_RUN_MODE_STILL_CAPTURE
,
274 .width
= ISP_FREQ_RULE_ANY
,
275 .height
= ISP_FREQ_RULE_ANY
,
276 .fps
= ISP_FREQ_RULE_ANY
,
277 .isp_freq
= ISP_FREQ_400MHZ
,
278 .run_mode
= ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE
,
281 .width
= ISP_FREQ_RULE_ANY
,
282 .height
= ISP_FREQ_RULE_ANY
,
283 .fps
= ISP_FREQ_RULE_ANY
,
284 .isp_freq
= ISP_FREQ_200MHZ
,
285 .run_mode
= ATOMISP_RUN_MODE_PREVIEW
,
288 .width
= ISP_FREQ_RULE_ANY
,
289 .height
= ISP_FREQ_RULE_ANY
,
290 .fps
= ISP_FREQ_RULE_ANY
,
291 .isp_freq
= ISP_FREQ_400MHZ
,
292 .run_mode
= ATOMISP_RUN_MODE_SDV
,
296 static struct atomisp_dfs_config dfs_config_merr_117a
= {
297 .lowest_freq
= ISP_FREQ_200MHZ
,
298 .max_freq_at_vmin
= ISP_FREQ_200MHZ
,
299 .highest_freq
= ISP_FREQ_400MHZ
,
300 .dfs_table
= dfs_rules_merr_117a
,
301 .dfs_table_size
= ARRAY_SIZE(dfs_rules_merr_117a
),
304 static const struct atomisp_freq_scaling_rule dfs_rules_byt
[] = {
306 .width
= ISP_FREQ_RULE_ANY
,
307 .height
= ISP_FREQ_RULE_ANY
,
308 .fps
= ISP_FREQ_RULE_ANY
,
309 .isp_freq
= ISP_FREQ_400MHZ
,
310 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
313 .width
= ISP_FREQ_RULE_ANY
,
314 .height
= ISP_FREQ_RULE_ANY
,
315 .fps
= ISP_FREQ_RULE_ANY
,
316 .isp_freq
= ISP_FREQ_400MHZ
,
317 .run_mode
= ATOMISP_RUN_MODE_STILL_CAPTURE
,
320 .width
= ISP_FREQ_RULE_ANY
,
321 .height
= ISP_FREQ_RULE_ANY
,
322 .fps
= ISP_FREQ_RULE_ANY
,
323 .isp_freq
= ISP_FREQ_400MHZ
,
324 .run_mode
= ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE
,
327 .width
= ISP_FREQ_RULE_ANY
,
328 .height
= ISP_FREQ_RULE_ANY
,
329 .fps
= ISP_FREQ_RULE_ANY
,
330 .isp_freq
= ISP_FREQ_400MHZ
,
331 .run_mode
= ATOMISP_RUN_MODE_PREVIEW
,
334 .width
= ISP_FREQ_RULE_ANY
,
335 .height
= ISP_FREQ_RULE_ANY
,
336 .fps
= ISP_FREQ_RULE_ANY
,
337 .isp_freq
= ISP_FREQ_400MHZ
,
338 .run_mode
= ATOMISP_RUN_MODE_SDV
,
342 static const struct atomisp_dfs_config dfs_config_byt
= {
343 .lowest_freq
= ISP_FREQ_200MHZ
,
344 .max_freq_at_vmin
= ISP_FREQ_400MHZ
,
345 .highest_freq
= ISP_FREQ_400MHZ
,
346 .dfs_table
= dfs_rules_byt
,
347 .dfs_table_size
= ARRAY_SIZE(dfs_rules_byt
),
350 static const struct atomisp_freq_scaling_rule dfs_rules_cht
[] = {
352 .width
= ISP_FREQ_RULE_ANY
,
353 .height
= ISP_FREQ_RULE_ANY
,
354 .fps
= ISP_FREQ_RULE_ANY
,
355 .isp_freq
= ISP_FREQ_320MHZ
,
356 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
359 .width
= ISP_FREQ_RULE_ANY
,
360 .height
= ISP_FREQ_RULE_ANY
,
361 .fps
= ISP_FREQ_RULE_ANY
,
362 .isp_freq
= ISP_FREQ_356MHZ
,
363 .run_mode
= ATOMISP_RUN_MODE_STILL_CAPTURE
,
366 .width
= ISP_FREQ_RULE_ANY
,
367 .height
= ISP_FREQ_RULE_ANY
,
368 .fps
= ISP_FREQ_RULE_ANY
,
369 .isp_freq
= ISP_FREQ_320MHZ
,
370 .run_mode
= ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE
,
373 .width
= ISP_FREQ_RULE_ANY
,
374 .height
= ISP_FREQ_RULE_ANY
,
375 .fps
= ISP_FREQ_RULE_ANY
,
376 .isp_freq
= ISP_FREQ_320MHZ
,
377 .run_mode
= ATOMISP_RUN_MODE_PREVIEW
,
382 .fps
= ISP_FREQ_RULE_ANY
,
383 .isp_freq
= ISP_FREQ_320MHZ
,
384 .run_mode
= ATOMISP_RUN_MODE_SDV
,
387 .width
= ISP_FREQ_RULE_ANY
,
388 .height
= ISP_FREQ_RULE_ANY
,
389 .fps
= ISP_FREQ_RULE_ANY
,
390 .isp_freq
= ISP_FREQ_356MHZ
,
391 .run_mode
= ATOMISP_RUN_MODE_SDV
,
395 static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc
[] = {
397 .width
= ISP_FREQ_RULE_ANY
,
398 .height
= ISP_FREQ_RULE_ANY
,
399 .fps
= ISP_FREQ_RULE_ANY
,
400 .isp_freq
= ISP_FREQ_356MHZ
,
401 .run_mode
= ATOMISP_RUN_MODE_VIDEO
,
404 .width
= ISP_FREQ_RULE_ANY
,
405 .height
= ISP_FREQ_RULE_ANY
,
406 .fps
= ISP_FREQ_RULE_ANY
,
407 .isp_freq
= ISP_FREQ_356MHZ
,
408 .run_mode
= ATOMISP_RUN_MODE_STILL_CAPTURE
,
411 .width
= ISP_FREQ_RULE_ANY
,
412 .height
= ISP_FREQ_RULE_ANY
,
413 .fps
= ISP_FREQ_RULE_ANY
,
414 .isp_freq
= ISP_FREQ_320MHZ
,
415 .run_mode
= ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE
,
418 .width
= ISP_FREQ_RULE_ANY
,
419 .height
= ISP_FREQ_RULE_ANY
,
420 .fps
= ISP_FREQ_RULE_ANY
,
421 .isp_freq
= ISP_FREQ_320MHZ
,
422 .run_mode
= ATOMISP_RUN_MODE_PREVIEW
,
425 .width
= ISP_FREQ_RULE_ANY
,
426 .height
= ISP_FREQ_RULE_ANY
,
427 .fps
= ISP_FREQ_RULE_ANY
,
428 .isp_freq
= ISP_FREQ_356MHZ
,
429 .run_mode
= ATOMISP_RUN_MODE_SDV
,
433 static const struct atomisp_dfs_config dfs_config_cht
= {
434 .lowest_freq
= ISP_FREQ_100MHZ
,
435 .max_freq_at_vmin
= ISP_FREQ_356MHZ
,
436 .highest_freq
= ISP_FREQ_356MHZ
,
437 .dfs_table
= dfs_rules_cht
,
438 .dfs_table_size
= ARRAY_SIZE(dfs_rules_cht
),
441 /* This one should be visible also by atomisp_cmd.c */
442 const struct atomisp_dfs_config dfs_config_cht_soc
= {
443 .lowest_freq
= ISP_FREQ_100MHZ
,
444 .max_freq_at_vmin
= ISP_FREQ_356MHZ
,
445 .highest_freq
= ISP_FREQ_356MHZ
,
446 .dfs_table
= dfs_rules_cht_soc
,
447 .dfs_table_size
= ARRAY_SIZE(dfs_rules_cht_soc
),
450 int atomisp_video_init(struct atomisp_video_pipe
*video
, const char *name
)
453 const char *direction
;
455 switch (video
->type
) {
456 case V4L2_BUF_TYPE_VIDEO_CAPTURE
:
457 direction
= "output";
458 video
->pad
.flags
= MEDIA_PAD_FL_SINK
;
459 video
->vdev
.fops
= &atomisp_fops
;
460 video
->vdev
.ioctl_ops
= &atomisp_ioctl_ops
;
462 case V4L2_BUF_TYPE_VIDEO_OUTPUT
:
464 video
->pad
.flags
= MEDIA_PAD_FL_SOURCE
;
465 video
->vdev
.fops
= &atomisp_file_fops
;
466 video
->vdev
.ioctl_ops
= &atomisp_file_ioctl_ops
;
472 ret
= media_entity_pads_init(&video
->vdev
.entity
, 1, &video
->pad
);
476 /* Initialize the video device. */
477 snprintf(video
->vdev
.name
, sizeof(video
->vdev
.name
),
478 "ATOMISP ISP %s %s", name
, direction
);
479 video
->vdev
.release
= video_device_release_empty
;
480 video_set_drvdata(&video
->vdev
, video
->isp
);
485 void atomisp_acc_init(struct atomisp_acc_pipe
*video
, const char *name
)
487 video
->vdev
.fops
= &atomisp_fops
;
488 video
->vdev
.ioctl_ops
= &atomisp_ioctl_ops
;
490 /* Initialize the video device. */
491 snprintf(video
->vdev
.name
, sizeof(video
->vdev
.name
),
492 "ATOMISP ISP %s", name
);
493 video
->vdev
.release
= video_device_release_empty
;
494 video_set_drvdata(&video
->vdev
, video
->isp
);
497 void atomisp_video_unregister(struct atomisp_video_pipe
*video
)
499 if (video_is_registered(&video
->vdev
)) {
500 media_entity_cleanup(&video
->vdev
.entity
);
501 video_unregister_device(&video
->vdev
);
505 void atomisp_acc_unregister(struct atomisp_acc_pipe
*video
)
507 if (video_is_registered(&video
->vdev
))
508 video_unregister_device(&video
->vdev
);
511 static int atomisp_save_iunit_reg(struct atomisp_device
*isp
)
513 struct pci_dev
*pdev
= to_pci_dev(isp
->dev
);
515 dev_dbg(isp
->dev
, "%s\n", __func__
);
517 pci_read_config_word(pdev
, PCI_COMMAND
, &isp
->saved_regs
.pcicmdsts
);
518 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
519 pci_read_config_dword(pdev
, PCI_MSI_CAPID
, &isp
->saved_regs
.msicap
);
520 pci_read_config_dword(pdev
, PCI_MSI_ADDR
, &isp
->saved_regs
.msi_addr
);
521 pci_read_config_word(pdev
, PCI_MSI_DATA
, &isp
->saved_regs
.msi_data
);
522 pci_read_config_byte(pdev
, PCI_INTERRUPT_LINE
, &isp
->saved_regs
.intr
);
523 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &isp
->saved_regs
.interrupt_control
);
525 pci_read_config_dword(pdev
, MRFLD_PCI_PMCS
, &isp
->saved_regs
.pmcs
);
526 /* Ensure read/write combining is enabled. */
527 pci_read_config_dword(pdev
, PCI_I_CONTROL
, &isp
->saved_regs
.i_control
);
528 isp
->saved_regs
.i_control
|=
529 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING
|
530 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING
;
531 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL
,
532 &isp
->saved_regs
.csi_access_viol
);
533 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_RCOMP_CONTROL
,
534 &isp
->saved_regs
.csi_rcomp_config
);
536 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
537 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
538 * and sensor sending "continuous clock".
539 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
540 * is missed, and IUNIT can hang.
541 * For both issues, setting this bit is a workaround.
543 isp
->saved_regs
.csi_rcomp_config
|= MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE
;
544 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_AFE_TRIM_CONTROL
,
545 &isp
->saved_regs
.csi_afe_dly
);
546 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_CONTROL
,
547 &isp
->saved_regs
.csi_control
);
548 if (isp
->media_dev
.hw_revision
>=
549 (ATOMISP_HW_REVISION_ISP2401
<< ATOMISP_HW_REVISION_SHIFT
))
550 isp
->saved_regs
.csi_control
|= MRFLD_PCI_CSI_CONTROL_PARPATHEN
;
552 * On CHT CSI_READY bit should be enabled before stream on
554 if (IS_CHT
&& (isp
->media_dev
.hw_revision
>= ((ATOMISP_HW_REVISION_ISP2401
<<
555 ATOMISP_HW_REVISION_SHIFT
) | ATOMISP_HW_STEPPING_B0
)))
556 isp
->saved_regs
.csi_control
|= MRFLD_PCI_CSI_CONTROL_CSI_READY
;
557 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL
,
558 &isp
->saved_regs
.csi_afe_rcomp_config
);
559 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_AFE_HS_CONTROL
,
560 &isp
->saved_regs
.csi_afe_hs_control
);
561 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_DEADLINE_CONTROL
,
562 &isp
->saved_regs
.csi_deadline_control
);
566 static int __maybe_unused
atomisp_restore_iunit_reg(struct atomisp_device
*isp
)
568 struct pci_dev
*pdev
= to_pci_dev(isp
->dev
);
570 dev_dbg(isp
->dev
, "%s\n", __func__
);
572 pci_write_config_word(pdev
, PCI_COMMAND
, isp
->saved_regs
.pcicmdsts
);
573 pci_write_config_dword(pdev
, PCI_BASE_ADDRESS_0
, isp
->saved_regs
.ispmmadr
);
574 pci_write_config_dword(pdev
, PCI_MSI_CAPID
, isp
->saved_regs
.msicap
);
575 pci_write_config_dword(pdev
, PCI_MSI_ADDR
, isp
->saved_regs
.msi_addr
);
576 pci_write_config_word(pdev
, PCI_MSI_DATA
, isp
->saved_regs
.msi_data
);
577 pci_write_config_byte(pdev
, PCI_INTERRUPT_LINE
, isp
->saved_regs
.intr
);
578 pci_write_config_dword(pdev
, PCI_INTERRUPT_CTRL
, isp
->saved_regs
.interrupt_control
);
579 pci_write_config_dword(pdev
, PCI_I_CONTROL
, isp
->saved_regs
.i_control
);
581 pci_write_config_dword(pdev
, MRFLD_PCI_PMCS
, isp
->saved_regs
.pmcs
);
582 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL
,
583 isp
->saved_regs
.csi_access_viol
);
584 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_RCOMP_CONTROL
,
585 isp
->saved_regs
.csi_rcomp_config
);
586 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_AFE_TRIM_CONTROL
,
587 isp
->saved_regs
.csi_afe_dly
);
588 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_CONTROL
,
589 isp
->saved_regs
.csi_control
);
590 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL
,
591 isp
->saved_regs
.csi_afe_rcomp_config
);
592 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_AFE_HS_CONTROL
,
593 isp
->saved_regs
.csi_afe_hs_control
);
594 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_DEADLINE_CONTROL
,
595 isp
->saved_regs
.csi_deadline_control
);
598 * for MRFLD, Software/firmware needs to write a 1 to bit0
599 * of the register at CSI_RECEIVER_SELECTION_REG to enable
600 * SH CSI backend write 0 will enable Arasan CSI backend,
601 * which has bugs(like sighting:4567697 and 4567699) and
602 * will be removed in B0
604 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG
, 1);
608 static int atomisp_mrfld_pre_power_down(struct atomisp_device
*isp
)
610 struct pci_dev
*pdev
= to_pci_dev(isp
->dev
);
614 spin_lock_irqsave(&isp
->lock
, flags
);
615 if (isp
->sw_contex
.power_state
== ATOM_ISP_POWER_DOWN
) {
616 spin_unlock_irqrestore(&isp
->lock
, flags
);
617 dev_dbg(isp
->dev
, "<%s %d.\n", __func__
, __LINE__
);
621 * MRFLD HAS requirement: cannot power off i-unit if
622 * ISP has IRQ not serviced.
623 * So, here we need to check if there is any pending
624 * IRQ, if so, waiting for it to be served
626 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
627 irq
= irq
& 1 << INTR_IIR
;
628 pci_write_config_dword(pdev
, PCI_INTERRUPT_CTRL
, irq
);
630 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
631 if (!(irq
& (1 << INTR_IIR
)))
634 atomisp_css2_hw_store_32(MRFLD_INTR_CLEAR_REG
, 0xFFFFFFFF);
635 atomisp_load_uint32(MRFLD_INTR_STATUS_REG
, &irq
);
638 "%s: fail to clear isp interrupt status reg=0x%x\n",
640 spin_unlock_irqrestore(&isp
->lock
, flags
);
643 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
644 irq
= irq
& 1 << INTR_IIR
;
645 pci_write_config_dword(pdev
, PCI_INTERRUPT_CTRL
, irq
);
647 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
648 if (!(irq
& (1 << INTR_IIR
))) {
649 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG
, 0x0);
653 "%s: error in iunit interrupt. status reg=0x%x\n",
655 spin_unlock_irqrestore(&isp
->lock
, flags
);
661 * before powering off IUNIT, clear the pending interrupts
662 * and disable the interrupt. driver should avoid writing 0
663 * to IIR. It could block subsequent interrupt messages.
664 * HW sighting:4568410.
666 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
667 irq
&= ~(1 << INTR_IER
);
668 pci_write_config_dword(pdev
, PCI_INTERRUPT_CTRL
, irq
);
670 atomisp_msi_irq_uninit(isp
);
671 atomisp_freq_scaling(isp
, ATOMISP_DFS_MODE_LOW
, true);
672 spin_unlock_irqrestore(&isp
->lock
, flags
);
678 * WA for DDR DVFS enable/disable
679 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
681 static void punit_ddr_dvfs_enable(bool enable
)
683 int door_bell
= 1 << 8;
687 iosf_mbi_read(BT_MBI_UNIT_PMC
, MBI_REG_READ
, MRFLD_ISPSSDVFS
, ®
);
689 reg
&= ~(MRFLD_BIT0
| MRFLD_BIT1
);
691 reg
|= (MRFLD_BIT1
| door_bell
);
692 reg
&= ~(MRFLD_BIT0
);
694 iosf_mbi_write(BT_MBI_UNIT_PMC
, MBI_REG_WRITE
, MRFLD_ISPSSDVFS
, reg
);
696 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
697 while ((reg
& door_bell
) && max_wait
--) {
698 iosf_mbi_read(BT_MBI_UNIT_PMC
, MBI_REG_READ
, MRFLD_ISPSSDVFS
, ®
);
699 usleep_range(100, 500);
703 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
706 static int atomisp_mrfld_power(struct atomisp_device
*isp
, bool enable
)
708 unsigned long timeout
;
709 u32 val
= enable
? MRFLD_ISPSSPM0_IUNIT_POWER_ON
:
710 MRFLD_ISPSSPM0_IUNIT_POWER_OFF
;
712 dev_dbg(isp
->dev
, "IUNIT power-%s.\n", enable
? "on" : "off");
715 if (IS_CHT
&& enable
)
716 punit_ddr_dvfs_enable(true);
719 * FIXME:WA for ECS28A, with this sleep, CTS
720 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
721 * PASS, no impact on other platforms
723 if (IS_BYT
&& enable
)
726 /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
727 iosf_mbi_modify(BT_MBI_UNIT_PMC
, MBI_REG_READ
, MRFLD_ISPSSPM0
,
728 val
, MRFLD_ISPSSPM0_ISPSSC_MASK
);
731 if (IS_CHT
&& !enable
)
732 punit_ddr_dvfs_enable(true);
735 * There should be no IUNIT access while power-down is
736 * in progress. HW sighting: 4567865.
737 * Wait up to 50 ms for the IUNIT to shut down.
738 * And we do the same for power on.
740 timeout
= jiffies
+ msecs_to_jiffies(50);
744 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
745 iosf_mbi_read(BT_MBI_UNIT_PMC
, MBI_REG_READ
, MRFLD_ISPSSPM0
, &tmp
);
746 tmp
= (tmp
>> MRFLD_ISPSSPM0_ISPSSS_OFFSET
) & MRFLD_ISPSSPM0_ISPSSC_MASK
;
748 trace_ipu_cstate(enable
);
752 if (time_after(jiffies
, timeout
))
755 /* FIXME: experienced value for delay */
756 usleep_range(100, 150);
762 dev_err(isp
->dev
, "IUNIT power-%s timeout.\n", enable
? "on" : "off");
766 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
767 int atomisp_mrfld_power_down(struct atomisp_device
*isp
)
769 return atomisp_mrfld_power(isp
, false);
772 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
773 int atomisp_mrfld_power_up(struct atomisp_device
*isp
)
775 return atomisp_mrfld_power(isp
, true);
778 int atomisp_runtime_suspend(struct device
*dev
)
780 struct atomisp_device
*isp
= (struct atomisp_device
*)
781 dev_get_drvdata(dev
);
784 ret
= atomisp_mrfld_pre_power_down(isp
);
788 /*Turn off the ISP d-phy*/
789 ret
= atomisp_ospm_dphy_down(isp
);
792 cpu_latency_qos_update_request(&isp
->pm_qos
, PM_QOS_DEFAULT_VALUE
);
793 return atomisp_mrfld_power_down(isp
);
796 int atomisp_runtime_resume(struct device
*dev
)
798 struct atomisp_device
*isp
= (struct atomisp_device
*)
799 dev_get_drvdata(dev
);
802 ret
= atomisp_mrfld_power_up(isp
);
806 cpu_latency_qos_update_request(&isp
->pm_qos
, isp
->max_isr_latency
);
807 if (isp
->sw_contex
.power_state
== ATOM_ISP_POWER_DOWN
) {
808 /*Turn on ISP d-phy */
809 ret
= atomisp_ospm_dphy_up(isp
);
811 dev_err(isp
->dev
, "Failed to power up ISP!.\n");
816 /*restore register values for iUnit and iUnitPHY registers*/
817 if (isp
->saved_regs
.pcicmdsts
)
818 atomisp_restore_iunit_reg(isp
);
820 atomisp_freq_scaling(isp
, ATOMISP_DFS_MODE_LOW
, true);
824 static int __maybe_unused
atomisp_suspend(struct device
*dev
)
826 struct atomisp_device
*isp
= (struct atomisp_device
*)
827 dev_get_drvdata(dev
);
828 /* FIXME: only has one isp_subdev at present */
829 struct atomisp_sub_device
*asd
= &isp
->asd
[0];
834 * FIXME: Suspend is not supported by sensors. Abort if any video
837 if (atomisp_dev_users(isp
))
840 spin_lock_irqsave(&isp
->lock
, flags
);
841 if (asd
->streaming
!= ATOMISP_DEVICE_STREAMING_DISABLED
) {
842 spin_unlock_irqrestore(&isp
->lock
, flags
);
843 dev_err(isp
->dev
, "atomisp cannot suspend at this time.\n");
846 spin_unlock_irqrestore(&isp
->lock
, flags
);
848 ret
= atomisp_mrfld_pre_power_down(isp
);
852 /*Turn off the ISP d-phy */
853 ret
= atomisp_ospm_dphy_down(isp
);
855 dev_err(isp
->dev
, "fail to power off ISP\n");
858 cpu_latency_qos_update_request(&isp
->pm_qos
, PM_QOS_DEFAULT_VALUE
);
859 return atomisp_mrfld_power_down(isp
);
862 static int __maybe_unused
atomisp_resume(struct device
*dev
)
864 struct atomisp_device
*isp
= (struct atomisp_device
*)
865 dev_get_drvdata(dev
);
868 ret
= atomisp_mrfld_power_up(isp
);
872 cpu_latency_qos_update_request(&isp
->pm_qos
, isp
->max_isr_latency
);
874 /*Turn on ISP d-phy */
875 ret
= atomisp_ospm_dphy_up(isp
);
877 dev_err(isp
->dev
, "Failed to power up ISP!.\n");
881 /*restore register values for iUnit and iUnitPHY registers*/
882 if (isp
->saved_regs
.pcicmdsts
)
883 atomisp_restore_iunit_reg(isp
);
885 atomisp_freq_scaling(isp
, ATOMISP_DFS_MODE_LOW
, true);
889 int atomisp_csi_lane_config(struct atomisp_device
*isp
)
891 struct pci_dev
*pdev
= to_pci_dev(isp
->dev
);
892 static const struct {
894 u8 lanes
[MRFLD_PORT_NUM
];
896 /* Tangier/Merrifield available lane configurations */
897 { 0x00, { 4, 1, 0 } }, /* 00000 */
898 { 0x01, { 3, 1, 0 } }, /* 00001 */
899 { 0x02, { 2, 1, 0 } }, /* 00010 */
900 { 0x03, { 1, 1, 0 } }, /* 00011 */
901 { 0x04, { 2, 1, 2 } }, /* 00100 */
902 { 0x08, { 3, 1, 1 } }, /* 01000 */
903 { 0x09, { 2, 1, 1 } }, /* 01001 */
904 { 0x0a, { 1, 1, 1 } }, /* 01010 */
906 /* Anniedale/Moorefield only configurations */
907 { 0x10, { 4, 2, 0 } }, /* 10000 */
908 { 0x11, { 3, 2, 0 } }, /* 10001 */
909 { 0x12, { 2, 2, 0 } }, /* 10010 */
910 { 0x13, { 1, 2, 0 } }, /* 10011 */
911 { 0x14, { 2, 2, 2 } }, /* 10100 */
912 { 0x18, { 3, 2, 1 } }, /* 11000 */
913 { 0x19, { 2, 2, 1 } }, /* 11001 */
914 { 0x1a, { 1, 2, 1 } }, /* 11010 */
918 u8 sensor_lanes
[MRFLD_PORT_NUM
] = { 0 };
921 u32 port_config_mask
;
922 int port3_lanes_shift
;
924 if (isp
->media_dev
.hw_revision
<
925 ATOMISP_HW_REVISION_ISP2401_LEGACY
<<
926 ATOMISP_HW_REVISION_SHIFT
) {
928 port_config_mask
= MRFLD_PORT_CONFIG_MASK
;
929 port3_lanes_shift
= MRFLD_PORT3_LANES_SHIFT
;
931 /* Moorefield / Cherryview */
932 port_config_mask
= CHV_PORT_CONFIG_MASK
;
933 port3_lanes_shift
= CHV_PORT3_LANES_SHIFT
;
936 if (isp
->media_dev
.hw_revision
<
937 ATOMISP_HW_REVISION_ISP2401
<<
938 ATOMISP_HW_REVISION_SHIFT
) {
939 /* Merrifield / Moorefield legacy input system */
940 nportconfigs
= MRFLD_PORT_CONFIG_NUM
;
942 /* Moorefield / Cherryview new input system */
943 nportconfigs
= ARRAY_SIZE(portconfigs
);
946 for (i
= 0; i
< isp
->input_cnt
; i
++) {
947 struct camera_mipi_info
*mipi_info
;
949 if (isp
->inputs
[i
].type
!= RAW_CAMERA
&&
950 isp
->inputs
[i
].type
!= SOC_CAMERA
)
953 mipi_info
= atomisp_to_sensor_mipi_info(isp
->inputs
[i
].camera
);
957 switch (mipi_info
->port
) {
958 case ATOMISP_CAMERA_PORT_PRIMARY
:
959 sensor_lanes
[0] = mipi_info
->num_lanes
;
961 case ATOMISP_CAMERA_PORT_SECONDARY
:
962 sensor_lanes
[1] = mipi_info
->num_lanes
;
964 case ATOMISP_CAMERA_PORT_TERTIARY
:
965 sensor_lanes
[2] = mipi_info
->num_lanes
;
969 "%s: invalid port: %d for the %dth sensor\n",
970 __func__
, mipi_info
->port
, i
);
975 for (i
= 0; i
< nportconfigs
; i
++) {
976 for (j
= 0; j
< MRFLD_PORT_NUM
; j
++)
977 if (sensor_lanes
[j
] &&
978 sensor_lanes
[j
] != portconfigs
[i
].lanes
[j
])
981 if (j
== MRFLD_PORT_NUM
)
982 break; /* Found matching setting */
985 if (i
>= nportconfigs
) {
987 "%s: could not find the CSI port setting for %d-%d-%d\n",
989 sensor_lanes
[0], sensor_lanes
[1], sensor_lanes
[2]);
993 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_CONTROL
, &csi_control
);
994 csi_control
&= ~port_config_mask
;
995 csi_control
|= (portconfigs
[i
].code
<< MRFLD_PORT_CONFIGCODE_SHIFT
)
996 | (portconfigs
[i
].lanes
[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT
))
997 | (portconfigs
[i
].lanes
[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT
))
998 | (portconfigs
[i
].lanes
[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT
))
999 | (((1 << portconfigs
[i
].lanes
[0]) - 1) << MRFLD_PORT1_LANES_SHIFT
)
1000 | (((1 << portconfigs
[i
].lanes
[1]) - 1) << MRFLD_PORT2_LANES_SHIFT
)
1001 | (((1 << portconfigs
[i
].lanes
[2]) - 1) << port3_lanes_shift
);
1003 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_CONTROL
, csi_control
);
1006 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
1007 __func__
, portconfigs
[i
].lanes
[0], portconfigs
[i
].lanes
[1],
1008 portconfigs
[i
].lanes
[2], csi_control
);
1013 static int atomisp_subdev_probe(struct atomisp_device
*isp
)
1015 const struct atomisp_platform_data
*pdata
;
1016 struct intel_v4l2_subdev_table
*subdevs
;
1017 int ret
, raw_index
= -1, count
;
1019 pdata
= atomisp_get_platform_data();
1021 dev_err(isp
->dev
, "no platform data available\n");
1025 /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */
1026 for (count
= 0; count
< SUBDEV_WAIT_TIMEOUT_MAX_COUNT
; count
++) {
1027 int camera_count
= 0;
1029 for (subdevs
= pdata
->subdevs
; subdevs
->type
; ++subdevs
) {
1030 if (subdevs
->type
== RAW_CAMERA
||
1031 subdevs
->type
== SOC_CAMERA
)
1036 msleep(SUBDEV_WAIT_TIMEOUT
);
1038 /* Wait more time to give more time for subdev init code to finish */
1039 msleep(5 * SUBDEV_WAIT_TIMEOUT
);
1041 /* FIXME: should, instead, use I2C probe */
1043 for (subdevs
= pdata
->subdevs
; subdevs
->type
; ++subdevs
) {
1044 struct v4l2_subdev
*subdev
;
1045 struct i2c_board_info
*board_info
=
1046 &subdevs
->v4l2_subdev
.board_info
;
1047 struct i2c_adapter
*adapter
=
1048 i2c_get_adapter(subdevs
->v4l2_subdev
.i2c_adapter_id
);
1051 dev_info(isp
->dev
, "Probing Subdev %s\n", board_info
->type
);
1055 "Failed to find i2c adapter for subdev %s\n",
1060 /* In G-Min, the sensor devices will already be probed
1061 * (via ACPI) and registered, do not create new
1063 subdev
= atomisp_gmin_find_subdev(adapter
, board_info
);
1065 dev_warn(isp
->dev
, "Subdev %s not found\n",
1069 ret
= v4l2_device_register_subdev(&isp
->v4l2_dev
, subdev
);
1071 dev_warn(isp
->dev
, "Subdev %s detection fail\n",
1077 dev_warn(isp
->dev
, "Subdev %s detection fail\n",
1082 dev_info(isp
->dev
, "Subdev %s successfully register\n",
1085 switch (subdevs
->type
) {
1087 dev_dbg(isp
->dev
, "raw_index: %d\n", raw_index
);
1088 raw_index
= isp
->input_cnt
;
1091 dev_dbg(isp
->dev
, "SOC_INDEX: %d\n", isp
->input_cnt
);
1092 if (isp
->input_cnt
>= ATOM_ISP_MAX_INPUTS
) {
1094 "too many atomisp inputs, ignored\n");
1098 isp
->inputs
[isp
->input_cnt
].type
= subdevs
->type
;
1099 isp
->inputs
[isp
->input_cnt
].port
= subdevs
->port
;
1100 isp
->inputs
[isp
->input_cnt
].camera
= subdev
;
1101 isp
->inputs
[isp
->input_cnt
].sensor_index
= 0;
1103 * initialize the subdev frame size, then next we can
1104 * judge whether frame_size store effective value via
1107 isp
->inputs
[isp
->input_cnt
].frame_size
.pixel_format
= 0;
1108 isp
->inputs
[isp
->input_cnt
].camera_caps
=
1109 atomisp_get_default_camera_caps();
1110 sensor_num
= isp
->inputs
[isp
->input_cnt
]
1111 .camera_caps
->sensor_num
;
1113 for (i
= 1; i
< sensor_num
; i
++) {
1114 if (isp
->input_cnt
>= ATOM_ISP_MAX_INPUTS
) {
1116 "atomisp inputs out of range\n");
1119 isp
->inputs
[isp
->input_cnt
] =
1120 isp
->inputs
[isp
->input_cnt
- 1];
1121 isp
->inputs
[isp
->input_cnt
].sensor_index
= i
;
1128 "too many atomisp motors, ignored %s\n",
1132 isp
->motor
= subdev
;
1138 "too many atomisp flash devices, ignored %s\n",
1142 isp
->flash
= subdev
;
1145 dev_dbg(isp
->dev
, "unknown subdev probed\n");
1151 * HACK: Currently VCM belongs to primary sensor only, but correct
1152 * approach must be to acquire from platform code which sensor
1155 if (isp
->motor
&& raw_index
>= 0)
1156 isp
->inputs
[raw_index
].motor
= isp
->motor
;
1158 /* Proceed even if no modules detected. For COS mode and no modules. */
1159 if (!isp
->input_cnt
)
1160 dev_warn(isp
->dev
, "no camera attached or fail to detect\n");
1162 dev_info(isp
->dev
, "detected %d camera sensors\n",
1165 return atomisp_csi_lane_config(isp
);
1168 static void atomisp_unregister_entities(struct atomisp_device
*isp
)
1171 struct v4l2_subdev
*sd
, *next
;
1173 for (i
= 0; i
< isp
->num_of_streams
; i
++)
1174 atomisp_subdev_unregister_entities(&isp
->asd
[i
]);
1175 atomisp_tpg_unregister_entities(&isp
->tpg
);
1176 atomisp_file_input_unregister_entities(&isp
->file_dev
);
1177 for (i
= 0; i
< ATOMISP_CAMERA_NR_PORTS
; i
++)
1178 atomisp_mipi_csi2_unregister_entities(&isp
->csi2_port
[i
]);
1180 list_for_each_entry_safe(sd
, next
, &isp
->v4l2_dev
.subdevs
, list
)
1181 v4l2_device_unregister_subdev(sd
);
1183 v4l2_device_unregister(&isp
->v4l2_dev
);
1184 media_device_unregister(&isp
->media_dev
);
1187 static int atomisp_register_entities(struct atomisp_device
*isp
)
1192 isp
->media_dev
.dev
= isp
->dev
;
1194 strscpy(isp
->media_dev
.model
, "Intel Atom ISP",
1195 sizeof(isp
->media_dev
.model
));
1197 media_device_init(&isp
->media_dev
);
1198 isp
->v4l2_dev
.mdev
= &isp
->media_dev
;
1199 ret
= v4l2_device_register(isp
->dev
, &isp
->v4l2_dev
);
1201 dev_err(isp
->dev
, "%s: V4L2 device registration failed (%d)\n",
1203 goto v4l2_device_failed
;
1206 ret
= atomisp_subdev_probe(isp
);
1208 goto csi_and_subdev_probe_failed
;
1210 /* Register internal entities */
1211 for (i
= 0; i
< ATOMISP_CAMERA_NR_PORTS
; i
++) {
1212 ret
= atomisp_mipi_csi2_register_entities(&isp
->csi2_port
[i
],
1218 dev_err(isp
->dev
, "failed to register the CSI port: %d\n", i
);
1219 /* deregister all registered CSI ports */
1221 atomisp_mipi_csi2_unregister_entities(
1222 &isp
->csi2_port
[i
]);
1224 goto csi_and_subdev_probe_failed
;
1228 atomisp_file_input_register_entities(&isp
->file_dev
, &isp
->v4l2_dev
);
1230 dev_err(isp
->dev
, "atomisp_file_input_register_entities\n");
1231 goto file_input_register_failed
;
1234 ret
= atomisp_tpg_register_entities(&isp
->tpg
, &isp
->v4l2_dev
);
1236 dev_err(isp
->dev
, "atomisp_tpg_register_entities\n");
1237 goto tpg_register_failed
;
1240 for (i
= 0; i
< isp
->num_of_streams
; i
++) {
1241 struct atomisp_sub_device
*asd
= &isp
->asd
[i
];
1243 ret
= atomisp_subdev_register_entities(asd
, &isp
->v4l2_dev
);
1246 "atomisp_subdev_register_entities fail\n");
1248 atomisp_subdev_unregister_entities(
1250 goto subdev_register_failed
;
1254 for (i
= 0; i
< isp
->num_of_streams
; i
++) {
1255 struct atomisp_sub_device
*asd
= &isp
->asd
[i
];
1257 init_completion(&asd
->init_done
);
1259 asd
->delayed_init_workq
=
1260 alloc_workqueue(isp
->v4l2_dev
.name
, WQ_CPU_INTENSIVE
,
1262 if (!asd
->delayed_init_workq
) {
1264 "Failed to initialize delayed init workq\n");
1268 destroy_workqueue(isp
->asd
[i
- 1].
1269 delayed_init_workq
);
1270 goto wq_alloc_failed
;
1272 INIT_WORK(&asd
->delayed_init_work
, atomisp_delayed_init_work
);
1275 for (i
= 0; i
< isp
->input_cnt
; i
++) {
1276 if (isp
->inputs
[i
].port
>= ATOMISP_CAMERA_NR_PORTS
) {
1277 dev_err(isp
->dev
, "isp->inputs port %d not supported\n",
1278 isp
->inputs
[i
].port
);
1285 "FILE_INPUT enable, camera_cnt: %d\n", isp
->input_cnt
);
1286 isp
->inputs
[isp
->input_cnt
].type
= FILE_INPUT
;
1287 isp
->inputs
[isp
->input_cnt
].port
= -1;
1288 isp
->inputs
[isp
->input_cnt
].camera_caps
=
1289 atomisp_get_default_camera_caps();
1290 isp
->inputs
[isp
->input_cnt
++].camera
= &isp
->file_dev
.sd
;
1292 if (isp
->input_cnt
< ATOM_ISP_MAX_INPUTS
) {
1294 "TPG detected, camera_cnt: %d\n", isp
->input_cnt
);
1295 isp
->inputs
[isp
->input_cnt
].type
= TEST_PATTERN
;
1296 isp
->inputs
[isp
->input_cnt
].port
= -1;
1297 isp
->inputs
[isp
->input_cnt
].camera_caps
=
1298 atomisp_get_default_camera_caps();
1299 isp
->inputs
[isp
->input_cnt
++].camera
= &isp
->tpg
.sd
;
1301 dev_warn(isp
->dev
, "too many atomisp inputs, TPG ignored.\n");
1304 ret
= v4l2_device_register_subdev_nodes(&isp
->v4l2_dev
);
1308 return media_device_register(&isp
->media_dev
);
1311 for (i
= 0; i
< isp
->num_of_streams
; i
++)
1312 destroy_workqueue(isp
->asd
[i
].
1313 delayed_init_workq
);
1315 for (i
= 0; i
< isp
->num_of_streams
; i
++)
1316 atomisp_subdev_unregister_entities(
1318 subdev_register_failed
:
1319 atomisp_tpg_unregister_entities(&isp
->tpg
);
1320 tpg_register_failed
:
1321 atomisp_file_input_unregister_entities(&isp
->file_dev
);
1322 file_input_register_failed
:
1323 for (i
= 0; i
< ATOMISP_CAMERA_NR_PORTS
; i
++)
1324 atomisp_mipi_csi2_unregister_entities(&isp
->csi2_port
[i
]);
1325 csi_and_subdev_probe_failed
:
1326 v4l2_device_unregister(&isp
->v4l2_dev
);
1328 media_device_unregister(&isp
->media_dev
);
1329 media_device_cleanup(&isp
->media_dev
);
1333 static int atomisp_initialize_modules(struct atomisp_device
*isp
)
1337 ret
= atomisp_mipi_csi2_init(isp
);
1339 dev_err(isp
->dev
, "mipi csi2 initialization failed\n");
1340 goto error_mipi_csi2
;
1343 ret
= atomisp_file_input_init(isp
);
1346 "file input device initialization failed\n");
1347 goto error_file_input
;
1350 ret
= atomisp_tpg_init(isp
);
1352 dev_err(isp
->dev
, "tpg initialization failed\n");
1356 ret
= atomisp_subdev_init(isp
);
1358 dev_err(isp
->dev
, "ISP subdev initialization failed\n");
1359 goto error_isp_subdev
;
1366 atomisp_tpg_cleanup(isp
);
1368 atomisp_file_input_cleanup(isp
);
1370 atomisp_mipi_csi2_cleanup(isp
);
1374 static void atomisp_uninitialize_modules(struct atomisp_device
*isp
)
1376 atomisp_tpg_cleanup(isp
);
1377 atomisp_file_input_cleanup(isp
);
1378 atomisp_mipi_csi2_cleanup(isp
);
1381 const struct firmware
*
1382 atomisp_load_firmware(struct atomisp_device
*isp
)
1384 const struct firmware
*fw
;
1386 char *fw_path
= NULL
;
1391 if (firmware_name
[0] != '\0') {
1392 fw_path
= firmware_name
;
1394 if ((isp
->media_dev
.hw_revision
>> ATOMISP_HW_REVISION_SHIFT
)
1395 == ATOMISP_HW_REVISION_ISP2401
)
1396 fw_path
= "shisp_2401a0_v21.bin";
1398 if (isp
->media_dev
.hw_revision
==
1399 ((ATOMISP_HW_REVISION_ISP2401_LEGACY
<< ATOMISP_HW_REVISION_SHIFT
)
1400 | ATOMISP_HW_STEPPING_A0
))
1401 fw_path
= "shisp_2401a0_legacy_v21.bin";
1403 if (isp
->media_dev
.hw_revision
==
1404 ((ATOMISP_HW_REVISION_ISP2400
<< ATOMISP_HW_REVISION_SHIFT
)
1405 | ATOMISP_HW_STEPPING_B0
))
1406 fw_path
= "shisp_2400b0_v21.bin";
1410 dev_err(isp
->dev
, "Unsupported hw_revision 0x%x\n",
1411 isp
->media_dev
.hw_revision
);
1415 rc
= request_firmware(&fw
, fw_path
, isp
->dev
);
1418 "atomisp: Error %d while requesting firmware %s\n",
1427 * Check for flags the driver was compiled with against the PCI
1428 * device. Always returns true on other than ISP 2400.
1430 static bool is_valid_device(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1432 unsigned int a0_max_id
= 0;
1434 const char *product
;
1436 product
= dmi_get_system_info(DMI_PRODUCT_NAME
);
1438 switch (id
->device
& ATOMISP_PCI_DEVICE_SOC_MASK
) {
1439 case ATOMISP_PCI_DEVICE_SOC_MRFLD
:
1440 a0_max_id
= ATOMISP_PCI_REV_MRFLD_A0_MAX
;
1441 name
= "Merrifield";
1443 case ATOMISP_PCI_DEVICE_SOC_BYT
:
1444 a0_max_id
= ATOMISP_PCI_REV_BYT_A0_MAX
;
1447 case ATOMISP_PCI_DEVICE_SOC_ANN
:
1450 case ATOMISP_PCI_DEVICE_SOC_CHT
:
1451 name
= "Cherrytrail";
1454 dev_err(&pdev
->dev
, "%s: unknown device ID %x04:%x04\n",
1455 product
, id
->vendor
, id
->device
);
1459 if (pdev
->revision
<= ATOMISP_PCI_REV_BYT_A0_MAX
) {
1460 dev_err(&pdev
->dev
, "%s revision %d is not unsupported\n",
1461 name
, pdev
->revision
);
1467 * remove the if once the driver become generic
1470 #if defined(ISP2400)
1472 dev_err(&pdev
->dev
, "Support for %s (ISP2401) was disabled at compile time\n",
1478 dev_err(&pdev
->dev
, "Support for %s (ISP2400) was disabled at compile time\n",
1484 dev_info(&pdev
->dev
, "Detected %s version %d (ISP240%c) on %s\n",
1485 name
, pdev
->revision
, IS_ISP2401
? '1' : '0', product
);
1490 static int init_atomisp_wdts(struct atomisp_device
*isp
)
1494 atomic_set(&isp
->wdt_work_queued
, 0);
1495 isp
->wdt_work_queue
= alloc_workqueue(isp
->v4l2_dev
.name
, 0, 1);
1496 if (!isp
->wdt_work_queue
) {
1497 dev_err(isp
->dev
, "Failed to initialize wdt work queue\n");
1501 INIT_WORK(&isp
->wdt_work
, atomisp_wdt_work
);
1503 for (i
= 0; i
< isp
->num_of_streams
; i
++) {
1504 struct atomisp_sub_device
*asd
= &isp
->asd
[i
];
1507 timer_setup(&asd
->wdt
, atomisp_wdt
, 0);
1509 timer_setup(&asd
->video_out_capture
.wdt
,
1511 timer_setup(&asd
->video_out_preview
.wdt
,
1513 timer_setup(&asd
->video_out_vf
.wdt
, atomisp_wdt
, 0);
1514 timer_setup(&asd
->video_out_video_capture
.wdt
,
1523 #define ATOM_ISP_PCI_BAR 0
1525 static int atomisp_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1527 const struct atomisp_platform_data
*pdata
;
1528 struct atomisp_device
*isp
;
1533 if (!is_valid_device(pdev
, id
))
1536 /* Pointer to struct device. */
1537 atomisp_dev
= &pdev
->dev
;
1539 pdata
= atomisp_get_platform_data();
1541 dev_warn(&pdev
->dev
, "no platform data available\n");
1543 err
= pcim_enable_device(pdev
);
1545 dev_err(&pdev
->dev
, "Failed to enable CI ISP device (%d)\n", err
);
1549 start
= pci_resource_start(pdev
, ATOM_ISP_PCI_BAR
);
1550 dev_dbg(&pdev
->dev
, "start: 0x%x\n", start
);
1552 err
= pcim_iomap_regions(pdev
, 1 << ATOM_ISP_PCI_BAR
, pci_name(pdev
));
1554 dev_err(&pdev
->dev
, "Failed to I/O memory remapping (%d)\n", err
);
1558 isp
= devm_kzalloc(&pdev
->dev
, sizeof(*isp
), GFP_KERNEL
);
1561 goto atomisp_dev_alloc_fail
;
1564 isp
->dev
= &pdev
->dev
;
1565 isp
->base
= pcim_iomap_table(pdev
)[ATOM_ISP_PCI_BAR
];
1566 isp
->sw_contex
.power_state
= ATOM_ISP_POWER_UP
;
1567 isp
->saved_regs
.ispmmadr
= start
;
1569 dev_dbg(&pdev
->dev
, "atomisp mmio base: %p\n", isp
->base
);
1571 rt_mutex_init(&isp
->mutex
);
1572 mutex_init(&isp
->streamoff_mutex
);
1573 spin_lock_init(&isp
->lock
);
1575 /* This is not a true PCI device on SoC, so the delay is not needed. */
1578 pci_set_drvdata(pdev
, isp
);
1580 switch (id
->device
& ATOMISP_PCI_DEVICE_SOC_MASK
) {
1581 case ATOMISP_PCI_DEVICE_SOC_MRFLD
:
1582 isp
->media_dev
.hw_revision
=
1583 (ATOMISP_HW_REVISION_ISP2400
1584 << ATOMISP_HW_REVISION_SHIFT
) |
1585 ATOMISP_HW_STEPPING_B0
;
1587 switch (id
->device
) {
1588 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179
:
1589 isp
->dfs
= &dfs_config_merr_1179
;
1591 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A
:
1592 isp
->dfs
= &dfs_config_merr_117a
;
1596 isp
->dfs
= &dfs_config_merr
;
1599 isp
->hpll_freq
= HPLL_FREQ_1600MHZ
;
1601 case ATOMISP_PCI_DEVICE_SOC_BYT
:
1602 isp
->media_dev
.hw_revision
=
1603 (ATOMISP_HW_REVISION_ISP2400
1604 << ATOMISP_HW_REVISION_SHIFT
) |
1605 ATOMISP_HW_STEPPING_B0
;
1608 * Note: some Intel-based tablets with Android use a different
1609 * DFS table. Based on the comments at the Yocto Aero meta
1610 * version of this driver (at the ssid.h header), they're
1611 * identified via a "spid" var:
1613 * androidboot.spid=vend:cust:manu:plat:prod:hard
1615 * As we don't have this upstream, nor we know enough details
1616 * to use a DMI or PCI match table, the old code was just
1617 * removed, but let's keep a note here as a reminder that,
1618 * for certain devices, we may need to limit the max DFS
1619 * frequency to be below certain values, adjusting the
1620 * resolution accordingly.
1622 isp
->dfs
= &dfs_config_byt
;
1625 * HPLL frequency is known to be device-specific, but we don't
1626 * have specs yet for exactly how it varies. Default to
1627 * BYT-CR but let provisioning set it via EFI variable
1629 isp
->hpll_freq
= gmin_get_var_int(&pdev
->dev
, false, "HpllFreq", HPLL_FREQ_2000MHZ
);
1632 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1633 * in power off. Set d3cold_delay to 0 since default 100ms is not
1636 pdev
->d3cold_delay
= 0;
1638 case ATOMISP_PCI_DEVICE_SOC_ANN
:
1639 isp
->media_dev
.hw_revision
= (
1640 #ifdef ISP2401_NEW_INPUT_SYSTEM
1641 ATOMISP_HW_REVISION_ISP2401
1643 ATOMISP_HW_REVISION_ISP2401_LEGACY
1645 << ATOMISP_HW_REVISION_SHIFT
);
1646 isp
->media_dev
.hw_revision
|= pdev
->revision
< 2 ?
1647 ATOMISP_HW_STEPPING_A0
: ATOMISP_HW_STEPPING_B0
;
1648 isp
->dfs
= &dfs_config_merr
;
1649 isp
->hpll_freq
= HPLL_FREQ_1600MHZ
;
1651 case ATOMISP_PCI_DEVICE_SOC_CHT
:
1652 isp
->media_dev
.hw_revision
= (
1653 #ifdef ISP2401_NEW_INPUT_SYSTEM
1654 ATOMISP_HW_REVISION_ISP2401
1656 ATOMISP_HW_REVISION_ISP2401_LEGACY
1658 << ATOMISP_HW_REVISION_SHIFT
);
1659 isp
->media_dev
.hw_revision
|= pdev
->revision
< 2 ?
1660 ATOMISP_HW_STEPPING_A0
: ATOMISP_HW_STEPPING_B0
;
1662 isp
->dfs
= &dfs_config_cht
;
1663 pdev
->d3cold_delay
= 0;
1665 iosf_mbi_read(BT_MBI_UNIT_CCK
, MBI_REG_READ
, CCK_FUSE_REG_0
, &val
);
1666 switch (val
& CCK_FUSE_HPLL_FREQ_MASK
) {
1668 isp
->hpll_freq
= HPLL_FREQ_800MHZ
;
1671 isp
->hpll_freq
= HPLL_FREQ_1600MHZ
;
1674 isp
->hpll_freq
= HPLL_FREQ_2000MHZ
;
1677 isp
->hpll_freq
= HPLL_FREQ_1600MHZ
;
1678 dev_warn(&pdev
->dev
, "read HPLL from cck failed. Default to 1600 MHz.\n");
1682 dev_err(&pdev
->dev
, "un-supported IUNIT device\n");
1684 goto atomisp_dev_alloc_fail
;
1687 dev_info(&pdev
->dev
, "ISP HPLL frequency base = %d MHz\n", isp
->hpll_freq
);
1689 isp
->max_isr_latency
= ATOMISP_MAX_ISR_LATENCY
;
1691 /* Load isp firmware from user space */
1692 if (!defer_fw_load
) {
1693 isp
->firmware
= atomisp_load_firmware(isp
);
1694 if (!isp
->firmware
) {
1696 dev_dbg(&pdev
->dev
, "Firmware load failed\n");
1700 err
= sh_css_check_firmware_version(isp
->dev
, isp
->firmware
->data
);
1702 dev_dbg(&pdev
->dev
, "Firmware version check failed\n");
1703 goto fw_validation_fail
;
1706 dev_info(&pdev
->dev
, "Firmware load will be deferred\n");
1709 pci_set_master(pdev
);
1711 err
= pci_enable_msi(pdev
);
1713 dev_err(&pdev
->dev
, "Failed to enable msi (%d)\n", err
);
1714 goto enable_msi_fail
;
1717 atomisp_msi_irq_init(isp
);
1719 cpu_latency_qos_add_request(&isp
->pm_qos
, PM_QOS_DEFAULT_VALUE
);
1722 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1723 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1724 * backend write 0 will enable Arasan CSI backend, which has
1725 * bugs(like sighting:4567697 and 4567699) and will be removed
1728 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG
, 1);
1730 if ((id
->device
& ATOMISP_PCI_DEVICE_SOC_MASK
) ==
1731 ATOMISP_PCI_DEVICE_SOC_MRFLD
) {
1735 * Workaround for imbalance data eye issue which is observed
1738 pci_read_config_dword(pdev
, MRFLD_PCI_CSI_AFE_TRIM_CONTROL
, &csi_afe_trim
);
1739 csi_afe_trim
&= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK
<<
1740 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT
) |
1741 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK
<<
1742 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT
) |
1743 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK
<<
1744 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT
));
1745 csi_afe_trim
|= (MRFLD_PCI_CSI1_HSRXCLKTRIM
<<
1746 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT
) |
1747 (MRFLD_PCI_CSI2_HSRXCLKTRIM
<<
1748 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT
) |
1749 (MRFLD_PCI_CSI3_HSRXCLKTRIM
<<
1750 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT
);
1751 pci_write_config_dword(pdev
, MRFLD_PCI_CSI_AFE_TRIM_CONTROL
, csi_afe_trim
);
1754 err
= atomisp_initialize_modules(isp
);
1756 dev_err(&pdev
->dev
, "atomisp_initialize_modules (%d)\n", err
);
1757 goto initialize_modules_fail
;
1760 err
= atomisp_register_entities(isp
);
1762 dev_err(&pdev
->dev
, "atomisp_register_entities failed (%d)\n", err
);
1763 goto register_entities_fail
;
1765 err
= atomisp_create_pads_links(isp
);
1767 goto register_entities_fail
;
1768 /* init atomisp wdts */
1769 if (init_atomisp_wdts(isp
) != 0)
1770 goto wdt_work_queue_fail
;
1772 /* save the iunit context only once after all the values are init'ed. */
1773 atomisp_save_iunit_reg(isp
);
1775 pm_runtime_put_noidle(&pdev
->dev
);
1776 pm_runtime_allow(&pdev
->dev
);
1778 hmm_init_mem_stat(repool_pgnr
, dypool_enable
, dypool_pgnr
);
1779 err
= hmm_pool_register(repool_pgnr
, HMM_POOL_TYPE_RESERVED
);
1781 dev_err(&pdev
->dev
, "Failed to register reserved memory pool.\n");
1785 /* Init ISP memory management */
1788 err
= devm_request_threaded_irq(&pdev
->dev
, pdev
->irq
,
1789 atomisp_isr
, atomisp_isr_thread
,
1790 IRQF_SHARED
, "isp_irq", isp
);
1792 dev_err(&pdev
->dev
, "Failed to request irq (%d)\n", err
);
1793 goto request_irq_fail
;
1796 /* Load firmware into ISP memory */
1797 if (!defer_fw_load
) {
1798 err
= atomisp_css_load_firmware(isp
);
1800 dev_err(&pdev
->dev
, "Failed to init css.\n");
1804 dev_dbg(&pdev
->dev
, "Skip css init.\n");
1806 /* Clear FW image from memory */
1807 release_firmware(isp
->firmware
);
1808 isp
->firmware
= NULL
;
1809 isp
->css_env
.isp_css_fw
.data
= NULL
;
1811 atomisp_drvfs_init(isp
);
1816 devm_free_irq(&pdev
->dev
, pdev
->irq
, isp
);
1819 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED
);
1821 destroy_workqueue(isp
->wdt_work_queue
);
1822 wdt_work_queue_fail
:
1823 atomisp_acc_cleanup(isp
);
1824 atomisp_unregister_entities(isp
);
1825 register_entities_fail
:
1826 atomisp_uninitialize_modules(isp
);
1827 initialize_modules_fail
:
1828 cpu_latency_qos_remove_request(&isp
->pm_qos
);
1829 atomisp_msi_irq_uninit(isp
);
1830 pci_disable_msi(pdev
);
1833 release_firmware(isp
->firmware
);
1836 * Switch off ISP, as keeping it powered on would prevent
1837 * reaching S0ix states.
1839 * The following lines have been copied from atomisp suspend path
1842 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
1843 irq
= irq
& 1 << INTR_IIR
;
1844 pci_write_config_dword(pdev
, PCI_INTERRUPT_CTRL
, irq
);
1846 pci_read_config_dword(pdev
, PCI_INTERRUPT_CTRL
, &irq
);
1847 irq
&= ~(1 << INTR_IER
);
1848 pci_write_config_dword(pdev
, PCI_INTERRUPT_CTRL
, irq
);
1850 atomisp_msi_irq_uninit(isp
);
1852 atomisp_ospm_dphy_down(isp
);
1854 /* Address later when we worry about the ...field chips */
1855 if (IS_ENABLED(CONFIG_PM
) && atomisp_mrfld_power_down(isp
))
1856 dev_err(&pdev
->dev
, "Failed to switch off ISP\n");
1858 atomisp_dev_alloc_fail
:
1859 pcim_iounmap_regions(pdev
, 1 << ATOM_ISP_PCI_BAR
);
1865 static void atomisp_pci_remove(struct pci_dev
*pdev
)
1867 struct atomisp_device
*isp
= pci_get_drvdata(pdev
);
1869 dev_info(&pdev
->dev
, "Removing atomisp driver\n");
1871 atomisp_drvfs_exit();
1873 atomisp_acc_cleanup(isp
);
1875 ia_css_unload_firmware();
1878 pm_runtime_forbid(&pdev
->dev
);
1879 pm_runtime_get_noresume(&pdev
->dev
);
1880 cpu_latency_qos_remove_request(&isp
->pm_qos
);
1882 atomisp_msi_irq_uninit(isp
);
1883 atomisp_unregister_entities(isp
);
1885 destroy_workqueue(isp
->wdt_work_queue
);
1886 atomisp_file_input_cleanup(isp
);
1888 release_firmware(isp
->firmware
);
1890 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED
);
1893 static const struct pci_device_id atomisp_pci_tbl
[] = {
1895 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, ATOMISP_PCI_DEVICE_SOC_MRFLD
)},
1896 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179
)},
1897 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A
)},
1899 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, ATOMISP_PCI_DEVICE_SOC_BYT
)},
1900 /* Anniedale (Merrifield+ / Moorefield) */
1901 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, ATOMISP_PCI_DEVICE_SOC_ANN
)},
1903 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, ATOMISP_PCI_DEVICE_SOC_CHT
)},
1907 MODULE_DEVICE_TABLE(pci
, atomisp_pci_tbl
);
1909 static const struct dev_pm_ops atomisp_pm_ops
= {
1910 .runtime_suspend
= atomisp_runtime_suspend
,
1911 .runtime_resume
= atomisp_runtime_resume
,
1912 .suspend
= atomisp_suspend
,
1913 .resume
= atomisp_resume
,
1916 static struct pci_driver atomisp_pci_driver
= {
1918 .pm
= &atomisp_pm_ops
,
1920 .name
= "atomisp-isp2",
1921 .id_table
= atomisp_pci_tbl
,
1922 .probe
= atomisp_pci_probe
,
1923 .remove
= atomisp_pci_remove
,
1926 module_pci_driver(atomisp_pci_driver
);
1928 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1929 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1930 MODULE_LICENSE("GPL");
1931 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");