1 #include <linux/export.h>
3 #include <linux/pm_qos.h>
4 #include <linux/delay.h>
6 /* G-Min addition: "platform_is()" lives in intel_mid_pm.h in the MCG
7 * tree, but it's just platform ID info and we don't want to pull in
8 * the whole SFI-based PM architecture.
10 #define INTEL_ATOM_MRST 0x26
11 #define INTEL_ATOM_MFLD 0x27
12 #define INTEL_ATOM_CLV 0x35
13 #define INTEL_ATOM_MRFLD 0x4a
14 #define INTEL_ATOM_BYT 0x37
15 #define INTEL_ATOM_MOORFLD 0x5a
16 #define INTEL_ATOM_CHT 0x4c
17 static inline int platform_is(u8 model
)
19 return (boot_cpu_data
.x86_model
== model
);
22 #include "../../include/asm/intel_mid_pcihelpers.h"
24 /* Unified message bus read/write operation */
25 static DEFINE_SPINLOCK(msgbus_lock
);
27 static struct pci_dev
*pci_root
;
28 static struct pm_qos_request pm_qos
;
30 #define DW_I2C_NEED_QOS (platform_is(INTEL_ATOM_BYT))
32 static int intel_mid_msgbus_init(void)
34 pci_root
= pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
36 pr_err("%s: Error: msgbus PCI handle NULL\n", __func__
);
40 if (DW_I2C_NEED_QOS
) {
41 pm_qos_add_request(&pm_qos
,
42 PM_QOS_CPU_DMA_LATENCY
,
43 PM_QOS_DEFAULT_VALUE
);
47 fs_initcall(intel_mid_msgbus_init
);
49 u32
intel_mid_msgbus_read32(u8 port
, u32 addr
)
51 unsigned long irq_flags
;
56 cmd
= (PCI_ROOT_MSGBUS_READ
<< 24) | (port
<< 16) |
57 ((addr
& 0xff) << 8) | PCI_ROOT_MSGBUS_DWORD_ENABLE
;
58 cmdext
= addr
& 0xffffff00;
60 spin_lock_irqsave(&msgbus_lock
, irq_flags
);
63 /* This resets to 0 automatically, no need to write 0 */
64 pci_write_config_dword(pci_root
, PCI_ROOT_MSGBUS_CTRL_EXT_REG
,
68 pci_write_config_dword(pci_root
, PCI_ROOT_MSGBUS_CTRL_REG
, cmd
);
69 pci_read_config_dword(pci_root
, PCI_ROOT_MSGBUS_DATA_REG
, &data
);
70 spin_unlock_irqrestore(&msgbus_lock
, irq_flags
);
74 EXPORT_SYMBOL(intel_mid_msgbus_read32
);
76 void intel_mid_msgbus_write32(u8 port
, u32 addr
, u32 data
)
78 unsigned long irq_flags
;
82 cmd
= (PCI_ROOT_MSGBUS_WRITE
<< 24) | (port
<< 16) |
83 ((addr
& 0xFF) << 8) | PCI_ROOT_MSGBUS_DWORD_ENABLE
;
84 cmdext
= addr
& 0xffffff00;
86 spin_lock_irqsave(&msgbus_lock
, irq_flags
);
87 pci_write_config_dword(pci_root
, PCI_ROOT_MSGBUS_DATA_REG
, data
);
90 /* This resets to 0 automatically, no need to write 0 */
91 pci_write_config_dword(pci_root
, PCI_ROOT_MSGBUS_CTRL_EXT_REG
,
95 pci_write_config_dword(pci_root
, PCI_ROOT_MSGBUS_CTRL_REG
, cmd
);
96 spin_unlock_irqrestore(&msgbus_lock
, irq_flags
);
98 EXPORT_SYMBOL(intel_mid_msgbus_write32
);