drivers/staging/media/cxd2099/cxd2099.c

   1 /*
   2  * cxd2099.c: Driver for the CXD2099AR Common Interface Controller
   3  *
   4  * Copyright (C) 2010-2011 Digital Devices GmbH
   5  *
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 only, as published by the Free Software Foundation.
  10  *
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21  * 02110-1301, USA
  22  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  23  */
  24
  25 #include <linux/slab.h>
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/i2c.h>
  29 #include <linux/wait.h>
  30 #include <linux/delay.h>
  31 #include <linux/mutex.h>
  32 #include <linux/io.h>
  33
  34 #include "cxd2099.h"
  35
  36 #define MAX_BUFFER_SIZE 248
  37
  38 struct cxd {
  39         struct dvb_ca_en50221 en;
  40
  41         struct i2c_adapter *i2c;
  42         struct cxd2099_cfg cfg;
  43
  44         u8     regs[0x23];
  45         u8     lastaddress;
  46         u8     clk_reg_f;
  47         u8     clk_reg_b;
  48         int    mode;
  49         int    ready;
  50         int    dr;
  51         int    slot_stat;
  52
  53         u8     amem[1024];
  54         int    amem_read;
  55
  56         int    cammode;
  57         struct mutex lock;
  58 };
  59
  60 static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
  61                          u8 reg, u8 data)
  62 {
  63         u8 m[2] = {reg, data};
  64         struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
  65
  66         if (i2c_transfer(adapter, &msg, 1) != 1) {
  67                 dev_err(&adapter->dev,
  68                         "Failed to write to I2C register %02x@%02x!\n",
  69                         reg, adr);
  70                 return -1;
  71         }
  72         return 0;
  73 }
  74
  75 static int i2c_write(struct i2c_adapter *adapter, u8 adr,
  76                      u8 *data, u8 len)
  77 {
  78         struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
  79
  80         if (i2c_transfer(adapter, &msg, 1) != 1) {
  81                 dev_err(&adapter->dev, "Failed to write to I2C!\n");
  82                 return -1;
  83         }
  84         return 0;
  85 }
  86
  87 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
  88                         u8 reg, u8 *val)
  89 {
  90         struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
  91                                    .buf = &reg, .len = 1},
  92                                   {.addr = adr, .flags = I2C_M_RD,
  93                                    .buf = val, .len = 1} };
  94
  95         if (i2c_transfer(adapter, msgs, 2) != 2) {
  96                 dev_err(&adapter->dev, "error in i2c_read_reg\n");
  97                 return -1;
  98         }
  99         return 0;
 100 }
 101
 102 static int i2c_read(struct i2c_adapter *adapter, u8 adr,
 103                     u8 reg, u8 *data, u8 n)
 104 {
 105         struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
 106                                  .buf = &reg, .len = 1},
 107                                 {.addr = adr, .flags = I2C_M_RD,
 108                                  .buf = data, .len = n} };
 109
 110         if (i2c_transfer(adapter, msgs, 2) != 2) {
 111                 dev_err(&adapter->dev, "error in i2c_read\n");
 112                 return -1;
 113         }
 114         return 0;
 115 }
 116
 117 static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n)
 118 {
 119         int status;
 120
 121         status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
 122         if (!status) {
 123                 ci->lastaddress = adr;
 124                 status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n);
 125         }
 126         return status;
 127 }
 128
 129 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
 130 {
 131         return read_block(ci, reg, val, 1);
 132 }
 133
 134 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
 135 {
 136         int status;
 137         u8 addr[3] = {2, address & 0xff, address >> 8};
 138
 139         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 140         if (!status)
 141                 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
 142         return status;
 143 }
 144
 145 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
 146 {
 147         int status;
 148         u8 addr[3] = {2, address & 0xff, address >> 8};
 149
 150         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 151         if (!status) {
 152                 u8 buf[256] = {3};
 153
 154                 memcpy(buf + 1, data, n);
 155                 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
 156         }
 157         return status;
 158 }
 159
 160 static int read_io(struct cxd *ci, u16 address, u8 *val)
 161 {
 162         int status;
 163         u8 addr[3] = {2, address & 0xff, address >> 8};
 164
 165         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 166         if (!status)
 167                 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1);
 168         return status;
 169 }
 170
 171 static int write_io(struct cxd *ci, u16 address, u8 val)
 172 {
 173         int status;
 174         u8 addr[3] = {2, address & 0xff, address >> 8};
 175         u8 buf[2] = {3, val};
 176
 177         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 178         if (!status)
 179                 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2);
 180         return status;
 181 }
 182
 183 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
 184 {
 185         int status;
 186
 187         status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg);
 188         if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
 189                 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]);
 190         ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
 191         if (!status) {
 192                 ci->lastaddress = reg;
 193                 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]);
 194         }
 195         if (reg == 0x20)
 196                 ci->regs[reg] &= 0x7f;
 197         return status;
 198 }
 199
 200 static int write_reg(struct cxd *ci, u8 reg, u8 val)
 201 {
 202         return write_regm(ci, reg, val, 0xff);
 203 }
 204
 205 #ifdef BUFFER_MODE
 206 static int write_block(struct cxd *ci, u8 adr, u8 *data, int n)
 207 {
 208         int status;
 209         u8 buf[256] = {1};
 210
 211         status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
 212         if (!status) {
 213                 ci->lastaddress = adr;
 214                 memcpy(buf + 1, data, n);
 215                 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
 216         }
 217         return status;
 218 }
 219 #endif
 220
 221 static void set_mode(struct cxd *ci, int mode)
 222 {
 223         if (mode == ci->mode)
 224                 return;
 225
 226         switch (mode) {
 227         case 0x00: /* IO mem */
 228                 write_regm(ci, 0x06, 0x00, 0x07);
 229                 break;
 230         case 0x01: /* ATT mem */
 231                 write_regm(ci, 0x06, 0x02, 0x07);
 232                 break;
 233         default:
 234                 break;
 235         }
 236         ci->mode = mode;
 237 }
 238
 239 static void cam_mode(struct cxd *ci, int mode)
 240 {
 241         if (mode == ci->cammode)
 242                 return;
 243
 244         switch (mode) {
 245         case 0x00:
 246                 write_regm(ci, 0x20, 0x80, 0x80);
 247                 break;
 248         case 0x01:
 249 #ifdef BUFFER_MODE
 250                 if (!ci->en.read_data)
 251                         return;
 252                 dev_info(&ci->i2c->dev, "enable cam buffer mode\n");
 253                 /* write_reg(ci, 0x0d, 0x00); */
 254                 /* write_reg(ci, 0x0e, 0x01); */
 255                 write_regm(ci, 0x08, 0x40, 0x40);
 256                 /* read_reg(ci, 0x12, &dummy); */
 257                 write_regm(ci, 0x08, 0x80, 0x80);
 258 #endif
 259                 break;
 260         default:
 261                 break;
 262         }
 263         ci->cammode = mode;
 264 }
 265
 266 static int init(struct cxd *ci)
 267 {
 268         int status;
 269
 270         mutex_lock(&ci->lock);
 271         ci->mode = -1;
 272         do {
 273                 status = write_reg(ci, 0x00, 0x00);
 274                 if (status < 0)
 275                         break;
 276                 status = write_reg(ci, 0x01, 0x00);
 277                 if (status < 0)
 278                         break;
 279                 status = write_reg(ci, 0x02, 0x10);
 280                 if (status < 0)
 281                         break;
 282                 status = write_reg(ci, 0x03, 0x00);
 283                 if (status < 0)
 284                         break;
 285                 status = write_reg(ci, 0x05, 0xFF);
 286                 if (status < 0)
 287                         break;
 288                 status = write_reg(ci, 0x06, 0x1F);
 289                 if (status < 0)
 290                         break;
 291                 status = write_reg(ci, 0x07, 0x1F);
 292                 if (status < 0)
 293                         break;
 294                 status = write_reg(ci, 0x08, 0x28);
 295                 if (status < 0)
 296                         break;
 297                 status = write_reg(ci, 0x14, 0x20);
 298                 if (status < 0)
 299                         break;
 300
 301                 /* TOSTRT = 8, Mode B (gated clock), falling Edge,
 302                  * Serial, POL=HIGH, MSB
 303                  */
 304                 status = write_reg(ci, 0x0A, 0xA7);
 305                 if (status < 0)
 306                         break;
 307
 308                 status = write_reg(ci, 0x0B, 0x33);
 309                 if (status < 0)
 310                         break;
 311                 status = write_reg(ci, 0x0C, 0x33);
 312                 if (status < 0)
 313                         break;
 314
 315                 status = write_regm(ci, 0x14, 0x00, 0x0F);
 316                 if (status < 0)
 317                         break;
 318                 status = write_reg(ci, 0x15, ci->clk_reg_b);
 319                 if (status < 0)
 320                         break;
 321                 status = write_regm(ci, 0x16, 0x00, 0x0F);
 322                 if (status < 0)
 323                         break;
 324                 status = write_reg(ci, 0x17, ci->clk_reg_f);
 325                 if (status < 0)
 326                         break;
 327
 328                 if (ci->cfg.clock_mode) {
 329                         if (ci->cfg.polarity) {
 330                                 status = write_reg(ci, 0x09, 0x6f);
 331                                 if (status < 0)
 332                                         break;
 333                         } else {
 334                                 status = write_reg(ci, 0x09, 0x6d);
 335                                 if (status < 0)
 336                                         break;
 337                         }
 338                         status = write_reg(ci, 0x20, 0x68);
 339                         if (status < 0)
 340                                 break;
 341                         status = write_reg(ci, 0x21, 0x00);
 342                         if (status < 0)
 343                                 break;
 344                         status = write_reg(ci, 0x22, 0x02);
 345                         if (status < 0)
 346                                 break;
 347                 } else {
 348                         if (ci->cfg.polarity) {
 349                                 status = write_reg(ci, 0x09, 0x4f);
 350                                 if (status < 0)
 351                                         break;
 352                         } else {
 353                                 status = write_reg(ci, 0x09, 0x4d);
 354                                 if (status < 0)
 355                                         break;
 356                         }
 357
 358                         status = write_reg(ci, 0x20, 0x28);
 359                         if (status < 0)
 360                                 break;
 361                         status = write_reg(ci, 0x21, 0x00);
 362                         if (status < 0)
 363                                 break;
 364                         status = write_reg(ci, 0x22, 0x07);
 365                         if (status < 0)
 366                                 break;
 367                 }
 368
 369                 status = write_regm(ci, 0x20, 0x80, 0x80);
 370                 if (status < 0)
 371                         break;
 372                 status = write_regm(ci, 0x03, 0x02, 0x02);
 373                 if (status < 0)
 374                         break;
 375                 status = write_reg(ci, 0x01, 0x04);
 376                 if (status < 0)
 377                         break;
 378                 status = write_reg(ci, 0x00, 0x31);
 379                 if (status < 0)
 380                         break;
 381
 382                 /* Put TS in bypass */
 383                 status = write_regm(ci, 0x09, 0x08, 0x08);
 384                 if (status < 0)
 385                         break;
 386                 ci->cammode = -1;
 387                 cam_mode(ci, 0);
 388         } while (0);
 389         mutex_unlock(&ci->lock);
 390
 391         return 0;
 392 }
 393
 394 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
 395                               int slot, int address)
 396 {
 397         struct cxd *ci = ca->data;
 398         u8 val;
 399
 400         mutex_lock(&ci->lock);
 401         set_mode(ci, 1);
 402         read_pccard(ci, address, &val, 1);
 403         mutex_unlock(&ci->lock);
 404         /* printk(KERN_INFO "%02x:%02x\n", address,val); */
 405         return val;
 406 }
 407
 408 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
 409                                int address, u8 value)
 410 {
 411         struct cxd *ci = ca->data;
 412
 413         mutex_lock(&ci->lock);
 414         set_mode(ci, 1);
 415         write_pccard(ci, address, &value, 1);
 416         mutex_unlock(&ci->lock);
 417         return 0;
 418 }
 419
 420 static int read_cam_control(struct dvb_ca_en50221 *ca,
 421                             int slot, u8 address)
 422 {
 423         struct cxd *ci = ca->data;
 424         u8 val;
 425
 426         mutex_lock(&ci->lock);
 427         set_mode(ci, 0);
 428         read_io(ci, address, &val);
 429         mutex_unlock(&ci->lock);
 430         return val;
 431 }
 432
 433 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
 434                              u8 address, u8 value)
 435 {
 436         struct cxd *ci = ca->data;
 437
 438         mutex_lock(&ci->lock);
 439         set_mode(ci, 0);
 440         write_io(ci, address, value);
 441         mutex_unlock(&ci->lock);
 442         return 0;
 443 }
 444
 445 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
 446 {
 447         struct cxd *ci = ca->data;
 448
 449         mutex_lock(&ci->lock);
 450         cam_mode(ci, 0);
 451         write_reg(ci, 0x00, 0x21);
 452         write_reg(ci, 0x06, 0x1F);
 453         write_reg(ci, 0x00, 0x31);
 454         write_regm(ci, 0x20, 0x80, 0x80);
 455         write_reg(ci, 0x03, 0x02);
 456         ci->ready = 0;
 457         ci->mode = -1;
 458         {
 459                 int i;
 460
 461                 for (i = 0; i < 100; i++) {
 462                         usleep_range(10000, 11000);
 463                         if (ci->ready)
 464                                 break;
 465                 }
 466         }
 467         mutex_unlock(&ci->lock);
 468         /* msleep(500); */
 469         return 0;
 470 }
 471
 472 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
 473 {
 474         struct cxd *ci = ca->data;
 475
 476         dev_info(&ci->i2c->dev, "%s\n", __func__);
 477         mutex_lock(&ci->lock);
 478         write_regm(ci, 0x09, 0x08, 0x08);
 479         write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
 480         write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
 481         ci->mode = -1;
 482         mutex_unlock(&ci->lock);
 483         return 0;
 484 }
 485
 486 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
 487 {
 488         struct cxd *ci = ca->data;
 489
 490         mutex_lock(&ci->lock);
 491         write_regm(ci, 0x09, 0x00, 0x08);
 492         set_mode(ci, 0);
 493 #ifdef BUFFER_MODE
 494         cam_mode(ci, 1);
 495 #endif
 496         mutex_unlock(&ci->lock);
 497         return 0;
 498 }
 499
 500 static int campoll(struct cxd *ci)
 501 {
 502         u8 istat;
 503
 504         read_reg(ci, 0x04, &istat);
 505         if (!istat)
 506                 return 0;
 507         write_reg(ci, 0x05, istat);
 508
 509         if (istat & 0x40) {
 510                 ci->dr = 1;
 511                 dev_info(&ci->i2c->dev, "DR\n");
 512         }
 513         if (istat & 0x20)
 514                 dev_info(&ci->i2c->dev, "WC\n");
 515
 516         if (istat & 2) {
 517                 u8 slotstat;
 518
 519                 read_reg(ci, 0x01, &slotstat);
 520                 if (!(2 & slotstat)) {
 521                         if (!ci->slot_stat) {
 522                                 ci->slot_stat = DVB_CA_EN50221_POLL_CAM_PRESENT;
 523                                 write_regm(ci, 0x03, 0x08, 0x08);
 524                         }
 525
 526                 } else {
 527                         if (ci->slot_stat) {
 528                                 ci->slot_stat = 0;
 529                                 write_regm(ci, 0x03, 0x00, 0x08);
 530                                 dev_info(&ci->i2c->dev, "NO CAM\n");
 531                                 ci->ready = 0;
 532                         }
 533                 }
 534                 if (istat & 8 &&
 535                     ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
 536                         ci->ready = 1;
 537                         ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
 538                 }
 539         }
 540         return 0;
 541 }
 542
 543 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
 544 {
 545         struct cxd *ci = ca->data;
 546         u8 slotstat;
 547
 548         mutex_lock(&ci->lock);
 549         campoll(ci);
 550         read_reg(ci, 0x01, &slotstat);
 551         mutex_unlock(&ci->lock);
 552
 553         return ci->slot_stat;
 554 }
 555
 556 #ifdef BUFFER_MODE
 557 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
 558 {
 559         struct cxd *ci = ca->data;
 560         u8 msb, lsb;
 561         u16 len;
 562
 563         mutex_lock(&ci->lock);
 564         campoll(ci);
 565         mutex_unlock(&ci->lock);
 566
 567         dev_info(&ci->i2c->dev, "%s\n", __func__);
 568         if (!ci->dr)
 569                 return 0;
 570
 571         mutex_lock(&ci->lock);
 572         read_reg(ci, 0x0f, &msb);
 573         read_reg(ci, 0x10, &lsb);
 574         len = (msb << 8) | lsb;
 575         read_block(ci, 0x12, ebuf, len);
 576         ci->dr = 0;
 577         mutex_unlock(&ci->lock);
 578
 579         return len;
 580 }
 581
 582 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
 583 {
 584         struct cxd *ci = ca->data;
 585
 586         mutex_lock(&ci->lock);
 587         dev_info(&ci->i2c->dev, "%s %d\n", __func__, ecount);
 588         write_reg(ci, 0x0d, ecount >> 8);
 589         write_reg(ci, 0x0e, ecount & 0xff);
 590         write_block(ci, 0x11, ebuf, ecount);
 591         mutex_unlock(&ci->lock);
 592         return ecount;
 593 }
 594 #endif
 595
 596 static struct dvb_ca_en50221 en_templ = {
 597         .read_attribute_mem  = read_attribute_mem,
 598         .write_attribute_mem = write_attribute_mem,
 599         .read_cam_control    = read_cam_control,
 600         .write_cam_control   = write_cam_control,
 601         .slot_reset          = slot_reset,
 602         .slot_shutdown       = slot_shutdown,
 603         .slot_ts_enable      = slot_ts_enable,
 604         .poll_slot_status    = poll_slot_status,
 605 #ifdef BUFFER_MODE
 606         .read_data           = read_data,
 607         .write_data          = write_data,
 608 #endif
 609
 610 };
 611
 612 struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg,
 613                                       void *priv,
 614                                       struct i2c_adapter *i2c)
 615 {
 616         struct cxd *ci;
 617         u8 val;
 618
 619         if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) {
 620                 dev_info(&i2c->dev, "No CXD2099 detected at %02x\n", cfg->adr);
 621                 return NULL;
 622         }
 623
 624         ci = kzalloc(sizeof(*ci), GFP_KERNEL);
 625         if (!ci)
 626                 return NULL;
 627
 628         mutex_init(&ci->lock);
 629         ci->cfg = *cfg;
 630         ci->i2c = i2c;
 631         ci->lastaddress = 0xff;
 632         ci->clk_reg_b = 0x4a;
 633         ci->clk_reg_f = 0x1b;
 634
 635         ci->en = en_templ;
 636         ci->en.data = ci;
 637         init(ci);
 638         dev_info(&i2c->dev, "Attached CXD2099AR at %02x\n", ci->cfg.adr);
 639         return &ci->en;
 640 }
 641 EXPORT_SYMBOL(cxd2099_attach);
 642
 643 MODULE_DESCRIPTION("cxd2099");
 644 MODULE_AUTHOR("Ralph Metzler");
 645 MODULE_LICENSE("GPL");