drivers/staging/media/cxd2099/cxd2099.c

   1 /*
   2  * cxd2099.c: Driver for the CXD2099AR Common Interface Controller
   3  *
   4  * Copyright (C) 2010-2013 Digital Devices GmbH
   5  *
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 only, as published by the Free Software Foundation.
  10  *
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21  * 02110-1301, USA
  22  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  23  */
  24
  25 #include <linux/slab.h>
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/i2c.h>
  29 #include <linux/wait.h>
  30 #include <linux/delay.h>
  31 #include <linux/mutex.h>
  32 #include <linux/io.h>
  33
  34 #include "cxd2099.h"
  35
  36 /* comment this line to deactivate the cxd2099ar buffer mode */
  37 #define BUFFER_MODE 1
  38
  39 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount);
  40
  41 struct cxd {
  42         struct dvb_ca_en50221 en;
  43
  44         struct i2c_adapter *i2c;
  45         struct cxd2099_cfg cfg;
  46
  47         u8     regs[0x23];
  48         u8     lastaddress;
  49         u8     clk_reg_f;
  50         u8     clk_reg_b;
  51         int    mode;
  52         int    ready;
  53         int    dr;
  54         int    write_busy;
  55         int    slot_stat;
  56
  57         u8     amem[1024];
  58         int    amem_read;
  59
  60         int    cammode;
  61         struct mutex lock;
  62
  63         u8     rbuf[1028];
  64         u8     wbuf[1028];
  65 };
  66
  67 static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
  68                          u8 reg, u8 data)
  69 {
  70         u8 m[2] = {reg, data};
  71         struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
  72
  73         if (i2c_transfer(adapter, &msg, 1) != 1) {
  74                 dev_err(&adapter->dev,
  75                         "Failed to write to I2C register %02x@%02x!\n",
  76                         reg, adr);
  77                 return -1;
  78         }
  79         return 0;
  80 }
  81
  82 static int i2c_write(struct i2c_adapter *adapter, u8 adr,
  83                      u8 *data, u16 len)
  84 {
  85         struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
  86
  87         if (i2c_transfer(adapter, &msg, 1) != 1) {
  88                 dev_err(&adapter->dev, "Failed to write to I2C!\n");
  89                 return -1;
  90         }
  91         return 0;
  92 }
  93
  94 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
  95                         u8 reg, u8 *val)
  96 {
  97         struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
  98                                    .buf = &reg, .len = 1},
  99                                   {.addr = adr, .flags = I2C_M_RD,
 100                                    .buf = val, .len = 1} };
 101
 102         if (i2c_transfer(adapter, msgs, 2) != 2) {
 103                 dev_err(&adapter->dev, "error in i2c_read_reg\n");
 104                 return -1;
 105         }
 106         return 0;
 107 }
 108
 109 static int i2c_read(struct i2c_adapter *adapter, u8 adr,
 110                     u8 reg, u8 *data, u16 n)
 111 {
 112         struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
 113                                    .buf = &reg, .len = 1},
 114                                   {.addr = adr, .flags = I2C_M_RD,
 115                                    .buf = data, .len = n} };
 116
 117         if (i2c_transfer(adapter, msgs, 2) != 2) {
 118                 dev_err(&adapter->dev, "error in i2c_read\n");
 119                 return -1;
 120         }
 121         return 0;
 122 }
 123
 124 static int read_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
 125 {
 126         int status = 0;
 127
 128         if (ci->lastaddress != adr)
 129                 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
 130         if (!status) {
 131                 ci->lastaddress = adr;
 132
 133                 while (n) {
 134                         int len = n;
 135
 136                         if (ci->cfg.max_i2c && (len > ci->cfg.max_i2c))
 137                                 len = ci->cfg.max_i2c;
 138                         status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, len);
 139                         if (status)
 140                                 return status;
 141                         data += len;
 142                         n -= len;
 143                 }
 144         }
 145         return status;
 146 }
 147
 148 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
 149 {
 150         return read_block(ci, reg, val, 1);
 151 }
 152
 153 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
 154 {
 155         int status;
 156         u8 addr[3] = {2, address & 0xff, address >> 8};
 157
 158         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 159         if (!status)
 160                 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
 161         return status;
 162 }
 163
 164 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
 165 {
 166         int status;
 167         u8 addr[3] = {2, address & 0xff, address >> 8};
 168
 169         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 170         if (!status) {
 171                 u8 buf[256] = {3};
 172
 173                 memcpy(buf + 1, data, n);
 174                 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
 175         }
 176         return status;
 177 }
 178
 179 static int read_io(struct cxd *ci, u16 address, u8 *val)
 180 {
 181         int status;
 182         u8 addr[3] = {2, address & 0xff, address >> 8};
 183
 184         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 185         if (!status)
 186                 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1);
 187         return status;
 188 }
 189
 190 static int write_io(struct cxd *ci, u16 address, u8 val)
 191 {
 192         int status;
 193         u8 addr[3] = {2, address & 0xff, address >> 8};
 194         u8 buf[2] = {3, val};
 195
 196         status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
 197         if (!status)
 198                 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2);
 199         return status;
 200 }
 201
 202 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
 203 {
 204         int status = 0;
 205
 206         if (ci->lastaddress != reg)
 207                 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg);
 208         if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
 209                 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]);
 210         ci->lastaddress = reg;
 211         ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
 212         if (!status)
 213                 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]);
 214         if (reg == 0x20)
 215                 ci->regs[reg] &= 0x7f;
 216         return status;
 217 }
 218
 219 static int write_reg(struct cxd *ci, u8 reg, u8 val)
 220 {
 221         return write_regm(ci, reg, val, 0xff);
 222 }
 223
 224 #ifdef BUFFER_MODE
 225 static int write_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
 226 {
 227         int status = 0;
 228         u8 *buf = ci->wbuf;
 229
 230         if (ci->lastaddress != adr)
 231                 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
 232         if (status)
 233                 return status;
 234
 235         ci->lastaddress = adr;
 236         buf[0] = 1;
 237         while (n) {
 238                 int len = n;
 239
 240                 if (ci->cfg.max_i2c && (len + 1 > ci->cfg.max_i2c))
 241                         len = ci->cfg.max_i2c - 1;
 242                 memcpy(buf + 1, data, len);
 243                 status = i2c_write(ci->i2c, ci->cfg.adr, buf, len + 1);
 244                 if (status)
 245                         return status;
 246                 n -= len;
 247                 data += len;
 248         }
 249         return status;
 250 }
 251 #endif
 252
 253 static void set_mode(struct cxd *ci, int mode)
 254 {
 255         if (mode == ci->mode)
 256                 return;
 257
 258         switch (mode) {
 259         case 0x00: /* IO mem */
 260                 write_regm(ci, 0x06, 0x00, 0x07);
 261                 break;
 262         case 0x01: /* ATT mem */
 263                 write_regm(ci, 0x06, 0x02, 0x07);
 264                 break;
 265         default:
 266                 break;
 267         }
 268         ci->mode = mode;
 269 }
 270
 271 static void cam_mode(struct cxd *ci, int mode)
 272 {
 273         u8 dummy;
 274
 275         if (mode == ci->cammode)
 276                 return;
 277
 278         switch (mode) {
 279         case 0x00:
 280                 write_regm(ci, 0x20, 0x80, 0x80);
 281                 break;
 282         case 0x01:
 283                 if (!ci->en.read_data)
 284                         return;
 285                 ci->write_busy = 0;
 286                 dev_info(&ci->i2c->dev, "enable cam buffer mode\n");
 287                 write_reg(ci, 0x0d, 0x00);
 288                 write_reg(ci, 0x0e, 0x01);
 289                 write_regm(ci, 0x08, 0x40, 0x40);
 290                 read_reg(ci, 0x12, &dummy);
 291                 write_regm(ci, 0x08, 0x80, 0x80);
 292                 break;
 293         default:
 294                 break;
 295         }
 296         ci->cammode = mode;
 297 }
 298
 299 static int init(struct cxd *ci)
 300 {
 301         int status;
 302
 303         mutex_lock(&ci->lock);
 304         ci->mode = -1;
 305         do {
 306                 status = write_reg(ci, 0x00, 0x00);
 307                 if (status < 0)
 308                         break;
 309                 status = write_reg(ci, 0x01, 0x00);
 310                 if (status < 0)
 311                         break;
 312                 status = write_reg(ci, 0x02, 0x10);
 313                 if (status < 0)
 314                         break;
 315                 status = write_reg(ci, 0x03, 0x00);
 316                 if (status < 0)
 317                         break;
 318                 status = write_reg(ci, 0x05, 0xFF);
 319                 if (status < 0)
 320                         break;
 321                 status = write_reg(ci, 0x06, 0x1F);
 322                 if (status < 0)
 323                         break;
 324                 status = write_reg(ci, 0x07, 0x1F);
 325                 if (status < 0)
 326                         break;
 327                 status = write_reg(ci, 0x08, 0x28);
 328                 if (status < 0)
 329                         break;
 330                 status = write_reg(ci, 0x14, 0x20);
 331                 if (status < 0)
 332                         break;
 333
 334                 /* TOSTRT = 8, Mode B (gated clock), falling Edge,
 335                  * Serial, POL=HIGH, MSB
 336                  */
 337                 status = write_reg(ci, 0x0A, 0xA7);
 338                 if (status < 0)
 339                         break;
 340
 341                 status = write_reg(ci, 0x0B, 0x33);
 342                 if (status < 0)
 343                         break;
 344                 status = write_reg(ci, 0x0C, 0x33);
 345                 if (status < 0)
 346                         break;
 347
 348                 status = write_regm(ci, 0x14, 0x00, 0x0F);
 349                 if (status < 0)
 350                         break;
 351                 status = write_reg(ci, 0x15, ci->clk_reg_b);
 352                 if (status < 0)
 353                         break;
 354                 status = write_regm(ci, 0x16, 0x00, 0x0F);
 355                 if (status < 0)
 356                         break;
 357                 status = write_reg(ci, 0x17, ci->clk_reg_f);
 358                 if (status < 0)
 359                         break;
 360
 361                 if (ci->cfg.clock_mode == 2) {
 362                         /* bitrate*2^13/ 72000 */
 363                         u32 reg = ((ci->cfg.bitrate << 13) + 71999) / 72000;
 364
 365                         if (ci->cfg.polarity) {
 366                                 status = write_reg(ci, 0x09, 0x6f);
 367                                 if (status < 0)
 368                                         break;
 369                         } else {
 370                                 status = write_reg(ci, 0x09, 0x6d);
 371                                 if (status < 0)
 372                                         break;
 373                         }
 374                         status = write_reg(ci, 0x20, 0x08);
 375                         if (status < 0)
 376                                 break;
 377                         status = write_reg(ci, 0x21, (reg >> 8) & 0xff);
 378                         if (status < 0)
 379                                 break;
 380                         status = write_reg(ci, 0x22, reg & 0xff);
 381                         if (status < 0)
 382                                 break;
 383                 } else if (ci->cfg.clock_mode == 1) {
 384                         if (ci->cfg.polarity) {
 385                                 status = write_reg(ci, 0x09, 0x6f); /* D */
 386                                 if (status < 0)
 387                                         break;
 388                         } else {
 389                                 status = write_reg(ci, 0x09, 0x6d);
 390                                 if (status < 0)
 391                                         break;
 392                         }
 393                         status = write_reg(ci, 0x20, 0x68);
 394                         if (status < 0)
 395                                 break;
 396                         status = write_reg(ci, 0x21, 0x00);
 397                         if (status < 0)
 398                                 break;
 399                         status = write_reg(ci, 0x22, 0x02);
 400                         if (status < 0)
 401                                 break;
 402                 } else {
 403                         if (ci->cfg.polarity) {
 404                                 status = write_reg(ci, 0x09, 0x4f); /* C */
 405                                 if (status < 0)
 406                                         break;
 407                         } else {
 408                                 status = write_reg(ci, 0x09, 0x4d);
 409                                 if (status < 0)
 410                                         break;
 411                         }
 412                         status = write_reg(ci, 0x20, 0x28);
 413                         if (status < 0)
 414                                 break;
 415                         status = write_reg(ci, 0x21, 0x00);
 416                         if (status < 0)
 417                                 break;
 418                         status = write_reg(ci, 0x22, 0x07);
 419                         if (status < 0)
 420                                 break;
 421                 }
 422
 423                 status = write_regm(ci, 0x20, 0x80, 0x80);
 424                 if (status < 0)
 425                         break;
 426                 status = write_regm(ci, 0x03, 0x02, 0x02);
 427                 if (status < 0)
 428                         break;
 429                 status = write_reg(ci, 0x01, 0x04);
 430                 if (status < 0)
 431                         break;
 432                 status = write_reg(ci, 0x00, 0x31);
 433                 if (status < 0)
 434                         break;
 435
 436                 /* Put TS in bypass */
 437                 status = write_regm(ci, 0x09, 0x08, 0x08);
 438                 if (status < 0)
 439                         break;
 440                 ci->cammode = -1;
 441                 cam_mode(ci, 0);
 442         } while (0);
 443         mutex_unlock(&ci->lock);
 444
 445         return 0;
 446 }
 447
 448 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
 449                               int slot, int address)
 450 {
 451         struct cxd *ci = ca->data;
 452         u8 val;
 453
 454         mutex_lock(&ci->lock);
 455         set_mode(ci, 1);
 456         read_pccard(ci, address, &val, 1);
 457         mutex_unlock(&ci->lock);
 458         return val;
 459 }
 460
 461 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
 462                                int address, u8 value)
 463 {
 464         struct cxd *ci = ca->data;
 465
 466         mutex_lock(&ci->lock);
 467         set_mode(ci, 1);
 468         write_pccard(ci, address, &value, 1);
 469         mutex_unlock(&ci->lock);
 470         return 0;
 471 }
 472
 473 static int read_cam_control(struct dvb_ca_en50221 *ca,
 474                             int slot, u8 address)
 475 {
 476         struct cxd *ci = ca->data;
 477         u8 val;
 478
 479         mutex_lock(&ci->lock);
 480         set_mode(ci, 0);
 481         read_io(ci, address, &val);
 482         mutex_unlock(&ci->lock);
 483         return val;
 484 }
 485
 486 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
 487                              u8 address, u8 value)
 488 {
 489         struct cxd *ci = ca->data;
 490
 491         mutex_lock(&ci->lock);
 492         set_mode(ci, 0);
 493         write_io(ci, address, value);
 494         mutex_unlock(&ci->lock);
 495         return 0;
 496 }
 497
 498 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
 499 {
 500         struct cxd *ci = ca->data;
 501
 502         if (ci->cammode)
 503                 read_data(ca, slot, ci->rbuf, 0);
 504
 505         mutex_lock(&ci->lock);
 506         cam_mode(ci, 0);
 507         write_reg(ci, 0x00, 0x21);
 508         write_reg(ci, 0x06, 0x1F);
 509         write_reg(ci, 0x00, 0x31);
 510         write_regm(ci, 0x20, 0x80, 0x80);
 511         write_reg(ci, 0x03, 0x02);
 512         ci->ready = 0;
 513         ci->mode = -1;
 514         {
 515                 int i;
 516
 517                 for (i = 0; i < 100; i++) {
 518                         usleep_range(10000, 11000);
 519                         if (ci->ready)
 520                                 break;
 521                 }
 522         }
 523         mutex_unlock(&ci->lock);
 524         return 0;
 525 }
 526
 527 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
 528 {
 529         struct cxd *ci = ca->data;
 530
 531         dev_info(&ci->i2c->dev, "%s\n", __func__);
 532         if (ci->cammode)
 533                 read_data(ca, slot, ci->rbuf, 0);
 534         mutex_lock(&ci->lock);
 535         write_reg(ci, 0x00, 0x21);
 536         write_reg(ci, 0x06, 0x1F);
 537         msleep(300);
 538
 539         write_regm(ci, 0x09, 0x08, 0x08);
 540         write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
 541         write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
 542
 543         ci->mode = -1;
 544         ci->write_busy = 0;
 545         mutex_unlock(&ci->lock);
 546         return 0;
 547 }
 548
 549 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
 550 {
 551         struct cxd *ci = ca->data;
 552
 553         mutex_lock(&ci->lock);
 554         write_regm(ci, 0x09, 0x00, 0x08);
 555         set_mode(ci, 0);
 556         cam_mode(ci, 1);
 557         mutex_unlock(&ci->lock);
 558         return 0;
 559 }
 560
 561 static int campoll(struct cxd *ci)
 562 {
 563         u8 istat;
 564
 565         read_reg(ci, 0x04, &istat);
 566         if (!istat)
 567                 return 0;
 568         write_reg(ci, 0x05, istat);
 569
 570         if (istat & 0x40)
 571                 ci->dr = 1;
 572         if (istat & 0x20)
 573                 ci->write_busy = 0;
 574
 575         if (istat & 2) {
 576                 u8 slotstat;
 577
 578                 read_reg(ci, 0x01, &slotstat);
 579                 if (!(2 & slotstat)) {
 580                         if (!ci->slot_stat) {
 581                                 ci->slot_stat |=
 582                                               DVB_CA_EN50221_POLL_CAM_PRESENT;
 583                                 write_regm(ci, 0x03, 0x08, 0x08);
 584                         }
 585
 586                 } else {
 587                         if (ci->slot_stat) {
 588                                 ci->slot_stat = 0;
 589                                 write_regm(ci, 0x03, 0x00, 0x08);
 590                                 dev_info(&ci->i2c->dev, "NO CAM\n");
 591                                 ci->ready = 0;
 592                         }
 593                 }
 594                 if ((istat & 8) &&
 595                     (ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT)) {
 596                         ci->ready = 1;
 597                         ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
 598                 }
 599         }
 600         return 0;
 601 }
 602
 603 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
 604 {
 605         struct cxd *ci = ca->data;
 606         u8 slotstat;
 607
 608         mutex_lock(&ci->lock);
 609         campoll(ci);
 610         read_reg(ci, 0x01, &slotstat);
 611         mutex_unlock(&ci->lock);
 612
 613         return ci->slot_stat;
 614 }
 615
 616 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
 617 {
 618         struct cxd *ci = ca->data;
 619         u8 msb, lsb;
 620         u16 len;
 621
 622         mutex_lock(&ci->lock);
 623         campoll(ci);
 624         mutex_unlock(&ci->lock);
 625
 626         if (!ci->dr)
 627                 return 0;
 628
 629         mutex_lock(&ci->lock);
 630         read_reg(ci, 0x0f, &msb);
 631         read_reg(ci, 0x10, &lsb);
 632         len = ((u16)msb << 8) | lsb;
 633         if (len > ecount || len < 2) {
 634                 /* read it anyway or cxd may hang */
 635                 read_block(ci, 0x12, ci->rbuf, len);
 636                 mutex_unlock(&ci->lock);
 637                 return -EIO;
 638         }
 639         read_block(ci, 0x12, ebuf, len);
 640         ci->dr = 0;
 641         mutex_unlock(&ci->lock);
 642         return len;
 643 }
 644
 645 #ifdef BUFFER_MODE
 646
 647 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
 648 {
 649         struct cxd *ci = ca->data;
 650
 651         if (ci->write_busy)
 652                 return -EAGAIN;
 653         mutex_lock(&ci->lock);
 654         write_reg(ci, 0x0d, ecount >> 8);
 655         write_reg(ci, 0x0e, ecount & 0xff);
 656         write_block(ci, 0x11, ebuf, ecount);
 657         ci->write_busy = 1;
 658         mutex_unlock(&ci->lock);
 659         return ecount;
 660 }
 661 #endif
 662
 663 static struct dvb_ca_en50221 en_templ = {
 664         .read_attribute_mem  = read_attribute_mem,
 665         .write_attribute_mem = write_attribute_mem,
 666         .read_cam_control    = read_cam_control,
 667         .write_cam_control   = write_cam_control,
 668         .slot_reset          = slot_reset,
 669         .slot_shutdown       = slot_shutdown,
 670         .slot_ts_enable      = slot_ts_enable,
 671         .poll_slot_status    = poll_slot_status,
 672 #ifdef BUFFER_MODE
 673         .read_data           = read_data,
 674         .write_data          = write_data,
 675 #endif
 676
 677 };
 678
 679 struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg,
 680                                       void *priv,
 681                                       struct i2c_adapter *i2c)
 682 {
 683         struct cxd *ci;
 684         u8 val;
 685
 686         if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) {
 687                 dev_info(&i2c->dev, "No CXD2099 detected at %02x\n", cfg->adr);
 688                 return NULL;
 689         }
 690
 691         ci = kzalloc(sizeof(*ci), GFP_KERNEL);
 692         if (!ci)
 693                 return NULL;
 694
 695         mutex_init(&ci->lock);
 696         ci->cfg = *cfg;
 697         ci->i2c = i2c;
 698         ci->lastaddress = 0xff;
 699         ci->clk_reg_b = 0x4a;
 700         ci->clk_reg_f = 0x1b;
 701
 702         ci->en = en_templ;
 703         ci->en.data = ci;
 704         init(ci);
 705         dev_info(&i2c->dev, "Attached CXD2099AR at %02x\n", ci->cfg.adr);
 706         return &ci->en;
 707 }
 708 EXPORT_SYMBOL(cxd2099_attach);
 709
 710 MODULE_DESCRIPTION("cxd2099");
 711 MODULE_AUTHOR("Ralph Metzler");
 712 MODULE_LICENSE("GPL");