]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/staging/meilhaus/me4600_ao.c
projects / mirror_ubuntu-zesty-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'for-2.6.30' into for-2.6.31
[mirror_ubuntu-zesty-kernel.git] / drivers / staging / meilhaus / me4600_ao.c
1 /**
2 * @file me4600_ao.c
3 *
4 * @brief ME-4000 analog output subdevice instance.
5 * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * @author Guenter Gebhardt
7 * @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
8 */
9
10 /*
11 * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
12 *
13 * This file is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28 #ifndef __KERNEL__
29 # define __KERNEL__
30 #endif
31
32 ///Common part. (For normal and Bosch builds.)
33
34 /* Includes
35 */
36
37 #include <linux/module.h>
38
39 #include <linux/slab.h>
40 #include <linux/spinlock.h>
41 #include <linux/io.h>
42 #include <linux/uaccess.h>
43 #include <linux/types.h>
44 #include <linux/version.h>
45 #include <linux/interrupt.h>
46 #include <linux/delay.h>
47
48 #include "medefines.h"
49 #include "meinternal.h"
50 #include "meerror.h"
51
52 #include "medebug.h"
53 #include "meids.h"
54 #include "me4600_reg.h"
55 #include "me4600_ao_reg.h"
56 #include "me4600_ao.h"
57
58 /* Defines
59 */
60
61 static int me4600_ao_query_range_by_min_max(me_subdevice_t *subdevice,
62 int unit,
63 int *min,
64 int *max, int *maxdata, int *range);
65
66 static int me4600_ao_query_number_ranges(me_subdevice_t *subdevice,
67 int unit, int *count);
68
69 static int me4600_ao_query_range_info(me_subdevice_t *subdevice,
70 int range,
71 int *unit,
72 int *min, int *max, int *maxdata);
73
74 static int me4600_ao_query_timer(me_subdevice_t *subdevice,
75 int timer,
76 int *base_frequency,
77 long long *min_ticks, long long *max_ticks);
78
79 static int me4600_ao_query_number_channels(me_subdevice_t *subdevice,
80 int *number);
81
82 static int me4600_ao_query_subdevice_type(me_subdevice_t *subdevice,
83 int *type, int *subtype);
84
85 static int me4600_ao_query_subdevice_caps(me_subdevice_t *subdevice,
86 int *caps);
87
88 static int me4600_ao_query_subdevice_caps_args(struct me_subdevice *subdevice,
89 int cap, int *args, int count);
90
91 #ifndef BOSCH
92 /// @note NORMAL BUILD
93 /// @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
94 /* Includes
95 */
96
97 # include <linux/workqueue.h>
98
99 /* Defines
100 */
101
102 /** Remove subdevice.
103 */
104 static void me4600_ao_destructor(struct me_subdevice *subdevice);
105
106 /** Reset subdevice. Stop all actions. Reset registry. Disable FIFO. Set output to 0V and status to 'none'.
107 */
108 static int me4600_ao_io_reset_subdevice(me_subdevice_t *subdevice,
109 struct file *filep, int flags);
110
111 /** Set output as single
112 */
113 static int me4600_ao_io_single_config(me_subdevice_t *subdevice,
114 struct file *filep,
115 int channel,
116 int single_config,
117 int ref,
118 int trig_chan,
119 int trig_type, int trig_edge, int flags);
120
121 /** Pass to user actual value of output.
122 */
123 static int me4600_ao_io_single_read(me_subdevice_t *subdevice,
124 struct file *filep,
125 int channel,
126 int *value, int time_out, int flags);
127
128 /** Write to output requed value.
129 */
130 static int me4600_ao_io_single_write(me_subdevice_t *subdevice,
131 struct file *filep,
132 int channel,
133 int value, int time_out, int flags);
134
135 /** Set output as streamed device.
136 */
137 static int me4600_ao_io_stream_config(me_subdevice_t *subdevice,
138 struct file *filep,
139 meIOStreamConfig_t *config_list,
140 int count,
141 meIOStreamTrigger_t *trigger,
142 int fifo_irq_threshold, int flags);
143
144 /** Wait for / Check empty space in buffer.
145 */
146 static int me4600_ao_io_stream_new_values(me_subdevice_t *subdevice,
147 struct file *filep,
148 int time_out, int *count, int flags);
149
150 /** Start streaming.
151 */
152 static int me4600_ao_io_stream_start(me_subdevice_t *subdevice,
153 struct file *filep,
154 int start_mode, int time_out, int flags);
155
156 /** Check actual state. / Wait for end.
157 */
158 static int me4600_ao_io_stream_status(me_subdevice_t *subdevice,
159 struct file *filep,
160 int wait,
161 int *status, int *values, int flags);
162
163 /** Stop streaming.
164 */
165 static int me4600_ao_io_stream_stop(me_subdevice_t *subdevice,
166 struct file *filep,
167 int stop_mode, int flags);
168
169 /** Write datas to buffor.
170 */
171 static int me4600_ao_io_stream_write(me_subdevice_t *subdevice,
172 struct file *filep,
173 int write_mode,
174 int *values, int *count, int flags);
175
176 /** Interrupt handler. Copy from buffer to FIFO.
177 */
178 static irqreturn_t me4600_ao_isr(int irq, void *dev_id);
179 /** Copy data from circular buffer to fifo (fast) in wraparound mode.
180 */
181 inline int ao_write_data_wraparound(me4600_ao_subdevice_t *instance, int count,
182 int start_pos);
183
184 /** Copy data from circular buffer to fifo (fast).
185 */
186 inline int ao_write_data(me4600_ao_subdevice_t *instance, int count,
187 int start_pos);
188
189 /** Copy data from circular buffer to fifo (slow).
190 */
191 inline int ao_write_data_pooling(me4600_ao_subdevice_t *instance, int count,
192 int start_pos);
193
194 /** Copy data from user space to circular buffer.
195 */
196 inline int ao_get_data_from_user(me4600_ao_subdevice_t *instance, int count,
197 int *user_values);
198
199 /** Stop presentation. Preserve FIFOs.
200 */
201 inline int ao_stop_immediately(me4600_ao_subdevice_t *instance);
202
203 /** Task for asynchronical state verifying.
204 */
205 static void me4600_ao_work_control_task(struct work_struct *work);
206 /* Functions
207 */
208
209 static int me4600_ao_io_reset_subdevice(me_subdevice_t *subdevice,
210 struct file *filep, int flags)
211 {
212 me4600_ao_subdevice_t *instance;
213 int err = ME_ERRNO_SUCCESS;
214 uint32_t tmp;
215
216 instance = (me4600_ao_subdevice_t *) subdevice;
217
218 PDEBUG("executed. idx=%d\n", instance->ao_idx);
219
220 if (flags) {
221 PERROR("Invalid flag specified.\n");
222 return ME_ERRNO_INVALID_FLAGS;
223 }
224
225 ME_SUBDEVICE_ENTER;
226
227 instance->status = ao_status_none;
228 instance->ao_control_task_flag = 0;
229 cancel_delayed_work(&instance->ao_control_task);
230 instance->timeout.delay = 0;
231 instance->timeout.start_time = jiffies;
232
233 //Stop state machine.
234 err = ao_stop_immediately(instance);
235
236 //Remove from synchronous start.
237 spin_lock(instance->preload_reg_lock);
238 tmp = inl(instance->preload_reg);
239 tmp &=
240 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
241 ao_idx);
242 outl(tmp, instance->preload_reg);
243 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
244 instance->preload_reg - instance->reg_base, tmp);
245 *instance->preload_flags &=
246 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
247 ao_idx);
248 spin_unlock(instance->preload_reg_lock);
249
250 //Set single mode, dissable FIFO, dissable external trigger, set output to analog, block interrupt.
251 outl(ME4600_AO_MODE_SINGLE | ME4600_AO_CTRL_BIT_STOP |
252 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_RESET_IRQ,
253 instance->ctrl_reg);
254 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
255 instance->ctrl_reg - instance->reg_base,
256 ME4600_AO_MODE_SINGLE | ME4600_AO_CTRL_BIT_STOP |
257 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
258 ME4600_AO_CTRL_BIT_RESET_IRQ);
259
260 //Set output to 0V
261 outl(0x8000, instance->single_reg);
262 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
263 instance->single_reg - instance->reg_base, 0x8000);
264
265 instance->circ_buf.head = 0;
266 instance->circ_buf.tail = 0;
267 instance->preloaded_count = 0;
268 instance->data_count = 0;
269 instance->single_value = 0x8000;
270 instance->single_value_in_fifo = 0x8000;
271
272 //Set status to signal that device is unconfigured.
273 instance->status = ao_status_none;
274
275 //Signal reset if user is on wait.
276 wake_up_interruptible_all(&instance->wait_queue);
277
278 ME_SUBDEVICE_EXIT;
279
280 return err;
281 }
282
283 static int me4600_ao_io_single_config(me_subdevice_t *subdevice,
284 struct file *filep,
285 int channel,
286 int single_config,
287 int ref,
288 int trig_chan,
289 int trig_type, int trig_edge, int flags)
290 {
291 me4600_ao_subdevice_t *instance;
292 int err = ME_ERRNO_SUCCESS;
293 uint32_t ctrl;
294 uint32_t sync;
295 unsigned long cpu_flags;
296
297 instance = (me4600_ao_subdevice_t *) subdevice;
298
299 PDEBUG("executed. idx=%d\n", instance->ao_idx);
300
301 // Checking parameters
302 if (flags) {
303 PERROR
304 ("Invalid flag specified. Must be ME_IO_SINGLE_CONFIG_NO_FLAGS.\n");
305 return ME_ERRNO_INVALID_FLAGS;
306 }
307
308 switch (trig_type) {
309 case ME_TRIG_TYPE_SW:
310 if (trig_edge != ME_TRIG_EDGE_NONE) {
311 PERROR
312 ("Invalid trigger edge. Software trigger has not edge.\n");
313 return ME_ERRNO_INVALID_TRIG_EDGE;
314 }
315 break;
316
317 case ME_TRIG_TYPE_EXT_DIGITAL:
318 switch (trig_edge) {
319 case ME_TRIG_EDGE_ANY:
320 case ME_TRIG_EDGE_RISING:
321 case ME_TRIG_EDGE_FALLING:
322 break;
323
324 default:
325 PERROR("Invalid trigger edge.\n");
326 return ME_ERRNO_INVALID_TRIG_EDGE;
327 }
328 break;
329
330 default:
331 PERROR
332 ("Invalid trigger type. Trigger must be software or digital.\n");
333 return ME_ERRNO_INVALID_TRIG_TYPE;
334 }
335
336 if ((trig_chan != ME_TRIG_CHAN_DEFAULT)
337 && (trig_chan != ME_TRIG_CHAN_SYNCHRONOUS)) {
338 PERROR("Invalid trigger channel specified.\n");
339 return ME_ERRNO_INVALID_TRIG_CHAN;
340 }
341
342 if (ref != ME_REF_AO_GROUND) {
343 PERROR
344 ("Invalid reference. Analog outputs have to have got REF_AO_GROUND.\n");
345 return ME_ERRNO_INVALID_REF;
346 }
347
348 if (single_config != 0) {
349 PERROR
350 ("Invalid single config specified. Only one range for anlog outputs is available.\n");
351 return ME_ERRNO_INVALID_SINGLE_CONFIG;
352 }
353
354 if (channel != 0) {
355 PERROR
356 ("Invalid channel number specified. Analog output have only one channel.\n");
357 return ME_ERRNO_INVALID_CHANNEL;
358 }
359
360 ME_SUBDEVICE_ENTER;
361
362 //Subdevice running in stream mode!
363 if ((instance->status >= ao_status_stream_run_wait)
364 && (instance->status < ao_status_stream_end)) {
365 PERROR("Subdevice is busy.\n");
366 ME_SUBDEVICE_EXIT;
367
368 return ME_ERRNO_SUBDEVICE_BUSY;
369 }
370 /// @note For single all calls (config and write) are erasing previous state!
371
372 instance->status = ao_status_none;
373
374 // Correct single mirrors
375 instance->single_value_in_fifo = instance->single_value;
376
377 //Stop device
378 err = ao_stop_immediately(instance);
379 if (err) {
380 PERROR_CRITICAL("FSM IS BUSY!\n");
381 ME_SUBDEVICE_EXIT;
382
383 return ME_ERRNO_SUBDEVICE_BUSY;
384 }
385 // Set control register.
386 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
387 // Set stop bit. Stop streaming mode.
388 ctrl = inl(instance->ctrl_reg);
389 //Reset all bits.
390 ctrl = ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP;
391
392 if (trig_type == ME_TRIG_TYPE_EXT_DIGITAL) {
393 PINFO("External digital trigger.\n");
394
395 if (trig_edge == ME_TRIG_EDGE_ANY) {
396 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE | ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
397 instance->ctrl_trg =
398 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
399 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
400 } else if (trig_edge == ME_TRIG_EDGE_FALLING) {
401 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
402 instance->ctrl_trg = ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
403 } else if (trig_edge == ME_TRIG_EDGE_RISING) {
404 instance->ctrl_trg = 0x0;
405 }
406 } else if (trig_type == ME_TRIG_TYPE_SW) {
407 PDEBUG("Software trigger\n");
408 instance->ctrl_trg = 0x0;
409 }
410
411 outl(ctrl, instance->ctrl_reg);
412 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
413 instance->ctrl_reg - instance->reg_base, ctrl);
414 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
415
416 // Set preload/synchronization register.
417 spin_lock(instance->preload_reg_lock);
418 if (trig_type == ME_TRIG_TYPE_SW) {
419 *instance->preload_flags &=
420 ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
421 } else //if (trig_type == ME_TRIG_TYPE_EXT_DIGITAL)
422 {
423 *instance->preload_flags |=
424 ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx;
425 }
426
427 if (trig_chan == ME_TRIG_CHAN_DEFAULT) {
428 *instance->preload_flags &=
429 ~(ME4600_AO_SYNC_HOLD << instance->ao_idx);
430 } else //if (trig_chan == ME_TRIG_CHAN_SYNCHRONOUS)
431 {
432 *instance->preload_flags |=
433 ME4600_AO_SYNC_HOLD << instance->ao_idx;
434 }
435
436 //Reset hardware register
437 sync = inl(instance->preload_reg);
438 PDEBUG_REG("preload_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
439 instance->preload_reg - instance->reg_base, sync);
440 sync &= ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
441 sync |= ME4600_AO_SYNC_HOLD << instance->ao_idx;
442
443 //Output configured in default (safe) mode.
444 outl(sync, instance->preload_reg);
445 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
446 instance->preload_reg - instance->reg_base, sync);
447 spin_unlock(instance->preload_reg_lock);
448
449 instance->status = ao_status_single_configured;
450
451 ME_SUBDEVICE_EXIT;
452
453 return err;
454 }
455
456 static int me4600_ao_io_single_read(me_subdevice_t *subdevice,
457 struct file *filep,
458 int channel,
459 int *value, int time_out, int flags)
460 {
461 me4600_ao_subdevice_t *instance;
462 int err = ME_ERRNO_SUCCESS;
463
464 unsigned long j;
465 unsigned long delay = 0;
466
467 instance = (me4600_ao_subdevice_t *) subdevice;
468
469 PDEBUG("executed. idx=%d\n", instance->ao_idx);
470
471 if (flags & ~ME_IO_SINGLE_NONBLOCKING) {
472 PERROR("Invalid flag specified. %d\n", flags);
473 return ME_ERRNO_INVALID_FLAGS;
474 }
475
476 if (time_out < 0) {
477 PERROR("Invalid timeout specified.\n");
478 return ME_ERRNO_INVALID_TIMEOUT;
479 }
480
481 if (channel != 0) {
482 PERROR("Invalid channel number specified.\n");
483 return ME_ERRNO_INVALID_CHANNEL;
484 }
485
486 if ((instance->status >= ao_status_stream_configured)
487 && (instance->status <= ao_status_stream_end)) {
488 PERROR("Subdevice not configured to work in single mode!\n");
489 return ME_ERRNO_PREVIOUS_CONFIG;
490 }
491
492 ME_SUBDEVICE_ENTER;
493 if ((!flags) && (instance->status == ao_status_single_run_wait)) { //Blocking mode. Wait for trigger.
494 if (time_out) {
495 delay = (time_out * HZ) / 1000;
496 if (delay == 0)
497 delay = 1;
498 }
499
500 j = jiffies;
501
502 //Only runing process will interrupt this call. Events are signaled when status change. This procedure has own timeout.
503 wait_event_interruptible_timeout(instance->wait_queue,
504 (instance->status !=
505 ao_status_single_run_wait),
506 (delay) ? delay +
507 1 : LONG_MAX);
508
509 if (instance->status == ao_status_none) {
510 PDEBUG("Single canceled.\n");
511 err = ME_ERRNO_CANCELLED;
512 }
513
514 if (signal_pending(current)) {
515 PERROR("Wait on start of state machine interrupted.\n");
516 instance->status = ao_status_none;
517 ao_stop_immediately(instance);
518 err = ME_ERRNO_SIGNAL;
519 }
520
521 if ((delay) && ((jiffies - j) >= delay)) {
522
523 PDEBUG("Timeout reached.\n");
524 err = ME_ERRNO_TIMEOUT;
525 }
526
527 *value =
528 (!err) ? instance->single_value_in_fifo : instance->
529 single_value;
530 } else { //Non-blocking mode
531 //Read value
532 *value = instance->single_value;
533 }
534
535 ME_SUBDEVICE_EXIT;
536
537 return err;
538 }
539
540 static int me4600_ao_io_single_write(me_subdevice_t *subdevice,
541 struct file *filep,
542 int channel,
543 int value, int time_out, int flags)
544 {
545 me4600_ao_subdevice_t *instance;
546 int err = ME_ERRNO_SUCCESS;
547 unsigned long cpu_flags;
548 unsigned long j;
549 unsigned long delay = 0x0;
550
551 //Registry handling variables.
552 uint32_t sync_mask;
553 uint32_t mode;
554 uint32_t tmp;
555 uint32_t ctrl;
556 uint32_t status;
557
558 instance = (me4600_ao_subdevice_t *) subdevice;
559
560 PDEBUG("executed. idx=%d\n", instance->ao_idx);
561
562 if (flags &
563 ~(ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS |
564 ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
565 PERROR("Invalid flag specified.\n");
566 return ME_ERRNO_INVALID_FLAGS;
567 }
568
569 if (time_out < 0) {
570 PERROR("Invalid timeout specified.\n");
571 return ME_ERRNO_INVALID_TIMEOUT;
572 }
573
574 if (value & ~ME4600_AO_MAX_DATA) {
575 PERROR("Invalid value provided.\n");
576 return ME_ERRNO_VALUE_OUT_OF_RANGE;
577 }
578
579 if (channel != 0) {
580 PERROR("Invalid channel number specified.\n");
581 return ME_ERRNO_INVALID_CHANNEL;
582 }
583
584 if ((instance->status == ao_status_none)
585 || (instance->status > ao_status_single_end)) {
586 PERROR("Subdevice not configured to work in single mode!\n");
587 return ME_ERRNO_PREVIOUS_CONFIG;
588 }
589
590 ME_SUBDEVICE_ENTER;
591
592 /// @note For single all calls (config and write) are erasing previous state!
593
594 //Cancel control task
595 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
596 instance->ao_control_task_flag = 0;
597 cancel_delayed_work(&instance->ao_control_task);
598
599 // Correct single mirrors
600 instance->single_value_in_fifo = instance->single_value;
601
602 //Stop device
603 err = ao_stop_immediately(instance);
604 if (err) {
605 PERROR_CRITICAL("FSM IS BUSY!\n");
606 ME_SUBDEVICE_EXIT;
607
608 return ME_ERRNO_SUBDEVICE_BUSY;
609 }
610
611 if (time_out) {
612 delay = (time_out * HZ) / 1000;
613
614 if (delay == 0)
615 delay = 1;
616 }
617
618 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
619
620 instance->single_value_in_fifo = value;
621
622 ctrl = inl(instance->ctrl_reg);
623
624 if (!instance->fifo) { //No FIFO
625 //Set the single mode.
626 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
627
628 //Write value
629 PDEBUG("Write value\n");
630 outl(value, instance->single_reg);
631 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
632 instance->reg_base,
633 instance->single_reg - instance->reg_base, value);
634 } else { // mix-mode
635 //Set speed
636 outl(ME4600_AO_MIN_CHAN_TICKS - 1, instance->timer_reg);
637 PDEBUG_REG("timer_reg outl(0x%lX+0x%lX)=0x%x\n",
638 instance->reg_base,
639 instance->timer_reg - instance->reg_base,
640 (int)ME4600_AO_MIN_CHAN_TICKS);
641 instance->hardware_stop_delay = HZ / 10; //100ms
642
643 status = inl(instance->status_reg);
644
645 //Set the continous mode.
646 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
647 ctrl |= ME4600_AO_MODE_CONTINUOUS;
648
649 //Prepare FIFO
650 if (!(ctrl & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO wasn't enabeled. Do it.
651 PINFO("Enableing FIFO.\n");
652 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
653 ctrl |=
654 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
655 ME4600_AO_CTRL_BIT_RESET_IRQ;
656 } else { //Check if FIFO is empty
657 if (status & ME4600_AO_STATUS_BIT_EF) { //FIFO not empty
658 PINFO("Reseting FIFO.\n");
659 ctrl &=
660 ~(ME4600_AO_CTRL_BIT_ENABLE_FIFO |
661 ME4600_AO_CTRL_BIT_ENABLE_IRQ);
662 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
663 outl(ctrl, instance->ctrl_reg);
664 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
665 instance->reg_base,
666 instance->ctrl_reg -
667 instance->reg_base, ctrl);
668
669 ctrl |=
670 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
671 ME4600_AO_CTRL_BIT_RESET_IRQ;
672 } else { //FIFO empty, only interrupt needs to be disabled!
673 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
674 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
675 }
676 }
677
678 outl(ctrl, instance->ctrl_reg);
679 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
680 instance->reg_base,
681 instance->ctrl_reg - instance->reg_base, ctrl);
682
683 //Write output - 1 value to FIFO
684 if (instance->ao_idx & 0x1) {
685 outl(value <<= 16, instance->fifo_reg);
686 PDEBUG_REG("fifo_reg outl(0x%lX+0x%lX)=0x%x\n",
687 instance->reg_base,
688 instance->fifo_reg - instance->reg_base,
689 value <<= 16);
690 } else {
691 outl(value, instance->fifo_reg);
692 PDEBUG_REG("fifo_reg outl(0x%lX+0x%lX)=0x%x\n",
693 instance->reg_base,
694 instance->fifo_reg - instance->reg_base,
695 value);
696 }
697 }
698
699 mode = *instance->preload_flags >> instance->ao_idx;
700 mode &= (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG);
701
702 PINFO("Triggering mode: 0x%x\n", mode);
703
704 spin_lock(instance->preload_reg_lock);
705 sync_mask = inl(instance->preload_reg);
706 PDEBUG_REG("preload_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
707 instance->preload_reg - instance->reg_base, sync_mask);
708 switch (mode) {
709 case 0: //Individual software
710 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
711
712 if (!instance->fifo) { // No FIFO - In this case resetting 'ME4600_AO_SYNC_HOLD' will trigger output.
713 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD) { //Now we can set correct mode. This is exception. It is set to synchronous and triggered later.
714 sync_mask &=
715 ~(ME4600_AO_SYNC_EXT_TRIG << instance->
716 ao_idx);
717 sync_mask |=
718 ME4600_AO_SYNC_HOLD << instance->ao_idx;
719
720 outl(sync_mask, instance->preload_reg);
721 PDEBUG_REG
722 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
723 instance->reg_base,
724 instance->preload_reg - instance->reg_base,
725 sync_mask);
726 }
727 } else { // FIFO
728 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != 0x0) { //Now we can set correct mode.
729 sync_mask &=
730 ~((ME4600_AO_SYNC_EXT_TRIG |
731 ME4600_AO_SYNC_HOLD) << instance->
732 ao_idx);
733
734 outl(sync_mask, instance->preload_reg);
735 PDEBUG_REG
736 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
737 instance->reg_base,
738 instance->preload_reg - instance->reg_base,
739 sync_mask);
740 }
741 }
742 instance->single_value = value;
743 break;
744
745 case ME4600_AO_SYNC_EXT_TRIG: //Individual hardware
746 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
747
748 if (!instance->fifo) { // No FIFO - In this case resetting 'ME4600_AO_SYNC_HOLD' will trigger output.
749 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD) { //Now we can set correct mode
750 sync_mask &=
751 ~(ME4600_AO_SYNC_EXT_TRIG << instance->
752 ao_idx);
753 sync_mask |=
754 ME4600_AO_SYNC_HOLD << instance->ao_idx;
755
756 outl(sync_mask, instance->preload_reg);
757 PDEBUG_REG
758 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
759 instance->reg_base,
760 instance->preload_reg - instance->reg_base,
761 sync_mask);
762 }
763 } else { // FIFO
764 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != 0x0) { //Now we can set correct mode.
765 sync_mask &=
766 ~((ME4600_AO_SYNC_EXT_TRIG |
767 ME4600_AO_SYNC_HOLD) << instance->
768 ao_idx);
769
770 outl(sync_mask, instance->preload_reg);
771 PDEBUG_REG
772 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
773 instance->reg_base,
774 instance->preload_reg - instance->reg_base,
775 sync_mask);
776 }
777 }
778 break;
779
780 case ME4600_AO_SYNC_HOLD: //Synchronous software
781 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
782
783 // if((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD)
784 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG)) { //Now we can set correct mode
785 sync_mask |=
786 ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx;
787 // sync_mask &= ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
788 sync_mask |= ME4600_AO_SYNC_HOLD << instance->ao_idx;
789
790 outl(sync_mask, instance->preload_reg);
791 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
792 instance->reg_base,
793 instance->preload_reg - instance->reg_base,
794 sync_mask);
795 }
796 break;
797
798 case (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG): //Synchronous hardware
799 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
800 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG)) { //Now we can set correct mode
801 sync_mask |=
802 (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
803 instance->ao_idx;
804
805 outl(sync_mask, instance->preload_reg);
806 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
807 instance->reg_base,
808 instance->preload_reg - instance->reg_base,
809 sync_mask);
810 }
811 break;
812 }
813 // spin_unlock(instance->preload_reg_lock); // Moved down.
814
815 //Activate ISM (remove 'stop' bits)
816 ctrl &=
817 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
818 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
819 ctrl |= instance->ctrl_trg;
820 ctrl &= ~(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
821 outl(ctrl, instance->ctrl_reg);
822 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
823 instance->ctrl_reg - instance->reg_base, ctrl);
824 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
825
826 /// @note When flag 'ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS' is set than output is triggered. ALWAYS!
827
828 if (!instance->fifo) { //No FIFO
829 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Fired all software synchronous outputs.
830 tmp = ~(*instance->preload_flags | 0xFFFF0000);
831 PINFO
832 ("Fired all software synchronous outputs. mask:0x%08x\n",
833 tmp);
834 tmp |= sync_mask & 0xFFFF0000;
835 // Add this channel to list
836 tmp &= ~(ME4600_AO_SYNC_HOLD << instance->ao_idx);
837
838 //Fire
839 PINFO("Software trigger.\n");
840 outl(tmp, instance->preload_reg);
841 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
842 instance->reg_base,
843 instance->preload_reg - instance->reg_base,
844 tmp);
845
846 //Restore save settings
847 outl(sync_mask, instance->preload_reg);
848 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
849 instance->reg_base,
850 instance->preload_reg - instance->reg_base,
851 sync_mask);
852 } else if (!mode) { // Add this channel to list
853 outl(sync_mask &
854 ~(ME4600_AO_SYNC_HOLD << instance->ao_idx),
855 instance->preload_reg);
856 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
857 instance->reg_base,
858 instance->preload_reg - instance->reg_base,
859 sync_mask & ~(ME4600_AO_SYNC_HOLD <<
860 instance->ao_idx));
861
862 //Fire
863 PINFO("Software trigger.\n");
864
865 //Restore save settings
866 outl(sync_mask, instance->preload_reg);
867 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
868 instance->reg_base,
869 instance->preload_reg - instance->reg_base,
870 sync_mask);
871 }
872
873 } else { // mix-mode - begin
874 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Trigger outputs
875 //Add channel to start list
876 outl(sync_mask |
877 (ME4600_AO_SYNC_HOLD << instance->ao_idx),
878 instance->preload_reg);
879 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
880 instance->reg_base,
881 instance->preload_reg - instance->reg_base,
882 sync_mask | (ME4600_AO_SYNC_HOLD <<
883 instance->ao_idx));
884
885 //Fire
886 PINFO
887 ("Fired all software synchronous outputs by software trigger.\n");
888 outl(0x8000, instance->single_reg);
889 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
890 instance->reg_base,
891 instance->single_reg - instance->reg_base,
892 0x8000);
893
894 //Restore save settings
895 outl(sync_mask, instance->preload_reg);
896 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
897 instance->reg_base,
898 instance->preload_reg - instance->reg_base,
899 sync_mask);
900 } else if (!mode) { //Trigger outputs
901 /* //Remove channel from start list //<== Unnecessary. Removed.
902 outl(sync_mask & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx), instance->preload_reg);
903 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, tmp);
904 */
905 //Fire
906 PINFO("Software trigger.\n");
907 outl(0x8000, instance->single_reg);
908 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
909 instance->reg_base,
910 instance->single_reg - instance->reg_base,
911 0x8000);
912
913 /* //Restore save settings //<== Unnecessary. Removed.
914 outl(sync_mask, instance->preload_reg);
915 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, sync_mask);
916 */
917 }
918 }
919 spin_unlock(instance->preload_reg_lock);
920
921 j = jiffies;
922 instance->status = ao_status_single_run_wait;
923
924 instance->timeout.delay = delay;
925 instance->timeout.start_time = j;
926 instance->ao_control_task_flag = 1;
927 queue_delayed_work(instance->me4600_workqueue,
928 &instance->ao_control_task, 1);
929
930 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
931
932 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
933 wait_event_interruptible_timeout(instance->wait_queue,
934 (instance->status !=
935 ao_status_single_run_wait),
936 (delay) ? delay +
937 1 : LONG_MAX);
938
939 if (((!delay) || ((jiffies - j) <= delay))
940 && (instance->status != ao_status_single_end)) {
941 PDEBUG("Single canceled.\n");
942 err = ME_ERRNO_CANCELLED;
943 }
944
945 if (signal_pending(current)) {
946 PERROR("Wait on start of state machine interrupted.\n");
947 instance->ao_control_task_flag = 0;
948 cancel_delayed_work(&instance->ao_control_task);
949 ao_stop_immediately(instance);
950 instance->status = ao_status_none;
951 err = ME_ERRNO_SIGNAL;
952 }
953
954 if ((delay) && ((jiffies - j) >= delay)) {
955 if (instance->status == ao_status_single_end) {
956 PDEBUG("Timeout reached.\n");
957 } else {
958 if ((jiffies - j) > delay) {
959 PERROR
960 ("Timeout reached. Not handled by control task!\n");
961 } else {
962 PERROR
963 ("Timeout reached. Signal come but status is strange: %d\n",
964 instance->status);
965 }
966
967 ao_stop_immediately(instance);
968 }
969
970 instance->ao_control_task_flag = 0;
971 cancel_delayed_work(&instance->ao_control_task);
972 instance->status = ao_status_single_end;
973 err = ME_ERRNO_TIMEOUT;
974 }
975 }
976
977 ME_SUBDEVICE_EXIT;
978
979 return err;
980 }
981
982 static int me4600_ao_io_stream_config(me_subdevice_t *subdevice,
983 struct file *filep,
984 meIOStreamConfig_t *config_list,
985 int count,
986 meIOStreamTrigger_t *trigger,
987 int fifo_irq_threshold, int flags)
988 {
989 me4600_ao_subdevice_t *instance;
990 int err = ME_ERRNO_SUCCESS;
991 uint32_t ctrl;
992 unsigned long cpu_flags;
993 uint64_t conv_ticks;
994 unsigned int conv_start_ticks_low = trigger->iConvStartTicksLow;
995 unsigned int conv_start_ticks_high = trigger->iConvStartTicksHigh;
996
997 instance = (me4600_ao_subdevice_t *) subdevice;
998
999 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1000
1001 if (!instance->fifo) {
1002 PERROR("Not a streaming ao.\n");
1003 return ME_ERRNO_NOT_SUPPORTED;
1004 }
1005
1006 conv_ticks =
1007 (uint64_t) conv_start_ticks_low +
1008 ((uint64_t) conv_start_ticks_high << 32);
1009
1010 if (flags &
1011 ~(ME_IO_STREAM_CONFIG_HARDWARE_ONLY | ME_IO_STREAM_CONFIG_WRAPAROUND
1012 | ME_IO_STREAM_CONFIG_BIT_PATTERN)) {
1013 PERROR("Invalid flags.\n");
1014 return ME_ERRNO_INVALID_FLAGS;
1015 }
1016
1017 if (flags & ME_IO_STREAM_CONFIG_HARDWARE_ONLY) {
1018 if (!(flags & ME_IO_STREAM_CONFIG_WRAPAROUND)) {
1019 PERROR
1020 ("Hardware ME_IO_STREAM_CONFIG_HARDWARE_ONLY has to be with ME_IO_STREAM_CONFIG_WRAPAROUND.\n");
1021 return ME_ERRNO_INVALID_FLAGS;
1022 }
1023
1024 if ((trigger->iAcqStopTrigType != ME_TRIG_TYPE_NONE)
1025 || (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE)) {
1026 PERROR
1027 ("Hardware wraparound mode must be in infinite mode.\n");
1028 return ME_ERRNO_INVALID_FLAGS;
1029 }
1030 }
1031
1032 if (count != 1) {
1033 PERROR("Only 1 entry in config list acceptable.\n");
1034 return ME_ERRNO_INVALID_CONFIG_LIST_COUNT;
1035 }
1036
1037 if (config_list[0].iChannel != 0) {
1038 PERROR("Invalid channel number specified.\n");
1039 return ME_ERRNO_INVALID_CHANNEL;
1040 }
1041
1042 if (config_list[0].iStreamConfig != 0) {
1043 PERROR("Only one range available.\n");
1044 return ME_ERRNO_INVALID_STREAM_CONFIG;
1045 }
1046
1047 if (config_list[0].iRef != ME_REF_AO_GROUND) {
1048 PERROR("Output is referenced to ground.\n");
1049 return ME_ERRNO_INVALID_REF;
1050 }
1051
1052 if ((trigger->iAcqStartTicksLow != 0)
1053 || (trigger->iAcqStartTicksHigh != 0)) {
1054 PERROR
1055 ("Invalid acquisition start trigger argument specified.\n");
1056 return ME_ERRNO_INVALID_ACQ_START_ARG;
1057 }
1058
1059 if (config_list[0].iFlags) {
1060 PERROR("Invalid config list flag.\n");
1061 return ME_ERRNO_INVALID_FLAGS;
1062 }
1063
1064 switch (trigger->iAcqStartTrigType) {
1065 case ME_TRIG_TYPE_SW:
1066 if (trigger->iAcqStartTrigEdge != ME_TRIG_EDGE_NONE) {
1067 PERROR
1068 ("Invalid acquisition start trigger edge specified.\n");
1069 return ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
1070 }
1071 break;
1072
1073 case ME_TRIG_TYPE_EXT_DIGITAL:
1074 switch (trigger->iAcqStartTrigEdge) {
1075 case ME_TRIG_EDGE_ANY:
1076 case ME_TRIG_EDGE_RISING:
1077 case ME_TRIG_EDGE_FALLING:
1078 break;
1079
1080 default:
1081 PERROR
1082 ("Invalid acquisition start trigger edge specified.\n");
1083 return ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
1084 }
1085 break;
1086
1087 default:
1088 PERROR("Invalid acquisition start trigger type specified.\n");
1089 return ME_ERRNO_INVALID_ACQ_START_TRIG_TYPE;
1090 }
1091
1092 if (trigger->iScanStartTrigType != ME_TRIG_TYPE_FOLLOW) {
1093 PERROR("Invalid scan start trigger type specified.\n");
1094 return ME_ERRNO_INVALID_SCAN_START_TRIG_TYPE;
1095 }
1096
1097 if (trigger->iConvStartTrigType != ME_TRIG_TYPE_TIMER) {
1098 PERROR("Invalid conv start trigger type specified.\n");
1099 return ME_ERRNO_INVALID_CONV_START_TRIG_TYPE;
1100 }
1101
1102 if ((conv_ticks < ME4600_AO_MIN_CHAN_TICKS)
1103 || (conv_ticks > ME4600_AO_MAX_CHAN_TICKS)) {
1104 PERROR("Invalid conv start trigger argument specified.\n");
1105 return ME_ERRNO_INVALID_CONV_START_ARG;
1106 }
1107
1108 if (trigger->iAcqStartTicksLow || trigger->iAcqStartTicksHigh) {
1109 PERROR("Invalid acq start trigger argument specified.\n");
1110 return ME_ERRNO_INVALID_ACQ_START_ARG;
1111 }
1112
1113 if (trigger->iScanStartTicksLow || trigger->iScanStartTicksHigh) {
1114 PERROR("Invalid scan start trigger argument specified.\n");
1115 return ME_ERRNO_INVALID_SCAN_START_ARG;
1116 }
1117
1118 switch (trigger->iScanStopTrigType) {
1119 case ME_TRIG_TYPE_NONE:
1120 if (trigger->iScanStopCount != 0) {
1121 PERROR("Invalid scan stop count specified.\n");
1122 return ME_ERRNO_INVALID_SCAN_STOP_ARG;
1123 }
1124 break;
1125
1126 case ME_TRIG_TYPE_COUNT:
1127 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1128 if (trigger->iScanStopCount <= 0) {
1129 PERROR("Invalid scan stop count specified.\n");
1130 return ME_ERRNO_INVALID_SCAN_STOP_ARG;
1131 }
1132 } else {
1133 PERROR("The continous mode has not 'scan' contects.\n");
1134 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1135 }
1136 break;
1137
1138 default:
1139 PERROR("Invalid scan stop trigger type specified.\n");
1140 return ME_ERRNO_INVALID_SCAN_STOP_TRIG_TYPE;
1141 }
1142
1143 switch (trigger->iAcqStopTrigType) {
1144 case ME_TRIG_TYPE_NONE:
1145 if (trigger->iAcqStopCount != 0) {
1146 PERROR("Invalid acq stop count specified.\n");
1147 return ME_ERRNO_INVALID_ACQ_STOP_ARG;
1148 }
1149 break;
1150
1151 case ME_TRIG_TYPE_COUNT:
1152 if (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE) {
1153 PERROR("Invalid acq stop trigger type specified.\n");
1154 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1155 }
1156
1157 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1158 if (trigger->iAcqStopCount <= 0) {
1159 PERROR
1160 ("The continous mode has not 'scan' contects.\n");
1161 return ME_ERRNO_INVALID_ACQ_STOP_ARG;
1162 }
1163 }
1164 break;
1165
1166 default:
1167 PERROR("Invalid acq stop trigger type specified.\n");
1168 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1169 }
1170
1171 switch (trigger->iAcqStartTrigChan) {
1172 case ME_TRIG_CHAN_DEFAULT:
1173 case ME_TRIG_CHAN_SYNCHRONOUS:
1174 break;
1175
1176 default:
1177 PERROR("Invalid acq start trigger channel specified.\n");
1178 return ME_ERRNO_INVALID_ACQ_START_TRIG_CHAN;
1179 }
1180
1181 ME_SUBDEVICE_ENTER;
1182
1183 if ((flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) && !instance->bitpattern) {
1184 PERROR("This subdevice not support output redirection.\n");
1185 ME_SUBDEVICE_EXIT;
1186 return ME_ERRNO_INVALID_FLAGS;
1187 }
1188 //Stop device
1189
1190 //Cancel control task
1191 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
1192 instance->ao_control_task_flag = 0;
1193 cancel_delayed_work(&instance->ao_control_task);
1194
1195 //Check if state machine is stopped.
1196 err = ao_stop_immediately(instance);
1197 if (err) {
1198 PERROR_CRITICAL("FSM IS BUSY!\n");
1199 ME_SUBDEVICE_EXIT;
1200
1201 return ME_ERRNO_SUBDEVICE_BUSY;
1202 }
1203
1204 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1205 //Reset control register. Block all actions. Disable IRQ. Disable FIFO.
1206 ctrl =
1207 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP |
1208 ME4600_AO_CTRL_BIT_RESET_IRQ;
1209 outl(ctrl, instance->ctrl_reg);
1210 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1211 instance->ctrl_reg - instance->reg_base, ctrl);
1212
1213 //This is paranoic, but to be sure.
1214 instance->preloaded_count = 0;
1215 instance->data_count = 0;
1216 instance->circ_buf.head = 0;
1217 instance->circ_buf.tail = 0;
1218
1219 /* Set mode. */
1220 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) { //Wraparound
1221 if (flags & ME_IO_STREAM_CONFIG_HARDWARE_ONLY) { //Hardware wraparound
1222 PINFO("Hardware wraparound.\n");
1223 ctrl |= ME4600_AO_MODE_WRAPAROUND;
1224 instance->mode = ME4600_AO_HW_WRAP_MODE;
1225 } else { //Software wraparound
1226 PINFO("Software wraparound.\n");
1227 ctrl |= ME4600_AO_MODE_CONTINUOUS;
1228 instance->mode = ME4600_AO_SW_WRAP_MODE;
1229 }
1230 } else { //Continous
1231 PINFO("Continous.\n");
1232 ctrl |= ME4600_AO_MODE_CONTINUOUS;
1233 instance->mode = ME4600_AO_CONTINOUS;
1234 }
1235
1236 //Set the trigger edge.
1237 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_EXT_DIGITAL) { //Set the trigger type and edge for external trigger.
1238 PINFO("External digital trigger.\n");
1239 instance->start_mode = ME4600_AO_EXT_TRIG;
1240 /*
1241 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
1242 */
1243 switch (trigger->iAcqStartTrigEdge) {
1244 case ME_TRIG_EDGE_RISING:
1245 PINFO("Set the trigger edge: rising.\n");
1246 instance->ctrl_trg = 0x0;
1247 break;
1248
1249 case ME_TRIG_EDGE_FALLING:
1250 PINFO("Set the trigger edge: falling.\n");
1251 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
1252 instance->ctrl_trg = ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
1253 break;
1254
1255 case ME_TRIG_EDGE_ANY:
1256 PINFO("Set the trigger edge: both edges.\n");
1257 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE | ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
1258 instance->ctrl_trg =
1259 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
1260 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
1261 break;
1262 }
1263 } else {
1264 PINFO("Internal software trigger.\n");
1265 instance->start_mode = 0;
1266 }
1267
1268 //Set the stop mode and value.
1269 if (trigger->iAcqStopTrigType == ME_TRIG_TYPE_COUNT) { //Amount of data
1270 instance->stop_mode = ME4600_AO_ACQ_STOP_MODE;
1271 instance->stop_count = trigger->iAcqStopCount;
1272 } else if (trigger->iScanStopTrigType == ME_TRIG_TYPE_COUNT) { //Amount of 'scans'
1273 instance->stop_mode = ME4600_AO_SCAN_STOP_MODE;
1274 instance->stop_count = trigger->iScanStopCount;
1275 } else { //Infinite
1276 instance->stop_mode = ME4600_AO_INF_STOP_MODE;
1277 instance->stop_count = 0;
1278 }
1279
1280 PINFO("Stop count: %d.\n", instance->stop_count);
1281
1282 if (trigger->iAcqStartTrigChan == ME_TRIG_CHAN_SYNCHRONOUS) { //Synchronous start
1283 instance->start_mode |= ME4600_AO_SYNC_HOLD;
1284 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_EXT_DIGITAL) { //Externaly triggered
1285 PINFO("Synchronous start. Externaly trigger active.\n");
1286 instance->start_mode |= ME4600_AO_SYNC_EXT_TRIG;
1287 }
1288 #ifdef MEDEBUG_INFO
1289 else {
1290 PINFO
1291 ("Synchronous start. Externaly trigger dissabled.\n");
1292 }
1293 #endif
1294
1295 }
1296 //Set speed
1297 outl(conv_ticks - 2, instance->timer_reg);
1298 PDEBUG_REG("timer_reg outl(0x%lX+0x%lX)=0x%llx\n", instance->reg_base,
1299 instance->timer_reg - instance->reg_base, conv_ticks - 2);
1300 instance->hardware_stop_delay = (int)(conv_ticks * HZ) / ME4600_AO_BASE_FREQUENCY; //<== MUST be with cast!
1301
1302 //Conect outputs to analog or digital port.
1303 if (flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) {
1304 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_DO;
1305 }
1306 // Write the control word
1307 outl(ctrl, instance->ctrl_reg);
1308 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1309 instance->ctrl_reg - instance->reg_base, ctrl);
1310
1311 //Set status.
1312 instance->status = ao_status_stream_configured;
1313 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
1314
1315 ME_SUBDEVICE_EXIT;
1316
1317 return err;
1318 }
1319
1320 static int me4600_ao_io_stream_new_values(me_subdevice_t *subdevice,
1321 struct file *filep,
1322 int time_out, int *count, int flags)
1323 {
1324 me4600_ao_subdevice_t *instance;
1325 int err = ME_ERRNO_SUCCESS;
1326 long t = 0;
1327 long j;
1328
1329 instance = (me4600_ao_subdevice_t *) subdevice;
1330
1331 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1332
1333 if (!instance->fifo) {
1334 PERROR("Not a streaming ao.\n");
1335 return ME_ERRNO_NOT_SUPPORTED;
1336 }
1337
1338 if (flags) {
1339 PERROR("Invalid flag specified.\n");
1340 return ME_ERRNO_INVALID_FLAGS;
1341 }
1342
1343 if (!instance->circ_buf.buf) {
1344 PERROR("Circular buffer not exists.\n");
1345 return ME_ERRNO_INTERNAL;
1346 }
1347
1348 if (time_out < 0) {
1349 PERROR("Invalid time_out specified.\n");
1350 return ME_ERRNO_INVALID_TIMEOUT;
1351 }
1352
1353 ME_SUBDEVICE_ENTER;
1354
1355 if (me_circ_buf_space(&instance->circ_buf)) { //The buffer is NOT full.
1356 *count = me_circ_buf_space(&instance->circ_buf);
1357 } else { //The buffer is full.
1358 if (time_out) {
1359 t = (time_out * HZ) / 1000;
1360
1361 if (t == 0)
1362 t = 1;
1363 } else { //Max time.
1364 t = LONG_MAX;
1365 }
1366
1367 *count = 0;
1368
1369 j = jiffies;
1370
1371 //Only runing process will interrupt this call. Interrupts are when FIFO HF is signaled.
1372 wait_event_interruptible_timeout(instance->wait_queue,
1373 ((me_circ_buf_space
1374 (&instance->circ_buf))
1375 || !(inl(instance->status_reg)
1376 &
1377 ME4600_AO_STATUS_BIT_FSM)),
1378 t);
1379
1380 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
1381 PERROR("AO subdevice is not running.\n");
1382 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
1383 } else if (signal_pending(current)) {
1384 PERROR("Wait on values interrupted from signal.\n");
1385 instance->status = ao_status_none;
1386 ao_stop_immediately(instance);
1387 err = ME_ERRNO_SIGNAL;
1388 } else if ((jiffies - j) >= t) {
1389 PERROR("Wait on values timed out.\n");
1390 err = ME_ERRNO_TIMEOUT;
1391 } else { //Uff... all is good. Inform user about empty space.
1392 *count = me_circ_buf_space(&instance->circ_buf);
1393 }
1394 }
1395
1396 ME_SUBDEVICE_EXIT;
1397
1398 return err;
1399 }
1400
1401 static int me4600_ao_io_stream_start(me_subdevice_t *subdevice,
1402 struct file *filep,
1403 int start_mode, int time_out, int flags)
1404 {
1405 me4600_ao_subdevice_t *instance;
1406 int err = ME_ERRNO_SUCCESS;
1407 unsigned long cpu_flags = 0;
1408 uint32_t status;
1409 uint32_t ctrl;
1410 uint32_t synch;
1411 int count = 0;
1412 int circ_buffer_count;
1413
1414 unsigned long ref;
1415 unsigned long delay = 0;
1416
1417 instance = (me4600_ao_subdevice_t *) subdevice;
1418
1419 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1420
1421 if (!instance->fifo) {
1422 PERROR("Not a streaming ao.\n");
1423 return ME_ERRNO_NOT_SUPPORTED;
1424 }
1425
1426 if (flags & ~ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
1427 PERROR("Invalid flags.\n");
1428 return ME_ERRNO_INVALID_FLAGS;
1429 }
1430
1431 if (time_out < 0) {
1432 PERROR("Invalid timeout specified.\n");
1433 return ME_ERRNO_INVALID_TIMEOUT;
1434 }
1435
1436 if ((start_mode != ME_START_MODE_BLOCKING)
1437 && (start_mode != ME_START_MODE_NONBLOCKING)) {
1438 PERROR("Invalid start mode specified.\n");
1439 return ME_ERRNO_INVALID_START_MODE;
1440 }
1441
1442 if (time_out) {
1443 delay = (time_out * HZ) / 1000;
1444 if (delay == 0)
1445 delay = 1;
1446 }
1447
1448 switch (instance->status) { //Checking actual mode.
1449 case ao_status_stream_configured:
1450 case ao_status_stream_end:
1451 //Correct modes!
1452 break;
1453
1454 //The device is in wrong mode.
1455 case ao_status_none:
1456 case ao_status_single_configured:
1457 case ao_status_single_run_wait:
1458 case ao_status_single_run:
1459 case ao_status_single_end_wait:
1460 PERROR
1461 ("Subdevice must be preinitialize correctly for streaming.\n");
1462 return ME_ERRNO_PREVIOUS_CONFIG;
1463
1464 case ao_status_stream_fifo_error:
1465 case ao_status_stream_buffer_error:
1466 case ao_status_stream_error:
1467 PDEBUG("Before restart broke stream 'STOP' must be caled.\n");
1468 return ME_STATUS_ERROR;
1469
1470 case ao_status_stream_run_wait:
1471 case ao_status_stream_run:
1472 case ao_status_stream_end_wait:
1473 PDEBUG("Stream is already working.\n");
1474 return ME_ERRNO_SUBDEVICE_BUSY;
1475
1476 default:
1477 instance->status = ao_status_stream_error;
1478 PERROR_CRITICAL("Status is in wrong state!\n");
1479 return ME_ERRNO_INTERNAL;
1480
1481 }
1482
1483 ME_SUBDEVICE_ENTER;
1484
1485 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1486 instance->circ_buf.tail += instance->preloaded_count;
1487 instance->circ_buf.tail &= instance->circ_buf.mask;
1488 }
1489 circ_buffer_count = me_circ_buf_values(&instance->circ_buf);
1490
1491 if (!circ_buffer_count && !instance->preloaded_count) { //No values in buffer
1492 ME_SUBDEVICE_EXIT;
1493 PERROR("No values in buffer!\n");
1494 return ME_ERRNO_LACK_OF_RESOURCES;
1495 }
1496
1497 //Cancel control task
1498 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
1499 instance->ao_control_task_flag = 0;
1500 cancel_delayed_work(&instance->ao_control_task);
1501
1502 //Stop device
1503 err = ao_stop_immediately(instance);
1504 if (err) {
1505 PERROR_CRITICAL("FSM IS BUSY!\n");
1506 ME_SUBDEVICE_EXIT;
1507
1508 return ME_ERRNO_SUBDEVICE_BUSY;
1509 }
1510 //Set values for single_read()
1511 instance->single_value = ME4600_AO_MAX_DATA + 1;
1512 instance->single_value_in_fifo = ME4600_AO_MAX_DATA + 1;
1513
1514 //Setting stop points
1515 if (instance->stop_mode == ME4600_AO_SCAN_STOP_MODE) {
1516 instance->stop_data_count =
1517 instance->stop_count * circ_buffer_count;
1518 } else {
1519 instance->stop_data_count = instance->stop_count;
1520 }
1521
1522 if ((instance->stop_data_count != 0)
1523 && (instance->stop_data_count < circ_buffer_count)) {
1524 PERROR("More data in buffer than previously set limit!\n");
1525 }
1526
1527 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1528 ctrl = inl(instance->ctrl_reg);
1529 //Check FIFO
1530 if (!(ctrl & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO wasn't enabeled. Do it. <= This should be done by user call with ME_WRITE_MODE_PRELOAD
1531 PINFO("Enableing FIFO.\n");
1532 ctrl |=
1533 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
1534 ME4600_AO_CTRL_BIT_RESET_IRQ;
1535
1536 instance->preloaded_count = 0;
1537 instance->data_count = 0;
1538 } else { //Block IRQ
1539 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
1540 }
1541 outl(ctrl, instance->ctrl_reg);
1542 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1543 instance->ctrl_reg - instance->reg_base,
1544 ctrl | ME4600_AO_CTRL_BIT_RESET_IRQ);
1545
1546 //Fill FIFO <= Generaly this should be done by user pre-load call but this is second place to do it.
1547 status = inl(instance->status_reg);
1548 if (!(status & ME4600_AO_STATUS_BIT_EF)) { //FIFO empty
1549 if (instance->stop_data_count == 0) {
1550 count = ME4600_AO_FIFO_COUNT;
1551 } else {
1552 count =
1553 (ME4600_AO_FIFO_COUNT <
1554 instance->
1555 stop_data_count) ? ME4600_AO_FIFO_COUNT :
1556 instance->stop_data_count;
1557 }
1558
1559 //Copy data
1560 count =
1561 ao_write_data(instance, count, instance->preloaded_count);
1562
1563 if (count < 0) { //This should never happend!
1564 PERROR_CRITICAL("COPY FINISH WITH ERROR!\n");
1565 spin_unlock_irqrestore(&instance->subdevice_lock,
1566 cpu_flags);
1567 ME_SUBDEVICE_EXIT;
1568 return ME_ERRNO_INTERNAL;
1569 }
1570 }
1571 //Set pre-load features.
1572 spin_lock(instance->preload_reg_lock);
1573 synch = inl(instance->preload_reg);
1574 synch &=
1575 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
1576 ao_idx);
1577 synch |=
1578 (instance->start_mode & ~ME4600_AO_EXT_TRIG) << instance->ao_idx;
1579 outl(synch, instance->preload_reg);
1580 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1581 instance->preload_reg - instance->reg_base, synch);
1582 spin_unlock(instance->preload_reg_lock);
1583
1584 //Default count is '0'
1585 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1586 instance->preloaded_count = 0;
1587 instance->circ_buf.tail += count;
1588 instance->circ_buf.tail &= instance->circ_buf.mask;
1589 } else { //Wraparound
1590 instance->preloaded_count += count;
1591 instance->data_count += count;
1592
1593 //Special case: Infinite wraparound with less than FIFO datas always should runs in hardware mode.
1594 if ((instance->stop_mode == ME4600_AO_INF_STOP_MODE)
1595 && (circ_buffer_count <= ME4600_AO_FIFO_COUNT)) { //Change to hardware wraparound
1596 PDEBUG
1597 ("Changeing mode from software wraparound to hardware wraparound.\n");
1598 //Copy all data
1599 count =
1600 ao_write_data(instance, circ_buffer_count,
1601 instance->preloaded_count);
1602 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
1603 ctrl |= ME4600_AO_MODE_WRAPAROUND;
1604 }
1605
1606 if (instance->preloaded_count == me_circ_buf_values(&instance->circ_buf)) { //Reset position indicator.
1607 instance->preloaded_count = 0;
1608 } else if (instance->preloaded_count > me_circ_buf_values(&instance->circ_buf)) { //This should never happend!
1609 PERROR_CRITICAL
1610 ("PRELOADED MORE VALUES THAN ARE IN BUFFER!\n");
1611 spin_unlock_irqrestore(&instance->subdevice_lock,
1612 cpu_flags);
1613 ME_SUBDEVICE_EXIT;
1614 return ME_ERRNO_INTERNAL;
1615 }
1616 }
1617
1618 //Set status to 'wait for start'
1619 instance->status = ao_status_stream_run_wait;
1620
1621 status = inl(instance->status_reg);
1622 //Start state machine and interrupts
1623 ctrl &= ~(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
1624 if (instance->start_mode == ME4600_AO_EXT_TRIG) { // External trigger.
1625 PINFO("External trigger.\n");
1626 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
1627 }
1628 if (!(status & ME4600_AO_STATUS_BIT_HF)) { //More than half!
1629 if ((ctrl & ME4600_AO_CTRL_MODE_MASK) == ME4600_AO_MODE_CONTINUOUS) { //Enable IRQ only when hardware_continous is set and FIFO is more than half
1630 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1631 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1632 }
1633 }
1634 outl(ctrl, instance->ctrl_reg);
1635 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1636 instance->ctrl_reg - instance->reg_base, ctrl);
1637 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
1638
1639 //Trigger output
1640 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Trigger outputs
1641 spin_lock(instance->preload_reg_lock);
1642 synch = inl(instance->preload_reg);
1643 //Add channel to start list
1644 outl(synch | (ME4600_AO_SYNC_HOLD << instance->ao_idx),
1645 instance->preload_reg);
1646 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
1647 instance->reg_base,
1648 instance->preload_reg - instance->reg_base,
1649 synch | (ME4600_AO_SYNC_HOLD << instance->ao_idx));
1650
1651 //Fire
1652 PINFO
1653 ("Fired all software synchronous outputs by software trigger.\n");
1654 outl(0x8000, instance->single_reg);
1655 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
1656 instance->reg_base,
1657 instance->single_reg - instance->reg_base, 0x8000);
1658
1659 //Restore save settings
1660 outl(synch, instance->preload_reg);
1661 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
1662 instance->reg_base,
1663 instance->preload_reg - instance->reg_base, synch);
1664 spin_unlock(instance->preload_reg_lock);
1665 } else if (!instance->start_mode) { //Trigger outputs
1666 /*
1667 //Remove channel from start list. // <== Unnecessary. Removed.
1668 spin_lock(instance->preload_reg_lock);
1669 synch = inl(instance->preload_reg);
1670 outl(synch & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx), instance->preload_reg);
1671 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, synch & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx));
1672 */
1673 //Fire
1674 PINFO("Software trigger.\n");
1675 outl(0x8000, instance->single_reg);
1676 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
1677 instance->reg_base,
1678 instance->single_reg - instance->reg_base, 0x8000);
1679
1680 /*
1681 //Restore save settings. // <== Unnecessary. Removed.
1682 outl(synch, instance->preload_reg);
1683 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, synch);
1684 spin_unlock(instance->preload_reg_lock);
1685 */
1686 }
1687 // Set control task's timeout
1688 ref = jiffies;
1689 instance->timeout.delay = delay;
1690 instance->timeout.start_time = ref;
1691
1692 if (status & ME4600_AO_STATUS_BIT_HF) { //Less than half but not empty!
1693 PINFO("Less than half.\n");
1694 if (instance->stop_data_count != 0) {
1695 count = ME4600_AO_FIFO_COUNT / 2;
1696 } else {
1697 count =
1698 ((ME4600_AO_FIFO_COUNT / 2) <
1699 instance->stop_data_count) ? ME4600_AO_FIFO_COUNT /
1700 2 : instance->stop_data_count;
1701 }
1702
1703 //Copy data
1704 count =
1705 ao_write_data(instance, count, instance->preloaded_count);
1706
1707 if (count < 0) { //This should never happend!
1708 PERROR_CRITICAL("COPY FINISH WITH ERROR!\n");
1709 ME_SUBDEVICE_EXIT;
1710 return ME_ERRNO_INTERNAL;
1711 }
1712
1713 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1714 instance->circ_buf.tail += count;
1715 instance->circ_buf.tail &= instance->circ_buf.mask;
1716 } else { //Wraparound
1717 instance->data_count += count;
1718 instance->preloaded_count += count;
1719
1720 if (instance->preloaded_count == me_circ_buf_values(&instance->circ_buf)) { //Reset position indicator.
1721 instance->preloaded_count = 0;
1722 } else if (instance->preloaded_count > me_circ_buf_values(&instance->circ_buf)) { //This should never happend!
1723 PERROR_CRITICAL
1724 ("PRELOADED MORE VALUES THAN ARE IN BUFFER!\n");
1725 ME_SUBDEVICE_EXIT;
1726 return ME_ERRNO_INTERNAL;
1727 }
1728 }
1729
1730 status = inl(instance->status_reg);
1731 if (!(status & ME4600_AO_STATUS_BIT_HF)) { //More than half!
1732 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1733 ctrl = inl(instance->ctrl_reg);
1734 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1735 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1736 outl(ctrl, instance->ctrl_reg);
1737 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1738 instance->reg_base,
1739 instance->ctrl_reg - instance->reg_base,
1740 ctrl);
1741 spin_unlock_irqrestore(&instance->subdevice_lock,
1742 cpu_flags);
1743 }
1744 }
1745 //Special case: Limited wraparound with less than HALF FIFO datas need work around to generate first interrupt.
1746 if ((instance->stop_mode != ME4600_AO_INF_STOP_MODE)
1747 && (instance->mode == ME4600_AO_SW_WRAP_MODE)
1748 && (circ_buffer_count <= (ME4600_AO_FIFO_COUNT / 2))) { //Put more data to FIFO
1749 PINFO("Limited wraparound with less than HALF FIFO datas.\n");
1750 if (instance->preloaded_count) { //This should never happend!
1751 PERROR_CRITICAL
1752 ("ERROR WHEN LOADING VALUES FOR WRAPAROUND!\n");
1753 ME_SUBDEVICE_EXIT;
1754 return ME_ERRNO_INTERNAL;
1755 }
1756
1757 while (instance->stop_data_count > instance->data_count) { //Maximum data not set jet.
1758 //Copy to buffer
1759 if (circ_buffer_count != ao_write_data(instance, circ_buffer_count, 0)) { //This should never happend!
1760 PERROR_CRITICAL
1761 ("ERROR WHEN LOADING VALUES FOR WRAPAROUND!\n");
1762 ME_SUBDEVICE_EXIT;
1763 return ME_ERRNO_INTERNAL;
1764 }
1765 instance->data_count += circ_buffer_count;
1766
1767 if (!((status = inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_HF)) { //FIFO is more than half. Enable IRQ and end copy.
1768 spin_lock_irqsave(&instance->subdevice_lock,
1769 cpu_flags);
1770 ctrl = inl(instance->ctrl_reg);
1771 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1772 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1773 outl(ctrl, instance->ctrl_reg);
1774 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1775 instance->reg_base,
1776 instance->ctrl_reg -
1777 instance->reg_base, ctrl);
1778 spin_unlock_irqrestore(&instance->
1779 subdevice_lock,
1780 cpu_flags);
1781 break;
1782 }
1783 }
1784 }
1785 // Schedule control task.
1786 instance->ao_control_task_flag = 1;
1787 queue_delayed_work(instance->me4600_workqueue,
1788 &instance->ao_control_task, 1);
1789
1790 if (start_mode == ME_START_MODE_BLOCKING) { //Wait for start.
1791 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
1792 wait_event_interruptible_timeout(instance->wait_queue,
1793 (instance->status !=
1794 ao_status_stream_run_wait),
1795 (delay) ? delay +
1796 1 : LONG_MAX);
1797
1798 if ((instance->status != ao_status_stream_run)
1799 && (instance->status != ao_status_stream_end)) {
1800 PDEBUG("Starting stream canceled. %d\n",
1801 instance->status);
1802 err = ME_ERRNO_CANCELLED;
1803 }
1804
1805 if (signal_pending(current)) {
1806 PERROR("Wait on start of state machine interrupted.\n");
1807 instance->status = ao_status_none;
1808 ao_stop_immediately(instance);
1809 err = ME_ERRNO_SIGNAL;
1810 } else if ((delay) && ((jiffies - ref) >= delay)) {
1811 if (instance->status != ao_status_stream_run) {
1812 if (instance->status == ao_status_stream_end) {
1813 PDEBUG("Timeout reached.\n");
1814 } else {
1815 if ((jiffies - ref) > delay) {
1816 PERROR
1817 ("Timeout reached. Not handled by control task!\n");
1818 } else {
1819 PERROR
1820 ("Timeout reached. Signal come but status is strange: %d\n",
1821 instance->status);
1822 }
1823 ao_stop_immediately(instance);
1824 }
1825
1826 instance->ao_control_task_flag = 0;
1827 cancel_delayed_work(&instance->ao_control_task);
1828 instance->status = ao_status_stream_end;
1829 err = ME_ERRNO_TIMEOUT;
1830 }
1831 }
1832 }
1833
1834 ME_SUBDEVICE_EXIT;
1835 return err;
1836 }
1837
1838 static int me4600_ao_io_stream_status(me_subdevice_t *subdevice,
1839 struct file *filep,
1840 int wait,
1841 int *status, int *values, int flags)
1842 {
1843 me4600_ao_subdevice_t *instance;
1844 int err = ME_ERRNO_SUCCESS;
1845
1846 instance = (me4600_ao_subdevice_t *) subdevice;
1847
1848 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1849
1850 if (!instance->fifo) {
1851 PERROR("Not a streaming ao.\n");
1852 return ME_ERRNO_NOT_SUPPORTED;
1853 }
1854
1855 if (flags) {
1856 PERROR("Invalid flag specified.\n");
1857 return ME_ERRNO_INVALID_FLAGS;
1858 }
1859
1860 if ((wait != ME_WAIT_NONE) && (wait != ME_WAIT_IDLE)) {
1861 PERROR("Invalid wait argument specified.\n");
1862 *status = ME_STATUS_INVALID;
1863 return ME_ERRNO_INVALID_WAIT;
1864 }
1865
1866 ME_SUBDEVICE_ENTER;
1867
1868 switch (instance->status) {
1869 case ao_status_single_configured:
1870 case ao_status_single_end:
1871 case ao_status_stream_configured:
1872 case ao_status_stream_end:
1873 case ao_status_stream_fifo_error:
1874 case ao_status_stream_buffer_error:
1875 case ao_status_stream_error:
1876 *status = ME_STATUS_IDLE;
1877 break;
1878
1879 case ao_status_single_run_wait:
1880 case ao_status_single_run:
1881 case ao_status_single_end_wait:
1882 case ao_status_stream_run_wait:
1883 case ao_status_stream_run:
1884 case ao_status_stream_end_wait:
1885 *status = ME_STATUS_BUSY;
1886 break;
1887
1888 case ao_status_none:
1889 default:
1890 *status =
1891 (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ?
1892 ME_STATUS_BUSY : ME_STATUS_IDLE;
1893 break;
1894 }
1895
1896 if ((wait == ME_WAIT_IDLE) && (*status == ME_STATUS_BUSY)) {
1897 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
1898 wait_event_interruptible_timeout(instance->wait_queue,
1899 ((instance->status !=
1900 ao_status_single_run_wait)
1901 && (instance->status !=
1902 ao_status_single_run)
1903 && (instance->status !=
1904 ao_status_single_end_wait)
1905 && (instance->status !=
1906 ao_status_stream_run_wait)
1907 && (instance->status !=
1908 ao_status_stream_run)
1909 && (instance->status !=
1910 ao_status_stream_end_wait)),
1911 LONG_MAX);
1912
1913 if (instance->status != ao_status_stream_end) {
1914 PDEBUG("Wait for IDLE canceled. %d\n",
1915 instance->status);
1916 err = ME_ERRNO_CANCELLED;
1917 }
1918
1919 if (signal_pending(current)) {
1920 PERROR("Wait for IDLE interrupted.\n");
1921 instance->status = ao_status_none;
1922 ao_stop_immediately(instance);
1923 err = ME_ERRNO_SIGNAL;
1924 }
1925
1926 *status = ME_STATUS_IDLE;
1927 }
1928
1929 *values = me_circ_buf_space(&instance->circ_buf);
1930
1931 ME_SUBDEVICE_EXIT;
1932
1933 return err;
1934 }
1935
1936 static int me4600_ao_io_stream_stop(me_subdevice_t *subdevice,
1937 struct file *filep,
1938 int stop_mode, int flags)
1939 { // Stop work and empty buffer and FIFO
1940 int err = ME_ERRNO_SUCCESS;
1941 me4600_ao_subdevice_t *instance;
1942 unsigned long cpu_flags;
1943 volatile uint32_t ctrl;
1944
1945 instance = (me4600_ao_subdevice_t *) subdevice;
1946
1947 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1948
1949 if (flags & ~ME_IO_STREAM_STOP_PRESERVE_BUFFERS) {
1950 PERROR("Invalid flag specified.\n");
1951 return ME_ERRNO_INVALID_FLAGS;
1952 }
1953
1954 if ((stop_mode != ME_STOP_MODE_IMMEDIATE)
1955 && (stop_mode != ME_STOP_MODE_LAST_VALUE)) {
1956 PERROR("Invalid stop mode specified.\n");
1957 return ME_ERRNO_INVALID_STOP_MODE;
1958 }
1959
1960 if (!instance->fifo) {
1961 PERROR("Not a streaming ao.\n");
1962 return ME_ERRNO_NOT_SUPPORTED;
1963 }
1964
1965 if (instance->status < ao_status_stream_configured) {
1966 //There is nothing to stop!
1967 PERROR("Subdevice not in streaming mode. %d\n",
1968 instance->status);
1969 return ME_ERRNO_PREVIOUS_CONFIG;
1970 }
1971
1972 ME_SUBDEVICE_ENTER;
1973
1974 //Mark as stopping. => Software stop.
1975 instance->status = ao_status_stream_end_wait;
1976
1977 if (stop_mode == ME_STOP_MODE_IMMEDIATE) { //Stopped now!
1978 err = ao_stop_immediately(instance);
1979 } else if (stop_mode == ME_STOP_MODE_LAST_VALUE) {
1980 ctrl = inl(instance->ctrl_reg) & ME4600_AO_CTRL_MODE_MASK;
1981 if (ctrl == ME4600_AO_MODE_WRAPAROUND) { //Hardware wraparound => Hardware stop.
1982 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1983 ctrl = inl(instance->ctrl_reg);
1984 ctrl |=
1985 ME4600_AO_CTRL_BIT_STOP |
1986 ME4600_AO_CTRL_BIT_RESET_IRQ;
1987 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1988 outl(ctrl, instance->ctrl_reg);
1989 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1990 instance->reg_base,
1991 instance->ctrl_reg - instance->reg_base,
1992 ctrl);
1993 spin_unlock_irqrestore(&instance->subdevice_lock,
1994 cpu_flags);
1995 }
1996 //Only runing process will interrupt this call. Events are signaled when status change.
1997 wait_event_interruptible_timeout(instance->wait_queue,
1998 (instance->status !=
1999 ao_status_stream_end_wait),
2000 LONG_MAX);
2001
2002 if (instance->status != ao_status_stream_end) {
2003 PDEBUG("Stopping stream canceled.\n");
2004 err = ME_ERRNO_CANCELLED;
2005 }
2006
2007 if (signal_pending(current)) {
2008 PERROR("Stopping stream interrupted.\n");
2009 instance->status = ao_status_none;
2010 ao_stop_immediately(instance);
2011 err = ME_ERRNO_SIGNAL;
2012 }
2013 }
2014
2015 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2016 ctrl = inl(instance->ctrl_reg);
2017 ctrl |=
2018 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
2019 ME4600_AO_CTRL_BIT_RESET_IRQ;
2020 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2021 if (!flags) { //Reset FIFO
2022 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
2023 }
2024 outl(ctrl, instance->ctrl_reg);
2025 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
2026 instance->ctrl_reg - instance->reg_base, ctrl);
2027 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2028
2029 if (!flags) { //Reset software buffer
2030 instance->circ_buf.head = 0;
2031 instance->circ_buf.tail = 0;
2032 instance->preloaded_count = 0;
2033 instance->data_count = 0;
2034 }
2035
2036 ME_SUBDEVICE_EXIT;
2037
2038 return err;
2039 }
2040
2041 static int me4600_ao_io_stream_write(me_subdevice_t *subdevice,
2042 struct file *filep,
2043 int write_mode,
2044 int *values, int *count, int flags)
2045 {
2046 int err = ME_ERRNO_SUCCESS;
2047 me4600_ao_subdevice_t *instance;
2048 unsigned long cpu_flags = 0;
2049 uint32_t reg_copy;
2050
2051 int copied_from_user = 0;
2052 int left_to_copy_from_user = *count;
2053
2054 int copied_values;
2055
2056 instance = (me4600_ao_subdevice_t *) subdevice;
2057
2058 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2059
2060 //Checking arguments
2061 if (!instance->fifo) {
2062 PERROR("Not a streaming ao.\n");
2063 return ME_ERRNO_NOT_SUPPORTED;
2064 }
2065
2066 if (flags) {
2067 PERROR("Invalid flag specified.\n");
2068 return ME_ERRNO_INVALID_FLAGS;
2069 }
2070
2071 if (*count <= 0) {
2072 PERROR("Invalid count of values specified.\n");
2073 return ME_ERRNO_INVALID_VALUE_COUNT;
2074 }
2075
2076 if (values == NULL) {
2077 PERROR("Invalid address of values specified.\n");
2078 return ME_ERRNO_INVALID_POINTER;
2079 }
2080
2081 if ((instance->status == ao_status_none) || (instance->status == ao_status_single_configured)) { //The device is in single mode.
2082 PERROR
2083 ("Subdevice must be preinitialize correctly for streaming.\n");
2084 return ME_ERRNO_PREVIOUS_CONFIG;
2085 }
2086 /// @note If no 'pre-load' is used. stream_start() will move data to FIFO.
2087 switch (write_mode) {
2088 case ME_WRITE_MODE_PRELOAD:
2089
2090 //Device must be stopped.
2091 if ((instance->status != ao_status_stream_configured)
2092 && (instance->status != ao_status_stream_end)) {
2093 PERROR
2094 ("Subdevice mustn't be runing when 'pre-load' mode is used.\n");
2095 return ME_ERRNO_PREVIOUS_CONFIG;
2096 }
2097 break;
2098 case ME_WRITE_MODE_NONBLOCKING:
2099 case ME_WRITE_MODE_BLOCKING:
2100 /// @note In blocking mode: When device is not runing and there is not enought space call will blocked up!
2101 /// @note Some other thread must empty buffer by starting engine.
2102 break;
2103
2104 default:
2105 PERROR("Invalid write mode specified.\n");
2106 return ME_ERRNO_INVALID_WRITE_MODE;
2107 }
2108
2109 if (instance->mode & ME4600_AO_WRAP_MODE) { //Wraparound mode. Device must be stopped.
2110 if ((instance->status != ao_status_stream_configured)
2111 && (instance->status != ao_status_stream_end)) {
2112 PERROR
2113 ("Subdevice mustn't be runing when 'pre-load' mode is used.\n");
2114 return ME_ERRNO_INVALID_WRITE_MODE;
2115 }
2116 }
2117
2118 if ((instance->mode == ME4600_AO_HW_WRAP_MODE) && (write_mode != ME_WRITE_MODE_PRELOAD)) { // hardware wrap_around mode.
2119 //This is transparent for user.
2120 PDEBUG("Changing write_mode to ME_WRITE_MODE_PRELOAD.\n");
2121 write_mode = ME_WRITE_MODE_PRELOAD;
2122 }
2123
2124 ME_SUBDEVICE_ENTER;
2125
2126 if (write_mode == ME_WRITE_MODE_PRELOAD) { //Init enviroment - preload
2127 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2128 reg_copy = inl(instance->ctrl_reg);
2129 //Check FIFO
2130 if (!(reg_copy & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO not active. Enable it.
2131 reg_copy |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
2132 outl(reg_copy, instance->ctrl_reg);
2133 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2134 instance->reg_base,
2135 instance->ctrl_reg - instance->reg_base,
2136 reg_copy);
2137 instance->preloaded_count = 0;
2138 }
2139 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2140 }
2141
2142 while (1) {
2143 //Copy to buffer. This step is common for all modes.
2144 copied_from_user =
2145 ao_get_data_from_user(instance, left_to_copy_from_user,
2146 values + (*count -
2147 left_to_copy_from_user));
2148 left_to_copy_from_user -= copied_from_user;
2149
2150 reg_copy = inl(instance->status_reg);
2151 if ((instance->status == ao_status_stream_run) && !(reg_copy & ME4600_AO_STATUS_BIT_FSM)) { //BROKEN PIPE! The state machine is stoped but logical status show that should be working.
2152 PERROR("Broken pipe in write.\n");
2153 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
2154 break;
2155 }
2156
2157 if ((instance->status == ao_status_stream_run) && (instance->mode == ME4600_AO_CONTINOUS) && (reg_copy & ME4600_AO_STATUS_BIT_HF)) { //Continous mode runing and data are below half!
2158
2159 // Block interrupts.
2160 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2161 reg_copy = inl(instance->ctrl_reg);
2162 //reg_copy &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2163 reg_copy |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2164 outl(reg_copy, instance->ctrl_reg);
2165 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2166 instance->reg_base,
2167 instance->ctrl_reg - instance->reg_base,
2168 reg_copy);
2169 spin_unlock_irqrestore(&instance->subdevice_lock,
2170 cpu_flags);
2171
2172 //Fast copy
2173 copied_values =
2174 ao_write_data(instance, ME4600_AO_FIFO_COUNT / 2,
2175 0);
2176 if (copied_values > 0) {
2177 instance->circ_buf.tail += copied_values;
2178 instance->circ_buf.tail &=
2179 instance->circ_buf.mask;
2180 continue;
2181 }
2182 // Activate interrupts.
2183 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2184 reg_copy = inl(instance->ctrl_reg);
2185 //reg_copy |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2186 reg_copy &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2187 outl(reg_copy, instance->ctrl_reg);
2188 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2189 instance->reg_base,
2190 instance->ctrl_reg - instance->reg_base,
2191 reg_copy);
2192 spin_unlock_irqrestore(&instance->subdevice_lock,
2193 cpu_flags);
2194
2195 if (copied_values == 0) { //This was checked and never should happend!
2196 PERROR_CRITICAL("COPING FINISH WITH 0!\n");
2197 }
2198
2199 if (copied_values < 0) { //This was checked and never should happend!
2200 PERROR_CRITICAL
2201 ("COPING FINISH WITH AN ERROR!\n");
2202 instance->status = ao_status_stream_fifo_error;
2203 err = ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2204 break;
2205 }
2206 }
2207
2208 if (!left_to_copy_from_user) { //All datas were copied.
2209 break;
2210 } else { //Not all datas were copied.
2211 if (instance->mode & ME4600_AO_WRAP_MODE) { //Error too much datas! Wraparound is limited in size!
2212 PERROR
2213 ("Too much data for wraparound mode! Exceeded size of %ld.\n",
2214 ME4600_AO_CIRC_BUF_COUNT - 1);
2215 err = ME_ERRNO_RING_BUFFER_OVERFLOW;
2216 break;
2217 }
2218
2219 if (write_mode != ME_WRITE_MODE_BLOCKING) { //Non blocking calls
2220 break;
2221 }
2222
2223 wait_event_interruptible(instance->wait_queue,
2224 me_circ_buf_space(&instance->
2225 circ_buf));
2226
2227 if (signal_pending(current)) {
2228 PERROR("Writing interrupted by signal.\n");
2229 instance->status = ao_status_none;
2230 ao_stop_immediately(instance);
2231 err = ME_ERRNO_SIGNAL;
2232 break;
2233 }
2234
2235 if (instance->status == ao_status_none) { //Reset
2236 PERROR("Writing interrupted by reset.\n");
2237 err = ME_ERRNO_CANCELLED;
2238 break;
2239 }
2240 }
2241 }
2242
2243 if (write_mode == ME_WRITE_MODE_PRELOAD) { //Copy data to FIFO - preload
2244 copied_values =
2245 ao_write_data_pooling(instance, ME4600_AO_FIFO_COUNT,
2246 instance->preloaded_count);
2247 instance->preloaded_count += copied_values;
2248 instance->data_count += copied_values;
2249
2250 if ((instance->mode == ME4600_AO_HW_WRAP_MODE)
2251 && (me_circ_buf_values(&instance->circ_buf) >
2252 ME4600_AO_FIFO_COUNT)) {
2253 PERROR
2254 ("Too much data for hardware wraparound mode! Exceeded size of %d.\n",
2255 ME4600_AO_FIFO_COUNT);
2256 err = ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2257 }
2258 }
2259
2260 *count = *count - left_to_copy_from_user;
2261 ME_SUBDEVICE_EXIT;
2262
2263 return err;
2264 }
2265 static irqreturn_t me4600_ao_isr(int irq, void *dev_id)
2266 {
2267 me4600_ao_subdevice_t *instance = dev_id;
2268 uint32_t irq_status;
2269 uint32_t ctrl;
2270 uint32_t status;
2271 int count = 0;
2272
2273 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2274
2275 if (irq != instance->irq) {
2276 PERROR("Incorrect interrupt num: %d.\n", irq);
2277 return IRQ_NONE;
2278 }
2279
2280 irq_status = inl(instance->irq_status_reg);
2281 if (!(irq_status & (ME4600_IRQ_STATUS_BIT_AO_HF << instance->ao_idx))) {
2282 PINFO("%ld Shared interrupt. %s(): ID=%d: status_reg=0x%04X\n",
2283 jiffies, __func__, instance->ao_idx, irq_status);
2284 return IRQ_NONE;
2285 }
2286
2287 if (!instance->circ_buf.buf) {
2288 instance->status = ao_status_stream_error;
2289 PERROR_CRITICAL("CIRCULAR BUFFER NOT EXISTS!\n");
2290 //Block interrupts. Stop machine.
2291 ctrl = inl(instance->ctrl_reg);
2292 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2293 ctrl |=
2294 ME4600_AO_CTRL_BIT_RESET_IRQ |
2295 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP;
2296 outl(ctrl, instance->ctrl_reg);
2297 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2298 instance->reg_base,
2299 instance->ctrl_reg - instance->reg_base, ctrl);
2300
2301 //Inform user
2302 wake_up_interruptible_all(&instance->wait_queue);
2303 return IRQ_HANDLED;
2304 }
2305
2306 status = inl(instance->status_reg);
2307 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { //Too late. Not working! END? BROKEN PIPE?
2308 PDEBUG("Interrupt come but ISM is not working!\n");
2309 //Block interrupts. Stop machine.
2310 ctrl = inl(instance->ctrl_reg);
2311 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2312 ctrl |=
2313 ME4600_AO_CTRL_BIT_RESET_IRQ | ME4600_AO_CTRL_BIT_STOP |
2314 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
2315 outl(ctrl, instance->ctrl_reg);
2316 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2317 instance->reg_base,
2318 instance->ctrl_reg - instance->reg_base, ctrl);
2319
2320 return IRQ_HANDLED;
2321 }
2322 //General procedure. Process more datas.
2323
2324 #ifdef MEDEBUG_DEBUG
2325 if (!me_circ_buf_values(&instance->circ_buf)) { //Buffer is empty!
2326 PDEBUG("Circular buffer empty!\n");
2327 }
2328 #endif
2329
2330 //Check FIFO
2331 if (status & ME4600_AO_STATUS_BIT_HF) { //OK less than half
2332
2333 //Block interrupts
2334 ctrl = inl(instance->ctrl_reg);
2335 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2336 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2337 outl(ctrl, instance->ctrl_reg);
2338 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2339 instance->reg_base,
2340 instance->ctrl_reg - instance->reg_base, ctrl);
2341
2342 do {
2343 //Calculate how many should be copied.
2344 count =
2345 (instance->stop_data_count) ? instance->
2346 stop_data_count -
2347 instance->data_count : ME4600_AO_FIFO_COUNT / 2;
2348 if (ME4600_AO_FIFO_COUNT / 2 < count) {
2349 count = ME4600_AO_FIFO_COUNT / 2;
2350 }
2351 //Copy data
2352 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
2353 count = ao_write_data(instance, count, 0);
2354 if (count > 0) {
2355 instance->circ_buf.tail += count;
2356 instance->circ_buf.tail &=
2357 instance->circ_buf.mask;
2358 instance->data_count += count;
2359
2360 if ((instance->status == ao_status_stream_end_wait) && !me_circ_buf_values(&instance->circ_buf)) { //Stoping. Whole buffer was copied.
2361 break;
2362 }
2363 }
2364 } else if ((instance->mode == ME4600_AO_SW_WRAP_MODE) && ((ctrl & ME4600_AO_CTRL_MODE_MASK) == ME4600_AO_MODE_CONTINUOUS)) { //Wraparound (software)
2365 if (instance->status == ao_status_stream_end_wait) { //We stoping => Copy to the end of the buffer.
2366 count =
2367 ao_write_data(instance, count, 0);
2368 } else { //Copy in wraparound mode.
2369 count =
2370 ao_write_data_wraparound(instance,
2371 count,
2372 instance->
2373 preloaded_count);
2374 }
2375
2376 if (count > 0) {
2377 instance->data_count += count;
2378 instance->preloaded_count += count;
2379 instance->preloaded_count %=
2380 me_circ_buf_values(&instance->
2381 circ_buf);
2382
2383 if ((instance->status == ao_status_stream_end_wait) && !instance->preloaded_count) { //Stoping. Whole buffer was copied.
2384 break;
2385 }
2386 }
2387 }
2388
2389 if ((count <= 0) || (instance->stop_data_count && (instance->stop_data_count <= instance->data_count))) { //End of work.
2390 break;
2391 }
2392 } //Repeat if still is under half fifo
2393 while ((status =
2394 inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_HF);
2395
2396 //Unblock interrupts
2397 ctrl = inl(instance->ctrl_reg);
2398 if (count >= 0) { //Copy was successful.
2399 if (instance->stop_data_count && (instance->stop_data_count <= instance->data_count)) { //Finishing work. No more interrupts.
2400 PDEBUG("Finishing work. Interrupt disabled.\n");
2401 instance->status = ao_status_stream_end_wait;
2402 } else if (count > 0) { //Normal work. Enable interrupt.
2403 PDEBUG("Normal work. Enable interrupt.\n");
2404 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2405 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2406 } else { //Normal work but there are no more data in buffer. Interrupt active but blocked. stream_write() will unblock it.
2407 PDEBUG
2408 ("No data in software buffer. Interrupt blocked.\n");
2409 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2410 }
2411 } else { //Error during copy.
2412 instance->status = ao_status_stream_fifo_error;
2413 }
2414
2415 outl(ctrl, instance->ctrl_reg);
2416 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2417 instance->reg_base,
2418 instance->ctrl_reg - instance->reg_base, ctrl);
2419 } else { //?? more than half
2420 PDEBUG
2421 ("Interrupt come but FIFO more than half full! Reset interrupt.\n");
2422 //Reset pending interrupt
2423 ctrl = inl(instance->ctrl_reg);
2424 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2425 outl(ctrl, instance->ctrl_reg);
2426 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2427 instance->reg_base,
2428 instance->ctrl_reg - instance->reg_base, ctrl);
2429 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2430 outl(ctrl, instance->ctrl_reg);
2431 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2432 instance->reg_base,
2433 instance->ctrl_reg - instance->reg_base, ctrl);
2434 }
2435
2436 PINFO("ISR: Buffer count: %d.(T:%d H:%d)\n",
2437 me_circ_buf_values(&instance->circ_buf), instance->circ_buf.tail,
2438 instance->circ_buf.head);
2439 PINFO("ISR: Stop count: %d.\n", instance->stop_count);
2440 PINFO("ISR: Stop data count: %d.\n", instance->stop_data_count);
2441 PINFO("ISR: Data count: %d.\n", instance->data_count);
2442
2443 //Inform user
2444 wake_up_interruptible_all(&instance->wait_queue);
2445
2446 return IRQ_HANDLED;
2447 }
2448
2449 static void me4600_ao_destructor(struct me_subdevice *subdevice)
2450 {
2451 me4600_ao_subdevice_t *instance;
2452
2453 instance = (me4600_ao_subdevice_t *) subdevice;
2454
2455 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2456
2457 instance->ao_control_task_flag = 0;
2458
2459 // Reset subdevice to asure clean exit.
2460 me4600_ao_io_reset_subdevice(subdevice, NULL,
2461 ME_IO_RESET_SUBDEVICE_NO_FLAGS);
2462
2463 // Remove any tasks from work queue. This is paranoic because it was done allready in reset().
2464 if (!cancel_delayed_work(&instance->ao_control_task)) { //Wait 2 ticks to be sure that control task is removed from queue.
2465 set_current_state(TASK_INTERRUPTIBLE);
2466 schedule_timeout(2);
2467 }
2468
2469 if (instance->fifo) {
2470 if (instance->irq) {
2471 free_irq(instance->irq, instance);
2472 instance->irq = 0;
2473 }
2474
2475 if (instance->circ_buf.buf) {
2476 free_pages((unsigned long)instance->circ_buf.buf,
2477 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2478 }
2479 instance->circ_buf.buf = NULL;
2480 }
2481
2482 me_subdevice_deinit(&instance->base);
2483 kfree(instance);
2484 }
2485
2486 me4600_ao_subdevice_t *me4600_ao_constructor(uint32_t reg_base,
2487 spinlock_t *preload_reg_lock,
2488 uint32_t *preload_flags,
2489 int ao_idx,
2490 int fifo,
2491 int irq,
2492 struct workqueue_struct *me4600_wq)
2493 {
2494 me4600_ao_subdevice_t *subdevice;
2495 int err;
2496
2497 PDEBUG("executed. idx=%d\n", ao_idx);
2498
2499 // Allocate memory for subdevice instance.
2500 subdevice = kmalloc(sizeof(me4600_ao_subdevice_t), GFP_KERNEL);
2501
2502 if (!subdevice) {
2503 PERROR("Cannot get memory for subdevice instance.\n");
2504 return NULL;
2505 }
2506
2507 memset(subdevice, 0, sizeof(me4600_ao_subdevice_t));
2508
2509 // Initialize subdevice base class.
2510 err = me_subdevice_init(&subdevice->base);
2511
2512 if (err) {
2513 PERROR("Cannot initialize subdevice base class instance.\n");
2514 kfree(subdevice);
2515 return NULL;
2516 }
2517 // Initialize spin locks.
2518 spin_lock_init(&subdevice->subdevice_lock);
2519
2520 subdevice->preload_reg_lock = preload_reg_lock;
2521 subdevice->preload_flags = preload_flags;
2522
2523 // Store analog output index.
2524 subdevice->ao_idx = ao_idx;
2525
2526 // Store if analog output has fifo.
2527 subdevice->fifo = (ao_idx < fifo) ? 1 : 0;
2528
2529 if (subdevice->fifo) { // Allocate and initialize circular buffer.
2530 subdevice->circ_buf.mask = ME4600_AO_CIRC_BUF_COUNT - 1;
2531
2532 subdevice->circ_buf.buf =
2533 (void *)__get_free_pages(GFP_KERNEL,
2534 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2535 PDEBUG("circ_buf = %p size=%ld\n", subdevice->circ_buf.buf,
2536 ME4600_AO_CIRC_BUF_SIZE);
2537
2538 if (!subdevice->circ_buf.buf) {
2539 PERROR
2540 ("Cannot initialize subdevice base class instance.\n");
2541 kfree(subdevice);
2542 return NULL;
2543 }
2544
2545 memset(subdevice->circ_buf.buf, 0, ME4600_AO_CIRC_BUF_SIZE);
2546 } else { // No FIFO.
2547 subdevice->circ_buf.mask = 0;
2548 subdevice->circ_buf.buf = NULL;
2549 }
2550
2551 subdevice->circ_buf.head = 0;
2552 subdevice->circ_buf.tail = 0;
2553
2554 subdevice->status = ao_status_none;
2555 subdevice->ao_control_task_flag = 0;
2556 subdevice->timeout.delay = 0;
2557 subdevice->timeout.start_time = jiffies;
2558
2559 // Initialize wait queue.
2560 init_waitqueue_head(&subdevice->wait_queue);
2561
2562 // Initialize single value to 0V.
2563 subdevice->single_value = 0x8000;
2564 subdevice->single_value_in_fifo = 0x8000;
2565
2566 // Register interrupt service routine.
2567 if (subdevice->fifo) {
2568 subdevice->irq = irq;
2569 if (request_irq(subdevice->irq, me4600_ao_isr,
2570 #ifdef IRQF_DISABLED
2571 IRQF_DISABLED | IRQF_SHARED,
2572 #else
2573 SA_INTERRUPT | SA_SHIRQ,
2574 #endif
2575 ME4600_NAME, subdevice)) {
2576 PERROR("Cannot get interrupt line.\n");
2577 PDEBUG("free circ_buf = %p size=%d",
2578 subdevice->circ_buf.buf,
2579 PAGE_SHIFT << ME4600_AO_CIRC_BUF_SIZE_ORDER);
2580 free_pages((unsigned long)subdevice->circ_buf.buf,
2581 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2582 me_subdevice_deinit((me_subdevice_t *) subdevice);
2583 kfree(subdevice);
2584 return NULL;
2585 }
2586 PINFO("Registered irq=%d.\n", subdevice->irq);
2587 } else {
2588 subdevice->irq = 0;
2589 }
2590
2591 // Initialize registers.
2592 subdevice->irq_status_reg = reg_base + ME4600_IRQ_STATUS_REG;
2593 subdevice->preload_reg = reg_base + ME4600_AO_SYNC_REG;
2594 if (ao_idx == 0) {
2595 subdevice->ctrl_reg = reg_base + ME4600_AO_00_CTRL_REG;
2596 subdevice->status_reg = reg_base + ME4600_AO_00_STATUS_REG;
2597 subdevice->fifo_reg = reg_base + ME4600_AO_00_FIFO_REG;
2598 subdevice->single_reg = reg_base + ME4600_AO_00_SINGLE_REG;
2599 subdevice->timer_reg = reg_base + ME4600_AO_00_TIMER_REG;
2600 subdevice->reg_base = reg_base;
2601 subdevice->bitpattern = 0;
2602 } else if (ao_idx == 1) {
2603 subdevice->ctrl_reg = reg_base + ME4600_AO_01_CTRL_REG;
2604 subdevice->status_reg = reg_base + ME4600_AO_01_STATUS_REG;
2605 subdevice->fifo_reg = reg_base + ME4600_AO_01_FIFO_REG;
2606 subdevice->single_reg = reg_base + ME4600_AO_01_SINGLE_REG;
2607 subdevice->timer_reg = reg_base + ME4600_AO_01_TIMER_REG;
2608 subdevice->reg_base = reg_base;
2609 subdevice->bitpattern = 0;
2610 } else if (ao_idx == 2) {
2611 subdevice->ctrl_reg = reg_base + ME4600_AO_02_CTRL_REG;
2612 subdevice->status_reg = reg_base + ME4600_AO_02_STATUS_REG;
2613 subdevice->fifo_reg = reg_base + ME4600_AO_02_FIFO_REG;
2614 subdevice->single_reg = reg_base + ME4600_AO_02_SINGLE_REG;
2615 subdevice->timer_reg = reg_base + ME4600_AO_02_TIMER_REG;
2616 subdevice->reg_base = reg_base;
2617 subdevice->bitpattern = 0;
2618 } else if (ao_idx == 3) {
2619 subdevice->ctrl_reg = reg_base + ME4600_AO_03_CTRL_REG;
2620 subdevice->status_reg = reg_base + ME4600_AO_03_STATUS_REG;
2621 subdevice->fifo_reg = reg_base + ME4600_AO_03_FIFO_REG;
2622 subdevice->single_reg = reg_base + ME4600_AO_03_SINGLE_REG;
2623 subdevice->timer_reg = reg_base + ME4600_AO_03_TIMER_REG;
2624 subdevice->reg_base = reg_base;
2625 subdevice->bitpattern = 1;
2626 } else {
2627 PERROR_CRITICAL("WRONG SUBDEVICE idx=%d!", ao_idx);
2628 me_subdevice_deinit((me_subdevice_t *) subdevice);
2629 if (subdevice->fifo) {
2630 free_pages((unsigned long)subdevice->circ_buf.buf,
2631 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2632 }
2633 subdevice->circ_buf.buf = NULL;
2634 kfree(subdevice);
2635 return NULL;
2636 }
2637
2638 // Override base class methods.
2639 subdevice->base.me_subdevice_destructor = me4600_ao_destructor;
2640 subdevice->base.me_subdevice_io_reset_subdevice =
2641 me4600_ao_io_reset_subdevice;
2642 subdevice->base.me_subdevice_io_single_config =
2643 me4600_ao_io_single_config;
2644 subdevice->base.me_subdevice_io_single_read = me4600_ao_io_single_read;
2645 subdevice->base.me_subdevice_io_single_write =
2646 me4600_ao_io_single_write;
2647 subdevice->base.me_subdevice_io_stream_config =
2648 me4600_ao_io_stream_config;
2649 subdevice->base.me_subdevice_io_stream_new_values =
2650 me4600_ao_io_stream_new_values;
2651 subdevice->base.me_subdevice_io_stream_write =
2652 me4600_ao_io_stream_write;
2653 subdevice->base.me_subdevice_io_stream_start =
2654 me4600_ao_io_stream_start;
2655 subdevice->base.me_subdevice_io_stream_status =
2656 me4600_ao_io_stream_status;
2657 subdevice->base.me_subdevice_io_stream_stop = me4600_ao_io_stream_stop;
2658 subdevice->base.me_subdevice_query_number_channels =
2659 me4600_ao_query_number_channels;
2660 subdevice->base.me_subdevice_query_subdevice_type =
2661 me4600_ao_query_subdevice_type;
2662 subdevice->base.me_subdevice_query_subdevice_caps =
2663 me4600_ao_query_subdevice_caps;
2664 subdevice->base.me_subdevice_query_subdevice_caps_args =
2665 me4600_ao_query_subdevice_caps_args;
2666 subdevice->base.me_subdevice_query_range_by_min_max =
2667 me4600_ao_query_range_by_min_max;
2668 subdevice->base.me_subdevice_query_number_ranges =
2669 me4600_ao_query_number_ranges;
2670 subdevice->base.me_subdevice_query_range_info =
2671 me4600_ao_query_range_info;
2672 subdevice->base.me_subdevice_query_timer = me4600_ao_query_timer;
2673
2674 // Prepare work queue
2675 subdevice->me4600_workqueue = me4600_wq;
2676
2677 /* workqueue API changed in kernel 2.6.20 */
2678 INIT_DELAYED_WORK(&subdevice->ao_control_task,
2679 me4600_ao_work_control_task);
2680
2681 if (subdevice->fifo) { // Set speed for single operations.
2682 outl(ME4600_AO_MIN_CHAN_TICKS - 1, subdevice->timer_reg);
2683 subdevice->hardware_stop_delay = HZ / 10; //100ms
2684 }
2685
2686 return subdevice;
2687 }
2688
2689 /** @brief Stop presentation. Preserve FIFOs.
2690 *
2691 * @param instance The subdevice instance (pointer).
2692 */
2693 inline int ao_stop_immediately(me4600_ao_subdevice_t *instance)
2694 {
2695 unsigned long cpu_flags;
2696 uint32_t ctrl;
2697 int timeout;
2698 int i;
2699
2700 timeout =
2701 (instance->hardware_stop_delay >
2702 (HZ / 10)) ? instance->hardware_stop_delay : HZ / 10;
2703 for (i = 0; i <= timeout; i++) {
2704 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2705 // Stop all actions. No conditions! Block interrupts. Leave FIFO untouched!
2706 ctrl = inl(instance->ctrl_reg);
2707 ctrl |=
2708 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
2709 | ME4600_AO_CTRL_BIT_RESET_IRQ;
2710 ctrl &=
2711 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
2712 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
2713 outl(ctrl, instance->ctrl_reg);
2714 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2715 instance->reg_base,
2716 instance->ctrl_reg - instance->reg_base, ctrl);
2717 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2718
2719 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) { // Exit.
2720 break;
2721 }
2722 //Still working!
2723 set_current_state(TASK_INTERRUPTIBLE);
2724 schedule_timeout(1);
2725 }
2726
2727 if (i > timeout) {
2728 PERROR_CRITICAL("FSM IS BUSY!\n");
2729 return ME_ERRNO_INTERNAL;
2730 }
2731 return ME_ERRNO_SUCCESS;
2732 }
2733
2734 /** @brief Copy data from circular buffer to fifo (fast) in wraparound.
2735 * @note This is time critical function. Checking is done at begining and end only.
2736 * @note The is not reasonable way to check how many walues was in FIFO at begining. The count must be managed externaly.
2737 *
2738 * @param instance The subdevice instance (pointer).
2739 * @param count Maximum number of copied data.
2740 * @param start_pos Position of the firs value in buffer.
2741 *
2742 * @return On success: Number of copied data.
2743 * @return On error/success: 0. No datas were copied => no data in buffer.
2744 * @return On error: -ME_ERRNO_FIFO_BUFFER_OVERFLOW.
2745 */
2746 inline int ao_write_data_wraparound(me4600_ao_subdevice_t *instance, int count,
2747 int start_pos)
2748 { /// @note This is time critical function!
2749 uint32_t status;
2750 uint32_t value;
2751 int pos =
2752 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2753 int local_count = count;
2754 int i = 1;
2755
2756 if (count <= 0) { //Wrong count!
2757 return 0;
2758 }
2759
2760 while (i < local_count) {
2761 //Get value from buffer
2762 value = *(instance->circ_buf.buf + pos);
2763 //Prepare it
2764 if (instance->ao_idx & 0x1) {
2765 value <<= 16;
2766 }
2767 //Put value to FIFO
2768 outl(value, instance->fifo_reg);
2769 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2770
2771 pos++;
2772 pos &= instance->circ_buf.mask;
2773 if (pos == instance->circ_buf.head) {
2774 pos = instance->circ_buf.tail;
2775 }
2776 i++;
2777 }
2778
2779 status = inl(instance->status_reg);
2780 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full before all datas were copied!
2781 PERROR("FIFO was full before all datas were copied! idx=%d\n",
2782 instance->ao_idx);
2783 return -ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2784 } else { //Add last value
2785 value = *(instance->circ_buf.buf + pos);
2786 if (instance->ao_idx & 0x1) {
2787 value <<= 16;
2788 }
2789 //Put value to FIFO
2790 outl(value, instance->fifo_reg);
2791 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2792 }
2793
2794 PINFO("WRAPAROUND LOADED %d values. idx=%d\n", local_count,
2795 instance->ao_idx);
2796 return local_count;
2797 }
2798
2799 /** @brief Copy data from software buffer to fifo (fast).
2800 * @note This is time critical function. Checking is done at begining and end only.
2801 * @note The is not reasonable way to check how many walues was in FIFO at begining. The count must be managed externaly.
2802 *
2803 * @param instance The subdevice instance (pointer).
2804 * @param count Maximum number of copied data.
2805 * @param start_pos Position of the firs value in buffer.
2806 *
2807 * @return On success: Number of copied data.
2808 * @return On error/success: 0. No datas were copied => no data in buffer.
2809 * @return On error: -ME_ERRNO_FIFO_BUFFER_OVERFLOW.
2810 */
2811 inline int ao_write_data(me4600_ao_subdevice_t *instance, int count,
2812 int start_pos)
2813 { /// @note This is time critical function!
2814 uint32_t status;
2815 uint32_t value;
2816 int pos =
2817 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2818 int local_count = count;
2819 int max_count;
2820 int i = 1;
2821
2822 if (count <= 0) { //Wrong count!
2823 return 0;
2824 }
2825
2826 max_count = me_circ_buf_values(&instance->circ_buf) - start_pos;
2827 if (max_count <= 0) { //No data to copy!
2828 return 0;
2829 }
2830
2831 if (max_count < count) {
2832 local_count = max_count;
2833 }
2834
2835 while (i < local_count) {
2836 //Get value from buffer
2837 value = *(instance->circ_buf.buf + pos);
2838 //Prepare it
2839 if (instance->ao_idx & 0x1) {
2840 value <<= 16;
2841 }
2842 //Put value to FIFO
2843 outl(value, instance->fifo_reg);
2844 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2845
2846 pos++;
2847 pos &= instance->circ_buf.mask;
2848 i++;
2849 }
2850
2851 status = inl(instance->status_reg);
2852 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full before all datas were copied!
2853 PERROR("FIFO was full before all datas were copied! idx=%d\n",
2854 instance->ao_idx);
2855 return -ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2856 } else { //Add last value
2857 value = *(instance->circ_buf.buf + pos);
2858 if (instance->ao_idx & 0x1) {
2859 value <<= 16;
2860 }
2861 //Put value to FIFO
2862 outl(value, instance->fifo_reg);
2863 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2864 }
2865
2866 PINFO("FAST LOADED %d values. idx=%d\n", local_count, instance->ao_idx);
2867 return local_count;
2868 }
2869
2870 /** @brief Copy data from software buffer to fifo (slow).
2871 * @note This is slow function that copy all data from buffer to FIFO with full control.
2872 *
2873 * @param instance The subdevice instance (pointer).
2874 * @param count Maximum number of copied data.
2875 * @param start_pos Position of the firs value in buffer.
2876 *
2877 * @return On success: Number of copied values.
2878 * @return On error/success: 0. FIFO was full at begining.
2879 * @return On error: -ME_ERRNO_RING_BUFFER_UNDEFFLOW.
2880 */
2881 inline int ao_write_data_pooling(me4600_ao_subdevice_t *instance, int count,
2882 int start_pos)
2883 { /// @note This is slow function!
2884 uint32_t status;
2885 uint32_t value;
2886 int pos =
2887 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2888 int local_count = count;
2889 int i;
2890 int max_count;
2891
2892 if (count <= 0) { //Wrong count!
2893 PERROR("SLOW LOADED: Wrong count! idx=%d\n", instance->ao_idx);
2894 return 0;
2895 }
2896
2897 max_count = me_circ_buf_values(&instance->circ_buf) - start_pos;
2898 if (max_count <= 0) { //No data to copy!
2899 PERROR("SLOW LOADED: No data to copy! idx=%d\n",
2900 instance->ao_idx);
2901 return 0;
2902 }
2903
2904 if (max_count < count) {
2905 local_count = max_count;
2906 }
2907
2908 for (i = 0; i < local_count; i++) {
2909 status = inl(instance->status_reg);
2910 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full!
2911 return i;
2912 }
2913 //Get value from buffer
2914 value = *(instance->circ_buf.buf + pos);
2915 //Prepare it
2916 if (instance->ao_idx & 0x1) {
2917 value <<= 16;
2918 }
2919 //Put value to FIFO
2920 outl(value, instance->fifo_reg);
2921 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2922
2923 pos++;
2924 pos &= instance->circ_buf.mask;
2925 }
2926
2927 PINFO("SLOW LOADED %d values. idx=%d\n", local_count, instance->ao_idx);
2928 return local_count;
2929 }
2930
2931 /** @brief Copy data from user space to circular buffer.
2932 * @param instance The subdevice instance (pointer).
2933 * @param count Number of datas in user space.
2934 * @param user_values Buffer's pointer.
2935 *
2936 * @return On success: Number of copied values.
2937 * @return On error: -ME_ERRNO_INTERNAL.
2938 */
2939 inline int ao_get_data_from_user(me4600_ao_subdevice_t *instance, int count,
2940 int *user_values)
2941 {
2942 int i, err;
2943 int empty_space;
2944 int copied;
2945 int value;
2946
2947 empty_space = me_circ_buf_space(&instance->circ_buf);
2948 //We have only this space free.
2949 copied = (count < empty_space) ? count : empty_space;
2950 for (i = 0; i < copied; i++) { //Copy from user to buffer
2951 if ((err = get_user(value, (int *)(user_values + i)))) {
2952 PERROR
2953 ("BUFFER LOADED: get_user(0x%p) return an error: %d. idx=%d\n",
2954 user_values + i, err, instance->ao_idx);
2955 return -ME_ERRNO_INTERNAL;
2956 }
2957 /// @note The analog output in me4600 series has size of 16 bits.
2958 *(instance->circ_buf.buf + instance->circ_buf.head) =
2959 (uint16_t) value;
2960 instance->circ_buf.head++;
2961 instance->circ_buf.head &= instance->circ_buf.mask;
2962 }
2963
2964 PINFO("BUFFER LOADED %d values. idx=%d\n", copied, instance->ao_idx);
2965 return copied;
2966 }
2967
2968 /** @brief Checking actual hardware and logical state.
2969 * @param instance The subdevice instance (pointer).
2970 */
2971 static void me4600_ao_work_control_task(struct work_struct *work)
2972 {
2973 me4600_ao_subdevice_t *instance;
2974 unsigned long cpu_flags = 0;
2975 uint32_t status;
2976 uint32_t ctrl;
2977 uint32_t synch;
2978 int reschedule = 0;
2979 int signaling = 0;
2980
2981 instance =
2982 container_of((void *)work, me4600_ao_subdevice_t, ao_control_task);
2983 PINFO("<%s: %ld> executed. idx=%d\n", __func__, jiffies,
2984 instance->ao_idx);
2985
2986 status = inl(instance->status_reg);
2987 PDEBUG_REG("status_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
2988 instance->status_reg - instance->reg_base, status);
2989
2990 switch (instance->status) { // Checking actual mode.
2991
2992 // Not configured for work.
2993 case ao_status_none:
2994 break;
2995
2996 //This are stable modes. No need to do anything. (?)
2997 case ao_status_single_configured:
2998 case ao_status_stream_configured:
2999 case ao_status_stream_fifo_error:
3000 case ao_status_stream_buffer_error:
3001 case ao_status_stream_error:
3002 PERROR("Shouldn't be running!.\n");
3003 break;
3004
3005 case ao_status_stream_end:
3006 if (!instance->fifo) {
3007 PERROR_CRITICAL
3008 ("Streaming on single device! This feature is not implemented in this version!\n");
3009 instance->status = ao_status_stream_error;
3010 // Signal the end.
3011 signaling = 1;
3012 break;
3013 }
3014 case ao_status_single_end:
3015 if (status & ME4600_AO_STATUS_BIT_FSM) { // State machine is working but the status is set to end. Force stop.
3016
3017 // Wait for stop.
3018 reschedule = 1;
3019 }
3020
3021 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3022 // Stop all actions. No conditions! Block interrupts and trigger. Leave FIFO untouched!
3023 ctrl = inl(instance->ctrl_reg);
3024 ctrl |=
3025 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP
3026 | ME4600_AO_CTRL_BIT_RESET_IRQ;
3027 ctrl &=
3028 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3029 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3030 ctrl &=
3031 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3032 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
3033 outl(ctrl, instance->ctrl_reg);
3034 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3035 instance->reg_base,
3036 instance->ctrl_reg - instance->reg_base, ctrl);
3037 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3038 break;
3039
3040 // Single modes
3041 case ao_status_single_run_wait:
3042 case ao_status_single_run:
3043 case ao_status_single_end_wait:
3044
3045 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working.
3046 if (((instance->fifo)
3047 && (!(status & ME4600_AO_STATUS_BIT_EF)))
3048 || (!(instance->fifo))) { // Single is in end state.
3049 PDEBUG("Single call has been complited.\n");
3050
3051 // Set correct value for single_read();
3052 instance->single_value =
3053 instance->single_value_in_fifo;
3054
3055 // Set status as 'ao_status_single_end'
3056 instance->status = ao_status_single_end;
3057
3058 // Signal the end.
3059 signaling = 1;
3060 // Wait for stop ISM.
3061 reschedule = 1;
3062
3063 break;
3064 }
3065 }
3066 // Check timeout.
3067 if ((instance->timeout.delay) && ((jiffies - instance->timeout.start_time) >= instance->timeout.delay)) { // Timeout
3068 PDEBUG("Timeout reached.\n");
3069 // Stop all actions. No conditions! Block interrupts and trigger. Leave FIFO untouched!
3070 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3071 ctrl = inl(instance->ctrl_reg);
3072 ctrl |=
3073 ME4600_AO_CTRL_BIT_STOP |
3074 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
3075 ME4600_AO_CTRL_BIT_RESET_IRQ;
3076 ctrl &=
3077 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3078 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3079 /// Fix for timeout error.
3080 ctrl &=
3081 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3082 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
3083 if (instance->fifo) { //Disabling FIFO
3084 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
3085 }
3086 outl(ctrl, instance->ctrl_reg);
3087 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3088 instance->reg_base,
3089 instance->ctrl_reg - instance->reg_base,
3090 ctrl);
3091 spin_unlock_irqrestore(&instance->subdevice_lock,
3092 cpu_flags);
3093
3094 spin_lock(instance->preload_reg_lock);
3095 //Remove from synchronous start. Block triggering from this output.
3096 synch = inl(instance->preload_reg);
3097 synch &=
3098 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
3099 instance->ao_idx);
3100 if (!(instance->fifo)) { // No FIFO - set to single safe mode
3101 synch |=
3102 ME4600_AO_SYNC_HOLD << instance->ao_idx;
3103 }
3104 outl(synch, instance->preload_reg);
3105 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
3106 instance->reg_base,
3107 instance->preload_reg - instance->reg_base,
3108 synch);
3109 spin_unlock(instance->preload_reg_lock);
3110
3111 if (!(instance->fifo)) { // No FIFO
3112 // Restore old settings.
3113 PDEBUG("Write old value back to register.\n");
3114 outl(instance->single_value,
3115 instance->single_reg);
3116 PDEBUG_REG
3117 ("single_reg outl(0x%lX+0x%lX)=0x%x\n",
3118 instance->reg_base,
3119 instance->single_reg - instance->reg_base,
3120 instance->single_value);
3121 }
3122 // Set correct value for single_read();
3123 instance->single_value_in_fifo = instance->single_value;
3124
3125 instance->status = ao_status_single_end;
3126
3127 // Signal the end.
3128 signaling = 1;
3129 }
3130 // Wait for stop.
3131 reschedule = 1;
3132 break;
3133
3134 // Stream modes
3135 case ao_status_stream_run_wait:
3136 if (!instance->fifo) {
3137 PERROR_CRITICAL
3138 ("Streaming on single device! This feature is not implemented in this version!\n");
3139 instance->status = ao_status_stream_error;
3140 // Signal the end.
3141 signaling = 1;
3142 break;
3143 }
3144
3145 if (status & ME4600_AO_STATUS_BIT_FSM) { // State machine is working. Waiting for start finish.
3146 instance->status = ao_status_stream_run;
3147
3148 // Signal end of this step
3149 signaling = 1;
3150 } else { // State machine is not working.
3151 if (!(status & ME4600_AO_STATUS_BIT_EF)) { // FIFO is empty. Procedure has started and finish already!
3152 instance->status = ao_status_stream_end;
3153
3154 // Signal the end.
3155 signaling = 1;
3156 // Wait for stop.
3157 reschedule = 1;
3158 break;
3159 }
3160 }
3161
3162 // Check timeout.
3163 if ((instance->timeout.delay) && ((jiffies - instance->timeout.start_time) >= instance->timeout.delay)) { // Timeout
3164 PDEBUG("Timeout reached.\n");
3165 // Stop all actions. No conditions! Block interrupts. Leave FIFO untouched!
3166 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3167 ctrl = inl(instance->ctrl_reg);
3168 ctrl |=
3169 ME4600_AO_CTRL_BIT_STOP |
3170 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
3171 ME4600_AO_CTRL_BIT_RESET_IRQ;
3172 ctrl &=
3173 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3174 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3175 outl(ctrl, instance->ctrl_reg);
3176 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3177 instance->reg_base,
3178 instance->ctrl_reg - instance->reg_base,
3179 ctrl);
3180 spin_unlock_irqrestore(&instance->subdevice_lock,
3181 cpu_flags);
3182 spin_lock(instance->preload_reg_lock);
3183 //Remove from synchronous start. Block triggering from this output.
3184 synch = inl(instance->preload_reg);
3185 synch &=
3186 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
3187 instance->ao_idx);
3188 outl(synch, instance->preload_reg);
3189 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
3190 instance->reg_base,
3191 instance->preload_reg - instance->reg_base,
3192 synch);
3193 spin_unlock(instance->preload_reg_lock);
3194
3195 instance->status = ao_status_stream_end;
3196
3197 // Signal the end.
3198 signaling = 1;
3199 }
3200 // Wait for stop.
3201 reschedule = 1;
3202 break;
3203
3204 case ao_status_stream_run:
3205 if (!instance->fifo) {
3206 PERROR_CRITICAL
3207 ("Streaming on single device! This feature is not implemented in this version!\n");
3208 instance->status = ao_status_stream_error;
3209 // Signal the end.
3210 signaling = 1;
3211 break;
3212 }
3213
3214 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working. This is an error.
3215 // BROKEN PIPE!
3216 if (!(status & ME4600_AO_STATUS_BIT_EF)) { // FIFO is empty.
3217 if (me_circ_buf_values(&instance->circ_buf)) { // Software buffer is not empty.
3218 if (instance->stop_data_count && (instance->stop_data_count <= instance->data_count)) { //Finishing work. Requed data shown.
3219 PDEBUG
3220 ("ISM stoped. No data in FIFO. Buffer is not empty.\n");
3221 instance->status =
3222 ao_status_stream_end;
3223 } else {
3224 PERROR
3225 ("Output stream has been broken. ISM stoped. No data in FIFO. Buffer is not empty.\n");
3226 instance->status =
3227 ao_status_stream_buffer_error;
3228 }
3229 } else { // Software buffer is empty.
3230 PDEBUG
3231 ("ISM stoped. No data in FIFO. Buffer is empty.\n");
3232 instance->status = ao_status_stream_end;
3233 }
3234 } else { // There are still datas in FIFO.
3235 if (me_circ_buf_values(&instance->circ_buf)) { // Software buffer is not empty.
3236 PERROR
3237 ("Output stream has been broken. ISM stoped but some data in FIFO and buffer.\n");
3238 } else { // Software buffer is empty.
3239 PERROR
3240 ("Output stream has been broken. ISM stoped but some data in FIFO. Buffer is empty.\n");
3241 }
3242 instance->status = ao_status_stream_fifo_error;
3243
3244 }
3245
3246 // Signal the failure.
3247 signaling = 1;
3248 break;
3249 }
3250 // Wait for stop.
3251 reschedule = 1;
3252 break;
3253
3254 case ao_status_stream_end_wait:
3255 if (!instance->fifo) {
3256 PERROR_CRITICAL
3257 ("Streaming on single device! This feature is not implemented in this version!\n");
3258 instance->status = ao_status_stream_error;
3259 // Signal the end.
3260 signaling = 1;
3261 break;
3262 }
3263
3264 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working. Waiting for stop finish.
3265 instance->status = ao_status_stream_end;
3266 signaling = 1;
3267 }
3268 // State machine is working.
3269 reschedule = 1;
3270 break;
3271
3272 default:
3273 PERROR_CRITICAL("Status is in wrong state (%d)!\n",
3274 instance->status);
3275 instance->status = ao_status_stream_error;
3276 // Signal the end.
3277 signaling = 1;
3278 break;
3279
3280 }
3281
3282 if (signaling) { //Signal it.
3283 wake_up_interruptible_all(&instance->wait_queue);
3284 }
3285
3286 if (instance->ao_control_task_flag && reschedule) { // Reschedule task
3287 queue_delayed_work(instance->me4600_workqueue,
3288 &instance->ao_control_task, 1);
3289 } else {
3290 PINFO("<%s> Ending control task.\n", __func__);
3291 }
3292
3293 }
3294 #else
3295 /// @note SPECIAL BUILD FOR BOSCH
3296 /// @author Guenter Gebhardt
3297 static int me4600_ao_io_reset_subdevice(me_subdevice_t *subdevice,
3298 struct file *filep, int flags)
3299 {
3300 me4600_ao_subdevice_t *instance;
3301 int err = ME_ERRNO_SUCCESS;
3302 uint32_t tmp;
3303 unsigned long status;
3304
3305 PDEBUG("executed.\n");
3306
3307 instance = (me4600_ao_subdevice_t *) subdevice;
3308
3309 ME_SUBDEVICE_ENTER spin_lock_irqsave(&instance->subdevice_lock, status);
3310 spin_lock(instance->preload_reg_lock);
3311 tmp = inl(instance->preload_reg);
3312 tmp &= ~(0x10001 << instance->ao_idx);
3313 outl(tmp, instance->preload_reg);
3314 *instance->preload_flags &= ~(0x1 << instance->ao_idx);
3315 spin_unlock(instance->preload_reg_lock);
3316
3317 tmp = inl(instance->ctrl_reg);
3318 tmp |= ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3319 outl(tmp, instance->ctrl_reg);
3320
3321 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
3322
3323 outl(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP,
3324 instance->ctrl_reg);
3325
3326 outl(0x8000, instance->single_reg);
3327
3328 instance->single_value = 0x8000;
3329 instance->circ_buf.head = 0;
3330 instance->circ_buf.tail = 0;
3331
3332 spin_unlock_irqrestore(&instance->subdevice_lock, status);
3333
3334 ME_SUBDEVICE_EXIT;
3335
3336 return err;
3337 }
3338
3339 static int me4600_ao_io_single_config(me_subdevice_t *subdevice,
3340 struct file *filep,
3341 int channel,
3342 int single_config,
3343 int ref,
3344 int trig_chan,
3345 int trig_type, int trig_edge, int flags)
3346 {
3347 me4600_ao_subdevice_t *instance;
3348 int err = ME_ERRNO_SUCCESS;
3349 uint32_t tmp;
3350 unsigned long cpu_flags;
3351
3352 PDEBUG("executed.\n");
3353
3354 instance = (me4600_ao_subdevice_t *) subdevice;
3355
3356 ME_SUBDEVICE_ENTER
3357 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3358
3359 if (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) {
3360 PERROR("Subdevice is busy.\n");
3361 err = ME_ERRNO_SUBDEVICE_BUSY;
3362 goto ERROR;
3363 }
3364
3365 if (channel == 0) {
3366 if (single_config == 0) {
3367 if (ref == ME_REF_AO_GROUND) {
3368 if (trig_chan == ME_TRIG_CHAN_DEFAULT) {
3369 if (trig_type == ME_TRIG_TYPE_SW) {
3370 tmp = inl(instance->ctrl_reg);
3371 tmp |=
3372 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3373 outl(tmp, instance->ctrl_reg);
3374 tmp =
3375 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3376 outl(tmp, instance->ctrl_reg);
3377
3378 spin_lock(instance->
3379 preload_reg_lock);
3380 tmp =
3381 inl(instance->preload_reg);
3382 tmp &=
3383 ~(0x10001 << instance->
3384 ao_idx);
3385 outl(tmp,
3386 instance->preload_reg);
3387 *instance->preload_flags &=
3388 ~(0x1 << instance->ao_idx);
3389 spin_unlock(instance->
3390 preload_reg_lock);
3391 } else if (trig_type ==
3392 ME_TRIG_TYPE_EXT_DIGITAL) {
3393 if (trig_edge ==
3394 ME_TRIG_EDGE_RISING) {
3395 tmp =
3396 inl(instance->
3397 ctrl_reg);
3398 tmp |=
3399 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3400 outl(tmp,
3401 instance->
3402 ctrl_reg);
3403 tmp =
3404 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3405 |
3406 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3407 outl(tmp,
3408 instance->
3409 ctrl_reg);
3410 } else if (trig_edge ==
3411 ME_TRIG_EDGE_FALLING)
3412 {
3413 tmp =
3414 inl(instance->
3415 ctrl_reg);
3416 tmp |=
3417 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3418 outl(tmp,
3419 instance->
3420 ctrl_reg);
3421 tmp =
3422 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3423 |
3424 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG
3425 |
3426 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3427 outl(tmp,
3428 instance->
3429 ctrl_reg);
3430 } else if (trig_edge ==
3431 ME_TRIG_EDGE_ANY) {
3432 tmp =
3433 inl(instance->
3434 ctrl_reg);
3435 tmp |=
3436 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3437 outl(tmp,
3438 instance->
3439 ctrl_reg);
3440 tmp =
3441 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3442 |
3443 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG
3444 |
3445 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE
3446 |
3447 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3448 outl(tmp,
3449 instance->
3450 ctrl_reg);
3451 } else {
3452 PERROR
3453 ("Invalid trigger edge.\n");
3454 err =
3455 ME_ERRNO_INVALID_TRIG_EDGE;
3456 goto ERROR;
3457 }
3458
3459 spin_lock(instance->
3460 preload_reg_lock);
3461
3462 tmp =
3463 inl(instance->preload_reg);
3464 tmp &=
3465 ~(0x10001 << instance->
3466 ao_idx);
3467 tmp |= 0x1 << instance->ao_idx;
3468 outl(tmp,
3469 instance->preload_reg);
3470 *instance->preload_flags &=
3471 ~(0x1 << instance->ao_idx);
3472 spin_unlock(instance->
3473 preload_reg_lock);
3474 } else {
3475 PERROR
3476 ("Invalid trigger type.\n");
3477 err =
3478 ME_ERRNO_INVALID_TRIG_TYPE;
3479 goto ERROR;
3480 }
3481 } else if (trig_chan ==
3482 ME_TRIG_CHAN_SYNCHRONOUS) {
3483 if (trig_type == ME_TRIG_TYPE_SW) {
3484 tmp = inl(instance->ctrl_reg);
3485 tmp |=
3486 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3487 outl(tmp, instance->ctrl_reg);
3488 tmp =
3489 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3490 outl(tmp, instance->ctrl_reg);
3491
3492 spin_lock(instance->
3493 preload_reg_lock);
3494 tmp =
3495 inl(instance->preload_reg);
3496 tmp &=
3497 ~(0x10001 << instance->
3498 ao_idx);
3499 tmp |= 0x1 << instance->ao_idx;
3500 outl(tmp,
3501 instance->preload_reg);
3502 *instance->preload_flags |=
3503 0x1 << instance->ao_idx;
3504 spin_unlock(instance->
3505 preload_reg_lock);
3506 } else if (trig_type ==
3507 ME_TRIG_TYPE_EXT_DIGITAL) {
3508 if (trig_edge ==
3509 ME_TRIG_EDGE_RISING) {
3510 tmp =
3511 inl(instance->
3512 ctrl_reg);
3513 tmp |=
3514 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3515 outl(tmp,
3516 instance->
3517 ctrl_reg);
3518 tmp =
3519 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3520 outl(tmp,
3521 instance->
3522 ctrl_reg);
3523 } else if (trig_edge ==
3524 ME_TRIG_EDGE_FALLING)
3525 {
3526 tmp =
3527 inl(instance->
3528 ctrl_reg);
3529 tmp |=
3530 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3531 outl(tmp,
3532 instance->
3533 ctrl_reg);
3534 tmp =
3535 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3536 |
3537 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3538 outl(tmp,
3539 instance->
3540 ctrl_reg);
3541 } else if (trig_edge ==
3542 ME_TRIG_EDGE_ANY) {
3543 tmp =
3544 inl(instance->
3545 ctrl_reg);
3546 tmp |=
3547 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3548 outl(tmp,
3549 instance->
3550 ctrl_reg);
3551 tmp =
3552 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3553 |
3554 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE
3555 |
3556 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3557 outl(tmp,
3558 instance->
3559 ctrl_reg);
3560 } else {
3561 PERROR
3562 ("Invalid trigger edge.\n");
3563 err =
3564 ME_ERRNO_INVALID_TRIG_EDGE;
3565 goto ERROR;
3566 }
3567
3568 spin_lock(instance->
3569 preload_reg_lock);
3570
3571 tmp =
3572 inl(instance->preload_reg);
3573 tmp |=
3574 0x10001 << instance->ao_idx;
3575 outl(tmp,
3576 instance->preload_reg);
3577 *instance->preload_flags &=
3578 ~(0x1 << instance->ao_idx);
3579 spin_unlock(instance->
3580 preload_reg_lock);
3581 } else {
3582 PERROR
3583 ("Invalid trigger type.\n");
3584 err =
3585 ME_ERRNO_INVALID_TRIG_TYPE;
3586 goto ERROR;
3587 }
3588 } else {
3589 PERROR
3590 ("Invalid trigger channel specified.\n");
3591 err = ME_ERRNO_INVALID_REF;
3592 goto ERROR;
3593 }
3594 } else {
3595 PERROR("Invalid analog reference specified.\n");
3596 err = ME_ERRNO_INVALID_REF;
3597 goto ERROR;
3598 }
3599 } else {
3600 PERROR("Invalid single config specified.\n");
3601 err = ME_ERRNO_INVALID_SINGLE_CONFIG;
3602 goto ERROR;
3603 }
3604 } else {
3605 PERROR("Invalid channel number specified.\n");
3606 err = ME_ERRNO_INVALID_CHANNEL;
3607 goto ERROR;
3608 }
3609
3610 ERROR:
3611
3612 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3613
3614 ME_SUBDEVICE_EXIT;
3615
3616 return err;
3617 }
3618
3619 static int me4600_ao_io_single_read(me_subdevice_t *subdevice,
3620 struct file *filep,
3621 int channel,
3622 int *value, int time_out, int flags)
3623 {
3624 me4600_ao_subdevice_t *instance;
3625 int err = ME_ERRNO_SUCCESS;
3626 unsigned long tmp;
3627 unsigned long cpu_flags;
3628
3629 PDEBUG("executed.\n");
3630
3631 instance = (me4600_ao_subdevice_t *) subdevice;
3632
3633 if (channel != 0) {
3634 PERROR("Invalid channel number specified.\n");
3635 return ME_ERRNO_INVALID_CHANNEL;
3636 }
3637
3638 ME_SUBDEVICE_ENTER
3639 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3640 tmp = inl(instance->ctrl_reg);
3641
3642 if (tmp & 0x3) {
3643 PERROR("Not in single mode.\n");
3644 err = ME_ERRNO_PREVIOUS_CONFIG;
3645 } else {
3646 *value = instance->single_value;
3647 }
3648
3649 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3650
3651 ME_SUBDEVICE_EXIT;
3652
3653 return err;
3654 }
3655
3656 static int me4600_ao_io_single_write(me_subdevice_t *subdevice,
3657 struct file *filep,
3658 int channel,
3659 int value, int time_out, int flags)
3660 {
3661 me4600_ao_subdevice_t *instance;
3662 int err = ME_ERRNO_SUCCESS;
3663 unsigned long mask = 0;
3664 unsigned long tmp;
3665 unsigned long cpu_flags;
3666 int i;
3667 wait_queue_head_t queue;
3668 unsigned long j;
3669 unsigned long delay = 0;
3670
3671 PDEBUG("executed.\n");
3672
3673 init_waitqueue_head(&queue);
3674
3675 instance = (me4600_ao_subdevice_t *) subdevice;
3676
3677 if (channel != 0) {
3678 PERROR("Invalid channel number specified.\n");
3679 return ME_ERRNO_INVALID_CHANNEL;
3680 }
3681
3682 if (time_out < 0) {
3683 PERROR("Invalid timeout specified.\n");
3684 return ME_ERRNO_INVALID_TIMEOUT;
3685 }
3686
3687 if (time_out) {
3688 delay = (time_out * HZ) / 1000;
3689
3690 if (delay == 0)
3691 delay = 1;
3692 }
3693
3694 ME_SUBDEVICE_ENTER
3695 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3696
3697 tmp = inl(instance->ctrl_reg);
3698
3699 if (tmp & 0x3) {
3700 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3701 PERROR("Not in single mode.\n");
3702 err = ME_ERRNO_PREVIOUS_CONFIG;
3703 goto ERROR;
3704 }
3705
3706 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) {
3707 outl(value, instance->single_reg);
3708 instance->single_value = value;
3709 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3710
3711 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
3712 j = jiffies;
3713
3714 while (inl(instance->status_reg) &
3715 ME4600_AO_STATUS_BIT_FSM) {
3716 interruptible_sleep_on_timeout(&queue, 1);
3717
3718 if (signal_pending(current)) {
3719 PERROR
3720 ("Wait on external trigger interrupted by signal.\n");
3721 err = ME_ERRNO_SIGNAL;
3722 goto ERROR;
3723 }
3724
3725 if (delay && ((jiffies - j) > delay)) {
3726 PERROR("Timeout reached.\n");
3727 err = ME_ERRNO_TIMEOUT;
3728 goto ERROR;
3729 }
3730 }
3731 }
3732 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx))
3733 == (0x10001 << instance->ao_idx)) {
3734 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) {
3735 tmp |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3736 outl(tmp, instance->ctrl_reg);
3737 outl(value, instance->single_reg);
3738 instance->single_value = value;
3739 spin_unlock_irqrestore(&instance->subdevice_lock,
3740 cpu_flags);
3741
3742 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
3743 j = jiffies;
3744
3745 while (inl(instance->status_reg) &
3746 ME4600_AO_STATUS_BIT_FSM) {
3747 interruptible_sleep_on_timeout(&queue,
3748 1);
3749
3750 if (signal_pending(current)) {
3751 PERROR
3752 ("Wait on external trigger interrupted by signal.\n");
3753 err = ME_ERRNO_SIGNAL;
3754 goto ERROR;
3755 }
3756
3757 if (delay && ((jiffies - j) > delay)) {
3758 PERROR("Timeout reached.\n");
3759 err = ME_ERRNO_TIMEOUT;
3760 goto ERROR;
3761 }
3762 }
3763 }
3764 } else {
3765 outl(value, instance->single_reg);
3766 instance->single_value = value;
3767 spin_unlock_irqrestore(&instance->subdevice_lock,
3768 cpu_flags);
3769 }
3770 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx))
3771 == (0x1 << instance->ao_idx)) {
3772 outl(value, instance->single_reg);
3773 instance->single_value = value;
3774
3775 PDEBUG("Synchronous SW, flags = 0x%X.\n", flags);
3776
3777 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) {
3778 PDEBUG("Trigger synchronous SW.\n");
3779 spin_lock(instance->preload_reg_lock);
3780 tmp = inl(instance->preload_reg);
3781
3782 for (i = 0; i < ME4600_AO_MAX_SUBDEVICES; i++) {
3783 if ((*instance->preload_flags & (0x1 << i))) {
3784 if ((tmp & (0x10001 << i)) ==
3785 (0x1 << i)) {
3786 mask |= 0x1 << i;
3787 }
3788 }
3789 }
3790
3791 tmp &= ~(mask);
3792
3793 outl(tmp, instance->preload_reg);
3794 spin_unlock(instance->preload_reg_lock);
3795 }
3796
3797 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3798 } else {
3799 outl(value, instance->single_reg);
3800 instance->single_value = value;
3801 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3802 }
3803
3804 ERROR:
3805
3806 ME_SUBDEVICE_EXIT;
3807
3808 return err;
3809 }
3810
3811 static int me4600_ao_io_stream_config(me_subdevice_t *subdevice,
3812 struct file *filep,
3813 meIOStreamConfig_t *config_list,
3814 int count,
3815 meIOStreamTrigger_t *trigger,
3816 int fifo_irq_threshold, int flags)
3817 {
3818 me4600_ao_subdevice_t *instance;
3819 int err = ME_ERRNO_SUCCESS;
3820 unsigned long ctrl;
3821 unsigned long tmp;
3822 unsigned long cpu_flags;
3823 uint64_t conv_ticks;
3824 unsigned int conv_start_ticks_low = trigger->iConvStartTicksLow;
3825 unsigned int conv_start_ticks_high = trigger->iConvStartTicksHigh;
3826
3827 PDEBUG("executed.\n");
3828
3829 instance = (me4600_ao_subdevice_t *) subdevice;
3830
3831 conv_ticks =
3832 (uint64_t) conv_start_ticks_low +
3833 ((uint64_t) conv_start_ticks_high << 32);
3834
3835 if (!instance->fifo) {
3836 PERROR("Not a streaming ao.\n");
3837 return ME_ERRNO_NOT_SUPPORTED;
3838 }
3839
3840 ME_SUBDEVICE_ENTER
3841 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3842
3843 if ((inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_FSM) {
3844 PERROR("Subdevice is busy.\n");
3845 err = ME_ERRNO_SUBDEVICE_BUSY;
3846 goto ERROR;
3847 }
3848
3849 ctrl = inl(instance->ctrl_reg);
3850 ctrl |= ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3851 outl(ctrl, instance->ctrl_reg);
3852 ctrl = ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3853 outl(ctrl, instance->ctrl_reg);
3854
3855 if (count != 1) {
3856 PERROR("Invalid stream configuration list count specified.\n");
3857 err = ME_ERRNO_INVALID_CONFIG_LIST_COUNT;
3858 goto ERROR;
3859 }
3860
3861 if (config_list[0].iChannel != 0) {
3862 PERROR("Invalid channel number specified.\n");
3863 err = ME_ERRNO_INVALID_CHANNEL;
3864 goto ERROR;
3865 }
3866
3867 if (config_list[0].iStreamConfig != 0) {
3868 PERROR("Invalid stream config specified.\n");
3869 err = ME_ERRNO_INVALID_STREAM_CONFIG;
3870 goto ERROR;
3871 }
3872
3873 if (config_list[0].iRef != ME_REF_AO_GROUND) {
3874 PERROR("Invalid analog reference.\n");
3875 err = ME_ERRNO_INVALID_REF;
3876 goto ERROR;
3877 }
3878
3879 if ((trigger->iAcqStartTicksLow != 0)
3880 || (trigger->iAcqStartTicksHigh != 0)) {
3881 PERROR
3882 ("Invalid acquisition start trigger argument specified.\n");
3883 err = ME_ERRNO_INVALID_ACQ_START_ARG;
3884 goto ERROR;
3885 }
3886
3887 switch (trigger->iAcqStartTrigType) {
3888
3889 case ME_TRIG_TYPE_SW:
3890 break;
3891
3892 case ME_TRIG_TYPE_EXT_DIGITAL:
3893 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3894
3895 switch (trigger->iAcqStartTrigEdge) {
3896
3897 case ME_TRIG_EDGE_RISING:
3898 break;
3899
3900 case ME_TRIG_EDGE_FALLING:
3901 ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3902
3903 break;
3904
3905 case ME_TRIG_EDGE_ANY:
3906 ctrl |=
3907 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3908 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3909
3910 break;
3911
3912 default:
3913 PERROR
3914 ("Invalid acquisition start trigger edge specified.\n");
3915
3916 err = ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
3917
3918 goto ERROR;
3919
3920 break;
3921 }
3922
3923 break;
3924
3925 default:
3926 PERROR("Invalid acquisition start trigger type specified.\n");
3927
3928 err = ME_ERRNO_INVALID_ACQ_START_TRIG_TYPE;
3929
3930 goto ERROR;
3931
3932 break;
3933 }
3934
3935 switch (trigger->iScanStartTrigType) {
3936
3937 case ME_TRIG_TYPE_FOLLOW:
3938 break;
3939
3940 default:
3941 PERROR("Invalid scan start trigger type specified.\n");
3942
3943 err = ME_ERRNO_INVALID_SCAN_START_TRIG_TYPE;
3944
3945 goto ERROR;
3946
3947 break;
3948 }
3949
3950 switch (trigger->iConvStartTrigType) {
3951
3952 case ME_TRIG_TYPE_TIMER:
3953 if ((conv_ticks < ME4600_AO_MIN_CHAN_TICKS)
3954 || (conv_ticks > ME4600_AO_MAX_CHAN_TICKS)) {
3955 PERROR
3956 ("Invalid conv start trigger argument specified.\n");
3957 err = ME_ERRNO_INVALID_CONV_START_ARG;
3958 goto ERROR;
3959 }
3960
3961 break;
3962
3963 default:
3964 PERROR("Invalid conv start trigger type specified.\n");
3965
3966 err = ME_ERRNO_INVALID_CONV_START_TRIG_TYPE;
3967
3968 goto ERROR;
3969
3970 break;
3971 }
3972
3973 /* Preset to hardware wraparound mode */
3974 instance->flags &= ~(ME4600_AO_FLAGS_SW_WRAP_MODE_MASK);
3975
3976 switch (trigger->iScanStopTrigType) {
3977
3978 case ME_TRIG_TYPE_NONE:
3979 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
3980 /* Set flags to indicate usage of software mode. */
3981 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_INF;
3982 instance->wrap_count = 0;
3983 instance->wrap_remaining = 0;
3984 }
3985
3986 break;
3987
3988 case ME_TRIG_TYPE_COUNT:
3989 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
3990 if (trigger->iScanStopCount <= 0) {
3991 PERROR("Invalid scan stop count specified.\n");
3992 err = ME_ERRNO_INVALID_SCAN_STOP_ARG;
3993 goto ERROR;
3994 }
3995
3996 /* Set flags to indicate usage of software mode. */
3997 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_FIN;
3998 instance->wrap_count = trigger->iScanStopCount;
3999 instance->wrap_remaining = trigger->iScanStopCount;
4000 } else {
4001 PERROR("Invalid scan stop trigger type specified.\n");
4002 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4003 goto ERROR;
4004 }
4005
4006 break;
4007
4008 default:
4009 PERROR("Invalid scan stop trigger type specified.\n");
4010
4011 err = ME_ERRNO_INVALID_SCAN_STOP_TRIG_TYPE;
4012
4013 goto ERROR;
4014
4015 break;
4016 }
4017
4018 switch (trigger->iAcqStopTrigType) {
4019
4020 case ME_TRIG_TYPE_NONE:
4021 break;
4022
4023 case ME_TRIG_TYPE_COUNT:
4024 if (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE) {
4025 PERROR("Invalid acq stop trigger type specified.\n");
4026 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4027 goto ERROR;
4028 }
4029
4030 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4031 if (trigger->iAcqStopCount <= 0) {
4032 PERROR("Invalid acq stop count specified.\n");
4033 err = ME_ERRNO_INVALID_ACQ_STOP_ARG;
4034 goto ERROR;
4035 }
4036
4037 /* Set flags to indicate usage of software mode. */
4038 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_FIN;
4039 instance->wrap_count = trigger->iAcqStopCount;
4040 instance->wrap_remaining = trigger->iAcqStopCount;
4041 } else {
4042 PERROR("Invalid acp stop trigger type specified.\n");
4043 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4044 goto ERROR;
4045 }
4046
4047 break;
4048
4049 default:
4050 PERROR("Invalid acq stop trigger type specified.\n");
4051 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4052 goto ERROR;
4053 break;
4054 }
4055
4056 switch (trigger->iAcqStartTrigChan) {
4057
4058 case ME_TRIG_CHAN_DEFAULT:
4059 spin_lock(instance->preload_reg_lock);
4060 tmp = inl(instance->preload_reg);
4061 tmp &= ~(0x10001 << instance->ao_idx);
4062 outl(tmp, instance->preload_reg);
4063 spin_unlock(instance->preload_reg_lock);
4064
4065 break;
4066
4067 case ME_TRIG_CHAN_SYNCHRONOUS:
4068 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_SW) {
4069 spin_lock(instance->preload_reg_lock);
4070 tmp = inl(instance->preload_reg);
4071 tmp &= ~(0x10001 << instance->ao_idx);
4072 outl(tmp, instance->preload_reg);
4073 tmp |= 0x1 << instance->ao_idx;
4074 outl(tmp, instance->preload_reg);
4075 spin_unlock(instance->preload_reg_lock);
4076 } else {
4077 ctrl &= ~(ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
4078 spin_lock(instance->preload_reg_lock);
4079 tmp = inl(instance->preload_reg);
4080 tmp &= ~(0x10001 << instance->ao_idx);
4081 outl(tmp, instance->preload_reg);
4082 tmp |= 0x10000 << instance->ao_idx;
4083 outl(tmp, instance->preload_reg);
4084 spin_unlock(instance->preload_reg_lock);
4085 }
4086
4087 break;
4088
4089 default:
4090 PERROR("Invalid acq start trigger channel specified.\n");
4091 err = ME_ERRNO_INVALID_ACQ_START_TRIG_CHAN;
4092 goto ERROR;
4093
4094 break;
4095 }
4096
4097 outl(conv_ticks - 2, instance->timer_reg);
4098
4099 if (flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) {
4100 if (instance->ao_idx == 3) {
4101 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_DO;
4102 } else {
4103 err = ME_ERRNO_INVALID_FLAGS;
4104 goto ERROR;
4105 }
4106 } else {
4107 if (instance->ao_idx == 3) {
4108 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_DO;
4109 }
4110 }
4111
4112 /* Set hardware mode. */
4113 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4114 ctrl |= ME4600_AO_CTRL_BIT_MODE_0;
4115 } else {
4116 ctrl |= ME4600_AO_CTRL_BIT_MODE_1;
4117 }
4118
4119 PDEBUG("Preload word = 0x%X.\n", inl(instance->preload_reg));
4120
4121 PDEBUG("Ctrl word = 0x%lX.\n", ctrl);
4122 outl(ctrl, instance->ctrl_reg); // Write the control word
4123
4124 ERROR:
4125
4126 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4127
4128 ME_SUBDEVICE_EXIT;
4129
4130 return err;
4131 }
4132
4133 static int me4600_ao_io_stream_new_values(me_subdevice_t *subdevice,
4134 struct file *filep,
4135 int time_out, int *count, int flags)
4136 {
4137 me4600_ao_subdevice_t *instance;
4138 int err = ME_ERRNO_SUCCESS;
4139 long t = 0;
4140 long j;
4141
4142 PDEBUG("executed.\n");
4143
4144 instance = (me4600_ao_subdevice_t *) subdevice;
4145
4146 if (!instance->fifo) {
4147 PERROR("Not a streaming ao.\n");
4148 return ME_ERRNO_NOT_SUPPORTED;
4149 }
4150
4151 if (time_out < 0) {
4152 PERROR("Invalid time_out specified.\n");
4153 return ME_ERRNO_INVALID_TIMEOUT;
4154 }
4155
4156 if (time_out) {
4157 t = (time_out * HZ) / 1000;
4158
4159 if (t == 0)
4160 t = 1;
4161 }
4162
4163 *count = 0;
4164
4165 ME_SUBDEVICE_ENTER;
4166
4167 if (t) {
4168 j = jiffies;
4169 wait_event_interruptible_timeout(instance->wait_queue,
4170 ((me_circ_buf_space
4171 (&instance->circ_buf))
4172 || !(inl(instance->status_reg)
4173 &
4174 ME4600_AO_STATUS_BIT_FSM)),
4175 t);
4176
4177 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
4178 PERROR("AO subdevice is not running.\n");
4179 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
4180 } else if (signal_pending(current)) {
4181 PERROR("Wait on values interrupted from signal.\n");
4182 err = ME_ERRNO_SIGNAL;
4183 } else if ((jiffies - j) >= t) {
4184 PERROR("Wait on values timed out.\n");
4185 err = ME_ERRNO_TIMEOUT;
4186 } else {
4187 *count = me_circ_buf_space(&instance->circ_buf);
4188 }
4189 } else {
4190 wait_event_interruptible(instance->wait_queue,
4191 ((me_circ_buf_space
4192 (&instance->circ_buf))
4193 || !(inl(instance->status_reg) &
4194 ME4600_AO_STATUS_BIT_FSM)));
4195
4196 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
4197 PERROR("AO subdevice is not running.\n");
4198 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
4199 } else if (signal_pending(current)) {
4200 PERROR("Wait on values interrupted from signal.\n");
4201 err = ME_ERRNO_SIGNAL;
4202 } else {
4203 *count = me_circ_buf_space(&instance->circ_buf);
4204 }
4205 }
4206
4207 ME_SUBDEVICE_EXIT;
4208
4209 return err;
4210 }
4211
4212 static void stop_immediately(me4600_ao_subdevice_t *instance)
4213 {
4214 unsigned long cpu_flags;
4215 uint32_t tmp;
4216
4217 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4218 tmp = inl(instance->ctrl_reg);
4219 tmp |= ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4220 outl(tmp, instance->ctrl_reg);
4221
4222 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
4223
4224 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4225 }
4226
4227 static int me4600_ao_io_stream_start(me_subdevice_t *subdevice,
4228 struct file *filep,
4229 int start_mode, int time_out, int flags)
4230 {
4231 me4600_ao_subdevice_t *instance;
4232 int err = ME_ERRNO_SUCCESS;
4233 unsigned long cpu_flags = 0;
4234 unsigned long ref;
4235 unsigned long tmp;
4236 unsigned long delay = 0;
4237 wait_queue_head_t queue;
4238
4239 PDEBUG("executed.\n");
4240
4241 instance = (me4600_ao_subdevice_t *) subdevice;
4242
4243 init_waitqueue_head(&queue);
4244
4245 if (time_out < 0) {
4246 PERROR("Invalid timeout specified.\n");
4247 return ME_ERRNO_INVALID_TIMEOUT;
4248 }
4249
4250 if (time_out) {
4251 delay = (time_out * HZ) / 1000;
4252
4253 if (delay == 0)
4254 delay = 1;
4255 }
4256
4257 if (!instance->fifo) {
4258 PERROR("Not a streaming ao.\n");
4259 return ME_ERRNO_NOT_SUPPORTED;
4260 }
4261
4262 ME_SUBDEVICE_ENTER
4263 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4264
4265 tmp = inl(instance->ctrl_reg);
4266
4267 switch (tmp & (ME4600_AO_CTRL_MASK_MODE)) {
4268
4269 case 0: // Single mode
4270 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4271 PERROR("Subdevice is configured in single mode.\n");
4272 err = ME_ERRNO_PREVIOUS_CONFIG;
4273 goto ERROR;
4274
4275 case 1: // Wraparound mode
4276 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) { // Normal wraparound with external trigger
4277
4278 if ((inl(instance->status_reg) &
4279 ME4600_AO_STATUS_BIT_FSM)) {
4280 spin_unlock_irqrestore(&instance->
4281 subdevice_lock,
4282 cpu_flags);
4283 PERROR("Conversion is already running.\n");
4284 err = ME_ERRNO_SUBDEVICE_BUSY;
4285 goto ERROR;
4286 }
4287
4288 tmp &=
4289 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4290 ME4600_AO_CTRL_BIT_STOP |
4291 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4292
4293 outl(tmp, instance->ctrl_reg);
4294 spin_unlock_irqrestore(&instance->subdevice_lock,
4295 cpu_flags);
4296
4297 if (start_mode == ME_START_MODE_BLOCKING) {
4298 init_waitqueue_head(&queue);
4299
4300 if (delay) {
4301 ref = jiffies;
4302
4303 while (!
4304 (inl(instance->status_reg) &
4305 ME4600_AO_STATUS_BIT_FSM)) {
4306 interruptible_sleep_on_timeout
4307 (&queue, 1);
4308
4309 if (signal_pending(current)) {
4310 PERROR
4311 ("Wait on start of state machine interrupted.\n");
4312 stop_immediately
4313 (instance);
4314 err = ME_ERRNO_SIGNAL;
4315 goto ERROR;
4316 }
4317
4318 if (((jiffies - ref) >= delay)) {
4319 PERROR
4320 ("Timeout reached.\n");
4321 stop_immediately
4322 (instance);
4323 err = ME_ERRNO_TIMEOUT;
4324 goto ERROR;
4325 }
4326 }
4327 } else {
4328 while (!
4329 (inl(instance->status_reg) &
4330 ME4600_AO_STATUS_BIT_FSM)) {
4331 interruptible_sleep_on_timeout
4332 (&queue, 1);
4333
4334 if (signal_pending(current)) {
4335 PERROR
4336 ("Wait on start of state machine interrupted.\n");
4337 stop_immediately
4338 (instance);
4339 err = ME_ERRNO_SIGNAL;
4340 goto ERROR;
4341 }
4342 }
4343 }
4344 } else if (start_mode == ME_START_MODE_NONBLOCKING) {
4345 } else {
4346 PERROR("Invalid start mode specified.\n");
4347 err = ME_ERRNO_INVALID_START_MODE;
4348 goto ERROR;
4349 }
4350 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x10000 << instance->ao_idx)) { // Synchronous with external trigger
4351
4352 if ((inl(instance->status_reg) &
4353 ME4600_AO_STATUS_BIT_FSM)) {
4354 spin_unlock_irqrestore(&instance->
4355 subdevice_lock,
4356 cpu_flags);
4357 PERROR("Conversion is already running.\n");
4358 err = ME_ERRNO_SUBDEVICE_BUSY;
4359 goto ERROR;
4360 }
4361
4362 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4363 tmp |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
4364 tmp &=
4365 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4366 ME4600_AO_CTRL_BIT_STOP |
4367 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4368 outl(tmp, instance->ctrl_reg);
4369 spin_unlock_irqrestore(&instance->
4370 subdevice_lock,
4371 cpu_flags);
4372
4373 if (start_mode == ME_START_MODE_BLOCKING) {
4374 init_waitqueue_head(&queue);
4375
4376 if (delay) {
4377 ref = jiffies;
4378
4379 while (!
4380 (inl
4381 (instance->
4382 status_reg) &
4383 ME4600_AO_STATUS_BIT_FSM))
4384 {
4385 interruptible_sleep_on_timeout
4386 (&queue, 1);
4387
4388 if (signal_pending
4389 (current)) {
4390 PERROR
4391 ("Wait on start of state machine interrupted.\n");
4392 stop_immediately
4393 (instance);
4394 err =
4395 ME_ERRNO_SIGNAL;
4396 goto ERROR;
4397 }
4398
4399 if (((jiffies - ref) >=
4400 delay)) {
4401 PERROR
4402 ("Timeout reached.\n");
4403 stop_immediately
4404 (instance);
4405 err =
4406 ME_ERRNO_TIMEOUT;
4407 goto ERROR;
4408 }
4409 }
4410 } else {
4411 while (!
4412 (inl
4413 (instance->
4414 status_reg) &
4415 ME4600_AO_STATUS_BIT_FSM))
4416 {
4417 interruptible_sleep_on_timeout
4418 (&queue, 1);
4419
4420 if (signal_pending
4421 (current)) {
4422 PERROR
4423 ("Wait on start of state machine interrupted.\n");
4424 stop_immediately
4425 (instance);
4426 err =
4427 ME_ERRNO_SIGNAL;
4428 goto ERROR;
4429 }
4430 }
4431 }
4432 } else if (start_mode ==
4433 ME_START_MODE_NONBLOCKING) {
4434 } else {
4435 PERROR
4436 ("Invalid start mode specified.\n");
4437 err = ME_ERRNO_INVALID_START_MODE;
4438 goto ERROR;
4439 }
4440 } else {
4441 tmp &=
4442 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4443 ME4600_AO_CTRL_BIT_STOP |
4444 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4445 outl(tmp, instance->ctrl_reg);
4446 spin_unlock_irqrestore(&instance->
4447 subdevice_lock,
4448 cpu_flags);
4449 }
4450 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x1 << instance->ao_idx)) { // Synchronous wraparound with sw trigger
4451
4452 if ((inl(instance->status_reg) &
4453 ME4600_AO_STATUS_BIT_FSM)) {
4454 spin_unlock_irqrestore(&instance->
4455 subdevice_lock,
4456 cpu_flags);
4457 PERROR("Conversion is already running.\n");
4458 err = ME_ERRNO_SUBDEVICE_BUSY;
4459 goto ERROR;
4460 }
4461
4462 tmp &=
4463 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4464 ME4600_AO_CTRL_BIT_STOP |
4465 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4466
4467 outl(tmp, instance->ctrl_reg);
4468
4469 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4470 outl(0x8000, instance->single_reg);
4471 instance->single_value = 0x8000;
4472 }
4473
4474 spin_unlock_irqrestore(&instance->subdevice_lock,
4475 cpu_flags);
4476 } else { // Software start
4477
4478 if ((inl(instance->status_reg) &
4479 ME4600_AO_STATUS_BIT_FSM)) {
4480 spin_unlock_irqrestore(&instance->
4481 subdevice_lock,
4482 cpu_flags);
4483 PERROR("Conversion is already running.\n");
4484 err = ME_ERRNO_SUBDEVICE_BUSY;
4485 goto ERROR;
4486 }
4487
4488 tmp &=
4489 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4490 ME4600_AO_CTRL_BIT_STOP |
4491 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4492
4493 outl(tmp, instance->ctrl_reg);
4494
4495 outl(0x8000, instance->single_reg);
4496 instance->single_value = 0x8000;
4497
4498 spin_unlock_irqrestore(&instance->subdevice_lock,
4499 cpu_flags);
4500 }
4501
4502 break;
4503
4504 case 2: // Continuous mode
4505 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) { // Externally triggered
4506
4507 if ((inl(instance->status_reg) &
4508 ME4600_AO_STATUS_BIT_FSM)) {
4509 spin_unlock_irqrestore(&instance->
4510 subdevice_lock,
4511 cpu_flags);
4512 PERROR("Conversion is already running.\n");
4513 err = ME_ERRNO_SUBDEVICE_BUSY;
4514 goto ERROR;
4515 }
4516
4517 tmp &=
4518 ~(ME4600_AO_CTRL_BIT_STOP |
4519 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4520 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4521 outl(tmp, instance->ctrl_reg);
4522 instance->wrap_remaining = instance->wrap_count;
4523 instance->circ_buf.tail = 0;
4524 spin_unlock_irqrestore(&instance->subdevice_lock,
4525 cpu_flags);
4526
4527 if (start_mode == ME_START_MODE_BLOCKING) {
4528 init_waitqueue_head(&queue);
4529
4530 if (delay) {
4531 ref = jiffies;
4532
4533 while (!
4534 (inl(instance->status_reg) &
4535 ME4600_AO_STATUS_BIT_FSM)) {
4536 interruptible_sleep_on_timeout
4537 (&queue, 1);
4538
4539 if (signal_pending(current)) {
4540 PERROR
4541 ("Wait on start of state machine interrupted.\n");
4542 stop_immediately
4543 (instance);
4544 err = ME_ERRNO_SIGNAL;
4545 goto ERROR;
4546 }
4547
4548 if (((jiffies - ref) >= delay)) {
4549 PERROR
4550 ("Timeout reached.\n");
4551 stop_immediately
4552 (instance);
4553 err = ME_ERRNO_TIMEOUT;
4554 goto ERROR;
4555 }
4556 }
4557 } else {
4558 while (!
4559 (inl(instance->status_reg) &
4560 ME4600_AO_STATUS_BIT_FSM)) {
4561 interruptible_sleep_on_timeout
4562 (&queue, 1);
4563
4564 if (signal_pending(current)) {
4565 PERROR
4566 ("Wait on start of state machine interrupted.\n");
4567 stop_immediately
4568 (instance);
4569 err = ME_ERRNO_SIGNAL;
4570 goto ERROR;
4571 }
4572 }
4573 }
4574 } else if (start_mode == ME_START_MODE_NONBLOCKING) {
4575 /* Do nothing */
4576 } else {
4577 PERROR("Invalid start mode specified.\n");
4578 stop_immediately(instance);
4579 err = ME_ERRNO_INVALID_START_MODE;
4580 goto ERROR;
4581 }
4582 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x10000 << instance->ao_idx)) { // Synchronous with external trigger
4583
4584 if ((inl(instance->status_reg) &
4585 ME4600_AO_STATUS_BIT_FSM)) {
4586 spin_unlock_irqrestore(&instance->
4587 subdevice_lock,
4588 cpu_flags);
4589 PERROR("Conversion is already running.\n");
4590 err = ME_ERRNO_SUBDEVICE_BUSY;
4591 goto ERROR;
4592 }
4593
4594 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4595 tmp |=
4596 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG |
4597 ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4598 tmp &=
4599 ~(ME4600_AO_CTRL_BIT_STOP |
4600 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4601 outl(tmp, instance->ctrl_reg);
4602 instance->wrap_remaining = instance->wrap_count;
4603 instance->circ_buf.tail = 0;
4604
4605 spin_unlock_irqrestore(&instance->
4606 subdevice_lock,
4607 cpu_flags);
4608
4609 if (start_mode == ME_START_MODE_BLOCKING) {
4610 init_waitqueue_head(&queue);
4611
4612 if (delay) {
4613 ref = jiffies;
4614
4615 while (!
4616 (inl
4617 (instance->
4618 status_reg) &
4619 ME4600_AO_STATUS_BIT_FSM))
4620 {
4621 interruptible_sleep_on_timeout
4622 (&queue, 1);
4623
4624 if (signal_pending
4625 (current)) {
4626 PERROR
4627 ("Wait on start of state machine interrupted.\n");
4628 stop_immediately
4629 (instance);
4630 err =
4631 ME_ERRNO_SIGNAL;
4632 goto ERROR;
4633 }
4634
4635 if (((jiffies - ref) >=
4636 delay)) {
4637 PERROR
4638 ("Timeout reached.\n");
4639 stop_immediately
4640 (instance);
4641 err =
4642 ME_ERRNO_TIMEOUT;
4643 goto ERROR;
4644 }
4645 }
4646 } else {
4647 while (!
4648 (inl
4649 (instance->
4650 status_reg) &
4651 ME4600_AO_STATUS_BIT_FSM))
4652 {
4653 interruptible_sleep_on_timeout
4654 (&queue, 1);
4655
4656 if (signal_pending
4657 (current)) {
4658 PERROR
4659 ("Wait on start of state machine interrupted.\n");
4660 stop_immediately
4661 (instance);
4662 err =
4663 ME_ERRNO_SIGNAL;
4664 goto ERROR;
4665 }
4666 }
4667 }
4668 } else if (start_mode ==
4669 ME_START_MODE_NONBLOCKING) {
4670 } else {
4671 PERROR
4672 ("Invalid start mode specified.\n");
4673 stop_immediately(instance);
4674 err = ME_ERRNO_INVALID_START_MODE;
4675 goto ERROR;
4676 }
4677 } else {
4678 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4679 tmp &=
4680 ~(ME4600_AO_CTRL_BIT_STOP |
4681 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4682 outl(tmp, instance->ctrl_reg);
4683 instance->wrap_remaining = instance->wrap_count;
4684 instance->circ_buf.tail = 0;
4685 spin_unlock_irqrestore(&instance->
4686 subdevice_lock,
4687 cpu_flags);
4688 }
4689 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x1 << instance->ao_idx)) { // Synchronous wraparound with sw trigger
4690
4691 if ((inl(instance->status_reg) &
4692 ME4600_AO_STATUS_BIT_FSM)) {
4693 spin_unlock_irqrestore(&instance->
4694 subdevice_lock,
4695 cpu_flags);
4696 PERROR("Conversion is already running.\n");
4697 err = ME_ERRNO_SUBDEVICE_BUSY;
4698 goto ERROR;
4699 }
4700
4701 tmp &=
4702 ~(ME4600_AO_CTRL_BIT_STOP |
4703 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4704 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4705 instance->wrap_remaining = instance->wrap_count;
4706 instance->circ_buf.tail = 0;
4707 PDEBUG("CTRL Reg = 0x%X.\n", inl(instance->ctrl_reg));
4708 outl(tmp, instance->ctrl_reg);
4709
4710 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4711 outl(0x8000, instance->single_reg);
4712 instance->single_value = 0x8000;
4713 }
4714
4715 spin_unlock_irqrestore(&instance->subdevice_lock,
4716 cpu_flags);
4717 } else { // Software start
4718
4719 if ((inl(instance->status_reg) &
4720 ME4600_AO_STATUS_BIT_FSM)) {
4721 spin_unlock_irqrestore(&instance->
4722 subdevice_lock,
4723 cpu_flags);
4724 PERROR("Conversion is already running.\n");
4725 err = ME_ERRNO_SUBDEVICE_BUSY;
4726 goto ERROR;
4727 }
4728
4729 tmp &=
4730 ~(ME4600_AO_CTRL_BIT_STOP |
4731 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4732
4733 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4734 outl(tmp, instance->ctrl_reg);
4735 outl(0x8000, instance->single_reg);
4736 instance->single_value = 0x8000;
4737 instance->wrap_remaining = instance->wrap_count;
4738 instance->circ_buf.tail = 0;
4739 spin_unlock_irqrestore(&instance->subdevice_lock,
4740 cpu_flags);
4741 }
4742
4743 break;
4744
4745 default:
4746 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4747 PERROR("Invalid mode configured.\n");
4748 err = ME_ERRNO_INTERNAL;
4749 goto ERROR;
4750 }
4751
4752 ERROR:
4753
4754 ME_SUBDEVICE_EXIT;
4755
4756 return err;
4757 }
4758
4759 static int me4600_ao_io_stream_status(me_subdevice_t *subdevice,
4760 struct file *filep,
4761 int wait,
4762 int *status, int *values, int flags)
4763 {
4764 me4600_ao_subdevice_t *instance;
4765 int err = ME_ERRNO_SUCCESS;
4766 wait_queue_head_t queue;
4767
4768 PDEBUG("executed.\n");
4769
4770 instance = (me4600_ao_subdevice_t *) subdevice;
4771
4772 init_waitqueue_head(&queue);
4773
4774 if (!instance->fifo) {
4775 PERROR("Not a streaming ao.\n");
4776 return ME_ERRNO_NOT_SUPPORTED;
4777 }
4778
4779 ME_SUBDEVICE_ENTER;
4780
4781 if (wait == ME_WAIT_NONE) {
4782 *status =
4783 (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ?
4784 ME_STATUS_BUSY : ME_STATUS_IDLE;
4785 *values = me_circ_buf_space(&instance->circ_buf);
4786 } else if (wait == ME_WAIT_IDLE) {
4787 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) {
4788 interruptible_sleep_on_timeout(&queue, 1);
4789
4790 if (instance->flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
4791 PERROR("Output stream was interrupted.\n");
4792 *status = ME_STATUS_ERROR;
4793 err = ME_ERRNO_SUCCESS;
4794 goto ERROR;
4795 }
4796
4797 if (signal_pending(current)) {
4798 PERROR
4799 ("Wait on state machine interrupted by signal.\n");
4800 *status = ME_STATUS_INVALID;
4801 err = ME_ERRNO_SIGNAL;
4802 goto ERROR;
4803 }
4804 }
4805
4806 *status = ME_STATUS_IDLE;
4807
4808 *values = me_circ_buf_space(&instance->circ_buf);
4809 } else {
4810 PERROR("Invalid wait argument specified.\n");
4811 *status = ME_STATUS_INVALID;
4812 err = ME_ERRNO_INVALID_WAIT;
4813 goto ERROR;
4814 }
4815
4816 ERROR:
4817
4818 ME_SUBDEVICE_EXIT;
4819
4820 return err;
4821 }
4822
4823 static int me4600_ao_io_stream_stop(me_subdevice_t *subdevice,
4824 struct file *filep,
4825 int stop_mode, int flags)
4826 {
4827 int err = ME_ERRNO_SUCCESS;
4828 me4600_ao_subdevice_t *instance;
4829 unsigned long cpu_flags;
4830 unsigned long tmp;
4831
4832 PDEBUG("executed.\n");
4833
4834 instance = (me4600_ao_subdevice_t *) subdevice;
4835
4836 if (!instance->fifo) {
4837 PERROR("Not a streaming ao.\n");
4838 return ME_ERRNO_NOT_SUPPORTED;
4839 }
4840
4841 ME_SUBDEVICE_ENTER;
4842
4843 if (stop_mode == ME_STOP_MODE_IMMEDIATE) {
4844 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4845 tmp = inl(instance->ctrl_reg);
4846 tmp |=
4847 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4848 outl(tmp, instance->ctrl_reg);
4849
4850 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
4851
4852 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4853 } else if (stop_mode == ME_STOP_MODE_LAST_VALUE) {
4854 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4855 tmp = inl(instance->ctrl_reg);
4856 tmp |= ME4600_AO_CTRL_BIT_STOP;
4857 outl(tmp, instance->ctrl_reg);
4858 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4859 } else {
4860 PERROR("Invalid stop mode specified.\n");
4861 err = ME_ERRNO_INVALID_STOP_MODE;
4862 goto ERROR;
4863 }
4864
4865 ERROR:
4866
4867 ME_SUBDEVICE_EXIT;
4868
4869 return err;
4870 }
4871
4872 static int me4600_ao_io_stream_write(me_subdevice_t *subdevice,
4873 struct file *filep,
4874 int write_mode,
4875 int *values, int *count, int flags)
4876 {
4877 int err = ME_ERRNO_SUCCESS;
4878 me4600_ao_subdevice_t *instance;
4879 unsigned long tmp;
4880 int i;
4881 int value;
4882 int cnt = *count;
4883 int c;
4884 int k;
4885 int ret = 0;
4886 unsigned long cpu_flags = 0;
4887
4888 PDEBUG("executed.\n");
4889
4890 instance = (me4600_ao_subdevice_t *) subdevice;
4891
4892 if (!instance->fifo) {
4893 PERROR("Not a streaming ao.\n");
4894 return ME_ERRNO_NOT_SUPPORTED;
4895 }
4896
4897 ME_SUBDEVICE_ENTER;
4898
4899 if (*count <= 0) {
4900 PERROR("Invalid count of values specified.\n");
4901 err = ME_ERRNO_INVALID_VALUE_COUNT;
4902 goto ERROR;
4903 }
4904
4905 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4906
4907 tmp = inl(instance->ctrl_reg);
4908
4909 switch (tmp & 0x3) {
4910
4911 case 1: // Wraparound mode
4912 if (instance->bosch_fw) { // Bosch firmware
4913 spin_unlock_irqrestore(&instance->subdevice_lock,
4914 cpu_flags);
4915
4916 if (cnt != 7) {
4917 PERROR
4918 ("Invalid count of values specified. 7 expected.\n");
4919 err = ME_ERRNO_INVALID_VALUE_COUNT;
4920 goto ERROR;
4921 }
4922
4923 for (i = 0; i < 7; i++) {
4924 if (get_user(value, values)) {
4925 PERROR
4926 ("Can't copy value from user space.\n");
4927 err = ME_ERRNO_INTERNAL;
4928 goto ERROR;
4929 }
4930
4931 if (i == 0) {
4932 /* Maximum voltage */
4933 value <<= 16;
4934 value |=
4935 inl(instance->reg_base +
4936 0xD4) & 0xFFFF;
4937 outl(value, instance->reg_base + 0xD4);
4938 } else if (i == 1) {
4939 /* Minimum voltage */
4940 value &= 0xFFFF;
4941 value |=
4942 inl(instance->reg_base +
4943 0xD4) & 0xFFFF0000;
4944 outl(value, instance->reg_base + 0xD4);
4945 } else if (i == 2) {
4946 /* Delta up */
4947 value <<= 16;
4948 value |=
4949 inl(instance->reg_base +
4950 0xD8) & 0xFFFF;
4951 outl(value, instance->reg_base + 0xD8);
4952 } else if (i == 3) {
4953 /* Delta down */
4954 value &= 0xFFFF;
4955 value |=
4956 inl(instance->reg_base +
4957 0xD8) & 0xFFFF0000;
4958 outl(value, instance->reg_base + 0xD8);
4959 } else if (i == 4) {
4960 /* Start value */
4961 outl(value, instance->reg_base + 0xDC);
4962 } else if (i == 5) {
4963 /* Invert */
4964 if (value) {
4965 value = inl(instance->ctrl_reg);
4966 value |= 0x100;
4967 outl(value, instance->ctrl_reg);
4968 } else {
4969 value = inl(instance->ctrl_reg);
4970 value &= ~0x100;
4971 outl(value, instance->ctrl_reg);
4972 }
4973 } else if (i == 6) {
4974 /* Timer for positive ramp */
4975 outl(value, instance->reg_base + 0xE0);
4976 }
4977
4978 values++;
4979 }
4980 } else { // Normal firmware
4981 PDEBUG("Write for wraparound mode.\n");
4982
4983 if (inl(instance->status_reg) &
4984 ME4600_AO_STATUS_BIT_FSM) {
4985 spin_unlock_irqrestore(&instance->
4986 subdevice_lock,
4987 cpu_flags);
4988 PERROR
4989 ("There is already a conversion running.\n");
4990 err = ME_ERRNO_SUBDEVICE_BUSY;
4991 goto ERROR;
4992 }
4993
4994 tmp |= ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4995 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
4996 outl(tmp, instance->ctrl_reg);
4997 tmp |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
4998
4999 if ((*count > ME4600_AO_FIFO_COUNT) ||
5000 ((instance->
5001 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5002 ME4600_AO_FLAGS_SW_WRAP_MODE_FIN)) {
5003 tmp &=
5004 ~(ME4600_AO_CTRL_BIT_MODE_0 |
5005 ME4600_AO_CTRL_BIT_MODE_1);
5006 tmp |= ME4600_AO_CTRL_BIT_MODE_1;
5007 }
5008
5009 outl(tmp, instance->ctrl_reg);
5010 spin_unlock_irqrestore(&instance->subdevice_lock,
5011 cpu_flags);
5012
5013 if ((*count <= ME4600_AO_FIFO_COUNT) &&
5014 ((instance->
5015 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5016 ME4600_AO_FLAGS_SW_WRAP_MODE_INF)) {
5017 for (i = 0; i < *count; i++) {
5018 if (get_user(value, values + i)) {
5019 PERROR
5020 ("Cannot copy value from user space.\n");
5021 err = ME_ERRNO_INTERNAL;
5022 goto ERROR;
5023 }
5024
5025 if (instance->ao_idx & 0x1)
5026 value <<= 16;
5027
5028 outl(value, instance->fifo_reg);
5029 }
5030 } else if ((*count <= ME4600_AO_CIRC_BUF_COUNT) &&
5031 ((instance->
5032 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK)
5033 == ME4600_AO_FLAGS_SW_WRAP_MODE_INF)) {
5034 for (i = 0; i < *count; i++) {
5035 if (get_user(value, values + i)) {
5036 PERROR
5037 ("Cannot copy value from user space.\n");
5038 err = ME_ERRNO_INTERNAL;
5039 goto ERROR;
5040 }
5041
5042 instance->circ_buf.buf[i] = value; /* Used to hold the values. */
5043 }
5044
5045 instance->circ_buf.tail = 0; /* Used as the current read position. */
5046 instance->circ_buf.head = *count; /* Used as the buffer size. */
5047
5048 /* Preload the FIFO. */
5049
5050 for (i = 0; i < ME4600_AO_FIFO_COUNT;
5051 i++, instance->circ_buf.tail++) {
5052 if (instance->circ_buf.tail >=
5053 instance->circ_buf.head)
5054 instance->circ_buf.tail = 0;
5055
5056 if (instance->ao_idx & 0x1)
5057 outl(instance->circ_buf.
5058 buf[instance->circ_buf.
5059 tail] << 16,
5060 instance->fifo_reg);
5061 else
5062 outl(instance->circ_buf.
5063 buf[instance->circ_buf.
5064 tail],
5065 instance->fifo_reg);
5066 }
5067 } else if ((*count <= ME4600_AO_CIRC_BUF_COUNT) &&
5068 ((instance->
5069 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK)
5070 == ME4600_AO_FLAGS_SW_WRAP_MODE_FIN)) {
5071 unsigned int preload_count;
5072
5073 for (i = 0; i < *count; i++) {
5074 if (get_user(value, values + i)) {
5075 PERROR
5076 ("Cannot copy value from user space.\n");
5077 err = ME_ERRNO_INTERNAL;
5078 goto ERROR;
5079 }
5080
5081 instance->circ_buf.buf[i] = value; /* Used to hold the values. */
5082 }
5083
5084 instance->circ_buf.tail = 0; /* Used as the current read position. */
5085 instance->circ_buf.head = *count; /* Used as the buffer size. */
5086
5087 /* Try to preload the whole FIFO. */
5088 preload_count = ME4600_AO_FIFO_COUNT;
5089
5090 if (preload_count > instance->wrap_count)
5091 preload_count = instance->wrap_count;
5092
5093 /* Preload the FIFO. */
5094 for (i = 0; i < preload_count;
5095 i++, instance->circ_buf.tail++) {
5096 if (instance->circ_buf.tail >=
5097 instance->circ_buf.head)
5098 instance->circ_buf.tail = 0;
5099
5100 if (instance->ao_idx & 0x1)
5101 outl(instance->circ_buf.
5102 buf[instance->circ_buf.
5103 tail] << 16,
5104 instance->fifo_reg);
5105 else
5106 outl(instance->circ_buf.
5107 buf[instance->circ_buf.
5108 tail],
5109 instance->fifo_reg);
5110 }
5111
5112 instance->wrap_remaining =
5113 instance->wrap_count - preload_count;
5114 } else {
5115 PERROR("To many values written.\n");
5116 err = ME_ERRNO_INVALID_VALUE_COUNT;
5117 goto ERROR;
5118 }
5119 }
5120
5121 break;
5122
5123 case 2: // Continuous mode
5124 /* Check if in SW wrapround mode */
5125 if (instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) {
5126 spin_unlock_irqrestore(&instance->subdevice_lock,
5127 cpu_flags);
5128 PERROR("Subdevice is configured SW wrapround mode.\n");
5129 err = ME_ERRNO_PREVIOUS_CONFIG;
5130 goto ERROR;
5131 }
5132
5133 switch (write_mode) {
5134
5135 case ME_WRITE_MODE_BLOCKING:
5136 spin_unlock_irqrestore(&instance->subdevice_lock,
5137 cpu_flags);
5138
5139 PDEBUG("Write for blocking continuous mode.\n");
5140
5141 while (cnt > 0) {
5142 wait_event_interruptible(instance->wait_queue,
5143 (c =
5144 me_circ_buf_space_to_end
5145 (&instance->
5146 circ_buf)));
5147
5148 if (instance->
5149 flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
5150 PERROR
5151 ("Broken pipe in blocking write.\n");
5152 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
5153 goto ERROR;
5154 } else if (signal_pending(current)) {
5155 PERROR
5156 ("Wait for free buffer interrupted from signal.\n");
5157 err = ME_ERRNO_SIGNAL;
5158 goto ERROR;
5159 }
5160
5161 PDEBUG("Space to end = %d.\n", c);
5162
5163 /* Only able to write size of free buffer or size of count */
5164
5165 if (cnt < c)
5166 c = cnt;
5167 k = sizeof(int) * c;
5168 k -= copy_from_user(instance->circ_buf.buf +
5169 instance->circ_buf.head,
5170 values, k);
5171 c = k / sizeof(int);
5172
5173 PDEBUG("Copy %d values from user space.\n", c);
5174
5175 if (!c) {
5176 PERROR
5177 ("Cannot copy values from user space.\n");
5178 err = ME_ERRNO_INTERNAL;
5179 goto ERROR;
5180 }
5181
5182 instance->circ_buf.head =
5183 (instance->circ_buf.head +
5184 c) & (instance->circ_buf.mask);
5185
5186 values += c;
5187 cnt -= c;
5188 ret += c;
5189
5190 /* Values are now available so enable interrupts */
5191 spin_lock_irqsave(&instance->subdevice_lock,
5192 cpu_flags);
5193
5194 if (me_circ_buf_space(&instance->circ_buf)) {
5195 tmp = inl(instance->ctrl_reg);
5196 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5197 outl(tmp, instance->ctrl_reg);
5198 }
5199
5200 spin_unlock_irqrestore(&instance->
5201 subdevice_lock,
5202 cpu_flags);
5203 }
5204
5205 *count = ret;
5206
5207 break;
5208
5209 case ME_WRITE_MODE_NONBLOCKING:
5210 spin_unlock_irqrestore(&instance->subdevice_lock,
5211 cpu_flags);
5212
5213 PDEBUG("Write for non blocking continuous mode.\n");
5214
5215 while (cnt > 0) {
5216 if (instance->
5217 flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
5218 PERROR
5219 ("ME4600:Broken pipe in nonblocking write.\n");
5220 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
5221 goto ERROR;
5222 }
5223
5224 c = me_circ_buf_space_to_end(&instance->
5225 circ_buf);
5226
5227 if (!c) {
5228 PDEBUG
5229 ("Returning from nonblocking write.\n");
5230 break;
5231 }
5232
5233 PDEBUG("Space to end = %d.\n", c);
5234
5235 /* Only able to write size of free buffer or size of count */
5236
5237 if (cnt < c)
5238 c = cnt;
5239 k = sizeof(int) * c;
5240 k -= copy_from_user(instance->circ_buf.buf +
5241 instance->circ_buf.head,
5242 values, k);
5243 c = k / sizeof(int);
5244
5245 PDEBUG("Copy %d values from user space.\n", c);
5246
5247 if (!c) {
5248 PERROR
5249 ("Cannot copy values from user space.\n");
5250 err = ME_ERRNO_INTERNAL;
5251 goto ERROR;
5252 }
5253
5254 instance->circ_buf.head =
5255 (instance->circ_buf.head +
5256 c) & (instance->circ_buf.mask);
5257
5258 values += c;
5259 cnt -= c;
5260 ret += c;
5261
5262 /* Values are now available so enable interrupts */
5263 spin_lock_irqsave(&instance->subdevice_lock,
5264 cpu_flags);
5265
5266 if (me_circ_buf_space(&instance->circ_buf)) {
5267 tmp = inl(instance->ctrl_reg);
5268 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5269 outl(tmp, instance->ctrl_reg);
5270 }
5271
5272 spin_unlock_irqrestore(&instance->
5273 subdevice_lock,
5274 cpu_flags);
5275 }
5276
5277 *count = ret;
5278
5279 break;
5280
5281 case ME_WRITE_MODE_PRELOAD:
5282 PDEBUG("Write for preload continuous mode.\n");
5283
5284 if ((inl(instance->status_reg) &
5285 ME4600_AO_STATUS_BIT_FSM)) {
5286 spin_unlock_irqrestore(&instance->
5287 subdevice_lock,
5288 cpu_flags);
5289 PERROR
5290 ("Can't Preload DAC FIFO while conversion is running.\n");
5291 err = ME_ERRNO_SUBDEVICE_BUSY;
5292 goto ERROR;
5293 }
5294
5295 tmp = inl(instance->ctrl_reg);
5296
5297 tmp |=
5298 ME4600_AO_CTRL_BIT_STOP |
5299 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
5300 outl(tmp, instance->ctrl_reg);
5301 tmp &=
5302 ~(ME4600_AO_CTRL_BIT_ENABLE_FIFO |
5303 ME4600_AO_CTRL_BIT_ENABLE_IRQ);
5304 outl(tmp, instance->ctrl_reg);
5305 tmp |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
5306 outl(tmp, instance->ctrl_reg);
5307
5308 instance->circ_buf.head = 0;
5309 instance->circ_buf.tail = 0;
5310 instance->flags &= ~ME4600_AO_FLAGS_BROKEN_PIPE;
5311
5312 spin_unlock_irqrestore(&instance->subdevice_lock,
5313 cpu_flags);
5314
5315 c = ME4600_AO_FIFO_COUNT;
5316
5317 if (cnt < c)
5318 c = cnt;
5319
5320 for (i = 0; i < c; i++) {
5321 if (get_user(value, values)) {
5322 PERROR
5323 ("Can't copy value from user space.\n");
5324 err = ME_ERRNO_INTERNAL;
5325 goto ERROR;
5326 }
5327
5328 if (instance->ao_idx & 0x1)
5329 value <<= 16;
5330
5331 outl(value, instance->fifo_reg);
5332
5333 values++;
5334 }
5335
5336 cnt -= c;
5337
5338 ret += c;
5339
5340 PDEBUG("Wrote %d values to fifo.\n", c);
5341
5342 while (1) {
5343 c = me_circ_buf_space_to_end(&instance->
5344 circ_buf);
5345
5346 if (c == 0)
5347 break;
5348
5349 if (cnt < c)
5350 c = cnt;
5351
5352 if (c <= 0)
5353 break;
5354
5355 k = sizeof(int) * c;
5356
5357 k -= copy_from_user(instance->circ_buf.buf +
5358 instance->circ_buf.head,
5359 values, k);
5360
5361 c = k / sizeof(int);
5362
5363 PDEBUG("Wrote %d values to circular buffer.\n",
5364 c);
5365
5366 if (!c) {
5367 PERROR
5368 ("Can't copy values from user space.\n");
5369 err = ME_ERRNO_INTERNAL;
5370 goto ERROR;
5371 }
5372
5373 instance->circ_buf.head =
5374 (instance->circ_buf.head +
5375 c) & (instance->circ_buf.mask);
5376
5377 values += c;
5378 cnt -= c;
5379 ret += c;
5380 }
5381
5382 *count = ret;
5383
5384 break;
5385
5386 default:
5387 spin_unlock_irqrestore(&instance->subdevice_lock,
5388 cpu_flags);
5389
5390 PERROR("Invalid write mode specified.\n");
5391
5392 err = ME_ERRNO_INVALID_WRITE_MODE;
5393
5394 goto ERROR;
5395 }
5396
5397 break;
5398
5399 default: // Single mode of invalid
5400 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
5401 PERROR("Subdevice is configured in single mode.\n");
5402 err = ME_ERRNO_PREVIOUS_CONFIG;
5403 goto ERROR;
5404 }
5405
5406 ERROR:
5407
5408 ME_SUBDEVICE_EXIT;
5409
5410 return err;
5411 }
5412
5413 static irqreturn_t me4600_ao_isr(int irq, void *dev_id)
5414 {
5415 unsigned long tmp;
5416 int value;
5417 me4600_ao_subdevice_t *instance = dev_id;
5418 int i;
5419 int c = 0;
5420 int c1 = 0;
5421
5422 if (irq != instance->irq) {
5423 PDEBUG("Incorrect interrupt num: %d.\n", irq);
5424 return IRQ_NONE;
5425 }
5426
5427 if (!((0x1 << (instance->ao_idx + 3)) & inl(instance->irq_status_reg))) {
5428 return IRQ_NONE;
5429 }
5430
5431 PDEBUG("executed.\n");
5432
5433 tmp = inl(instance->status_reg);
5434
5435 if (!(tmp & ME4600_AO_STATUS_BIT_EF) &&
5436 (tmp & ME4600_AO_STATUS_BIT_HF) &&
5437 (tmp & ME4600_AO_STATUS_BIT_HF)) {
5438 c = ME4600_AO_FIFO_COUNT;
5439 PDEBUG("Fifo empty.\n");
5440 } else if ((tmp & ME4600_AO_STATUS_BIT_EF) &&
5441 (tmp & ME4600_AO_STATUS_BIT_HF) &&
5442 (tmp & ME4600_AO_STATUS_BIT_HF)) {
5443 c = ME4600_AO_FIFO_COUNT / 2;
5444 PDEBUG("Fifo under half full.\n");
5445 } else {
5446 c = 0;
5447 PDEBUG("Fifo full.\n");
5448 }
5449
5450 PDEBUG("Try to write 0x%04X values.\n", c);
5451
5452 if ((instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5453 ME4600_AO_FLAGS_SW_WRAP_MODE_INF) {
5454 while (c) {
5455 c1 = c;
5456
5457 if (c1 > (instance->circ_buf.head - instance->circ_buf.tail)) /* Only up to the end of the buffer */
5458 c1 = (instance->circ_buf.head -
5459 instance->circ_buf.tail);
5460
5461 /* Write the values to the FIFO */
5462 for (i = 0; i < c1; i++, instance->circ_buf.tail++, c--) {
5463 if (instance->ao_idx & 0x1)
5464 outl(instance->circ_buf.
5465 buf[instance->circ_buf.tail] << 16,
5466 instance->fifo_reg);
5467 else
5468 outl(instance->circ_buf.
5469 buf[instance->circ_buf.tail],
5470 instance->fifo_reg);
5471 }
5472
5473 if (instance->circ_buf.tail >= instance->circ_buf.head) /* Start from beginning */
5474 instance->circ_buf.tail = 0;
5475 }
5476
5477 spin_lock(&instance->subdevice_lock);
5478
5479 tmp = inl(instance->ctrl_reg);
5480 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5481 outl(tmp, instance->ctrl_reg);
5482 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5483 outl(tmp, instance->ctrl_reg);
5484
5485 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5486 PERROR("Broken pipe.\n");
5487 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5488 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5489 outl(tmp, instance->ctrl_reg);
5490 }
5491
5492 spin_unlock(&instance->subdevice_lock);
5493 } else if ((instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5494 ME4600_AO_FLAGS_SW_WRAP_MODE_FIN) {
5495 while (c && instance->wrap_remaining) {
5496 c1 = c;
5497
5498 if (c1 > (instance->circ_buf.head - instance->circ_buf.tail)) /* Only up to the end of the buffer */
5499 c1 = (instance->circ_buf.head -
5500 instance->circ_buf.tail);
5501
5502 if (c1 > instance->wrap_remaining) /* Only up to count of user defined number of values */
5503 c1 = instance->wrap_remaining;
5504
5505 /* Write the values to the FIFO */
5506 for (i = 0; i < c1;
5507 i++, instance->circ_buf.tail++, c--,
5508 instance->wrap_remaining--) {
5509 if (instance->ao_idx & 0x1)
5510 outl(instance->circ_buf.
5511 buf[instance->circ_buf.tail] << 16,
5512 instance->fifo_reg);
5513 else
5514 outl(instance->circ_buf.
5515 buf[instance->circ_buf.tail],
5516 instance->fifo_reg);
5517 }
5518
5519 if (instance->circ_buf.tail >= instance->circ_buf.head) /* Start from beginning */
5520 instance->circ_buf.tail = 0;
5521 }
5522
5523 spin_lock(&instance->subdevice_lock);
5524
5525 tmp = inl(instance->ctrl_reg);
5526
5527 if (!instance->wrap_remaining) {
5528 PDEBUG("Finite SW wraparound done.\n");
5529 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5530 }
5531
5532 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5533
5534 outl(tmp, instance->ctrl_reg);
5535 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5536 outl(tmp, instance->ctrl_reg);
5537
5538 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5539 PERROR("Broken pipe.\n");
5540 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5541 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5542 outl(tmp, instance->ctrl_reg);
5543 }
5544
5545 spin_unlock(&instance->subdevice_lock);
5546
5547 } else { /* Regular continuous mode */
5548
5549 while (1) {
5550 c1 = me_circ_buf_values_to_end(&instance->circ_buf);
5551 PDEBUG("Values to end = %d.\n", c1);
5552
5553 if (c1 > c)
5554 c1 = c;
5555
5556 if (c1 <= 0) {
5557 PDEBUG("Work done or buffer empty.\n");
5558 break;
5559 }
5560
5561 if (instance->ao_idx & 0x1) {
5562 for (i = 0; i < c1; i++) {
5563 value =
5564 *(instance->circ_buf.buf +
5565 instance->circ_buf.tail +
5566 i) << 16;
5567 outl(value, instance->fifo_reg);
5568 }
5569 } else
5570 outsl(instance->fifo_reg,
5571 instance->circ_buf.buf +
5572 instance->circ_buf.tail, c1);
5573
5574 instance->circ_buf.tail =
5575 (instance->circ_buf.tail +
5576 c1) & (instance->circ_buf.mask);
5577
5578 PDEBUG("%d values wrote to port 0x%04X.\n", c1,
5579 instance->fifo_reg);
5580
5581 c -= c1;
5582 }
5583
5584 spin_lock(&instance->subdevice_lock);
5585
5586 tmp = inl(instance->ctrl_reg);
5587
5588 if (!me_circ_buf_values(&instance->circ_buf)) {
5589 PDEBUG
5590 ("Disable Interrupt because no values left in buffer.\n");
5591 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5592 }
5593
5594 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5595
5596 outl(tmp, instance->ctrl_reg);
5597 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5598 outl(tmp, instance->ctrl_reg);
5599
5600 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5601 PDEBUG("Broken pipe in me4600_ao_isr.\n");
5602 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5603 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5604 outl(tmp, instance->ctrl_reg);
5605 }
5606
5607 spin_unlock(&instance->subdevice_lock);
5608
5609 wake_up_interruptible(&instance->wait_queue);
5610 }
5611
5612 return IRQ_HANDLED;
5613 }
5614
5615 static void me4600_ao_destructor(struct me_subdevice *subdevice)
5616 {
5617 me4600_ao_subdevice_t *instance;
5618
5619 PDEBUG("executed.\n");
5620
5621 instance = (me4600_ao_subdevice_t *) subdevice;
5622
5623 free_irq(instance->irq, instance);
5624 kfree(instance->circ_buf.buf);
5625 me_subdevice_deinit(&instance->base);
5626 kfree(instance);
5627 }
5628
5629 me4600_ao_subdevice_t *me4600_ao_constructor(uint32_t reg_base,
5630 spinlock_t *preload_reg_lock,
5631 uint32_t *preload_flags,
5632 int ao_idx, int fifo, int irq)
5633 {
5634 me4600_ao_subdevice_t *subdevice;
5635 int err;
5636
5637 PDEBUG("executed.\n");
5638
5639 /* Allocate memory for subdevice instance */
5640 subdevice = kmalloc(sizeof(me4600_ao_subdevice_t), GFP_KERNEL);
5641
5642 if (!subdevice) {
5643 PERROR("Cannot get memory for subdevice instance.\n");
5644 return NULL;
5645 }
5646
5647 memset(subdevice, 0, sizeof(me4600_ao_subdevice_t));
5648
5649 /* Initialize subdevice base class */
5650 err = me_subdevice_init(&subdevice->base);
5651
5652 if (err) {
5653 PERROR("Cannot initialize subdevice base class instance.\n");
5654 kfree(subdevice);
5655 return NULL;
5656 }
5657 // Initialize spin locks.
5658 spin_lock_init(&subdevice->subdevice_lock);
5659
5660 subdevice->preload_reg_lock = preload_reg_lock;
5661 subdevice->preload_flags = preload_flags;
5662
5663 /* Allocate and initialize circular buffer */
5664 subdevice->circ_buf.mask = ME4600_AO_CIRC_BUF_COUNT - 1;
5665 subdevice->circ_buf.buf = kmalloc(ME4600_AO_CIRC_BUF_SIZE, GFP_KERNEL);
5666
5667 if (!subdevice->circ_buf.buf) {
5668 PERROR("Cannot initialize subdevice base class instance.\n");
5669 me_subdevice_deinit((me_subdevice_t *) subdevice);
5670 kfree(subdevice);
5671 return NULL;
5672 }
5673
5674 memset(subdevice->circ_buf.buf, 0, ME4600_AO_CIRC_BUF_SIZE);
5675
5676 subdevice->circ_buf.head = 0;
5677 subdevice->circ_buf.tail = 0;
5678
5679 /* Initialize wait queue */
5680 init_waitqueue_head(&subdevice->wait_queue);
5681
5682 /* Initialize single value to 0V */
5683 subdevice->single_value = 0x8000;
5684
5685 /* Store analog output index */
5686 subdevice->ao_idx = ao_idx;
5687
5688 /* Store if analog output has fifo */
5689 subdevice->fifo = fifo;
5690
5691 /* Initialize registers */
5692
5693 if (ao_idx == 0) {
5694 subdevice->ctrl_reg = reg_base + ME4600_AO_00_CTRL_REG;
5695 subdevice->status_reg = reg_base + ME4600_AO_00_STATUS_REG;
5696 subdevice->fifo_reg = reg_base + ME4600_AO_00_FIFO_REG;
5697 subdevice->single_reg = reg_base + ME4600_AO_00_SINGLE_REG;
5698 subdevice->timer_reg = reg_base + ME4600_AO_00_TIMER_REG;
5699 subdevice->reg_base = reg_base;
5700
5701 if (inl(subdevice->reg_base + ME4600_AO_BOSCH_REG) == 0x20000) {
5702 PINFO("Bosch firmware in use for channel 0.\n");
5703 subdevice->bosch_fw = 1;
5704 } else {
5705 subdevice->bosch_fw = 0;
5706 }
5707 } else if (ao_idx == 1) {
5708 subdevice->ctrl_reg = reg_base + ME4600_AO_01_CTRL_REG;
5709 subdevice->status_reg = reg_base + ME4600_AO_01_STATUS_REG;
5710 subdevice->fifo_reg = reg_base + ME4600_AO_01_FIFO_REG;
5711 subdevice->single_reg = reg_base + ME4600_AO_01_SINGLE_REG;
5712 subdevice->timer_reg = reg_base + ME4600_AO_01_TIMER_REG;
5713 subdevice->reg_base = reg_base;
5714 subdevice->bosch_fw = 0;
5715 } else if (ao_idx == 2) {
5716 subdevice->ctrl_reg = reg_base + ME4600_AO_02_CTRL_REG;
5717 subdevice->status_reg = reg_base + ME4600_AO_02_STATUS_REG;
5718 subdevice->fifo_reg = reg_base + ME4600_AO_02_FIFO_REG;
5719 subdevice->single_reg = reg_base + ME4600_AO_02_SINGLE_REG;
5720 subdevice->timer_reg = reg_base + ME4600_AO_02_TIMER_REG;
5721 subdevice->reg_base = reg_base;
5722 subdevice->bosch_fw = 0;
5723 } else {
5724 subdevice->ctrl_reg = reg_base + ME4600_AO_03_CTRL_REG;
5725 subdevice->status_reg = reg_base + ME4600_AO_03_STATUS_REG;
5726 subdevice->fifo_reg = reg_base + ME4600_AO_03_FIFO_REG;
5727 subdevice->single_reg = reg_base + ME4600_AO_03_SINGLE_REG;
5728 subdevice->timer_reg = reg_base + ME4600_AO_03_TIMER_REG;
5729 subdevice->reg_base = reg_base;
5730 subdevice->bosch_fw = 0;
5731 }
5732
5733 subdevice->irq_status_reg = reg_base + ME4600_IRQ_STATUS_REG;
5734 subdevice->preload_reg = reg_base + ME4600_AO_LOADSETREG_XX;
5735
5736 /* Register interrupt service routine */
5737 subdevice->irq = irq;
5738
5739 if (request_irq
5740 (subdevice->irq, me4600_ao_isr, SA_INTERRUPT | SA_SHIRQ,
5741 ME4600_NAME, subdevice)) {
5742 PERROR("Cannot get interrupt line.\n");
5743 me_subdevice_deinit((me_subdevice_t *) subdevice);
5744 kfree(subdevice->circ_buf.buf);
5745 kfree(subdevice);
5746 return NULL;
5747 }
5748
5749 /* Override base class methods. */
5750 subdevice->base.me_subdevice_destructor = me4600_ao_destructor;
5751 subdevice->base.me_subdevice_io_reset_subdevice =
5752 me4600_ao_io_reset_subdevice;
5753 subdevice->base.me_subdevice_io_single_config =
5754 me4600_ao_io_single_config;
5755 subdevice->base.me_subdevice_io_single_read = me4600_ao_io_single_read;
5756 subdevice->base.me_subdevice_io_single_write =
5757 me4600_ao_io_single_write;
5758 subdevice->base.me_subdevice_io_stream_config =
5759 me4600_ao_io_stream_config;
5760 subdevice->base.me_subdevice_io_stream_new_values =
5761 me4600_ao_io_stream_new_values;
5762 subdevice->base.me_subdevice_io_stream_write =
5763 me4600_ao_io_stream_write;
5764 subdevice->base.me_subdevice_io_stream_start =
5765 me4600_ao_io_stream_start;
5766 subdevice->base.me_subdevice_io_stream_status =
5767 me4600_ao_io_stream_status;
5768 subdevice->base.me_subdevice_io_stream_stop = me4600_ao_io_stream_stop;
5769 subdevice->base.me_subdevice_query_number_channels =
5770 me4600_ao_query_number_channels;
5771 subdevice->base.me_subdevice_query_subdevice_type =
5772 me4600_ao_query_subdevice_type;
5773 subdevice->base.me_subdevice_query_subdevice_caps =
5774 me4600_ao_query_subdevice_caps;
5775 subdevice->base.me_subdevice_query_subdevice_caps_args =
5776 me4600_ao_query_subdevice_caps_args;
5777 subdevice->base.me_subdevice_query_range_by_min_max =
5778 me4600_ao_query_range_by_min_max;
5779 subdevice->base.me_subdevice_query_number_ranges =
5780 me4600_ao_query_number_ranges;
5781 subdevice->base.me_subdevice_query_range_info =
5782 me4600_ao_query_range_info;
5783 subdevice->base.me_subdevice_query_timer = me4600_ao_query_timer;
5784
5785 return subdevice;
5786 }
5787
5788 #endif // BOSCH
5789
5790 /* Common functions
5791 */
5792
5793 static int me4600_ao_query_range_by_min_max(me_subdevice_t *subdevice,
5794 int unit,
5795 int *min,
5796 int *max, int *maxdata, int *range)
5797 {
5798 me4600_ao_subdevice_t *instance;
5799
5800 instance = (me4600_ao_subdevice_t *) subdevice;
5801
5802 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5803
5804 if ((*max - *min) < 0) {
5805 PERROR("Invalid minimum and maximum values specified.\n");
5806 return ME_ERRNO_INVALID_MIN_MAX;
5807 }
5808
5809 if ((unit == ME_UNIT_VOLT) || (unit == ME_UNIT_ANY)) {
5810 if ((*max <= (ME4600_AO_MAX_RANGE + 1000))
5811 && (*min >= ME4600_AO_MIN_RANGE)) {
5812 *min = ME4600_AO_MIN_RANGE;
5813 *max = ME4600_AO_MAX_RANGE;
5814 *maxdata = ME4600_AO_MAX_DATA;
5815 *range = 0;
5816 } else {
5817 PERROR("No matching range available.\n");
5818 return ME_ERRNO_NO_RANGE;
5819 }
5820 } else {
5821 PERROR("Invalid physical unit specified.\n");
5822 return ME_ERRNO_INVALID_UNIT;
5823 }
5824
5825 return ME_ERRNO_SUCCESS;
5826 }
5827
5828 static int me4600_ao_query_number_ranges(me_subdevice_t *subdevice,
5829 int unit, int *count)
5830 {
5831 me4600_ao_subdevice_t *instance;
5832
5833 instance = (me4600_ao_subdevice_t *) subdevice;
5834
5835 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5836
5837 if ((unit == ME_UNIT_VOLT) || (unit == ME_UNIT_ANY)) {
5838 *count = 1;
5839 } else {
5840 *count = 0;
5841 }
5842
5843 return ME_ERRNO_SUCCESS;
5844 }
5845
5846 static int me4600_ao_query_range_info(me_subdevice_t *subdevice,
5847 int range,
5848 int *unit,
5849 int *min, int *max, int *maxdata)
5850 {
5851 me4600_ao_subdevice_t *instance;
5852
5853 instance = (me4600_ao_subdevice_t *) subdevice;
5854
5855 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5856
5857 if (range == 0) {
5858 *unit = ME_UNIT_VOLT;
5859 *min = ME4600_AO_MIN_RANGE;
5860 *max = ME4600_AO_MAX_RANGE;
5861 *maxdata = ME4600_AO_MAX_DATA;
5862 } else {
5863 PERROR("Invalid range number specified.\n");
5864 return ME_ERRNO_INVALID_RANGE;
5865 }
5866
5867 return ME_ERRNO_SUCCESS;
5868 }
5869
5870 static int me4600_ao_query_timer(me_subdevice_t *subdevice,
5871 int timer,
5872 int *base_frequency,
5873 long long *min_ticks, long long *max_ticks)
5874 {
5875 me4600_ao_subdevice_t *instance;
5876
5877 instance = (me4600_ao_subdevice_t *) subdevice;
5878
5879 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5880
5881 if ((timer != ME_TIMER_ACQ_START) && (timer != ME_TIMER_CONV_START)) {
5882 PERROR("Invalid timer specified.\n");
5883 return ME_ERRNO_INVALID_TIMER;
5884 }
5885
5886 if (instance->fifo) { //Streaming device.
5887 *base_frequency = ME4600_AO_BASE_FREQUENCY;
5888 if (timer == ME_TIMER_ACQ_START) {
5889 *min_ticks = ME4600_AO_MIN_ACQ_TICKS;
5890 *max_ticks = ME4600_AO_MAX_ACQ_TICKS;
5891 } else if (timer == ME_TIMER_CONV_START) {
5892 *min_ticks = ME4600_AO_MIN_CHAN_TICKS;
5893 *max_ticks = ME4600_AO_MAX_CHAN_TICKS;
5894 }
5895 } else { //Not streaming device!
5896 *base_frequency = 0;
5897 *min_ticks = 0;
5898 *max_ticks = 0;
5899 }
5900
5901 return ME_ERRNO_SUCCESS;
5902 }
5903
5904 static int me4600_ao_query_number_channels(me_subdevice_t *subdevice,
5905 int *number)
5906 {
5907 me4600_ao_subdevice_t *instance;
5908 instance = (me4600_ao_subdevice_t *) subdevice;
5909
5910 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5911
5912 *number = 1;
5913
5914 return ME_ERRNO_SUCCESS;
5915 }
5916
5917 static int me4600_ao_query_subdevice_type(me_subdevice_t *subdevice,
5918 int *type, int *subtype)
5919 {
5920 me4600_ao_subdevice_t *instance;
5921
5922 instance = (me4600_ao_subdevice_t *) subdevice;
5923
5924 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5925
5926 *type = ME_TYPE_AO;
5927 *subtype = (instance->fifo) ? ME_SUBTYPE_STREAMING : ME_SUBTYPE_SINGLE;
5928
5929 return ME_ERRNO_SUCCESS;
5930 }
5931
5932 static int me4600_ao_query_subdevice_caps(me_subdevice_t *subdevice, int *caps)
5933 {
5934 me4600_ao_subdevice_t *instance;
5935 instance = (me4600_ao_subdevice_t *) subdevice;
5936
5937 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5938
5939 *caps =
5940 ME_CAPS_AO_TRIG_SYNCHRONOUS | ((instance->fifo) ? ME_CAPS_AO_FIFO :
5941 ME_CAPS_NONE);
5942
5943 return ME_ERRNO_SUCCESS;
5944 }
5945
5946 static int me4600_ao_query_subdevice_caps_args(struct me_subdevice *subdevice,
5947 int cap, int *args, int count)
5948 {
5949 me4600_ao_subdevice_t *instance;
5950 int err = ME_ERRNO_SUCCESS;
5951
5952 instance = (me4600_ao_subdevice_t *) subdevice;
5953
5954 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5955
5956 if (count != 1) {
5957 PERROR("Invalid capability argument count.\n");
5958 return ME_ERRNO_INVALID_CAP_ARG_COUNT;
5959 }
5960
5961 switch (cap) {
5962 case ME_CAP_AI_FIFO_SIZE:
5963 args[0] = (instance->fifo) ? ME4600_AO_FIFO_COUNT : 0;
5964 break;
5965
5966 case ME_CAP_AI_BUFFER_SIZE:
5967 args[0] =
5968 (instance->circ_buf.buf) ? ME4600_AO_CIRC_BUF_COUNT : 0;
5969 break;
5970
5971 default:
5972 PERROR("Invalid capability.\n");
5973 err = ME_ERRNO_INVALID_CAP;
5974 args[0] = 0;
5975 }
5976
5977 return err;
5978 }
ubuntu-zesty-kernel mirror