]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/staging/meilhaus/me4600_ao.c
projects / mirror_ubuntu-zesty-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge git://git.infradead.org/mtd-2.6
[mirror_ubuntu-zesty-kernel.git] / drivers / staging / meilhaus / me4600_ao.c
1 /**
2 * @file me4600_ao.c
3 *
4 * @brief ME-4000 analog output subdevice instance.
5 * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * @author Guenter Gebhardt
7 * @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
8 */
9
10 /*
11 * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
12 *
13 * This file is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28 #ifndef __KERNEL__
29 # define __KERNEL__
30 #endif
31
32 ///Common part. (For normal and Bosch builds.)
33
34 /* Includes
35 */
36
37 #include <linux/module.h>
38
39 #include <linux/slab.h>
40 #include <linux/spinlock.h>
41 #include <linux/io.h>
42 #include <linux/uaccess.h>
43 #include <linux/types.h>
44 #include <linux/version.h>
45 #include <linux/interrupt.h>
46 #include <linux/delay.h>
47
48 #include "medefines.h"
49 #include "meinternal.h"
50 #include "meerror.h"
51
52 #include "medebug.h"
53 #include "meids.h"
54 #include "me4600_reg.h"
55 #include "me4600_ao_reg.h"
56 #include "me4600_ao.h"
57
58 /* Defines
59 */
60
61 static int me4600_ao_query_range_by_min_max(me_subdevice_t *subdevice,
62 int unit,
63 int *min,
64 int *max, int *maxdata, int *range);
65
66 static int me4600_ao_query_number_ranges(me_subdevice_t *subdevice,
67 int unit, int *count);
68
69 static int me4600_ao_query_range_info(me_subdevice_t *subdevice,
70 int range,
71 int *unit,
72 int *min, int *max, int *maxdata);
73
74 static int me4600_ao_query_timer(me_subdevice_t *subdevice,
75 int timer,
76 int *base_frequency,
77 long long *min_ticks, long long *max_ticks);
78
79 static int me4600_ao_query_number_channels(me_subdevice_t *subdevice,
80 int *number);
81
82 static int me4600_ao_query_subdevice_type(me_subdevice_t *subdevice,
83 int *type, int *subtype);
84
85 static int me4600_ao_query_subdevice_caps(me_subdevice_t *subdevice,
86 int *caps);
87
88 static int me4600_ao_query_subdevice_caps_args(struct me_subdevice *subdevice,
89 int cap, int *args, int count);
90
91 #ifndef BOSCH
92 /// @note NORMAL BUILD
93 /// @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
94 /* Includes
95 */
96
97 # include <linux/workqueue.h>
98
99 /* Defines
100 */
101
102 /** Remove subdevice.
103 */
104 static void me4600_ao_destructor(struct me_subdevice *subdevice);
105
106 /** Reset subdevice. Stop all actions. Reset registry. Disable FIFO. Set output to 0V and status to 'none'.
107 */
108 static int me4600_ao_io_reset_subdevice(me_subdevice_t *subdevice,
109 struct file *filep, int flags);
110
111 /** Set output as single
112 */
113 static int me4600_ao_io_single_config(me_subdevice_t *subdevice,
114 struct file *filep,
115 int channel,
116 int single_config,
117 int ref,
118 int trig_chan,
119 int trig_type, int trig_edge, int flags);
120
121 /** Pass to user actual value of output.
122 */
123 static int me4600_ao_io_single_read(me_subdevice_t *subdevice,
124 struct file *filep,
125 int channel,
126 int *value, int time_out, int flags);
127
128 /** Write to output requed value.
129 */
130 static int me4600_ao_io_single_write(me_subdevice_t *subdevice,
131 struct file *filep,
132 int channel,
133 int value, int time_out, int flags);
134
135 /** Set output as streamed device.
136 */
137 static int me4600_ao_io_stream_config(me_subdevice_t *subdevice,
138 struct file *filep,
139 meIOStreamConfig_t *config_list,
140 int count,
141 meIOStreamTrigger_t *trigger,
142 int fifo_irq_threshold, int flags);
143
144 /** Wait for / Check empty space in buffer.
145 */
146 static int me4600_ao_io_stream_new_values(me_subdevice_t *subdevice,
147 struct file *filep,
148 int time_out, int *count, int flags);
149
150 /** Start streaming.
151 */
152 static int me4600_ao_io_stream_start(me_subdevice_t *subdevice,
153 struct file *filep,
154 int start_mode, int time_out, int flags);
155
156 /** Check actual state. / Wait for end.
157 */
158 static int me4600_ao_io_stream_status(me_subdevice_t *subdevice,
159 struct file *filep,
160 int wait,
161 int *status, int *values, int flags);
162
163 /** Stop streaming.
164 */
165 static int me4600_ao_io_stream_stop(me_subdevice_t *subdevice,
166 struct file *filep,
167 int stop_mode, int flags);
168
169 /** Write datas to buffor.
170 */
171 static int me4600_ao_io_stream_write(me_subdevice_t *subdevice,
172 struct file *filep,
173 int write_mode,
174 int *values, int *count, int flags);
175
176 /** Interrupt handler. Copy from buffer to FIFO.
177 */
178 static irqreturn_t me4600_ao_isr(int irq, void *dev_id);
179 /** Copy data from circular buffer to fifo (fast) in wraparound mode.
180 */
181 inline int ao_write_data_wraparound(me4600_ao_subdevice_t *instance, int count,
182 int start_pos);
183
184 /** Copy data from circular buffer to fifo (fast).
185 */
186 inline int ao_write_data(me4600_ao_subdevice_t *instance, int count,
187 int start_pos);
188
189 /** Copy data from circular buffer to fifo (slow).
190 */
191 inline int ao_write_data_pooling(me4600_ao_subdevice_t *instance, int count,
192 int start_pos);
193
194 /** Copy data from user space to circular buffer.
195 */
196 inline int ao_get_data_from_user(me4600_ao_subdevice_t *instance, int count,
197 int *user_values);
198
199 /** Stop presentation. Preserve FIFOs.
200 */
201 inline int ao_stop_immediately(me4600_ao_subdevice_t *instance);
202
203 /** Task for asynchronical state verifying.
204 */
205 static void me4600_ao_work_control_task(struct work_struct *work);
206 /* Functions
207 */
208
209 static int me4600_ao_io_reset_subdevice(me_subdevice_t *subdevice,
210 struct file *filep, int flags)
211 {
212 me4600_ao_subdevice_t *instance;
213 int err = ME_ERRNO_SUCCESS;
214 uint32_t tmp;
215
216 instance = (me4600_ao_subdevice_t *) subdevice;
217
218 PDEBUG("executed. idx=%d\n", instance->ao_idx);
219
220 if (flags) {
221 PERROR("Invalid flag specified.\n");
222 return ME_ERRNO_INVALID_FLAGS;
223 }
224
225 ME_SUBDEVICE_ENTER;
226
227 instance->status = ao_status_none;
228 instance->ao_control_task_flag = 0;
229 cancel_delayed_work(&instance->ao_control_task);
230 instance->timeout.delay = 0;
231 instance->timeout.start_time = jiffies;
232
233 //Stop state machine.
234 err = ao_stop_immediately(instance);
235
236 //Remove from synchronous start.
237 spin_lock(instance->preload_reg_lock);
238 tmp = inl(instance->preload_reg);
239 tmp &=
240 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
241 ao_idx);
242 outl(tmp, instance->preload_reg);
243 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
244 instance->preload_reg - instance->reg_base, tmp);
245 *instance->preload_flags &=
246 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
247 ao_idx);
248 spin_unlock(instance->preload_reg_lock);
249
250 //Set single mode, dissable FIFO, dissable external trigger, set output to analog, block interrupt.
251 outl(ME4600_AO_MODE_SINGLE | ME4600_AO_CTRL_BIT_STOP |
252 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_RESET_IRQ,
253 instance->ctrl_reg);
254 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
255 instance->ctrl_reg - instance->reg_base,
256 ME4600_AO_MODE_SINGLE | ME4600_AO_CTRL_BIT_STOP |
257 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
258 ME4600_AO_CTRL_BIT_RESET_IRQ);
259
260 //Set output to 0V
261 outl(0x8000, instance->single_reg);
262 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
263 instance->single_reg - instance->reg_base, 0x8000);
264
265 instance->circ_buf.head = 0;
266 instance->circ_buf.tail = 0;
267 instance->preloaded_count = 0;
268 instance->data_count = 0;
269 instance->single_value = 0x8000;
270 instance->single_value_in_fifo = 0x8000;
271
272 //Set status to signal that device is unconfigured.
273 instance->status = ao_status_none;
274
275 //Signal reset if user is on wait.
276 wake_up_interruptible_all(&instance->wait_queue);
277
278 ME_SUBDEVICE_EXIT;
279
280 return err;
281 }
282
283 static int me4600_ao_io_single_config(me_subdevice_t *subdevice,
284 struct file *filep,
285 int channel,
286 int single_config,
287 int ref,
288 int trig_chan,
289 int trig_type, int trig_edge, int flags)
290 {
291 me4600_ao_subdevice_t *instance;
292 int err = ME_ERRNO_SUCCESS;
293 uint32_t ctrl;
294 uint32_t sync;
295 unsigned long cpu_flags;
296
297 instance = (me4600_ao_subdevice_t *) subdevice;
298
299 PDEBUG("executed. idx=%d\n", instance->ao_idx);
300
301 // Checking parameters
302 if (flags) {
303 PERROR
304 ("Invalid flag specified. Must be ME_IO_SINGLE_CONFIG_NO_FLAGS.\n");
305 return ME_ERRNO_INVALID_FLAGS;
306 }
307
308 switch (trig_type) {
309 case ME_TRIG_TYPE_SW:
310 if (trig_edge != ME_TRIG_EDGE_NONE) {
311 PERROR
312 ("Invalid trigger edge. Software trigger has not edge.\n");
313 return ME_ERRNO_INVALID_TRIG_EDGE;
314 }
315 break;
316
317 case ME_TRIG_TYPE_EXT_DIGITAL:
318 switch (trig_edge) {
319 case ME_TRIG_EDGE_ANY:
320 case ME_TRIG_EDGE_RISING:
321 case ME_TRIG_EDGE_FALLING:
322 break;
323
324 default:
325 PERROR("Invalid trigger edge.\n");
326 return ME_ERRNO_INVALID_TRIG_EDGE;
327 }
328 break;
329
330 default:
331 PERROR
332 ("Invalid trigger type. Trigger must be software or digital.\n");
333 return ME_ERRNO_INVALID_TRIG_TYPE;
334 }
335
336 if ((trig_chan != ME_TRIG_CHAN_DEFAULT)
337 && (trig_chan != ME_TRIG_CHAN_SYNCHRONOUS)) {
338 PERROR("Invalid trigger channel specified.\n");
339 return ME_ERRNO_INVALID_TRIG_CHAN;
340 }
341
342 if (ref != ME_REF_AO_GROUND) {
343 PERROR
344 ("Invalid reference. Analog outputs have to have got REF_AO_GROUND.\n");
345 return ME_ERRNO_INVALID_REF;
346 }
347
348 if (single_config != 0) {
349 PERROR
350 ("Invalid single config specified. Only one range for anlog outputs is available.\n");
351 return ME_ERRNO_INVALID_SINGLE_CONFIG;
352 }
353
354 if (channel != 0) {
355 PERROR
356 ("Invalid channel number specified. Analog output have only one channel.\n");
357 return ME_ERRNO_INVALID_CHANNEL;
358 }
359
360 ME_SUBDEVICE_ENTER;
361
362 //Subdevice running in stream mode!
363 if ((instance->status >= ao_status_stream_run_wait)
364 && (instance->status < ao_status_stream_end)) {
365 PERROR("Subdevice is busy.\n");
366 ME_SUBDEVICE_EXIT;
367
368 return ME_ERRNO_SUBDEVICE_BUSY;
369 }
370 /// @note For single all calls (config and write) are erasing previous state!
371
372 instance->status = ao_status_none;
373
374 // Correct single mirrors
375 instance->single_value_in_fifo = instance->single_value;
376
377 //Stop device
378 err = ao_stop_immediately(instance);
379 if (err) {
380 PERROR_CRITICAL("FSM IS BUSY!\n");
381 ME_SUBDEVICE_EXIT;
382
383 return ME_ERRNO_SUBDEVICE_BUSY;
384 }
385 // Set control register.
386 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
387 // Set stop bit. Stop streaming mode.
388 ctrl = inl(instance->ctrl_reg);
389 //Reset all bits.
390 ctrl = ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP;
391
392 if (trig_type == ME_TRIG_TYPE_EXT_DIGITAL) {
393 PINFO("External digital trigger.\n");
394
395 if (trig_edge == ME_TRIG_EDGE_ANY) {
396 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE | ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
397 instance->ctrl_trg =
398 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
399 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
400 } else if (trig_edge == ME_TRIG_EDGE_FALLING) {
401 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
402 instance->ctrl_trg = ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
403 } else if (trig_edge == ME_TRIG_EDGE_RISING) {
404 instance->ctrl_trg = 0x0;
405 }
406 } else if (trig_type == ME_TRIG_TYPE_SW) {
407 PDEBUG("Software trigger\n");
408 instance->ctrl_trg = 0x0;
409 }
410
411 outl(ctrl, instance->ctrl_reg);
412 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
413 instance->ctrl_reg - instance->reg_base, ctrl);
414 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
415
416 // Set preload/synchronization register.
417 spin_lock(instance->preload_reg_lock);
418 if (trig_type == ME_TRIG_TYPE_SW) {
419 *instance->preload_flags &=
420 ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
421 } else //if (trig_type == ME_TRIG_TYPE_EXT_DIGITAL)
422 {
423 *instance->preload_flags |=
424 ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx;
425 }
426
427 if (trig_chan == ME_TRIG_CHAN_DEFAULT) {
428 *instance->preload_flags &=
429 ~(ME4600_AO_SYNC_HOLD << instance->ao_idx);
430 } else //if (trig_chan == ME_TRIG_CHAN_SYNCHRONOUS)
431 {
432 *instance->preload_flags |=
433 ME4600_AO_SYNC_HOLD << instance->ao_idx;
434 }
435
436 //Reset hardware register
437 sync = inl(instance->preload_reg);
438 PDEBUG_REG("preload_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
439 instance->preload_reg - instance->reg_base, sync);
440 sync &= ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
441 sync |= ME4600_AO_SYNC_HOLD << instance->ao_idx;
442
443 //Output configured in default (safe) mode.
444 outl(sync, instance->preload_reg);
445 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
446 instance->preload_reg - instance->reg_base, sync);
447 spin_unlock(instance->preload_reg_lock);
448
449 instance->status = ao_status_single_configured;
450
451 ME_SUBDEVICE_EXIT;
452
453 return err;
454 }
455
456 static int me4600_ao_io_single_read(me_subdevice_t *subdevice,
457 struct file *filep,
458 int channel,
459 int *value, int time_out, int flags)
460 {
461 me4600_ao_subdevice_t *instance;
462 int err = ME_ERRNO_SUCCESS;
463
464 unsigned long j;
465 unsigned long delay = 0;
466
467 instance = (me4600_ao_subdevice_t *) subdevice;
468
469 PDEBUG("executed. idx=%d\n", instance->ao_idx);
470
471 if (flags & ~ME_IO_SINGLE_NONBLOCKING) {
472 PERROR("Invalid flag specified. %d\n", flags);
473 return ME_ERRNO_INVALID_FLAGS;
474 }
475
476 if (time_out < 0) {
477 PERROR("Invalid timeout specified.\n");
478 return ME_ERRNO_INVALID_TIMEOUT;
479 }
480
481 if (channel != 0) {
482 PERROR("Invalid channel number specified.\n");
483 return ME_ERRNO_INVALID_CHANNEL;
484 }
485
486 if ((instance->status >= ao_status_stream_configured)
487 && (instance->status <= ao_status_stream_end)) {
488 PERROR("Subdevice not configured to work in single mode!\n");
489 return ME_ERRNO_PREVIOUS_CONFIG;
490 }
491
492 ME_SUBDEVICE_ENTER;
493 if ((!flags) && (instance->status == ao_status_single_run_wait)) { //Blocking mode. Wait for trigger.
494 if (time_out) {
495 delay = (time_out * HZ) / 1000;
496 if (delay == 0)
497 delay = 1;
498 }
499
500 j = jiffies;
501
502 //Only runing process will interrupt this call. Events are signaled when status change. This procedure has own timeout.
503 wait_event_interruptible_timeout(instance->wait_queue,
504 (instance->status !=
505 ao_status_single_run_wait),
506 (delay) ? delay +
507 1 : LONG_MAX);
508
509 if (instance->status == ao_status_none) {
510 PDEBUG("Single canceled.\n");
511 err = ME_ERRNO_CANCELLED;
512 }
513
514 if (signal_pending(current)) {
515 PERROR("Wait on start of state machine interrupted.\n");
516 instance->status = ao_status_none;
517 ao_stop_immediately(instance);
518 err = ME_ERRNO_SIGNAL;
519 }
520
521 if ((delay) && ((jiffies - j) >= delay)) {
522
523 PDEBUG("Timeout reached.\n");
524 err = ME_ERRNO_TIMEOUT;
525 }
526
527 *value =
528 (!err) ? instance->single_value_in_fifo : instance->
529 single_value;
530 } else { //Non-blocking mode
531 //Read value
532 *value = instance->single_value;
533 }
534
535 ME_SUBDEVICE_EXIT;
536
537 return err;
538 }
539
540 static int me4600_ao_io_single_write(me_subdevice_t *subdevice,
541 struct file *filep,
542 int channel,
543 int value, int time_out, int flags)
544 {
545 me4600_ao_subdevice_t *instance;
546 int err = ME_ERRNO_SUCCESS;
547 unsigned long cpu_flags;
548 unsigned long j;
549 unsigned long delay = 0x0;
550
551 //Registry handling variables.
552 uint32_t sync_mask;
553 uint32_t mode;
554 uint32_t tmp;
555 uint32_t ctrl;
556 uint32_t status;
557
558 instance = (me4600_ao_subdevice_t *) subdevice;
559
560 PDEBUG("executed. idx=%d\n", instance->ao_idx);
561
562 if (flags &
563 ~(ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS |
564 ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
565 PERROR("Invalid flag specified.\n");
566 return ME_ERRNO_INVALID_FLAGS;
567 }
568
569 if (time_out < 0) {
570 PERROR("Invalid timeout specified.\n");
571 return ME_ERRNO_INVALID_TIMEOUT;
572 }
573
574 if (value & ~ME4600_AO_MAX_DATA) {
575 PERROR("Invalid value provided.\n");
576 return ME_ERRNO_VALUE_OUT_OF_RANGE;
577 }
578
579 if (channel != 0) {
580 PERROR("Invalid channel number specified.\n");
581 return ME_ERRNO_INVALID_CHANNEL;
582 }
583
584 if ((instance->status == ao_status_none)
585 || (instance->status > ao_status_single_end)) {
586 PERROR("Subdevice not configured to work in single mode!\n");
587 return ME_ERRNO_PREVIOUS_CONFIG;
588 }
589
590 ME_SUBDEVICE_ENTER;
591
592 /// @note For single all calls (config and write) are erasing previous state!
593
594 //Cancel control task
595 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
596 instance->ao_control_task_flag = 0;
597 cancel_delayed_work(&instance->ao_control_task);
598
599 // Correct single mirrors
600 instance->single_value_in_fifo = instance->single_value;
601
602 //Stop device
603 err = ao_stop_immediately(instance);
604 if (err) {
605 PERROR_CRITICAL("FSM IS BUSY!\n");
606 ME_SUBDEVICE_EXIT;
607
608 return ME_ERRNO_SUBDEVICE_BUSY;
609 }
610
611 if (time_out) {
612 delay = (time_out * HZ) / 1000;
613
614 if (delay == 0)
615 delay = 1;
616 }
617
618 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
619
620 instance->single_value_in_fifo = value;
621
622 ctrl = inl(instance->ctrl_reg);
623
624 if (!instance->fifo) { //No FIFO
625 //Set the single mode.
626 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
627
628 //Write value
629 PDEBUG("Write value\n");
630 outl(value, instance->single_reg);
631 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
632 instance->reg_base,
633 instance->single_reg - instance->reg_base, value);
634 } else { // mix-mode
635 //Set speed
636 outl(ME4600_AO_MIN_CHAN_TICKS - 1, instance->timer_reg);
637 PDEBUG_REG("timer_reg outl(0x%lX+0x%lX)=0x%x\n",
638 instance->reg_base,
639 instance->timer_reg - instance->reg_base,
640 (int)ME4600_AO_MIN_CHAN_TICKS);
641 instance->hardware_stop_delay = HZ / 10; //100ms
642
643 status = inl(instance->status_reg);
644
645 //Set the continous mode.
646 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
647 ctrl |= ME4600_AO_MODE_CONTINUOUS;
648
649 //Prepare FIFO
650 if (!(ctrl & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO wasn't enabeled. Do it.
651 PINFO("Enableing FIFO.\n");
652 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
653 ctrl |=
654 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
655 ME4600_AO_CTRL_BIT_RESET_IRQ;
656 } else { //Check if FIFO is empty
657 if (status & ME4600_AO_STATUS_BIT_EF) { //FIFO not empty
658 PINFO("Reseting FIFO.\n");
659 ctrl &=
660 ~(ME4600_AO_CTRL_BIT_ENABLE_FIFO |
661 ME4600_AO_CTRL_BIT_ENABLE_IRQ);
662 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
663 outl(ctrl, instance->ctrl_reg);
664 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
665 instance->reg_base,
666 instance->ctrl_reg -
667 instance->reg_base, ctrl);
668
669 ctrl |=
670 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
671 ME4600_AO_CTRL_BIT_RESET_IRQ;
672 } else { //FIFO empty, only interrupt needs to be disabled!
673 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
674 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
675 }
676 }
677
678 outl(ctrl, instance->ctrl_reg);
679 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
680 instance->reg_base,
681 instance->ctrl_reg - instance->reg_base, ctrl);
682
683 //Write output - 1 value to FIFO
684 if (instance->ao_idx & 0x1) {
685 outl(value <<= 16, instance->fifo_reg);
686 PDEBUG_REG("fifo_reg outl(0x%lX+0x%lX)=0x%x\n",
687 instance->reg_base,
688 instance->fifo_reg - instance->reg_base,
689 value <<= 16);
690 } else {
691 outl(value, instance->fifo_reg);
692 PDEBUG_REG("fifo_reg outl(0x%lX+0x%lX)=0x%x\n",
693 instance->reg_base,
694 instance->fifo_reg - instance->reg_base,
695 value);
696 }
697 }
698
699 mode = *instance->preload_flags >> instance->ao_idx;
700 mode &= (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG);
701
702 PINFO("Triggering mode: 0x%x\n", mode);
703
704 spin_lock(instance->preload_reg_lock);
705 sync_mask = inl(instance->preload_reg);
706 PDEBUG_REG("preload_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
707 instance->preload_reg - instance->reg_base, sync_mask);
708 switch (mode) {
709 case 0: //Individual software
710 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
711
712 if (!instance->fifo) { // No FIFO - In this case resetting 'ME4600_AO_SYNC_HOLD' will trigger output.
713 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD) { //Now we can set correct mode. This is exception. It is set to synchronous and triggered later.
714 sync_mask &=
715 ~(ME4600_AO_SYNC_EXT_TRIG << instance->
716 ao_idx);
717 sync_mask |=
718 ME4600_AO_SYNC_HOLD << instance->ao_idx;
719
720 outl(sync_mask, instance->preload_reg);
721 PDEBUG_REG
722 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
723 instance->reg_base,
724 instance->preload_reg - instance->reg_base,
725 sync_mask);
726 }
727 } else { // FIFO
728 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != 0x0) { //Now we can set correct mode.
729 sync_mask &=
730 ~((ME4600_AO_SYNC_EXT_TRIG |
731 ME4600_AO_SYNC_HOLD) << instance->
732 ao_idx);
733
734 outl(sync_mask, instance->preload_reg);
735 PDEBUG_REG
736 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
737 instance->reg_base,
738 instance->preload_reg - instance->reg_base,
739 sync_mask);
740 }
741 }
742 instance->single_value = value;
743 break;
744
745 case ME4600_AO_SYNC_EXT_TRIG: //Individual hardware
746 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
747
748 if (!instance->fifo) { // No FIFO - In this case resetting 'ME4600_AO_SYNC_HOLD' will trigger output.
749 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD) { //Now we can set correct mode
750 sync_mask &=
751 ~(ME4600_AO_SYNC_EXT_TRIG << instance->
752 ao_idx);
753 sync_mask |=
754 ME4600_AO_SYNC_HOLD << instance->ao_idx;
755
756 outl(sync_mask, instance->preload_reg);
757 PDEBUG_REG
758 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
759 instance->reg_base,
760 instance->preload_reg - instance->reg_base,
761 sync_mask);
762 }
763 } else { // FIFO
764 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != 0x0) { //Now we can set correct mode.
765 sync_mask &=
766 ~((ME4600_AO_SYNC_EXT_TRIG |
767 ME4600_AO_SYNC_HOLD) << instance->
768 ao_idx);
769
770 outl(sync_mask, instance->preload_reg);
771 PDEBUG_REG
772 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
773 instance->reg_base,
774 instance->preload_reg - instance->reg_base,
775 sync_mask);
776 }
777 }
778 break;
779
780 case ME4600_AO_SYNC_HOLD: //Synchronous software
781 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
782
783 // if((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD)
784 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG)) { //Now we can set correct mode
785 sync_mask |=
786 ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx;
787 // sync_mask &= ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
788 sync_mask |= ME4600_AO_SYNC_HOLD << instance->ao_idx;
789
790 outl(sync_mask, instance->preload_reg);
791 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
792 instance->reg_base,
793 instance->preload_reg - instance->reg_base,
794 sync_mask);
795 }
796 break;
797
798 case (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG): //Synchronous hardware
799 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
800 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG)) { //Now we can set correct mode
801 sync_mask |=
802 (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
803 instance->ao_idx;
804
805 outl(sync_mask, instance->preload_reg);
806 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
807 instance->reg_base,
808 instance->preload_reg - instance->reg_base,
809 sync_mask);
810 }
811 break;
812 }
813 // spin_unlock(instance->preload_reg_lock); // Moved down.
814
815 //Activate ISM (remove 'stop' bits)
816 ctrl &=
817 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
818 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
819 ctrl |= instance->ctrl_trg;
820 ctrl &= ~(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
821 outl(ctrl, instance->ctrl_reg);
822 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
823 instance->ctrl_reg - instance->reg_base, ctrl);
824 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
825
826 /// @note When flag 'ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS' is set than output is triggered. ALWAYS!
827
828 if (!instance->fifo) { //No FIFO
829 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Fired all software synchronous outputs.
830 tmp = ~(*instance->preload_flags | 0xFFFF0000);
831 PINFO
832 ("Fired all software synchronous outputs. mask:0x%08x\n",
833 tmp);
834 tmp |= sync_mask & 0xFFFF0000;
835 // Add this channel to list
836 tmp &= ~(ME4600_AO_SYNC_HOLD << instance->ao_idx);
837
838 //Fire
839 PINFO("Software trigger.\n");
840 outl(tmp, instance->preload_reg);
841 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
842 instance->reg_base,
843 instance->preload_reg - instance->reg_base,
844 tmp);
845
846 //Restore save settings
847 outl(sync_mask, instance->preload_reg);
848 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
849 instance->reg_base,
850 instance->preload_reg - instance->reg_base,
851 sync_mask);
852 } else if (!mode) { // Add this channel to list
853 outl(sync_mask &
854 ~(ME4600_AO_SYNC_HOLD << instance->ao_idx),
855 instance->preload_reg);
856 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
857 instance->reg_base,
858 instance->preload_reg - instance->reg_base,
859 sync_mask & ~(ME4600_AO_SYNC_HOLD <<
860 instance->ao_idx));
861
862 //Fire
863 PINFO("Software trigger.\n");
864
865 //Restore save settings
866 outl(sync_mask, instance->preload_reg);
867 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
868 instance->reg_base,
869 instance->preload_reg - instance->reg_base,
870 sync_mask);
871 }
872
873 } else { // mix-mode - begin
874 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Trigger outputs
875 //Add channel to start list
876 outl(sync_mask |
877 (ME4600_AO_SYNC_HOLD << instance->ao_idx),
878 instance->preload_reg);
879 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
880 instance->reg_base,
881 instance->preload_reg - instance->reg_base,
882 sync_mask | (ME4600_AO_SYNC_HOLD <<
883 instance->ao_idx));
884
885 //Fire
886 PINFO
887 ("Fired all software synchronous outputs by software trigger.\n");
888 outl(0x8000, instance->single_reg);
889 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
890 instance->reg_base,
891 instance->single_reg - instance->reg_base,
892 0x8000);
893
894 //Restore save settings
895 outl(sync_mask, instance->preload_reg);
896 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
897 instance->reg_base,
898 instance->preload_reg - instance->reg_base,
899 sync_mask);
900 } else if (!mode) { //Trigger outputs
901 /* //Remove channel from start list //<== Unnecessary. Removed.
902 outl(sync_mask & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx), instance->preload_reg);
903 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, tmp);
904 */
905 //Fire
906 PINFO("Software trigger.\n");
907 outl(0x8000, instance->single_reg);
908 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
909 instance->reg_base,
910 instance->single_reg - instance->reg_base,
911 0x8000);
912
913 /* //Restore save settings //<== Unnecessary. Removed.
914 outl(sync_mask, instance->preload_reg);
915 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, sync_mask);
916 */
917 }
918 }
919 spin_unlock(instance->preload_reg_lock);
920
921 j = jiffies;
922 instance->status = ao_status_single_run_wait;
923
924 instance->timeout.delay = delay;
925 instance->timeout.start_time = j;
926 instance->ao_control_task_flag = 1;
927 queue_delayed_work(instance->me4600_workqueue,
928 &instance->ao_control_task, 1);
929
930 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
931
932 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
933 wait_event_interruptible_timeout(instance->wait_queue,
934 (instance->status !=
935 ao_status_single_run_wait),
936 (delay) ? delay +
937 1 : LONG_MAX);
938
939 if (((!delay) || ((jiffies - j) <= delay))
940 && (instance->status != ao_status_single_end)) {
941 PDEBUG("Single canceled.\n");
942 err = ME_ERRNO_CANCELLED;
943 }
944
945 if (signal_pending(current)) {
946 PERROR("Wait on start of state machine interrupted.\n");
947 instance->ao_control_task_flag = 0;
948 cancel_delayed_work(&instance->ao_control_task);
949 ao_stop_immediately(instance);
950 instance->status = ao_status_none;
951 err = ME_ERRNO_SIGNAL;
952 }
953
954 if ((delay) && ((jiffies - j) >= delay)) {
955 if (instance->status == ao_status_single_end) {
956 PDEBUG("Timeout reached.\n");
957 } else {
958 if ((jiffies - j) > delay) {
959 PERROR
960 ("Timeout reached. Not handled by control task!\n");
961 } else {
962 PERROR
963 ("Timeout reached. Signal come but status is strange: %d\n",
964 instance->status);
965 }
966
967 ao_stop_immediately(instance);
968 }
969
970 instance->ao_control_task_flag = 0;
971 cancel_delayed_work(&instance->ao_control_task);
972 instance->status = ao_status_single_end;
973 err = ME_ERRNO_TIMEOUT;
974 }
975 }
976
977 ME_SUBDEVICE_EXIT;
978
979 return err;
980 }
981
982 static int me4600_ao_io_stream_config(me_subdevice_t *subdevice,
983 struct file *filep,
984 meIOStreamConfig_t *config_list,
985 int count,
986 meIOStreamTrigger_t *trigger,
987 int fifo_irq_threshold, int flags)
988 {
989 me4600_ao_subdevice_t *instance;
990 int err = ME_ERRNO_SUCCESS;
991 uint32_t ctrl;
992 unsigned long cpu_flags;
993 uint64_t conv_ticks;
994 unsigned int conv_start_ticks_low = trigger->iConvStartTicksLow;
995 unsigned int conv_start_ticks_high = trigger->iConvStartTicksHigh;
996
997 instance = (me4600_ao_subdevice_t *) subdevice;
998
999 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1000
1001 if (!instance->fifo) {
1002 PERROR("Not a streaming ao.\n");
1003 return ME_ERRNO_NOT_SUPPORTED;
1004 }
1005
1006 conv_ticks =
1007 (uint64_t) conv_start_ticks_low +
1008 ((uint64_t) conv_start_ticks_high << 32);
1009
1010 if (flags &
1011 ~(ME_IO_STREAM_CONFIG_HARDWARE_ONLY | ME_IO_STREAM_CONFIG_WRAPAROUND
1012 | ME_IO_STREAM_CONFIG_BIT_PATTERN)) {
1013 PERROR("Invalid flags.\n");
1014 return ME_ERRNO_INVALID_FLAGS;
1015 }
1016
1017 if (flags & ME_IO_STREAM_CONFIG_HARDWARE_ONLY) {
1018 if (!(flags & ME_IO_STREAM_CONFIG_WRAPAROUND)) {
1019 PERROR
1020 ("Hardware ME_IO_STREAM_CONFIG_HARDWARE_ONLY has to be with ME_IO_STREAM_CONFIG_WRAPAROUND.\n");
1021 return ME_ERRNO_INVALID_FLAGS;
1022 }
1023
1024 if ((trigger->iAcqStopTrigType != ME_TRIG_TYPE_NONE)
1025 || (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE)) {
1026 PERROR
1027 ("Hardware wraparound mode must be in infinite mode.\n");
1028 return ME_ERRNO_INVALID_FLAGS;
1029 }
1030 }
1031
1032 if (count != 1) {
1033 PERROR("Only 1 entry in config list acceptable.\n");
1034 return ME_ERRNO_INVALID_CONFIG_LIST_COUNT;
1035 }
1036
1037 if (config_list[0].iChannel != 0) {
1038 PERROR("Invalid channel number specified.\n");
1039 return ME_ERRNO_INVALID_CHANNEL;
1040 }
1041
1042 if (config_list[0].iStreamConfig != 0) {
1043 PERROR("Only one range available.\n");
1044 return ME_ERRNO_INVALID_STREAM_CONFIG;
1045 }
1046
1047 if (config_list[0].iRef != ME_REF_AO_GROUND) {
1048 PERROR("Output is referenced to ground.\n");
1049 return ME_ERRNO_INVALID_REF;
1050 }
1051
1052 if ((trigger->iAcqStartTicksLow != 0)
1053 || (trigger->iAcqStartTicksHigh != 0)) {
1054 PERROR
1055 ("Invalid acquisition start trigger argument specified.\n");
1056 return ME_ERRNO_INVALID_ACQ_START_ARG;
1057 }
1058
1059 if (config_list[0].iFlags) {
1060 PERROR("Invalid config list flag.\n");
1061 return ME_ERRNO_INVALID_FLAGS;
1062 }
1063
1064 switch (trigger->iAcqStartTrigType) {
1065 case ME_TRIG_TYPE_SW:
1066 if (trigger->iAcqStartTrigEdge != ME_TRIG_EDGE_NONE) {
1067 PERROR
1068 ("Invalid acquisition start trigger edge specified.\n");
1069 return ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
1070 }
1071 break;
1072
1073 case ME_TRIG_TYPE_EXT_DIGITAL:
1074 switch (trigger->iAcqStartTrigEdge) {
1075 case ME_TRIG_EDGE_ANY:
1076 case ME_TRIG_EDGE_RISING:
1077 case ME_TRIG_EDGE_FALLING:
1078 break;
1079
1080 default:
1081 PERROR
1082 ("Invalid acquisition start trigger edge specified.\n");
1083 return ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
1084 }
1085 break;
1086
1087 default:
1088 PERROR("Invalid acquisition start trigger type specified.\n");
1089 return ME_ERRNO_INVALID_ACQ_START_TRIG_TYPE;
1090 }
1091
1092 if (trigger->iScanStartTrigType != ME_TRIG_TYPE_FOLLOW) {
1093 PERROR("Invalid scan start trigger type specified.\n");
1094 return ME_ERRNO_INVALID_SCAN_START_TRIG_TYPE;
1095 }
1096
1097 if (trigger->iConvStartTrigType != ME_TRIG_TYPE_TIMER) {
1098 PERROR("Invalid conv start trigger type specified.\n");
1099 return ME_ERRNO_INVALID_CONV_START_TRIG_TYPE;
1100 }
1101
1102 if ((conv_ticks < ME4600_AO_MIN_CHAN_TICKS)
1103 || (conv_ticks > ME4600_AO_MAX_CHAN_TICKS)) {
1104 PERROR("Invalid conv start trigger argument specified.\n");
1105 return ME_ERRNO_INVALID_CONV_START_ARG;
1106 }
1107
1108 if (trigger->iAcqStartTicksLow || trigger->iAcqStartTicksHigh) {
1109 PERROR("Invalid acq start trigger argument specified.\n");
1110 return ME_ERRNO_INVALID_ACQ_START_ARG;
1111 }
1112
1113 if (trigger->iScanStartTicksLow || trigger->iScanStartTicksHigh) {
1114 PERROR("Invalid scan start trigger argument specified.\n");
1115 return ME_ERRNO_INVALID_SCAN_START_ARG;
1116 }
1117
1118 switch (trigger->iScanStopTrigType) {
1119 case ME_TRIG_TYPE_NONE:
1120 if (trigger->iScanStopCount != 0) {
1121 PERROR("Invalid scan stop count specified.\n");
1122 return ME_ERRNO_INVALID_SCAN_STOP_ARG;
1123 }
1124 break;
1125
1126 case ME_TRIG_TYPE_COUNT:
1127 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1128 if (trigger->iScanStopCount <= 0) {
1129 PERROR("Invalid scan stop count specified.\n");
1130 return ME_ERRNO_INVALID_SCAN_STOP_ARG;
1131 }
1132 } else {
1133 PERROR("The continous mode has not 'scan' contects.\n");
1134 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1135 }
1136 break;
1137
1138 default:
1139 PERROR("Invalid scan stop trigger type specified.\n");
1140 return ME_ERRNO_INVALID_SCAN_STOP_TRIG_TYPE;
1141 }
1142
1143 switch (trigger->iAcqStopTrigType) {
1144 case ME_TRIG_TYPE_NONE:
1145 if (trigger->iAcqStopCount != 0) {
1146 PERROR("Invalid acq stop count specified.\n");
1147 return ME_ERRNO_INVALID_ACQ_STOP_ARG;
1148 }
1149 break;
1150
1151 case ME_TRIG_TYPE_COUNT:
1152 if (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE) {
1153 PERROR("Invalid acq stop trigger type specified.\n");
1154 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1155 }
1156
1157 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1158 if (trigger->iAcqStopCount <= 0) {
1159 PERROR
1160 ("The continous mode has not 'scan' contects.\n");
1161 return ME_ERRNO_INVALID_ACQ_STOP_ARG;
1162 }
1163 }
1164 break;
1165
1166 default:
1167 PERROR("Invalid acq stop trigger type specified.\n");
1168 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1169 }
1170
1171 switch (trigger->iAcqStartTrigChan) {
1172 case ME_TRIG_CHAN_DEFAULT:
1173 case ME_TRIG_CHAN_SYNCHRONOUS:
1174 break;
1175
1176 default:
1177 PERROR("Invalid acq start trigger channel specified.\n");
1178 return ME_ERRNO_INVALID_ACQ_START_TRIG_CHAN;
1179 }
1180
1181 ME_SUBDEVICE_ENTER;
1182
1183 if ((flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) && !instance->bitpattern) {
1184 PERROR("This subdevice not support output redirection.\n");
1185 ME_SUBDEVICE_EXIT;
1186 return ME_ERRNO_INVALID_FLAGS;
1187 }
1188 //Stop device
1189
1190 //Cancel control task
1191 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
1192 instance->ao_control_task_flag = 0;
1193 cancel_delayed_work(&instance->ao_control_task);
1194
1195 //Check if state machine is stopped.
1196 err = ao_stop_immediately(instance);
1197 if (err) {
1198 PERROR_CRITICAL("FSM IS BUSY!\n");
1199 ME_SUBDEVICE_EXIT;
1200
1201 return ME_ERRNO_SUBDEVICE_BUSY;
1202 }
1203
1204 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1205 //Reset control register. Block all actions. Disable IRQ. Disable FIFO.
1206 ctrl =
1207 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP |
1208 ME4600_AO_CTRL_BIT_RESET_IRQ;
1209 outl(ctrl, instance->ctrl_reg);
1210 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1211 instance->ctrl_reg - instance->reg_base, ctrl);
1212
1213 //This is paranoic, but to be sure.
1214 instance->preloaded_count = 0;
1215 instance->data_count = 0;
1216 instance->circ_buf.head = 0;
1217 instance->circ_buf.tail = 0;
1218
1219 /* Set mode. */
1220 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) { //Wraparound
1221 if (flags & ME_IO_STREAM_CONFIG_HARDWARE_ONLY) { //Hardware wraparound
1222 PINFO("Hardware wraparound.\n");
1223 ctrl |= ME4600_AO_MODE_WRAPAROUND;
1224 instance->mode = ME4600_AO_HW_WRAP_MODE;
1225 } else { //Software wraparound
1226 PINFO("Software wraparound.\n");
1227 ctrl |= ME4600_AO_MODE_CONTINUOUS;
1228 instance->mode = ME4600_AO_SW_WRAP_MODE;
1229 }
1230 } else { //Continous
1231 PINFO("Continous.\n");
1232 ctrl |= ME4600_AO_MODE_CONTINUOUS;
1233 instance->mode = ME4600_AO_CONTINOUS;
1234 }
1235
1236 //Set the trigger edge.
1237 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_EXT_DIGITAL) { //Set the trigger type and edge for external trigger.
1238 PINFO("External digital trigger.\n");
1239 instance->start_mode = ME4600_AO_EXT_TRIG;
1240 /*
1241 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
1242 */
1243 switch (trigger->iAcqStartTrigEdge) {
1244 case ME_TRIG_EDGE_RISING:
1245 PINFO("Set the trigger edge: rising.\n");
1246 instance->ctrl_trg = 0x0;
1247 break;
1248
1249 case ME_TRIG_EDGE_FALLING:
1250 PINFO("Set the trigger edge: falling.\n");
1251 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
1252 instance->ctrl_trg = ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
1253 break;
1254
1255 case ME_TRIG_EDGE_ANY:
1256 PINFO("Set the trigger edge: both edges.\n");
1257 // ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE | ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
1258 instance->ctrl_trg =
1259 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
1260 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
1261 break;
1262 }
1263 } else {
1264 PINFO("Internal software trigger.\n");
1265 instance->start_mode = 0;
1266 }
1267
1268 //Set the stop mode and value.
1269 if (trigger->iAcqStopTrigType == ME_TRIG_TYPE_COUNT) { //Amount of data
1270 instance->stop_mode = ME4600_AO_ACQ_STOP_MODE;
1271 instance->stop_count = trigger->iAcqStopCount;
1272 } else if (trigger->iScanStopTrigType == ME_TRIG_TYPE_COUNT) { //Amount of 'scans'
1273 instance->stop_mode = ME4600_AO_SCAN_STOP_MODE;
1274 instance->stop_count = trigger->iScanStopCount;
1275 } else { //Infinite
1276 instance->stop_mode = ME4600_AO_INF_STOP_MODE;
1277 instance->stop_count = 0;
1278 }
1279
1280 PINFO("Stop count: %d.\n", instance->stop_count);
1281
1282 if (trigger->iAcqStartTrigChan == ME_TRIG_CHAN_SYNCHRONOUS) { //Synchronous start
1283 instance->start_mode |= ME4600_AO_SYNC_HOLD;
1284 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_EXT_DIGITAL) { //Externaly triggered
1285 PINFO("Synchronous start. Externaly trigger active.\n");
1286 instance->start_mode |= ME4600_AO_SYNC_EXT_TRIG;
1287 }
1288 #ifdef MEDEBUG_INFO
1289 else {
1290 PINFO
1291 ("Synchronous start. Externaly trigger dissabled.\n");
1292 }
1293 #endif
1294
1295 }
1296 //Set speed
1297 outl(conv_ticks - 2, instance->timer_reg);
1298 PDEBUG_REG("timer_reg outl(0x%lX+0x%lX)=0x%llx\n", instance->reg_base,
1299 instance->timer_reg - instance->reg_base, conv_ticks - 2);
1300 instance->hardware_stop_delay = (int)(conv_ticks * HZ) / ME4600_AO_BASE_FREQUENCY; //<== MUST be with cast!
1301
1302 //Conect outputs to analog or digital port.
1303 if (flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) {
1304 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_DO;
1305 }
1306 // Write the control word
1307 outl(ctrl, instance->ctrl_reg);
1308 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1309 instance->ctrl_reg - instance->reg_base, ctrl);
1310
1311 //Set status.
1312 instance->status = ao_status_stream_configured;
1313 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
1314
1315 ME_SUBDEVICE_EXIT;
1316
1317 return err;
1318 }
1319
1320 static int me4600_ao_io_stream_new_values(me_subdevice_t *subdevice,
1321 struct file *filep,
1322 int time_out, int *count, int flags)
1323 {
1324 me4600_ao_subdevice_t *instance;
1325 int err = ME_ERRNO_SUCCESS;
1326 long t = 0;
1327 long j;
1328
1329 instance = (me4600_ao_subdevice_t *) subdevice;
1330
1331 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1332
1333 if (!instance->fifo) {
1334 PERROR("Not a streaming ao.\n");
1335 return ME_ERRNO_NOT_SUPPORTED;
1336 }
1337
1338 if (flags) {
1339 PERROR("Invalid flag specified.\n");
1340 return ME_ERRNO_INVALID_FLAGS;
1341 }
1342
1343 if (!instance->circ_buf.buf) {
1344 PERROR("Circular buffer not exists.\n");
1345 return ME_ERRNO_INTERNAL;
1346 }
1347
1348 if (time_out < 0) {
1349 PERROR("Invalid time_out specified.\n");
1350 return ME_ERRNO_INVALID_TIMEOUT;
1351 }
1352
1353 ME_SUBDEVICE_ENTER;
1354
1355 if (me_circ_buf_space(&instance->circ_buf)) { //The buffer is NOT full.
1356 *count = me_circ_buf_space(&instance->circ_buf);
1357 } else { //The buffer is full.
1358 if (time_out) {
1359 t = (time_out * HZ) / 1000;
1360
1361 if (t == 0)
1362 t = 1;
1363 } else { //Max time.
1364 t = LONG_MAX;
1365 }
1366
1367 *count = 0;
1368
1369 j = jiffies;
1370
1371 //Only runing process will interrupt this call. Interrupts are when FIFO HF is signaled.
1372 wait_event_interruptible_timeout(instance->wait_queue,
1373 ((me_circ_buf_space
1374 (&instance->circ_buf))
1375 || !(inl(instance->status_reg)
1376 &
1377 ME4600_AO_STATUS_BIT_FSM)),
1378 t);
1379
1380 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
1381 PERROR("AO subdevice is not running.\n");
1382 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
1383 } else if (signal_pending(current)) {
1384 PERROR("Wait on values interrupted from signal.\n");
1385 instance->status = ao_status_none;
1386 ao_stop_immediately(instance);
1387 err = ME_ERRNO_SIGNAL;
1388 } else if ((jiffies - j) >= t) {
1389 PERROR("Wait on values timed out.\n");
1390 err = ME_ERRNO_TIMEOUT;
1391 } else { //Uff... all is good. Inform user about empty space.
1392 *count = me_circ_buf_space(&instance->circ_buf);
1393 }
1394 }
1395
1396 ME_SUBDEVICE_EXIT;
1397
1398 return err;
1399 }
1400
1401 static int me4600_ao_io_stream_start(me_subdevice_t *subdevice,
1402 struct file *filep,
1403 int start_mode, int time_out, int flags)
1404 {
1405 me4600_ao_subdevice_t *instance;
1406 int err = ME_ERRNO_SUCCESS;
1407 unsigned long cpu_flags = 0;
1408 uint32_t status;
1409 uint32_t ctrl;
1410 uint32_t synch;
1411 int count = 0;
1412 int circ_buffer_count;
1413
1414 unsigned long ref;
1415 unsigned long delay = 0;
1416
1417 instance = (me4600_ao_subdevice_t *) subdevice;
1418
1419 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1420
1421 if (!instance->fifo) {
1422 PERROR("Not a streaming ao.\n");
1423 return ME_ERRNO_NOT_SUPPORTED;
1424 }
1425
1426 if (flags & ~ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
1427 PERROR("Invalid flags.\n");
1428 return ME_ERRNO_INVALID_FLAGS;
1429 }
1430
1431 if (time_out < 0) {
1432 PERROR("Invalid timeout specified.\n");
1433 return ME_ERRNO_INVALID_TIMEOUT;
1434 }
1435
1436 if ((start_mode != ME_START_MODE_BLOCKING)
1437 && (start_mode != ME_START_MODE_NONBLOCKING)) {
1438 PERROR("Invalid start mode specified.\n");
1439 return ME_ERRNO_INVALID_START_MODE;
1440 }
1441
1442 if (time_out) {
1443 delay = (time_out * HZ) / 1000;
1444 if (delay == 0)
1445 delay = 1;
1446 }
1447
1448 switch (instance->status) { //Checking actual mode.
1449 case ao_status_stream_configured:
1450 case ao_status_stream_end:
1451 //Correct modes!
1452 break;
1453
1454 //The device is in wrong mode.
1455 case ao_status_none:
1456 case ao_status_single_configured:
1457 case ao_status_single_run_wait:
1458 case ao_status_single_run:
1459 case ao_status_single_end_wait:
1460 PERROR
1461 ("Subdevice must be preinitialize correctly for streaming.\n");
1462 return ME_ERRNO_PREVIOUS_CONFIG;
1463
1464 case ao_status_stream_fifo_error:
1465 case ao_status_stream_buffer_error:
1466 case ao_status_stream_error:
1467 PDEBUG("Before restart broke stream 'STOP' must be caled.\n");
1468 return ME_STATUS_ERROR;
1469
1470 case ao_status_stream_run_wait:
1471 case ao_status_stream_run:
1472 case ao_status_stream_end_wait:
1473 PDEBUG("Stream is already working.\n");
1474 return ME_ERRNO_SUBDEVICE_BUSY;
1475
1476 default:
1477 instance->status = ao_status_stream_error;
1478 PERROR_CRITICAL("Status is in wrong state!\n");
1479 return ME_ERRNO_INTERNAL;
1480
1481 }
1482
1483 ME_SUBDEVICE_ENTER;
1484
1485 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1486 instance->circ_buf.tail += instance->preloaded_count;
1487 instance->circ_buf.tail &= instance->circ_buf.mask;
1488 }
1489 circ_buffer_count = me_circ_buf_values(&instance->circ_buf);
1490
1491 if (!circ_buffer_count && !instance->preloaded_count) { //No values in buffer
1492 ME_SUBDEVICE_EXIT;
1493 PERROR("No values in buffer!\n");
1494 return ME_ERRNO_LACK_OF_RESOURCES;
1495 }
1496
1497 //Cancel control task
1498 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
1499 instance->ao_control_task_flag = 0;
1500 cancel_delayed_work(&instance->ao_control_task);
1501
1502 //Stop device
1503 err = ao_stop_immediately(instance);
1504 if (err) {
1505 PERROR_CRITICAL("FSM IS BUSY!\n");
1506 ME_SUBDEVICE_EXIT;
1507
1508 return ME_ERRNO_SUBDEVICE_BUSY;
1509 }
1510 //Set values for single_read()
1511 instance->single_value = ME4600_AO_MAX_DATA + 1;
1512 instance->single_value_in_fifo = ME4600_AO_MAX_DATA + 1;
1513
1514 //Setting stop points
1515 if (instance->stop_mode == ME4600_AO_SCAN_STOP_MODE) {
1516 instance->stop_data_count =
1517 instance->stop_count * circ_buffer_count;
1518 } else {
1519 instance->stop_data_count = instance->stop_count;
1520 }
1521
1522 if ((instance->stop_data_count != 0)
1523 && (instance->stop_data_count < circ_buffer_count)) {
1524 PERROR("More data in buffer than previously set limit!\n");
1525 }
1526
1527 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1528 ctrl = inl(instance->ctrl_reg);
1529 //Check FIFO
1530 if (!(ctrl & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO wasn't enabeled. Do it. <= This should be done by user call with ME_WRITE_MODE_PRELOAD
1531 PINFO("Enableing FIFO.\n");
1532 ctrl |=
1533 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
1534 ME4600_AO_CTRL_BIT_RESET_IRQ;
1535
1536 instance->preloaded_count = 0;
1537 instance->data_count = 0;
1538 } else { //Block IRQ
1539 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
1540 }
1541 outl(ctrl, instance->ctrl_reg);
1542 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1543 instance->ctrl_reg - instance->reg_base,
1544 ctrl | ME4600_AO_CTRL_BIT_RESET_IRQ);
1545
1546 //Fill FIFO <= Generaly this should be done by user pre-load call but this is second place to do it.
1547 status = inl(instance->status_reg);
1548 if (!(status & ME4600_AO_STATUS_BIT_EF)) { //FIFO empty
1549 if (instance->stop_data_count == 0) {
1550 count = ME4600_AO_FIFO_COUNT;
1551 } else {
1552 count =
1553 (ME4600_AO_FIFO_COUNT <
1554 instance->
1555 stop_data_count) ? ME4600_AO_FIFO_COUNT :
1556 instance->stop_data_count;
1557 }
1558
1559 //Copy data
1560 count =
1561 ao_write_data(instance, count, instance->preloaded_count);
1562
1563 if (count < 0) { //This should never happend!
1564 PERROR_CRITICAL("COPY FINISH WITH ERROR!\n");
1565 spin_unlock_irqrestore(&instance->subdevice_lock,
1566 cpu_flags);
1567 ME_SUBDEVICE_EXIT;
1568 return ME_ERRNO_INTERNAL;
1569 }
1570 }
1571 //Set pre-load features.
1572 spin_lock(instance->preload_reg_lock);
1573 synch = inl(instance->preload_reg);
1574 synch &=
1575 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
1576 ao_idx);
1577 synch |=
1578 (instance->start_mode & ~ME4600_AO_EXT_TRIG) << instance->ao_idx;
1579 outl(synch, instance->preload_reg);
1580 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1581 instance->preload_reg - instance->reg_base, synch);
1582 spin_unlock(instance->preload_reg_lock);
1583
1584 //Default count is '0'
1585 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1586 instance->preloaded_count = 0;
1587 instance->circ_buf.tail += count;
1588 instance->circ_buf.tail &= instance->circ_buf.mask;
1589 } else { //Wraparound
1590 instance->preloaded_count += count;
1591 instance->data_count += count;
1592
1593 //Special case: Infinite wraparound with less than FIFO datas always should runs in hardware mode.
1594 if ((instance->stop_mode == ME4600_AO_INF_STOP_MODE)
1595 && (circ_buffer_count <= ME4600_AO_FIFO_COUNT)) { //Change to hardware wraparound
1596 PDEBUG
1597 ("Changeing mode from software wraparound to hardware wraparound.\n");
1598 //Copy all data
1599 count =
1600 ao_write_data(instance, circ_buffer_count,
1601 instance->preloaded_count);
1602 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
1603 ctrl |= ME4600_AO_MODE_WRAPAROUND;
1604 }
1605
1606 if (instance->preloaded_count == me_circ_buf_values(&instance->circ_buf)) { //Reset position indicator.
1607 instance->preloaded_count = 0;
1608 } else if (instance->preloaded_count > me_circ_buf_values(&instance->circ_buf)) { //This should never happend!
1609 PERROR_CRITICAL
1610 ("PRELOADED MORE VALUES THAN ARE IN BUFFER!\n");
1611 spin_unlock_irqrestore(&instance->subdevice_lock,
1612 cpu_flags);
1613 ME_SUBDEVICE_EXIT;
1614 return ME_ERRNO_INTERNAL;
1615 }
1616 }
1617
1618 //Set status to 'wait for start'
1619 instance->status = ao_status_stream_run_wait;
1620
1621 status = inl(instance->status_reg);
1622 //Start state machine and interrupts
1623 ctrl &= ~(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
1624 if (instance->start_mode == ME4600_AO_EXT_TRIG) { // External trigger.
1625 PINFO("External trigger.\n");
1626 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
1627 }
1628 if (!(status & ME4600_AO_STATUS_BIT_HF)) { //More than half!
1629 if ((ctrl & ME4600_AO_CTRL_MODE_MASK) == ME4600_AO_MODE_CONTINUOUS) { //Enable IRQ only when hardware_continous is set and FIFO is more than half
1630 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1631 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1632 }
1633 }
1634 outl(ctrl, instance->ctrl_reg);
1635 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1636 instance->ctrl_reg - instance->reg_base, ctrl);
1637 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
1638
1639 //Trigger output
1640 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Trigger outputs
1641 spin_lock(instance->preload_reg_lock);
1642 synch = inl(instance->preload_reg);
1643 //Add channel to start list
1644 outl(synch | (ME4600_AO_SYNC_HOLD << instance->ao_idx),
1645 instance->preload_reg);
1646 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
1647 instance->reg_base,
1648 instance->preload_reg - instance->reg_base,
1649 synch | (ME4600_AO_SYNC_HOLD << instance->ao_idx));
1650
1651 //Fire
1652 PINFO
1653 ("Fired all software synchronous outputs by software trigger.\n");
1654 outl(0x8000, instance->single_reg);
1655 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
1656 instance->reg_base,
1657 instance->single_reg - instance->reg_base, 0x8000);
1658
1659 //Restore save settings
1660 outl(synch, instance->preload_reg);
1661 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
1662 instance->reg_base,
1663 instance->preload_reg - instance->reg_base, synch);
1664 spin_unlock(instance->preload_reg_lock);
1665 } else if (!instance->start_mode) { //Trigger outputs
1666 /*
1667 //Remove channel from start list. // <== Unnecessary. Removed.
1668 spin_lock(instance->preload_reg_lock);
1669 synch = inl(instance->preload_reg);
1670 outl(synch & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx), instance->preload_reg);
1671 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, synch & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx));
1672 */
1673 //Fire
1674 PINFO("Software trigger.\n");
1675 outl(0x8000, instance->single_reg);
1676 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
1677 instance->reg_base,
1678 instance->single_reg - instance->reg_base, 0x8000);
1679
1680 /*
1681 //Restore save settings. // <== Unnecessary. Removed.
1682 outl(synch, instance->preload_reg);
1683 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, synch);
1684 spin_unlock(instance->preload_reg_lock);
1685 */
1686 }
1687 // Set control task's timeout
1688 ref = jiffies;
1689 instance->timeout.delay = delay;
1690 instance->timeout.start_time = ref;
1691
1692 if (status & ME4600_AO_STATUS_BIT_HF) { //Less than half but not empty!
1693 PINFO("Less than half.\n");
1694 if (instance->stop_data_count != 0) {
1695 count = ME4600_AO_FIFO_COUNT / 2;
1696 } else {
1697 count =
1698 ((ME4600_AO_FIFO_COUNT / 2) <
1699 instance->stop_data_count) ? ME4600_AO_FIFO_COUNT /
1700 2 : instance->stop_data_count;
1701 }
1702
1703 //Copy data
1704 count =
1705 ao_write_data(instance, count, instance->preloaded_count);
1706
1707 if (count < 0) { //This should never happend!
1708 PERROR_CRITICAL("COPY FINISH WITH ERROR!\n");
1709 ME_SUBDEVICE_EXIT;
1710 return ME_ERRNO_INTERNAL;
1711 }
1712
1713 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1714 instance->circ_buf.tail += count;
1715 instance->circ_buf.tail &= instance->circ_buf.mask;
1716 } else { //Wraparound
1717 instance->data_count += count;
1718 instance->preloaded_count += count;
1719
1720 if (instance->preloaded_count == me_circ_buf_values(&instance->circ_buf)) { //Reset position indicator.
1721 instance->preloaded_count = 0;
1722 } else if (instance->preloaded_count > me_circ_buf_values(&instance->circ_buf)) { //This should never happend!
1723 PERROR_CRITICAL
1724 ("PRELOADED MORE VALUES THAN ARE IN BUFFER!\n");
1725 ME_SUBDEVICE_EXIT;
1726 return ME_ERRNO_INTERNAL;
1727 }
1728 }
1729
1730 status = inl(instance->status_reg);
1731 if (!(status & ME4600_AO_STATUS_BIT_HF)) { //More than half!
1732 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1733 ctrl = inl(instance->ctrl_reg);
1734 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1735 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1736 outl(ctrl, instance->ctrl_reg);
1737 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1738 instance->reg_base,
1739 instance->ctrl_reg - instance->reg_base,
1740 ctrl);
1741 spin_unlock_irqrestore(&instance->subdevice_lock,
1742 cpu_flags);
1743 }
1744 }
1745 //Special case: Limited wraparound with less than HALF FIFO datas need work around to generate first interrupt.
1746 if ((instance->stop_mode != ME4600_AO_INF_STOP_MODE)
1747 && (instance->mode == ME4600_AO_SW_WRAP_MODE)
1748 && (circ_buffer_count <= (ME4600_AO_FIFO_COUNT / 2))) { //Put more data to FIFO
1749 PINFO("Limited wraparound with less than HALF FIFO datas.\n");
1750 if (instance->preloaded_count) { //This should never happend!
1751 PERROR_CRITICAL
1752 ("ERROR WHEN LOADING VALUES FOR WRAPAROUND!\n");
1753 ME_SUBDEVICE_EXIT;
1754 return ME_ERRNO_INTERNAL;
1755 }
1756
1757 while (instance->stop_data_count > instance->data_count) { //Maximum data not set jet.
1758 //Copy to buffer
1759 if (circ_buffer_count != ao_write_data(instance, circ_buffer_count, 0)) { //This should never happend!
1760 PERROR_CRITICAL
1761 ("ERROR WHEN LOADING VALUES FOR WRAPAROUND!\n");
1762 ME_SUBDEVICE_EXIT;
1763 return ME_ERRNO_INTERNAL;
1764 }
1765 instance->data_count += circ_buffer_count;
1766
1767 if (!((status = inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_HF)) { //FIFO is more than half. Enable IRQ and end copy.
1768 spin_lock_irqsave(&instance->subdevice_lock,
1769 cpu_flags);
1770 ctrl = inl(instance->ctrl_reg);
1771 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1772 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1773 outl(ctrl, instance->ctrl_reg);
1774 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1775 instance->reg_base,
1776 instance->ctrl_reg -
1777 instance->reg_base, ctrl);
1778 spin_unlock_irqrestore(&instance->
1779 subdevice_lock,
1780 cpu_flags);
1781 break;
1782 }
1783 }
1784 }
1785 // Schedule control task.
1786 instance->ao_control_task_flag = 1;
1787 queue_delayed_work(instance->me4600_workqueue,
1788 &instance->ao_control_task, 1);
1789
1790 if (start_mode == ME_START_MODE_BLOCKING) { //Wait for start.
1791 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
1792 wait_event_interruptible_timeout(instance->wait_queue,
1793 (instance->status !=
1794 ao_status_stream_run_wait),
1795 (delay) ? delay +
1796 1 : LONG_MAX);
1797
1798 if ((instance->status != ao_status_stream_run)
1799 && (instance->status != ao_status_stream_end)) {
1800 PDEBUG("Starting stream canceled. %d\n",
1801 instance->status);
1802 err = ME_ERRNO_CANCELLED;
1803 }
1804
1805 if (signal_pending(current)) {
1806 PERROR("Wait on start of state machine interrupted.\n");
1807 instance->status = ao_status_none;
1808 ao_stop_immediately(instance);
1809 err = ME_ERRNO_SIGNAL;
1810 } else if ((delay) && ((jiffies - ref) >= delay)) {
1811 if (instance->status != ao_status_stream_run) {
1812 if (instance->status == ao_status_stream_end) {
1813 PDEBUG("Timeout reached.\n");
1814 } else {
1815 if ((jiffies - ref) > delay) {
1816 PERROR
1817 ("Timeout reached. Not handled by control task!\n");
1818 } else {
1819 PERROR
1820 ("Timeout reached. Signal come but status is strange: %d\n",
1821 instance->status);
1822 }
1823 ao_stop_immediately(instance);
1824 }
1825
1826 instance->ao_control_task_flag = 0;
1827 cancel_delayed_work(&instance->ao_control_task);
1828 instance->status = ao_status_stream_end;
1829 err = ME_ERRNO_TIMEOUT;
1830 }
1831 }
1832 }
1833
1834 ME_SUBDEVICE_EXIT;
1835 return err;
1836 }
1837
1838 static int me4600_ao_io_stream_status(me_subdevice_t *subdevice,
1839 struct file *filep,
1840 int wait,
1841 int *status, int *values, int flags)
1842 {
1843 me4600_ao_subdevice_t *instance;
1844 int err = ME_ERRNO_SUCCESS;
1845
1846 instance = (me4600_ao_subdevice_t *) subdevice;
1847
1848 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1849
1850 if (!instance->fifo) {
1851 PERROR("Not a streaming ao.\n");
1852 return ME_ERRNO_NOT_SUPPORTED;
1853 }
1854
1855 if (flags) {
1856 PERROR("Invalid flag specified.\n");
1857 return ME_ERRNO_INVALID_FLAGS;
1858 }
1859
1860 if ((wait != ME_WAIT_NONE) && (wait != ME_WAIT_IDLE)) {
1861 PERROR("Invalid wait argument specified.\n");
1862 *status = ME_STATUS_INVALID;
1863 return ME_ERRNO_INVALID_WAIT;
1864 }
1865
1866 ME_SUBDEVICE_ENTER;
1867
1868 switch (instance->status) {
1869 case ao_status_single_configured:
1870 case ao_status_single_end:
1871 case ao_status_stream_configured:
1872 case ao_status_stream_end:
1873 case ao_status_stream_fifo_error:
1874 case ao_status_stream_buffer_error:
1875 case ao_status_stream_error:
1876 *status = ME_STATUS_IDLE;
1877 break;
1878
1879 case ao_status_single_run_wait:
1880 case ao_status_single_run:
1881 case ao_status_single_end_wait:
1882 case ao_status_stream_run_wait:
1883 case ao_status_stream_run:
1884 case ao_status_stream_end_wait:
1885 *status = ME_STATUS_BUSY;
1886 break;
1887
1888 case ao_status_none:
1889 default:
1890 *status =
1891 (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ?
1892 ME_STATUS_BUSY : ME_STATUS_IDLE;
1893 break;
1894 }
1895
1896 if ((wait == ME_WAIT_IDLE) && (*status == ME_STATUS_BUSY)) {
1897 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
1898 wait_event_interruptible_timeout(instance->wait_queue,
1899 ((instance->status !=
1900 ao_status_single_run_wait)
1901 && (instance->status !=
1902 ao_status_single_run)
1903 && (instance->status !=
1904 ao_status_single_end_wait)
1905 && (instance->status !=
1906 ao_status_stream_run_wait)
1907 && (instance->status !=
1908 ao_status_stream_run)
1909 && (instance->status !=
1910 ao_status_stream_end_wait)),
1911 LONG_MAX);
1912
1913 if (instance->status != ao_status_stream_end) {
1914 PDEBUG("Wait for IDLE canceled. %d\n",
1915 instance->status);
1916 err = ME_ERRNO_CANCELLED;
1917 }
1918
1919 if (signal_pending(current)) {
1920 PERROR("Wait for IDLE interrupted.\n");
1921 instance->status = ao_status_none;
1922 ao_stop_immediately(instance);
1923 err = ME_ERRNO_SIGNAL;
1924 }
1925
1926 *status = ME_STATUS_IDLE;
1927 }
1928
1929 *values = me_circ_buf_space(&instance->circ_buf);
1930
1931 ME_SUBDEVICE_EXIT;
1932
1933 return err;
1934 }
1935
1936 static int me4600_ao_io_stream_stop(me_subdevice_t *subdevice,
1937 struct file *filep,
1938 int stop_mode, int flags)
1939 { // Stop work and empty buffer and FIFO
1940 int err = ME_ERRNO_SUCCESS;
1941 me4600_ao_subdevice_t *instance;
1942 unsigned long cpu_flags;
1943 volatile uint32_t ctrl;
1944
1945 instance = (me4600_ao_subdevice_t *) subdevice;
1946
1947 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1948
1949 if (flags & ~ME_IO_STREAM_STOP_PRESERVE_BUFFERS) {
1950 PERROR("Invalid flag specified.\n");
1951 return ME_ERRNO_INVALID_FLAGS;
1952 }
1953
1954 if ((stop_mode != ME_STOP_MODE_IMMEDIATE)
1955 && (stop_mode != ME_STOP_MODE_LAST_VALUE)) {
1956 PERROR("Invalid stop mode specified.\n");
1957 return ME_ERRNO_INVALID_STOP_MODE;
1958 }
1959
1960 if (!instance->fifo) {
1961 PERROR("Not a streaming ao.\n");
1962 return ME_ERRNO_NOT_SUPPORTED;
1963 }
1964
1965 if (instance->status < ao_status_stream_configured) {
1966 //There is nothing to stop!
1967 PERROR("Subdevice not in streaming mode. %d\n",
1968 instance->status);
1969 return ME_ERRNO_PREVIOUS_CONFIG;
1970 }
1971
1972 ME_SUBDEVICE_ENTER;
1973
1974 //Mark as stopping. => Software stop.
1975 instance->status = ao_status_stream_end_wait;
1976
1977 if (stop_mode == ME_STOP_MODE_IMMEDIATE) { //Stopped now!
1978 err = ao_stop_immediately(instance);
1979 } else if (stop_mode == ME_STOP_MODE_LAST_VALUE) {
1980 ctrl = inl(instance->ctrl_reg) & ME4600_AO_CTRL_MODE_MASK;
1981 if (ctrl == ME4600_AO_MODE_WRAPAROUND) { //Hardware wraparound => Hardware stop.
1982 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1983 ctrl = inl(instance->ctrl_reg);
1984 ctrl |=
1985 ME4600_AO_CTRL_BIT_STOP |
1986 ME4600_AO_CTRL_BIT_RESET_IRQ;
1987 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1988 outl(ctrl, instance->ctrl_reg);
1989 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1990 instance->reg_base,
1991 instance->ctrl_reg - instance->reg_base,
1992 ctrl);
1993 spin_unlock_irqrestore(&instance->subdevice_lock,
1994 cpu_flags);
1995 }
1996 //Only runing process will interrupt this call. Events are signaled when status change.
1997 wait_event_interruptible_timeout(instance->wait_queue,
1998 (instance->status !=
1999 ao_status_stream_end_wait),
2000 LONG_MAX);
2001
2002 if (instance->status != ao_status_stream_end) {
2003 PDEBUG("Stopping stream canceled.\n");
2004 err = ME_ERRNO_CANCELLED;
2005 }
2006
2007 if (signal_pending(current)) {
2008 PERROR("Stopping stream interrupted.\n");
2009 instance->status = ao_status_none;
2010 ao_stop_immediately(instance);
2011 err = ME_ERRNO_SIGNAL;
2012 }
2013 }
2014
2015 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2016 ctrl = inl(instance->ctrl_reg);
2017 ctrl |=
2018 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
2019 ME4600_AO_CTRL_BIT_RESET_IRQ;
2020 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2021 if (!flags) { //Reset FIFO
2022 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
2023 }
2024 outl(ctrl, instance->ctrl_reg);
2025 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
2026 instance->ctrl_reg - instance->reg_base, ctrl);
2027 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2028
2029 if (!flags) { //Reset software buffer
2030 instance->circ_buf.head = 0;
2031 instance->circ_buf.tail = 0;
2032 instance->preloaded_count = 0;
2033 instance->data_count = 0;
2034 }
2035
2036 ME_SUBDEVICE_EXIT;
2037
2038 return err;
2039 }
2040
2041 static int me4600_ao_io_stream_write(me_subdevice_t *subdevice,
2042 struct file *filep,
2043 int write_mode,
2044 int *values, int *count, int flags)
2045 {
2046 int err = ME_ERRNO_SUCCESS;
2047 me4600_ao_subdevice_t *instance;
2048 unsigned long cpu_flags = 0;
2049 uint32_t reg_copy;
2050
2051 int copied_from_user = 0;
2052 int left_to_copy_from_user = *count;
2053
2054 int copied_values;
2055
2056 instance = (me4600_ao_subdevice_t *) subdevice;
2057
2058 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2059
2060 //Checking arguments
2061 if (!instance->fifo) {
2062 PERROR("Not a streaming ao.\n");
2063 return ME_ERRNO_NOT_SUPPORTED;
2064 }
2065
2066 if (flags) {
2067 PERROR("Invalid flag specified.\n");
2068 return ME_ERRNO_INVALID_FLAGS;
2069 }
2070
2071 if (*count <= 0) {
2072 PERROR("Invalid count of values specified.\n");
2073 return ME_ERRNO_INVALID_VALUE_COUNT;
2074 }
2075
2076 if (values == NULL) {
2077 PERROR("Invalid address of values specified.\n");
2078 return ME_ERRNO_INVALID_POINTER;
2079 }
2080
2081 if ((instance->status == ao_status_none) || (instance->status == ao_status_single_configured)) { //The device is in single mode.
2082 PERROR
2083 ("Subdevice must be preinitialize correctly for streaming.\n");
2084 return ME_ERRNO_PREVIOUS_CONFIG;
2085 }
2086 /// @note If no 'pre-load' is used. stream_start() will move data to FIFO.
2087 switch (write_mode) {
2088 case ME_WRITE_MODE_PRELOAD:
2089
2090 //Device must be stopped.
2091 if ((instance->status != ao_status_stream_configured)
2092 && (instance->status != ao_status_stream_end)) {
2093 PERROR
2094 ("Subdevice mustn't be runing when 'pre-load' mode is used.\n");
2095 return ME_ERRNO_PREVIOUS_CONFIG;
2096 }
2097 break;
2098 case ME_WRITE_MODE_NONBLOCKING:
2099 case ME_WRITE_MODE_BLOCKING:
2100 /// @note In blocking mode: When device is not runing and there is not enought space call will blocked up!
2101 /// @note Some other thread must empty buffer by starting engine.
2102 break;
2103
2104 default:
2105 PERROR("Invalid write mode specified.\n");
2106 return ME_ERRNO_INVALID_WRITE_MODE;
2107 }
2108
2109 if (instance->mode & ME4600_AO_WRAP_MODE) { //Wraparound mode. Device must be stopped.
2110 if ((instance->status != ao_status_stream_configured)
2111 && (instance->status != ao_status_stream_end)) {
2112 PERROR
2113 ("Subdevice mustn't be runing when 'pre-load' mode is used.\n");
2114 return ME_ERRNO_INVALID_WRITE_MODE;
2115 }
2116 }
2117
2118 if ((instance->mode == ME4600_AO_HW_WRAP_MODE) && (write_mode != ME_WRITE_MODE_PRELOAD)) { // hardware wrap_around mode.
2119 //This is transparent for user.
2120 PDEBUG("Changing write_mode to ME_WRITE_MODE_PRELOAD.\n");
2121 write_mode = ME_WRITE_MODE_PRELOAD;
2122 }
2123
2124 ME_SUBDEVICE_ENTER;
2125
2126 if (write_mode == ME_WRITE_MODE_PRELOAD) { //Init enviroment - preload
2127 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2128 reg_copy = inl(instance->ctrl_reg);
2129 //Check FIFO
2130 if (!(reg_copy & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO not active. Enable it.
2131 reg_copy |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
2132 outl(reg_copy, instance->ctrl_reg);
2133 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2134 instance->reg_base,
2135 instance->ctrl_reg - instance->reg_base,
2136 reg_copy);
2137 instance->preloaded_count = 0;
2138 }
2139 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2140 }
2141
2142 while (1) {
2143 //Copy to buffer. This step is common for all modes.
2144 copied_from_user =
2145 ao_get_data_from_user(instance, left_to_copy_from_user,
2146 values + (*count -
2147 left_to_copy_from_user));
2148 left_to_copy_from_user -= copied_from_user;
2149
2150 reg_copy = inl(instance->status_reg);
2151 if ((instance->status == ao_status_stream_run) && !(reg_copy & ME4600_AO_STATUS_BIT_FSM)) { //BROKEN PIPE! The state machine is stoped but logical status show that should be working.
2152 PERROR("Broken pipe in write.\n");
2153 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
2154 break;
2155 }
2156
2157 if ((instance->status == ao_status_stream_run) && (instance->mode == ME4600_AO_CONTINOUS) && (reg_copy & ME4600_AO_STATUS_BIT_HF)) { //Continous mode runing and data are below half!
2158
2159 // Block interrupts.
2160 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2161 reg_copy = inl(instance->ctrl_reg);
2162 //reg_copy &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2163 reg_copy |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2164 outl(reg_copy, instance->ctrl_reg);
2165 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2166 instance->reg_base,
2167 instance->ctrl_reg - instance->reg_base,
2168 reg_copy);
2169 spin_unlock_irqrestore(&instance->subdevice_lock,
2170 cpu_flags);
2171
2172 //Fast copy
2173 copied_values =
2174 ao_write_data(instance, ME4600_AO_FIFO_COUNT / 2,
2175 0);
2176 if (copied_values > 0) {
2177 instance->circ_buf.tail += copied_values;
2178 instance->circ_buf.tail &=
2179 instance->circ_buf.mask;
2180 continue;
2181 }
2182 // Activate interrupts.
2183 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2184 reg_copy = inl(instance->ctrl_reg);
2185 //reg_copy |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2186 reg_copy &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2187 outl(reg_copy, instance->ctrl_reg);
2188 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2189 instance->reg_base,
2190 instance->ctrl_reg - instance->reg_base,
2191 reg_copy);
2192 spin_unlock_irqrestore(&instance->subdevice_lock,
2193 cpu_flags);
2194
2195 if (copied_values == 0) { //This was checked and never should happend!
2196 PERROR_CRITICAL("COPING FINISH WITH 0!\n");
2197 }
2198
2199 if (copied_values < 0) { //This was checked and never should happend!
2200 PERROR_CRITICAL
2201 ("COPING FINISH WITH AN ERROR!\n");
2202 instance->status = ao_status_stream_fifo_error;
2203 err = ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2204 break;
2205 }
2206 }
2207
2208 if (!left_to_copy_from_user) { //All datas were copied.
2209 break;
2210 } else { //Not all datas were copied.
2211 if (instance->mode & ME4600_AO_WRAP_MODE) { //Error too much datas! Wraparound is limited in size!
2212 PERROR
2213 ("Too much data for wraparound mode! Exceeded size of %ld.\n",
2214 ME4600_AO_CIRC_BUF_COUNT - 1);
2215 err = ME_ERRNO_RING_BUFFER_OVERFLOW;
2216 break;
2217 }
2218
2219 if (write_mode != ME_WRITE_MODE_BLOCKING) { //Non blocking calls
2220 break;
2221 }
2222
2223 wait_event_interruptible(instance->wait_queue,
2224 me_circ_buf_space(&instance->
2225 circ_buf));
2226
2227 if (signal_pending(current)) {
2228 PERROR("Writing interrupted by signal.\n");
2229 instance->status = ao_status_none;
2230 ao_stop_immediately(instance);
2231 err = ME_ERRNO_SIGNAL;
2232 break;
2233 }
2234
2235 if (instance->status == ao_status_none) { //Reset
2236 PERROR("Writing interrupted by reset.\n");
2237 err = ME_ERRNO_CANCELLED;
2238 break;
2239 }
2240 }
2241 }
2242
2243 if (write_mode == ME_WRITE_MODE_PRELOAD) { //Copy data to FIFO - preload
2244 copied_values =
2245 ao_write_data_pooling(instance, ME4600_AO_FIFO_COUNT,
2246 instance->preloaded_count);
2247 instance->preloaded_count += copied_values;
2248 instance->data_count += copied_values;
2249
2250 if ((instance->mode == ME4600_AO_HW_WRAP_MODE)
2251 && (me_circ_buf_values(&instance->circ_buf) >
2252 ME4600_AO_FIFO_COUNT)) {
2253 PERROR
2254 ("Too much data for hardware wraparound mode! Exceeded size of %d.\n",
2255 ME4600_AO_FIFO_COUNT);
2256 err = ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2257 }
2258 }
2259
2260 *count = *count - left_to_copy_from_user;
2261 ME_SUBDEVICE_EXIT;
2262
2263 return err;
2264 }
2265 static irqreturn_t me4600_ao_isr(int irq, void *dev_id)
2266 {
2267 me4600_ao_subdevice_t *instance = dev_id;
2268 uint32_t irq_status;
2269 uint32_t ctrl;
2270 uint32_t status;
2271 int count = 0;
2272
2273 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2274
2275 if (irq != instance->irq) {
2276 PERROR("Incorrect interrupt num: %d.\n", irq);
2277 return IRQ_NONE;
2278 }
2279
2280 irq_status = inl(instance->irq_status_reg);
2281 if (!(irq_status & (ME4600_IRQ_STATUS_BIT_AO_HF << instance->ao_idx))) {
2282 PINFO("%ld Shared interrupt. %s(): ID=%d: status_reg=0x%04X\n",
2283 jiffies, __func__, instance->ao_idx, irq_status);
2284 return IRQ_NONE;
2285 }
2286
2287 if (!instance->circ_buf.buf) {
2288 instance->status = ao_status_stream_error;
2289 PERROR_CRITICAL("CIRCULAR BUFFER NOT EXISTS!\n");
2290 //Block interrupts. Stop machine.
2291 ctrl = inl(instance->ctrl_reg);
2292 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2293 ctrl |=
2294 ME4600_AO_CTRL_BIT_RESET_IRQ |
2295 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP;
2296 outl(ctrl, instance->ctrl_reg);
2297 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2298 instance->reg_base,
2299 instance->ctrl_reg - instance->reg_base, ctrl);
2300
2301 //Inform user
2302 wake_up_interruptible_all(&instance->wait_queue);
2303 return IRQ_HANDLED;
2304 }
2305
2306 status = inl(instance->status_reg);
2307 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { //Too late. Not working! END? BROKEN PIPE?
2308 PDEBUG("Interrupt come but ISM is not working!\n");
2309 //Block interrupts. Stop machine.
2310 ctrl = inl(instance->ctrl_reg);
2311 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2312 ctrl |=
2313 ME4600_AO_CTRL_BIT_RESET_IRQ | ME4600_AO_CTRL_BIT_STOP |
2314 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
2315 outl(ctrl, instance->ctrl_reg);
2316 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2317 instance->reg_base,
2318 instance->ctrl_reg - instance->reg_base, ctrl);
2319
2320 return IRQ_HANDLED;
2321 }
2322 //General procedure. Process more datas.
2323
2324 #ifdef MEDEBUG_DEBUG
2325 if (!me_circ_buf_values(&instance->circ_buf)) { //Buffer is empty!
2326 PDEBUG("Circular buffer empty!\n");
2327 }
2328 #endif
2329
2330 //Check FIFO
2331 if (status & ME4600_AO_STATUS_BIT_HF) { //OK less than half
2332
2333 //Block interrupts
2334 ctrl = inl(instance->ctrl_reg);
2335 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2336 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2337 outl(ctrl, instance->ctrl_reg);
2338 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2339 instance->reg_base,
2340 instance->ctrl_reg - instance->reg_base, ctrl);
2341
2342 do {
2343 //Calculate how many should be copied.
2344 count =
2345 (instance->stop_data_count) ? instance->
2346 stop_data_count -
2347 instance->data_count : ME4600_AO_FIFO_COUNT / 2;
2348 if (ME4600_AO_FIFO_COUNT / 2 < count) {
2349 count = ME4600_AO_FIFO_COUNT / 2;
2350 }
2351 //Copy data
2352 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
2353 count = ao_write_data(instance, count, 0);
2354 if (count > 0) {
2355 instance->circ_buf.tail += count;
2356 instance->circ_buf.tail &=
2357 instance->circ_buf.mask;
2358 instance->data_count += count;
2359
2360 if ((instance->status == ao_status_stream_end_wait) && !me_circ_buf_values(&instance->circ_buf)) { //Stoping. Whole buffer was copied.
2361 break;
2362 }
2363 }
2364 } else if ((instance->mode == ME4600_AO_SW_WRAP_MODE) && ((ctrl & ME4600_AO_CTRL_MODE_MASK) == ME4600_AO_MODE_CONTINUOUS)) { //Wraparound (software)
2365 if (instance->status == ao_status_stream_end_wait) { //We stoping => Copy to the end of the buffer.
2366 count =
2367 ao_write_data(instance, count, 0);
2368 } else { //Copy in wraparound mode.
2369 count =
2370 ao_write_data_wraparound(instance,
2371 count,
2372 instance->
2373 preloaded_count);
2374 }
2375
2376 if (count > 0) {
2377 instance->data_count += count;
2378 instance->preloaded_count += count;
2379 instance->preloaded_count %=
2380 me_circ_buf_values(&instance->
2381 circ_buf);
2382
2383 if ((instance->status == ao_status_stream_end_wait) && !instance->preloaded_count) { //Stoping. Whole buffer was copied.
2384 break;
2385 }
2386 }
2387 }
2388
2389 if ((count <= 0) || (instance->stop_data_count && (instance->stop_data_count <= instance->data_count))) { //End of work.
2390 break;
2391 }
2392 } //Repeat if still is under half fifo
2393 while ((status =
2394 inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_HF);
2395
2396 //Unblock interrupts
2397 ctrl = inl(instance->ctrl_reg);
2398 if (count >= 0) { //Copy was successful.
2399 if (instance->stop_data_count && (instance->stop_data_count <= instance->data_count)) { //Finishing work. No more interrupts.
2400 PDEBUG("Finishing work. Interrupt disabled.\n");
2401 instance->status = ao_status_stream_end_wait;
2402 } else if (count > 0) { //Normal work. Enable interrupt.
2403 PDEBUG("Normal work. Enable interrupt.\n");
2404 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2405 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2406 } else { //Normal work but there are no more data in buffer. Interrupt active but blocked. stream_write() will unblock it.
2407 PDEBUG
2408 ("No data in software buffer. Interrupt blocked.\n");
2409 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2410 }
2411 } else { //Error during copy.
2412 instance->status = ao_status_stream_fifo_error;
2413 }
2414
2415 outl(ctrl, instance->ctrl_reg);
2416 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2417 instance->reg_base,
2418 instance->ctrl_reg - instance->reg_base, ctrl);
2419 } else { //?? more than half
2420 PDEBUG
2421 ("Interrupt come but FIFO more than half full! Reset interrupt.\n");
2422 //Reset pending interrupt
2423 ctrl = inl(instance->ctrl_reg);
2424 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2425 outl(ctrl, instance->ctrl_reg);
2426 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2427 instance->reg_base,
2428 instance->ctrl_reg - instance->reg_base, ctrl);
2429 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2430 outl(ctrl, instance->ctrl_reg);
2431 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2432 instance->reg_base,
2433 instance->ctrl_reg - instance->reg_base, ctrl);
2434 }
2435
2436 PINFO("ISR: Buffer count: %d.(T:%d H:%d)\n",
2437 me_circ_buf_values(&instance->circ_buf), instance->circ_buf.tail,
2438 instance->circ_buf.head);
2439 PINFO("ISR: Stop count: %d.\n", instance->stop_count);
2440 PINFO("ISR: Stop data count: %d.\n", instance->stop_data_count);
2441 PINFO("ISR: Data count: %d.\n", instance->data_count);
2442
2443 //Inform user
2444 wake_up_interruptible_all(&instance->wait_queue);
2445
2446 return IRQ_HANDLED;
2447 }
2448
2449 static void me4600_ao_destructor(struct me_subdevice *subdevice)
2450 {
2451 me4600_ao_subdevice_t *instance;
2452
2453 instance = (me4600_ao_subdevice_t *) subdevice;
2454
2455 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2456
2457 instance->ao_control_task_flag = 0;
2458
2459 // Reset subdevice to asure clean exit.
2460 me4600_ao_io_reset_subdevice(subdevice, NULL,
2461 ME_IO_RESET_SUBDEVICE_NO_FLAGS);
2462
2463 // Remove any tasks from work queue. This is paranoic because it was done allready in reset().
2464 if (!cancel_delayed_work(&instance->ao_control_task)) { //Wait 2 ticks to be sure that control task is removed from queue.
2465 set_current_state(TASK_INTERRUPTIBLE);
2466 schedule_timeout(2);
2467 }
2468
2469 if (instance->fifo) {
2470 if (instance->irq) {
2471 free_irq(instance->irq, instance);
2472 instance->irq = 0;
2473 }
2474
2475 if (instance->circ_buf.buf) {
2476 free_pages((unsigned long)instance->circ_buf.buf,
2477 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2478 }
2479 instance->circ_buf.buf = NULL;
2480 }
2481
2482 me_subdevice_deinit(&instance->base);
2483 kfree(instance);
2484 }
2485
2486 me4600_ao_subdevice_t *me4600_ao_constructor(uint32_t reg_base,
2487 spinlock_t *preload_reg_lock,
2488 uint32_t *preload_flags,
2489 int ao_idx,
2490 int fifo,
2491 int irq,
2492 struct workqueue_struct *me4600_wq)
2493 {
2494 me4600_ao_subdevice_t *subdevice;
2495 int err;
2496
2497 PDEBUG("executed. idx=%d\n", ao_idx);
2498
2499 // Allocate memory for subdevice instance.
2500 subdevice = kmalloc(sizeof(me4600_ao_subdevice_t), GFP_KERNEL);
2501
2502 if (!subdevice) {
2503 PERROR("Cannot get memory for subdevice instance.\n");
2504 return NULL;
2505 }
2506
2507 memset(subdevice, 0, sizeof(me4600_ao_subdevice_t));
2508
2509 // Initialize subdevice base class.
2510 err = me_subdevice_init(&subdevice->base);
2511
2512 if (err) {
2513 PERROR("Cannot initialize subdevice base class instance.\n");
2514 kfree(subdevice);
2515 return NULL;
2516 }
2517 // Initialize spin locks.
2518 spin_lock_init(&subdevice->subdevice_lock);
2519
2520 subdevice->preload_reg_lock = preload_reg_lock;
2521 subdevice->preload_flags = preload_flags;
2522
2523 // Store analog output index.
2524 subdevice->ao_idx = ao_idx;
2525
2526 // Store if analog output has fifo.
2527 subdevice->fifo = (ao_idx < fifo) ? 1 : 0;
2528
2529 if (subdevice->fifo) { // Allocate and initialize circular buffer.
2530 subdevice->circ_buf.mask = ME4600_AO_CIRC_BUF_COUNT - 1;
2531
2532 subdevice->circ_buf.buf =
2533 (void *)__get_free_pages(GFP_KERNEL,
2534 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2535 PDEBUG("circ_buf = %p size=%ld\n", subdevice->circ_buf.buf,
2536 ME4600_AO_CIRC_BUF_SIZE);
2537
2538 if (!subdevice->circ_buf.buf) {
2539 PERROR
2540 ("Cannot initialize subdevice base class instance.\n");
2541 kfree(subdevice);
2542 return NULL;
2543 }
2544
2545 memset(subdevice->circ_buf.buf, 0, ME4600_AO_CIRC_BUF_SIZE);
2546 } else { // No FIFO.
2547 subdevice->circ_buf.mask = 0;
2548 subdevice->circ_buf.buf = NULL;
2549 }
2550
2551 subdevice->circ_buf.head = 0;
2552 subdevice->circ_buf.tail = 0;
2553
2554 subdevice->status = ao_status_none;
2555 subdevice->ao_control_task_flag = 0;
2556 subdevice->timeout.delay = 0;
2557 subdevice->timeout.start_time = jiffies;
2558
2559 // Initialize wait queue.
2560 init_waitqueue_head(&subdevice->wait_queue);
2561
2562 // Initialize single value to 0V.
2563 subdevice->single_value = 0x8000;
2564 subdevice->single_value_in_fifo = 0x8000;
2565
2566 // Register interrupt service routine.
2567 if (subdevice->fifo) {
2568 subdevice->irq = irq;
2569 if (request_irq(subdevice->irq, me4600_ao_isr,
2570 IRQF_DISABLED | IRQF_SHARED,
2571 ME4600_NAME, subdevice)) {
2572 PERROR("Cannot get interrupt line.\n");
2573 PDEBUG("free circ_buf = %p size=%d",
2574 subdevice->circ_buf.buf,
2575 PAGE_SHIFT << ME4600_AO_CIRC_BUF_SIZE_ORDER);
2576 free_pages((unsigned long)subdevice->circ_buf.buf,
2577 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2578 me_subdevice_deinit((me_subdevice_t *) subdevice);
2579 kfree(subdevice);
2580 return NULL;
2581 }
2582 PINFO("Registered irq=%d.\n", subdevice->irq);
2583 } else {
2584 subdevice->irq = 0;
2585 }
2586
2587 // Initialize registers.
2588 subdevice->irq_status_reg = reg_base + ME4600_IRQ_STATUS_REG;
2589 subdevice->preload_reg = reg_base + ME4600_AO_SYNC_REG;
2590 if (ao_idx == 0) {
2591 subdevice->ctrl_reg = reg_base + ME4600_AO_00_CTRL_REG;
2592 subdevice->status_reg = reg_base + ME4600_AO_00_STATUS_REG;
2593 subdevice->fifo_reg = reg_base + ME4600_AO_00_FIFO_REG;
2594 subdevice->single_reg = reg_base + ME4600_AO_00_SINGLE_REG;
2595 subdevice->timer_reg = reg_base + ME4600_AO_00_TIMER_REG;
2596 subdevice->reg_base = reg_base;
2597 subdevice->bitpattern = 0;
2598 } else if (ao_idx == 1) {
2599 subdevice->ctrl_reg = reg_base + ME4600_AO_01_CTRL_REG;
2600 subdevice->status_reg = reg_base + ME4600_AO_01_STATUS_REG;
2601 subdevice->fifo_reg = reg_base + ME4600_AO_01_FIFO_REG;
2602 subdevice->single_reg = reg_base + ME4600_AO_01_SINGLE_REG;
2603 subdevice->timer_reg = reg_base + ME4600_AO_01_TIMER_REG;
2604 subdevice->reg_base = reg_base;
2605 subdevice->bitpattern = 0;
2606 } else if (ao_idx == 2) {
2607 subdevice->ctrl_reg = reg_base + ME4600_AO_02_CTRL_REG;
2608 subdevice->status_reg = reg_base + ME4600_AO_02_STATUS_REG;
2609 subdevice->fifo_reg = reg_base + ME4600_AO_02_FIFO_REG;
2610 subdevice->single_reg = reg_base + ME4600_AO_02_SINGLE_REG;
2611 subdevice->timer_reg = reg_base + ME4600_AO_02_TIMER_REG;
2612 subdevice->reg_base = reg_base;
2613 subdevice->bitpattern = 0;
2614 } else if (ao_idx == 3) {
2615 subdevice->ctrl_reg = reg_base + ME4600_AO_03_CTRL_REG;
2616 subdevice->status_reg = reg_base + ME4600_AO_03_STATUS_REG;
2617 subdevice->fifo_reg = reg_base + ME4600_AO_03_FIFO_REG;
2618 subdevice->single_reg = reg_base + ME4600_AO_03_SINGLE_REG;
2619 subdevice->timer_reg = reg_base + ME4600_AO_03_TIMER_REG;
2620 subdevice->reg_base = reg_base;
2621 subdevice->bitpattern = 1;
2622 } else {
2623 PERROR_CRITICAL("WRONG SUBDEVICE idx=%d!", ao_idx);
2624 me_subdevice_deinit((me_subdevice_t *) subdevice);
2625 if (subdevice->fifo) {
2626 free_pages((unsigned long)subdevice->circ_buf.buf,
2627 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2628 }
2629 subdevice->circ_buf.buf = NULL;
2630 kfree(subdevice);
2631 return NULL;
2632 }
2633
2634 // Override base class methods.
2635 subdevice->base.me_subdevice_destructor = me4600_ao_destructor;
2636 subdevice->base.me_subdevice_io_reset_subdevice =
2637 me4600_ao_io_reset_subdevice;
2638 subdevice->base.me_subdevice_io_single_config =
2639 me4600_ao_io_single_config;
2640 subdevice->base.me_subdevice_io_single_read = me4600_ao_io_single_read;
2641 subdevice->base.me_subdevice_io_single_write =
2642 me4600_ao_io_single_write;
2643 subdevice->base.me_subdevice_io_stream_config =
2644 me4600_ao_io_stream_config;
2645 subdevice->base.me_subdevice_io_stream_new_values =
2646 me4600_ao_io_stream_new_values;
2647 subdevice->base.me_subdevice_io_stream_write =
2648 me4600_ao_io_stream_write;
2649 subdevice->base.me_subdevice_io_stream_start =
2650 me4600_ao_io_stream_start;
2651 subdevice->base.me_subdevice_io_stream_status =
2652 me4600_ao_io_stream_status;
2653 subdevice->base.me_subdevice_io_stream_stop = me4600_ao_io_stream_stop;
2654 subdevice->base.me_subdevice_query_number_channels =
2655 me4600_ao_query_number_channels;
2656 subdevice->base.me_subdevice_query_subdevice_type =
2657 me4600_ao_query_subdevice_type;
2658 subdevice->base.me_subdevice_query_subdevice_caps =
2659 me4600_ao_query_subdevice_caps;
2660 subdevice->base.me_subdevice_query_subdevice_caps_args =
2661 me4600_ao_query_subdevice_caps_args;
2662 subdevice->base.me_subdevice_query_range_by_min_max =
2663 me4600_ao_query_range_by_min_max;
2664 subdevice->base.me_subdevice_query_number_ranges =
2665 me4600_ao_query_number_ranges;
2666 subdevice->base.me_subdevice_query_range_info =
2667 me4600_ao_query_range_info;
2668 subdevice->base.me_subdevice_query_timer = me4600_ao_query_timer;
2669
2670 // Prepare work queue
2671 subdevice->me4600_workqueue = me4600_wq;
2672
2673 /* workqueue API changed in kernel 2.6.20 */
2674 INIT_DELAYED_WORK(&subdevice->ao_control_task,
2675 me4600_ao_work_control_task);
2676
2677 if (subdevice->fifo) { // Set speed for single operations.
2678 outl(ME4600_AO_MIN_CHAN_TICKS - 1, subdevice->timer_reg);
2679 subdevice->hardware_stop_delay = HZ / 10; //100ms
2680 }
2681
2682 return subdevice;
2683 }
2684
2685 /** @brief Stop presentation. Preserve FIFOs.
2686 *
2687 * @param instance The subdevice instance (pointer).
2688 */
2689 inline int ao_stop_immediately(me4600_ao_subdevice_t *instance)
2690 {
2691 unsigned long cpu_flags;
2692 uint32_t ctrl;
2693 int timeout;
2694 int i;
2695
2696 timeout =
2697 (instance->hardware_stop_delay >
2698 (HZ / 10)) ? instance->hardware_stop_delay : HZ / 10;
2699 for (i = 0; i <= timeout; i++) {
2700 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2701 // Stop all actions. No conditions! Block interrupts. Leave FIFO untouched!
2702 ctrl = inl(instance->ctrl_reg);
2703 ctrl |=
2704 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
2705 | ME4600_AO_CTRL_BIT_RESET_IRQ;
2706 ctrl &=
2707 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
2708 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
2709 outl(ctrl, instance->ctrl_reg);
2710 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2711 instance->reg_base,
2712 instance->ctrl_reg - instance->reg_base, ctrl);
2713 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2714
2715 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) { // Exit.
2716 break;
2717 }
2718 //Still working!
2719 set_current_state(TASK_INTERRUPTIBLE);
2720 schedule_timeout(1);
2721 }
2722
2723 if (i > timeout) {
2724 PERROR_CRITICAL("FSM IS BUSY!\n");
2725 return ME_ERRNO_INTERNAL;
2726 }
2727 return ME_ERRNO_SUCCESS;
2728 }
2729
2730 /** @brief Copy data from circular buffer to fifo (fast) in wraparound.
2731 * @note This is time critical function. Checking is done at begining and end only.
2732 * @note The is not reasonable way to check how many walues was in FIFO at begining. The count must be managed externaly.
2733 *
2734 * @param instance The subdevice instance (pointer).
2735 * @param count Maximum number of copied data.
2736 * @param start_pos Position of the firs value in buffer.
2737 *
2738 * @return On success: Number of copied data.
2739 * @return On error/success: 0. No datas were copied => no data in buffer.
2740 * @return On error: -ME_ERRNO_FIFO_BUFFER_OVERFLOW.
2741 */
2742 inline int ao_write_data_wraparound(me4600_ao_subdevice_t *instance, int count,
2743 int start_pos)
2744 { /// @note This is time critical function!
2745 uint32_t status;
2746 uint32_t value;
2747 int pos =
2748 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2749 int local_count = count;
2750 int i = 1;
2751
2752 if (count <= 0) { //Wrong count!
2753 return 0;
2754 }
2755
2756 while (i < local_count) {
2757 //Get value from buffer
2758 value = *(instance->circ_buf.buf + pos);
2759 //Prepare it
2760 if (instance->ao_idx & 0x1) {
2761 value <<= 16;
2762 }
2763 //Put value to FIFO
2764 outl(value, instance->fifo_reg);
2765 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2766
2767 pos++;
2768 pos &= instance->circ_buf.mask;
2769 if (pos == instance->circ_buf.head) {
2770 pos = instance->circ_buf.tail;
2771 }
2772 i++;
2773 }
2774
2775 status = inl(instance->status_reg);
2776 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full before all datas were copied!
2777 PERROR("FIFO was full before all datas were copied! idx=%d\n",
2778 instance->ao_idx);
2779 return -ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2780 } else { //Add last value
2781 value = *(instance->circ_buf.buf + pos);
2782 if (instance->ao_idx & 0x1) {
2783 value <<= 16;
2784 }
2785 //Put value to FIFO
2786 outl(value, instance->fifo_reg);
2787 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2788 }
2789
2790 PINFO("WRAPAROUND LOADED %d values. idx=%d\n", local_count,
2791 instance->ao_idx);
2792 return local_count;
2793 }
2794
2795 /** @brief Copy data from software buffer to fifo (fast).
2796 * @note This is time critical function. Checking is done at begining and end only.
2797 * @note The is not reasonable way to check how many walues was in FIFO at begining. The count must be managed externaly.
2798 *
2799 * @param instance The subdevice instance (pointer).
2800 * @param count Maximum number of copied data.
2801 * @param start_pos Position of the firs value in buffer.
2802 *
2803 * @return On success: Number of copied data.
2804 * @return On error/success: 0. No datas were copied => no data in buffer.
2805 * @return On error: -ME_ERRNO_FIFO_BUFFER_OVERFLOW.
2806 */
2807 inline int ao_write_data(me4600_ao_subdevice_t *instance, int count,
2808 int start_pos)
2809 { /// @note This is time critical function!
2810 uint32_t status;
2811 uint32_t value;
2812 int pos =
2813 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2814 int local_count = count;
2815 int max_count;
2816 int i = 1;
2817
2818 if (count <= 0) { //Wrong count!
2819 return 0;
2820 }
2821
2822 max_count = me_circ_buf_values(&instance->circ_buf) - start_pos;
2823 if (max_count <= 0) { //No data to copy!
2824 return 0;
2825 }
2826
2827 if (max_count < count) {
2828 local_count = max_count;
2829 }
2830
2831 while (i < local_count) {
2832 //Get value from buffer
2833 value = *(instance->circ_buf.buf + pos);
2834 //Prepare it
2835 if (instance->ao_idx & 0x1) {
2836 value <<= 16;
2837 }
2838 //Put value to FIFO
2839 outl(value, instance->fifo_reg);
2840 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2841
2842 pos++;
2843 pos &= instance->circ_buf.mask;
2844 i++;
2845 }
2846
2847 status = inl(instance->status_reg);
2848 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full before all datas were copied!
2849 PERROR("FIFO was full before all datas were copied! idx=%d\n",
2850 instance->ao_idx);
2851 return -ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2852 } else { //Add last value
2853 value = *(instance->circ_buf.buf + pos);
2854 if (instance->ao_idx & 0x1) {
2855 value <<= 16;
2856 }
2857 //Put value to FIFO
2858 outl(value, instance->fifo_reg);
2859 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2860 }
2861
2862 PINFO("FAST LOADED %d values. idx=%d\n", local_count, instance->ao_idx);
2863 return local_count;
2864 }
2865
2866 /** @brief Copy data from software buffer to fifo (slow).
2867 * @note This is slow function that copy all data from buffer to FIFO with full control.
2868 *
2869 * @param instance The subdevice instance (pointer).
2870 * @param count Maximum number of copied data.
2871 * @param start_pos Position of the firs value in buffer.
2872 *
2873 * @return On success: Number of copied values.
2874 * @return On error/success: 0. FIFO was full at begining.
2875 * @return On error: -ME_ERRNO_RING_BUFFER_UNDEFFLOW.
2876 */
2877 inline int ao_write_data_pooling(me4600_ao_subdevice_t *instance, int count,
2878 int start_pos)
2879 { /// @note This is slow function!
2880 uint32_t status;
2881 uint32_t value;
2882 int pos =
2883 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2884 int local_count = count;
2885 int i;
2886 int max_count;
2887
2888 if (count <= 0) { //Wrong count!
2889 PERROR("SLOW LOADED: Wrong count! idx=%d\n", instance->ao_idx);
2890 return 0;
2891 }
2892
2893 max_count = me_circ_buf_values(&instance->circ_buf) - start_pos;
2894 if (max_count <= 0) { //No data to copy!
2895 PERROR("SLOW LOADED: No data to copy! idx=%d\n",
2896 instance->ao_idx);
2897 return 0;
2898 }
2899
2900 if (max_count < count) {
2901 local_count = max_count;
2902 }
2903
2904 for (i = 0; i < local_count; i++) {
2905 status = inl(instance->status_reg);
2906 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full!
2907 return i;
2908 }
2909 //Get value from buffer
2910 value = *(instance->circ_buf.buf + pos);
2911 //Prepare it
2912 if (instance->ao_idx & 0x1) {
2913 value <<= 16;
2914 }
2915 //Put value to FIFO
2916 outl(value, instance->fifo_reg);
2917 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2918
2919 pos++;
2920 pos &= instance->circ_buf.mask;
2921 }
2922
2923 PINFO("SLOW LOADED %d values. idx=%d\n", local_count, instance->ao_idx);
2924 return local_count;
2925 }
2926
2927 /** @brief Copy data from user space to circular buffer.
2928 * @param instance The subdevice instance (pointer).
2929 * @param count Number of datas in user space.
2930 * @param user_values Buffer's pointer.
2931 *
2932 * @return On success: Number of copied values.
2933 * @return On error: -ME_ERRNO_INTERNAL.
2934 */
2935 inline int ao_get_data_from_user(me4600_ao_subdevice_t *instance, int count,
2936 int *user_values)
2937 {
2938 int i, err;
2939 int empty_space;
2940 int copied;
2941 int value;
2942
2943 empty_space = me_circ_buf_space(&instance->circ_buf);
2944 //We have only this space free.
2945 copied = (count < empty_space) ? count : empty_space;
2946 for (i = 0; i < copied; i++) { //Copy from user to buffer
2947 if ((err = get_user(value, (int *)(user_values + i)))) {
2948 PERROR
2949 ("BUFFER LOADED: get_user(0x%p) return an error: %d. idx=%d\n",
2950 user_values + i, err, instance->ao_idx);
2951 return -ME_ERRNO_INTERNAL;
2952 }
2953 /// @note The analog output in me4600 series has size of 16 bits.
2954 *(instance->circ_buf.buf + instance->circ_buf.head) =
2955 (uint16_t) value;
2956 instance->circ_buf.head++;
2957 instance->circ_buf.head &= instance->circ_buf.mask;
2958 }
2959
2960 PINFO("BUFFER LOADED %d values. idx=%d\n", copied, instance->ao_idx);
2961 return copied;
2962 }
2963
2964 /** @brief Checking actual hardware and logical state.
2965 * @param instance The subdevice instance (pointer).
2966 */
2967 static void me4600_ao_work_control_task(struct work_struct *work)
2968 {
2969 me4600_ao_subdevice_t *instance;
2970 unsigned long cpu_flags = 0;
2971 uint32_t status;
2972 uint32_t ctrl;
2973 uint32_t synch;
2974 int reschedule = 0;
2975 int signaling = 0;
2976
2977 instance =
2978 container_of((void *)work, me4600_ao_subdevice_t, ao_control_task);
2979 PINFO("<%s: %ld> executed. idx=%d\n", __func__, jiffies,
2980 instance->ao_idx);
2981
2982 status = inl(instance->status_reg);
2983 PDEBUG_REG("status_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
2984 instance->status_reg - instance->reg_base, status);
2985
2986 switch (instance->status) { // Checking actual mode.
2987
2988 // Not configured for work.
2989 case ao_status_none:
2990 break;
2991
2992 //This are stable modes. No need to do anything. (?)
2993 case ao_status_single_configured:
2994 case ao_status_stream_configured:
2995 case ao_status_stream_fifo_error:
2996 case ao_status_stream_buffer_error:
2997 case ao_status_stream_error:
2998 PERROR("Shouldn't be running!.\n");
2999 break;
3000
3001 case ao_status_stream_end:
3002 if (!instance->fifo) {
3003 PERROR_CRITICAL
3004 ("Streaming on single device! This feature is not implemented in this version!\n");
3005 instance->status = ao_status_stream_error;
3006 // Signal the end.
3007 signaling = 1;
3008 break;
3009 }
3010 case ao_status_single_end:
3011 if (status & ME4600_AO_STATUS_BIT_FSM) { // State machine is working but the status is set to end. Force stop.
3012
3013 // Wait for stop.
3014 reschedule = 1;
3015 }
3016
3017 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3018 // Stop all actions. No conditions! Block interrupts and trigger. Leave FIFO untouched!
3019 ctrl = inl(instance->ctrl_reg);
3020 ctrl |=
3021 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP
3022 | ME4600_AO_CTRL_BIT_RESET_IRQ;
3023 ctrl &=
3024 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3025 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3026 ctrl &=
3027 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3028 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
3029 outl(ctrl, instance->ctrl_reg);
3030 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3031 instance->reg_base,
3032 instance->ctrl_reg - instance->reg_base, ctrl);
3033 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3034 break;
3035
3036 // Single modes
3037 case ao_status_single_run_wait:
3038 case ao_status_single_run:
3039 case ao_status_single_end_wait:
3040
3041 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working.
3042 if (((instance->fifo)
3043 && (!(status & ME4600_AO_STATUS_BIT_EF)))
3044 || (!(instance->fifo))) { // Single is in end state.
3045 PDEBUG("Single call has been complited.\n");
3046
3047 // Set correct value for single_read();
3048 instance->single_value =
3049 instance->single_value_in_fifo;
3050
3051 // Set status as 'ao_status_single_end'
3052 instance->status = ao_status_single_end;
3053
3054 // Signal the end.
3055 signaling = 1;
3056 // Wait for stop ISM.
3057 reschedule = 1;
3058
3059 break;
3060 }
3061 }
3062 // Check timeout.
3063 if ((instance->timeout.delay) && ((jiffies - instance->timeout.start_time) >= instance->timeout.delay)) { // Timeout
3064 PDEBUG("Timeout reached.\n");
3065 // Stop all actions. No conditions! Block interrupts and trigger. Leave FIFO untouched!
3066 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3067 ctrl = inl(instance->ctrl_reg);
3068 ctrl |=
3069 ME4600_AO_CTRL_BIT_STOP |
3070 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
3071 ME4600_AO_CTRL_BIT_RESET_IRQ;
3072 ctrl &=
3073 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3074 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3075 /// Fix for timeout error.
3076 ctrl &=
3077 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3078 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
3079 if (instance->fifo) { //Disabling FIFO
3080 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
3081 }
3082 outl(ctrl, instance->ctrl_reg);
3083 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3084 instance->reg_base,
3085 instance->ctrl_reg - instance->reg_base,
3086 ctrl);
3087 spin_unlock_irqrestore(&instance->subdevice_lock,
3088 cpu_flags);
3089
3090 spin_lock(instance->preload_reg_lock);
3091 //Remove from synchronous start. Block triggering from this output.
3092 synch = inl(instance->preload_reg);
3093 synch &=
3094 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
3095 instance->ao_idx);
3096 if (!(instance->fifo)) { // No FIFO - set to single safe mode
3097 synch |=
3098 ME4600_AO_SYNC_HOLD << instance->ao_idx;
3099 }
3100 outl(synch, instance->preload_reg);
3101 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
3102 instance->reg_base,
3103 instance->preload_reg - instance->reg_base,
3104 synch);
3105 spin_unlock(instance->preload_reg_lock);
3106
3107 if (!(instance->fifo)) { // No FIFO
3108 // Restore old settings.
3109 PDEBUG("Write old value back to register.\n");
3110 outl(instance->single_value,
3111 instance->single_reg);
3112 PDEBUG_REG
3113 ("single_reg outl(0x%lX+0x%lX)=0x%x\n",
3114 instance->reg_base,
3115 instance->single_reg - instance->reg_base,
3116 instance->single_value);
3117 }
3118 // Set correct value for single_read();
3119 instance->single_value_in_fifo = instance->single_value;
3120
3121 instance->status = ao_status_single_end;
3122
3123 // Signal the end.
3124 signaling = 1;
3125 }
3126 // Wait for stop.
3127 reschedule = 1;
3128 break;
3129
3130 // Stream modes
3131 case ao_status_stream_run_wait:
3132 if (!instance->fifo) {
3133 PERROR_CRITICAL
3134 ("Streaming on single device! This feature is not implemented in this version!\n");
3135 instance->status = ao_status_stream_error;
3136 // Signal the end.
3137 signaling = 1;
3138 break;
3139 }
3140
3141 if (status & ME4600_AO_STATUS_BIT_FSM) { // State machine is working. Waiting for start finish.
3142 instance->status = ao_status_stream_run;
3143
3144 // Signal end of this step
3145 signaling = 1;
3146 } else { // State machine is not working.
3147 if (!(status & ME4600_AO_STATUS_BIT_EF)) { // FIFO is empty. Procedure has started and finish already!
3148 instance->status = ao_status_stream_end;
3149
3150 // Signal the end.
3151 signaling = 1;
3152 // Wait for stop.
3153 reschedule = 1;
3154 break;
3155 }
3156 }
3157
3158 // Check timeout.
3159 if ((instance->timeout.delay) && ((jiffies - instance->timeout.start_time) >= instance->timeout.delay)) { // Timeout
3160 PDEBUG("Timeout reached.\n");
3161 // Stop all actions. No conditions! Block interrupts. Leave FIFO untouched!
3162 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3163 ctrl = inl(instance->ctrl_reg);
3164 ctrl |=
3165 ME4600_AO_CTRL_BIT_STOP |
3166 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
3167 ME4600_AO_CTRL_BIT_RESET_IRQ;
3168 ctrl &=
3169 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3170 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3171 outl(ctrl, instance->ctrl_reg);
3172 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3173 instance->reg_base,
3174 instance->ctrl_reg - instance->reg_base,
3175 ctrl);
3176 spin_unlock_irqrestore(&instance->subdevice_lock,
3177 cpu_flags);
3178 spin_lock(instance->preload_reg_lock);
3179 //Remove from synchronous start. Block triggering from this output.
3180 synch = inl(instance->preload_reg);
3181 synch &=
3182 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
3183 instance->ao_idx);
3184 outl(synch, instance->preload_reg);
3185 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
3186 instance->reg_base,
3187 instance->preload_reg - instance->reg_base,
3188 synch);
3189 spin_unlock(instance->preload_reg_lock);
3190
3191 instance->status = ao_status_stream_end;
3192
3193 // Signal the end.
3194 signaling = 1;
3195 }
3196 // Wait for stop.
3197 reschedule = 1;
3198 break;
3199
3200 case ao_status_stream_run:
3201 if (!instance->fifo) {
3202 PERROR_CRITICAL
3203 ("Streaming on single device! This feature is not implemented in this version!\n");
3204 instance->status = ao_status_stream_error;
3205 // Signal the end.
3206 signaling = 1;
3207 break;
3208 }
3209
3210 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working. This is an error.
3211 // BROKEN PIPE!
3212 if (!(status & ME4600_AO_STATUS_BIT_EF)) { // FIFO is empty.
3213 if (me_circ_buf_values(&instance->circ_buf)) { // Software buffer is not empty.
3214 if (instance->stop_data_count && (instance->stop_data_count <= instance->data_count)) { //Finishing work. Requed data shown.
3215 PDEBUG
3216 ("ISM stoped. No data in FIFO. Buffer is not empty.\n");
3217 instance->status =
3218 ao_status_stream_end;
3219 } else {
3220 PERROR
3221 ("Output stream has been broken. ISM stoped. No data in FIFO. Buffer is not empty.\n");
3222 instance->status =
3223 ao_status_stream_buffer_error;
3224 }
3225 } else { // Software buffer is empty.
3226 PDEBUG
3227 ("ISM stoped. No data in FIFO. Buffer is empty.\n");
3228 instance->status = ao_status_stream_end;
3229 }
3230 } else { // There are still datas in FIFO.
3231 if (me_circ_buf_values(&instance->circ_buf)) { // Software buffer is not empty.
3232 PERROR
3233 ("Output stream has been broken. ISM stoped but some data in FIFO and buffer.\n");
3234 } else { // Software buffer is empty.
3235 PERROR
3236 ("Output stream has been broken. ISM stoped but some data in FIFO. Buffer is empty.\n");
3237 }
3238 instance->status = ao_status_stream_fifo_error;
3239
3240 }
3241
3242 // Signal the failure.
3243 signaling = 1;
3244 break;
3245 }
3246 // Wait for stop.
3247 reschedule = 1;
3248 break;
3249
3250 case ao_status_stream_end_wait:
3251 if (!instance->fifo) {
3252 PERROR_CRITICAL
3253 ("Streaming on single device! This feature is not implemented in this version!\n");
3254 instance->status = ao_status_stream_error;
3255 // Signal the end.
3256 signaling = 1;
3257 break;
3258 }
3259
3260 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working. Waiting for stop finish.
3261 instance->status = ao_status_stream_end;
3262 signaling = 1;
3263 }
3264 // State machine is working.
3265 reschedule = 1;
3266 break;
3267
3268 default:
3269 PERROR_CRITICAL("Status is in wrong state (%d)!\n",
3270 instance->status);
3271 instance->status = ao_status_stream_error;
3272 // Signal the end.
3273 signaling = 1;
3274 break;
3275
3276 }
3277
3278 if (signaling) { //Signal it.
3279 wake_up_interruptible_all(&instance->wait_queue);
3280 }
3281
3282 if (instance->ao_control_task_flag && reschedule) { // Reschedule task
3283 queue_delayed_work(instance->me4600_workqueue,
3284 &instance->ao_control_task, 1);
3285 } else {
3286 PINFO("<%s> Ending control task.\n", __func__);
3287 }
3288
3289 }
3290 #else
3291 /// @note SPECIAL BUILD FOR BOSCH
3292 /// @author Guenter Gebhardt
3293 static int me4600_ao_io_reset_subdevice(me_subdevice_t *subdevice,
3294 struct file *filep, int flags)
3295 {
3296 me4600_ao_subdevice_t *instance;
3297 int err = ME_ERRNO_SUCCESS;
3298 uint32_t tmp;
3299 unsigned long status;
3300
3301 PDEBUG("executed.\n");
3302
3303 instance = (me4600_ao_subdevice_t *) subdevice;
3304
3305 ME_SUBDEVICE_ENTER spin_lock_irqsave(&instance->subdevice_lock, status);
3306 spin_lock(instance->preload_reg_lock);
3307 tmp = inl(instance->preload_reg);
3308 tmp &= ~(0x10001 << instance->ao_idx);
3309 outl(tmp, instance->preload_reg);
3310 *instance->preload_flags &= ~(0x1 << instance->ao_idx);
3311 spin_unlock(instance->preload_reg_lock);
3312
3313 tmp = inl(instance->ctrl_reg);
3314 tmp |= ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3315 outl(tmp, instance->ctrl_reg);
3316
3317 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
3318
3319 outl(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP,
3320 instance->ctrl_reg);
3321
3322 outl(0x8000, instance->single_reg);
3323
3324 instance->single_value = 0x8000;
3325 instance->circ_buf.head = 0;
3326 instance->circ_buf.tail = 0;
3327
3328 spin_unlock_irqrestore(&instance->subdevice_lock, status);
3329
3330 ME_SUBDEVICE_EXIT;
3331
3332 return err;
3333 }
3334
3335 static int me4600_ao_io_single_config(me_subdevice_t *subdevice,
3336 struct file *filep,
3337 int channel,
3338 int single_config,
3339 int ref,
3340 int trig_chan,
3341 int trig_type, int trig_edge, int flags)
3342 {
3343 me4600_ao_subdevice_t *instance;
3344 int err = ME_ERRNO_SUCCESS;
3345 uint32_t tmp;
3346 unsigned long cpu_flags;
3347
3348 PDEBUG("executed.\n");
3349
3350 instance = (me4600_ao_subdevice_t *) subdevice;
3351
3352 ME_SUBDEVICE_ENTER
3353 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3354
3355 if (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) {
3356 PERROR("Subdevice is busy.\n");
3357 err = ME_ERRNO_SUBDEVICE_BUSY;
3358 goto ERROR;
3359 }
3360
3361 if (channel == 0) {
3362 if (single_config == 0) {
3363 if (ref == ME_REF_AO_GROUND) {
3364 if (trig_chan == ME_TRIG_CHAN_DEFAULT) {
3365 if (trig_type == ME_TRIG_TYPE_SW) {
3366 tmp = inl(instance->ctrl_reg);
3367 tmp |=
3368 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3369 outl(tmp, instance->ctrl_reg);
3370 tmp =
3371 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3372 outl(tmp, instance->ctrl_reg);
3373
3374 spin_lock(instance->
3375 preload_reg_lock);
3376 tmp =
3377 inl(instance->preload_reg);
3378 tmp &=
3379 ~(0x10001 << instance->
3380 ao_idx);
3381 outl(tmp,
3382 instance->preload_reg);
3383 *instance->preload_flags &=
3384 ~(0x1 << instance->ao_idx);
3385 spin_unlock(instance->
3386 preload_reg_lock);
3387 } else if (trig_type ==
3388 ME_TRIG_TYPE_EXT_DIGITAL) {
3389 if (trig_edge ==
3390 ME_TRIG_EDGE_RISING) {
3391 tmp =
3392 inl(instance->
3393 ctrl_reg);
3394 tmp |=
3395 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3396 outl(tmp,
3397 instance->
3398 ctrl_reg);
3399 tmp =
3400 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3401 |
3402 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3403 outl(tmp,
3404 instance->
3405 ctrl_reg);
3406 } else if (trig_edge ==
3407 ME_TRIG_EDGE_FALLING)
3408 {
3409 tmp =
3410 inl(instance->
3411 ctrl_reg);
3412 tmp |=
3413 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3414 outl(tmp,
3415 instance->
3416 ctrl_reg);
3417 tmp =
3418 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3419 |
3420 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG
3421 |
3422 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3423 outl(tmp,
3424 instance->
3425 ctrl_reg);
3426 } else if (trig_edge ==
3427 ME_TRIG_EDGE_ANY) {
3428 tmp =
3429 inl(instance->
3430 ctrl_reg);
3431 tmp |=
3432 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3433 outl(tmp,
3434 instance->
3435 ctrl_reg);
3436 tmp =
3437 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3438 |
3439 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG
3440 |
3441 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE
3442 |
3443 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3444 outl(tmp,
3445 instance->
3446 ctrl_reg);
3447 } else {
3448 PERROR
3449 ("Invalid trigger edge.\n");
3450 err =
3451 ME_ERRNO_INVALID_TRIG_EDGE;
3452 goto ERROR;
3453 }
3454
3455 spin_lock(instance->
3456 preload_reg_lock);
3457
3458 tmp =
3459 inl(instance->preload_reg);
3460 tmp &=
3461 ~(0x10001 << instance->
3462 ao_idx);
3463 tmp |= 0x1 << instance->ao_idx;
3464 outl(tmp,
3465 instance->preload_reg);
3466 *instance->preload_flags &=
3467 ~(0x1 << instance->ao_idx);
3468 spin_unlock(instance->
3469 preload_reg_lock);
3470 } else {
3471 PERROR
3472 ("Invalid trigger type.\n");
3473 err =
3474 ME_ERRNO_INVALID_TRIG_TYPE;
3475 goto ERROR;
3476 }
3477 } else if (trig_chan ==
3478 ME_TRIG_CHAN_SYNCHRONOUS) {
3479 if (trig_type == ME_TRIG_TYPE_SW) {
3480 tmp = inl(instance->ctrl_reg);
3481 tmp |=
3482 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3483 outl(tmp, instance->ctrl_reg);
3484 tmp =
3485 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3486 outl(tmp, instance->ctrl_reg);
3487
3488 spin_lock(instance->
3489 preload_reg_lock);
3490 tmp =
3491 inl(instance->preload_reg);
3492 tmp &=
3493 ~(0x10001 << instance->
3494 ao_idx);
3495 tmp |= 0x1 << instance->ao_idx;
3496 outl(tmp,
3497 instance->preload_reg);
3498 *instance->preload_flags |=
3499 0x1 << instance->ao_idx;
3500 spin_unlock(instance->
3501 preload_reg_lock);
3502 } else if (trig_type ==
3503 ME_TRIG_TYPE_EXT_DIGITAL) {
3504 if (trig_edge ==
3505 ME_TRIG_EDGE_RISING) {
3506 tmp =
3507 inl(instance->
3508 ctrl_reg);
3509 tmp |=
3510 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3511 outl(tmp,
3512 instance->
3513 ctrl_reg);
3514 tmp =
3515 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3516 outl(tmp,
3517 instance->
3518 ctrl_reg);
3519 } else if (trig_edge ==
3520 ME_TRIG_EDGE_FALLING)
3521 {
3522 tmp =
3523 inl(instance->
3524 ctrl_reg);
3525 tmp |=
3526 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3527 outl(tmp,
3528 instance->
3529 ctrl_reg);
3530 tmp =
3531 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3532 |
3533 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3534 outl(tmp,
3535 instance->
3536 ctrl_reg);
3537 } else if (trig_edge ==
3538 ME_TRIG_EDGE_ANY) {
3539 tmp =
3540 inl(instance->
3541 ctrl_reg);
3542 tmp |=
3543 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3544 outl(tmp,
3545 instance->
3546 ctrl_reg);
3547 tmp =
3548 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3549 |
3550 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE
3551 |
3552 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3553 outl(tmp,
3554 instance->
3555 ctrl_reg);
3556 } else {
3557 PERROR
3558 ("Invalid trigger edge.\n");
3559 err =
3560 ME_ERRNO_INVALID_TRIG_EDGE;
3561 goto ERROR;
3562 }
3563
3564 spin_lock(instance->
3565 preload_reg_lock);
3566
3567 tmp =
3568 inl(instance->preload_reg);
3569 tmp |=
3570 0x10001 << instance->ao_idx;
3571 outl(tmp,
3572 instance->preload_reg);
3573 *instance->preload_flags &=
3574 ~(0x1 << instance->ao_idx);
3575 spin_unlock(instance->
3576 preload_reg_lock);
3577 } else {
3578 PERROR
3579 ("Invalid trigger type.\n");
3580 err =
3581 ME_ERRNO_INVALID_TRIG_TYPE;
3582 goto ERROR;
3583 }
3584 } else {
3585 PERROR
3586 ("Invalid trigger channel specified.\n");
3587 err = ME_ERRNO_INVALID_REF;
3588 goto ERROR;
3589 }
3590 } else {
3591 PERROR("Invalid analog reference specified.\n");
3592 err = ME_ERRNO_INVALID_REF;
3593 goto ERROR;
3594 }
3595 } else {
3596 PERROR("Invalid single config specified.\n");
3597 err = ME_ERRNO_INVALID_SINGLE_CONFIG;
3598 goto ERROR;
3599 }
3600 } else {
3601 PERROR("Invalid channel number specified.\n");
3602 err = ME_ERRNO_INVALID_CHANNEL;
3603 goto ERROR;
3604 }
3605
3606 ERROR:
3607
3608 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3609
3610 ME_SUBDEVICE_EXIT;
3611
3612 return err;
3613 }
3614
3615 static int me4600_ao_io_single_read(me_subdevice_t *subdevice,
3616 struct file *filep,
3617 int channel,
3618 int *value, int time_out, int flags)
3619 {
3620 me4600_ao_subdevice_t *instance;
3621 int err = ME_ERRNO_SUCCESS;
3622 unsigned long tmp;
3623 unsigned long cpu_flags;
3624
3625 PDEBUG("executed.\n");
3626
3627 instance = (me4600_ao_subdevice_t *) subdevice;
3628
3629 if (channel != 0) {
3630 PERROR("Invalid channel number specified.\n");
3631 return ME_ERRNO_INVALID_CHANNEL;
3632 }
3633
3634 ME_SUBDEVICE_ENTER
3635 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3636 tmp = inl(instance->ctrl_reg);
3637
3638 if (tmp & 0x3) {
3639 PERROR("Not in single mode.\n");
3640 err = ME_ERRNO_PREVIOUS_CONFIG;
3641 } else {
3642 *value = instance->single_value;
3643 }
3644
3645 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3646
3647 ME_SUBDEVICE_EXIT;
3648
3649 return err;
3650 }
3651
3652 static int me4600_ao_io_single_write(me_subdevice_t *subdevice,
3653 struct file *filep,
3654 int channel,
3655 int value, int time_out, int flags)
3656 {
3657 me4600_ao_subdevice_t *instance;
3658 int err = ME_ERRNO_SUCCESS;
3659 unsigned long mask = 0;
3660 unsigned long tmp;
3661 unsigned long cpu_flags;
3662 int i;
3663 wait_queue_head_t queue;
3664 unsigned long j;
3665 unsigned long delay = 0;
3666
3667 PDEBUG("executed.\n");
3668
3669 init_waitqueue_head(&queue);
3670
3671 instance = (me4600_ao_subdevice_t *) subdevice;
3672
3673 if (channel != 0) {
3674 PERROR("Invalid channel number specified.\n");
3675 return ME_ERRNO_INVALID_CHANNEL;
3676 }
3677
3678 if (time_out < 0) {
3679 PERROR("Invalid timeout specified.\n");
3680 return ME_ERRNO_INVALID_TIMEOUT;
3681 }
3682
3683 if (time_out) {
3684 delay = (time_out * HZ) / 1000;
3685
3686 if (delay == 0)
3687 delay = 1;
3688 }
3689
3690 ME_SUBDEVICE_ENTER
3691 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3692
3693 tmp = inl(instance->ctrl_reg);
3694
3695 if (tmp & 0x3) {
3696 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3697 PERROR("Not in single mode.\n");
3698 err = ME_ERRNO_PREVIOUS_CONFIG;
3699 goto ERROR;
3700 }
3701
3702 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) {
3703 outl(value, instance->single_reg);
3704 instance->single_value = value;
3705 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3706
3707 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
3708 j = jiffies;
3709
3710 while (inl(instance->status_reg) &
3711 ME4600_AO_STATUS_BIT_FSM) {
3712 interruptible_sleep_on_timeout(&queue, 1);
3713
3714 if (signal_pending(current)) {
3715 PERROR
3716 ("Wait on external trigger interrupted by signal.\n");
3717 err = ME_ERRNO_SIGNAL;
3718 goto ERROR;
3719 }
3720
3721 if (delay && ((jiffies - j) > delay)) {
3722 PERROR("Timeout reached.\n");
3723 err = ME_ERRNO_TIMEOUT;
3724 goto ERROR;
3725 }
3726 }
3727 }
3728 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx))
3729 == (0x10001 << instance->ao_idx)) {
3730 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) {
3731 tmp |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3732 outl(tmp, instance->ctrl_reg);
3733 outl(value, instance->single_reg);
3734 instance->single_value = value;
3735 spin_unlock_irqrestore(&instance->subdevice_lock,
3736 cpu_flags);
3737
3738 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
3739 j = jiffies;
3740
3741 while (inl(instance->status_reg) &
3742 ME4600_AO_STATUS_BIT_FSM) {
3743 interruptible_sleep_on_timeout(&queue,
3744 1);
3745
3746 if (signal_pending(current)) {
3747 PERROR
3748 ("Wait on external trigger interrupted by signal.\n");
3749 err = ME_ERRNO_SIGNAL;
3750 goto ERROR;
3751 }
3752
3753 if (delay && ((jiffies - j) > delay)) {
3754 PERROR("Timeout reached.\n");
3755 err = ME_ERRNO_TIMEOUT;
3756 goto ERROR;
3757 }
3758 }
3759 }
3760 } else {
3761 outl(value, instance->single_reg);
3762 instance->single_value = value;
3763 spin_unlock_irqrestore(&instance->subdevice_lock,
3764 cpu_flags);
3765 }
3766 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx))
3767 == (0x1 << instance->ao_idx)) {
3768 outl(value, instance->single_reg);
3769 instance->single_value = value;
3770
3771 PDEBUG("Synchronous SW, flags = 0x%X.\n", flags);
3772
3773 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) {
3774 PDEBUG("Trigger synchronous SW.\n");
3775 spin_lock(instance->preload_reg_lock);
3776 tmp = inl(instance->preload_reg);
3777
3778 for (i = 0; i < ME4600_AO_MAX_SUBDEVICES; i++) {
3779 if ((*instance->preload_flags & (0x1 << i))) {
3780 if ((tmp & (0x10001 << i)) ==
3781 (0x1 << i)) {
3782 mask |= 0x1 << i;
3783 }
3784 }
3785 }
3786
3787 tmp &= ~(mask);
3788
3789 outl(tmp, instance->preload_reg);
3790 spin_unlock(instance->preload_reg_lock);
3791 }
3792
3793 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3794 } else {
3795 outl(value, instance->single_reg);
3796 instance->single_value = value;
3797 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3798 }
3799
3800 ERROR:
3801
3802 ME_SUBDEVICE_EXIT;
3803
3804 return err;
3805 }
3806
3807 static int me4600_ao_io_stream_config(me_subdevice_t *subdevice,
3808 struct file *filep,
3809 meIOStreamConfig_t *config_list,
3810 int count,
3811 meIOStreamTrigger_t *trigger,
3812 int fifo_irq_threshold, int flags)
3813 {
3814 me4600_ao_subdevice_t *instance;
3815 int err = ME_ERRNO_SUCCESS;
3816 unsigned long ctrl;
3817 unsigned long tmp;
3818 unsigned long cpu_flags;
3819 uint64_t conv_ticks;
3820 unsigned int conv_start_ticks_low = trigger->iConvStartTicksLow;
3821 unsigned int conv_start_ticks_high = trigger->iConvStartTicksHigh;
3822
3823 PDEBUG("executed.\n");
3824
3825 instance = (me4600_ao_subdevice_t *) subdevice;
3826
3827 conv_ticks =
3828 (uint64_t) conv_start_ticks_low +
3829 ((uint64_t) conv_start_ticks_high << 32);
3830
3831 if (!instance->fifo) {
3832 PERROR("Not a streaming ao.\n");
3833 return ME_ERRNO_NOT_SUPPORTED;
3834 }
3835
3836 ME_SUBDEVICE_ENTER
3837 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3838
3839 if ((inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_FSM) {
3840 PERROR("Subdevice is busy.\n");
3841 err = ME_ERRNO_SUBDEVICE_BUSY;
3842 goto ERROR;
3843 }
3844
3845 ctrl = inl(instance->ctrl_reg);
3846 ctrl |= ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3847 outl(ctrl, instance->ctrl_reg);
3848 ctrl = ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3849 outl(ctrl, instance->ctrl_reg);
3850
3851 if (count != 1) {
3852 PERROR("Invalid stream configuration list count specified.\n");
3853 err = ME_ERRNO_INVALID_CONFIG_LIST_COUNT;
3854 goto ERROR;
3855 }
3856
3857 if (config_list[0].iChannel != 0) {
3858 PERROR("Invalid channel number specified.\n");
3859 err = ME_ERRNO_INVALID_CHANNEL;
3860 goto ERROR;
3861 }
3862
3863 if (config_list[0].iStreamConfig != 0) {
3864 PERROR("Invalid stream config specified.\n");
3865 err = ME_ERRNO_INVALID_STREAM_CONFIG;
3866 goto ERROR;
3867 }
3868
3869 if (config_list[0].iRef != ME_REF_AO_GROUND) {
3870 PERROR("Invalid analog reference.\n");
3871 err = ME_ERRNO_INVALID_REF;
3872 goto ERROR;
3873 }
3874
3875 if ((trigger->iAcqStartTicksLow != 0)
3876 || (trigger->iAcqStartTicksHigh != 0)) {
3877 PERROR
3878 ("Invalid acquisition start trigger argument specified.\n");
3879 err = ME_ERRNO_INVALID_ACQ_START_ARG;
3880 goto ERROR;
3881 }
3882
3883 switch (trigger->iAcqStartTrigType) {
3884
3885 case ME_TRIG_TYPE_SW:
3886 break;
3887
3888 case ME_TRIG_TYPE_EXT_DIGITAL:
3889 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3890
3891 switch (trigger->iAcqStartTrigEdge) {
3892
3893 case ME_TRIG_EDGE_RISING:
3894 break;
3895
3896 case ME_TRIG_EDGE_FALLING:
3897 ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3898
3899 break;
3900
3901 case ME_TRIG_EDGE_ANY:
3902 ctrl |=
3903 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3904 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3905
3906 break;
3907
3908 default:
3909 PERROR
3910 ("Invalid acquisition start trigger edge specified.\n");
3911
3912 err = ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
3913
3914 goto ERROR;
3915
3916 break;
3917 }
3918
3919 break;
3920
3921 default:
3922 PERROR("Invalid acquisition start trigger type specified.\n");
3923
3924 err = ME_ERRNO_INVALID_ACQ_START_TRIG_TYPE;
3925
3926 goto ERROR;
3927
3928 break;
3929 }
3930
3931 switch (trigger->iScanStartTrigType) {
3932
3933 case ME_TRIG_TYPE_FOLLOW:
3934 break;
3935
3936 default:
3937 PERROR("Invalid scan start trigger type specified.\n");
3938
3939 err = ME_ERRNO_INVALID_SCAN_START_TRIG_TYPE;
3940
3941 goto ERROR;
3942
3943 break;
3944 }
3945
3946 switch (trigger->iConvStartTrigType) {
3947
3948 case ME_TRIG_TYPE_TIMER:
3949 if ((conv_ticks < ME4600_AO_MIN_CHAN_TICKS)
3950 || (conv_ticks > ME4600_AO_MAX_CHAN_TICKS)) {
3951 PERROR
3952 ("Invalid conv start trigger argument specified.\n");
3953 err = ME_ERRNO_INVALID_CONV_START_ARG;
3954 goto ERROR;
3955 }
3956
3957 break;
3958
3959 default:
3960 PERROR("Invalid conv start trigger type specified.\n");
3961
3962 err = ME_ERRNO_INVALID_CONV_START_TRIG_TYPE;
3963
3964 goto ERROR;
3965
3966 break;
3967 }
3968
3969 /* Preset to hardware wraparound mode */
3970 instance->flags &= ~(ME4600_AO_FLAGS_SW_WRAP_MODE_MASK);
3971
3972 switch (trigger->iScanStopTrigType) {
3973
3974 case ME_TRIG_TYPE_NONE:
3975 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
3976 /* Set flags to indicate usage of software mode. */
3977 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_INF;
3978 instance->wrap_count = 0;
3979 instance->wrap_remaining = 0;
3980 }
3981
3982 break;
3983
3984 case ME_TRIG_TYPE_COUNT:
3985 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
3986 if (trigger->iScanStopCount <= 0) {
3987 PERROR("Invalid scan stop count specified.\n");
3988 err = ME_ERRNO_INVALID_SCAN_STOP_ARG;
3989 goto ERROR;
3990 }
3991
3992 /* Set flags to indicate usage of software mode. */
3993 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_FIN;
3994 instance->wrap_count = trigger->iScanStopCount;
3995 instance->wrap_remaining = trigger->iScanStopCount;
3996 } else {
3997 PERROR("Invalid scan stop trigger type specified.\n");
3998 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
3999 goto ERROR;
4000 }
4001
4002 break;
4003
4004 default:
4005 PERROR("Invalid scan stop trigger type specified.\n");
4006
4007 err = ME_ERRNO_INVALID_SCAN_STOP_TRIG_TYPE;
4008
4009 goto ERROR;
4010
4011 break;
4012 }
4013
4014 switch (trigger->iAcqStopTrigType) {
4015
4016 case ME_TRIG_TYPE_NONE:
4017 break;
4018
4019 case ME_TRIG_TYPE_COUNT:
4020 if (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE) {
4021 PERROR("Invalid acq stop trigger type specified.\n");
4022 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4023 goto ERROR;
4024 }
4025
4026 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4027 if (trigger->iAcqStopCount <= 0) {
4028 PERROR("Invalid acq stop count specified.\n");
4029 err = ME_ERRNO_INVALID_ACQ_STOP_ARG;
4030 goto ERROR;
4031 }
4032
4033 /* Set flags to indicate usage of software mode. */
4034 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_FIN;
4035 instance->wrap_count = trigger->iAcqStopCount;
4036 instance->wrap_remaining = trigger->iAcqStopCount;
4037 } else {
4038 PERROR("Invalid acp stop trigger type specified.\n");
4039 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4040 goto ERROR;
4041 }
4042
4043 break;
4044
4045 default:
4046 PERROR("Invalid acq stop trigger type specified.\n");
4047 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4048 goto ERROR;
4049 break;
4050 }
4051
4052 switch (trigger->iAcqStartTrigChan) {
4053
4054 case ME_TRIG_CHAN_DEFAULT:
4055 spin_lock(instance->preload_reg_lock);
4056 tmp = inl(instance->preload_reg);
4057 tmp &= ~(0x10001 << instance->ao_idx);
4058 outl(tmp, instance->preload_reg);
4059 spin_unlock(instance->preload_reg_lock);
4060
4061 break;
4062
4063 case ME_TRIG_CHAN_SYNCHRONOUS:
4064 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_SW) {
4065 spin_lock(instance->preload_reg_lock);
4066 tmp = inl(instance->preload_reg);
4067 tmp &= ~(0x10001 << instance->ao_idx);
4068 outl(tmp, instance->preload_reg);
4069 tmp |= 0x1 << instance->ao_idx;
4070 outl(tmp, instance->preload_reg);
4071 spin_unlock(instance->preload_reg_lock);
4072 } else {
4073 ctrl &= ~(ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
4074 spin_lock(instance->preload_reg_lock);
4075 tmp = inl(instance->preload_reg);
4076 tmp &= ~(0x10001 << instance->ao_idx);
4077 outl(tmp, instance->preload_reg);
4078 tmp |= 0x10000 << instance->ao_idx;
4079 outl(tmp, instance->preload_reg);
4080 spin_unlock(instance->preload_reg_lock);
4081 }
4082
4083 break;
4084
4085 default:
4086 PERROR("Invalid acq start trigger channel specified.\n");
4087 err = ME_ERRNO_INVALID_ACQ_START_TRIG_CHAN;
4088 goto ERROR;
4089
4090 break;
4091 }
4092
4093 outl(conv_ticks - 2, instance->timer_reg);
4094
4095 if (flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) {
4096 if (instance->ao_idx == 3) {
4097 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_DO;
4098 } else {
4099 err = ME_ERRNO_INVALID_FLAGS;
4100 goto ERROR;
4101 }
4102 } else {
4103 if (instance->ao_idx == 3) {
4104 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_DO;
4105 }
4106 }
4107
4108 /* Set hardware mode. */
4109 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4110 ctrl |= ME4600_AO_CTRL_BIT_MODE_0;
4111 } else {
4112 ctrl |= ME4600_AO_CTRL_BIT_MODE_1;
4113 }
4114
4115 PDEBUG("Preload word = 0x%X.\n", inl(instance->preload_reg));
4116
4117 PDEBUG("Ctrl word = 0x%lX.\n", ctrl);
4118 outl(ctrl, instance->ctrl_reg); // Write the control word
4119
4120 ERROR:
4121
4122 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4123
4124 ME_SUBDEVICE_EXIT;
4125
4126 return err;
4127 }
4128
4129 static int me4600_ao_io_stream_new_values(me_subdevice_t *subdevice,
4130 struct file *filep,
4131 int time_out, int *count, int flags)
4132 {
4133 me4600_ao_subdevice_t *instance;
4134 int err = ME_ERRNO_SUCCESS;
4135 long t = 0;
4136 long j;
4137
4138 PDEBUG("executed.\n");
4139
4140 instance = (me4600_ao_subdevice_t *) subdevice;
4141
4142 if (!instance->fifo) {
4143 PERROR("Not a streaming ao.\n");
4144 return ME_ERRNO_NOT_SUPPORTED;
4145 }
4146
4147 if (time_out < 0) {
4148 PERROR("Invalid time_out specified.\n");
4149 return ME_ERRNO_INVALID_TIMEOUT;
4150 }
4151
4152 if (time_out) {
4153 t = (time_out * HZ) / 1000;
4154
4155 if (t == 0)
4156 t = 1;
4157 }
4158
4159 *count = 0;
4160
4161 ME_SUBDEVICE_ENTER;
4162
4163 if (t) {
4164 j = jiffies;
4165 wait_event_interruptible_timeout(instance->wait_queue,
4166 ((me_circ_buf_space
4167 (&instance->circ_buf))
4168 || !(inl(instance->status_reg)
4169 &
4170 ME4600_AO_STATUS_BIT_FSM)),
4171 t);
4172
4173 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
4174 PERROR("AO subdevice is not running.\n");
4175 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
4176 } else if (signal_pending(current)) {
4177 PERROR("Wait on values interrupted from signal.\n");
4178 err = ME_ERRNO_SIGNAL;
4179 } else if ((jiffies - j) >= t) {
4180 PERROR("Wait on values timed out.\n");
4181 err = ME_ERRNO_TIMEOUT;
4182 } else {
4183 *count = me_circ_buf_space(&instance->circ_buf);
4184 }
4185 } else {
4186 wait_event_interruptible(instance->wait_queue,
4187 ((me_circ_buf_space
4188 (&instance->circ_buf))
4189 || !(inl(instance->status_reg) &
4190 ME4600_AO_STATUS_BIT_FSM)));
4191
4192 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
4193 PERROR("AO subdevice is not running.\n");
4194 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
4195 } else if (signal_pending(current)) {
4196 PERROR("Wait on values interrupted from signal.\n");
4197 err = ME_ERRNO_SIGNAL;
4198 } else {
4199 *count = me_circ_buf_space(&instance->circ_buf);
4200 }
4201 }
4202
4203 ME_SUBDEVICE_EXIT;
4204
4205 return err;
4206 }
4207
4208 static void stop_immediately(me4600_ao_subdevice_t *instance)
4209 {
4210 unsigned long cpu_flags;
4211 uint32_t tmp;
4212
4213 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4214 tmp = inl(instance->ctrl_reg);
4215 tmp |= ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4216 outl(tmp, instance->ctrl_reg);
4217
4218 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
4219
4220 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4221 }
4222
4223 static int me4600_ao_io_stream_start(me_subdevice_t *subdevice,
4224 struct file *filep,
4225 int start_mode, int time_out, int flags)
4226 {
4227 me4600_ao_subdevice_t *instance;
4228 int err = ME_ERRNO_SUCCESS;
4229 unsigned long cpu_flags = 0;
4230 unsigned long ref;
4231 unsigned long tmp;
4232 unsigned long delay = 0;
4233 wait_queue_head_t queue;
4234
4235 PDEBUG("executed.\n");
4236
4237 instance = (me4600_ao_subdevice_t *) subdevice;
4238
4239 init_waitqueue_head(&queue);
4240
4241 if (time_out < 0) {
4242 PERROR("Invalid timeout specified.\n");
4243 return ME_ERRNO_INVALID_TIMEOUT;
4244 }
4245
4246 if (time_out) {
4247 delay = (time_out * HZ) / 1000;
4248
4249 if (delay == 0)
4250 delay = 1;
4251 }
4252
4253 if (!instance->fifo) {
4254 PERROR("Not a streaming ao.\n");
4255 return ME_ERRNO_NOT_SUPPORTED;
4256 }
4257
4258 ME_SUBDEVICE_ENTER
4259 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4260
4261 tmp = inl(instance->ctrl_reg);
4262
4263 switch (tmp & (ME4600_AO_CTRL_MASK_MODE)) {
4264
4265 case 0: // Single mode
4266 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4267 PERROR("Subdevice is configured in single mode.\n");
4268 err = ME_ERRNO_PREVIOUS_CONFIG;
4269 goto ERROR;
4270
4271 case 1: // Wraparound mode
4272 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) { // Normal wraparound with external trigger
4273
4274 if ((inl(instance->status_reg) &
4275 ME4600_AO_STATUS_BIT_FSM)) {
4276 spin_unlock_irqrestore(&instance->
4277 subdevice_lock,
4278 cpu_flags);
4279 PERROR("Conversion is already running.\n");
4280 err = ME_ERRNO_SUBDEVICE_BUSY;
4281 goto ERROR;
4282 }
4283
4284 tmp &=
4285 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4286 ME4600_AO_CTRL_BIT_STOP |
4287 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4288
4289 outl(tmp, instance->ctrl_reg);
4290 spin_unlock_irqrestore(&instance->subdevice_lock,
4291 cpu_flags);
4292
4293 if (start_mode == ME_START_MODE_BLOCKING) {
4294 init_waitqueue_head(&queue);
4295
4296 if (delay) {
4297 ref = jiffies;
4298
4299 while (!
4300 (inl(instance->status_reg) &
4301 ME4600_AO_STATUS_BIT_FSM)) {
4302 interruptible_sleep_on_timeout
4303 (&queue, 1);
4304
4305 if (signal_pending(current)) {
4306 PERROR
4307 ("Wait on start of state machine interrupted.\n");
4308 stop_immediately
4309 (instance);
4310 err = ME_ERRNO_SIGNAL;
4311 goto ERROR;
4312 }
4313
4314 if (((jiffies - ref) >= delay)) {
4315 PERROR
4316 ("Timeout reached.\n");
4317 stop_immediately
4318 (instance);
4319 err = ME_ERRNO_TIMEOUT;
4320 goto ERROR;
4321 }
4322 }
4323 } else {
4324 while (!
4325 (inl(instance->status_reg) &
4326 ME4600_AO_STATUS_BIT_FSM)) {
4327 interruptible_sleep_on_timeout
4328 (&queue, 1);
4329
4330 if (signal_pending(current)) {
4331 PERROR
4332 ("Wait on start of state machine interrupted.\n");
4333 stop_immediately
4334 (instance);
4335 err = ME_ERRNO_SIGNAL;
4336 goto ERROR;
4337 }
4338 }
4339 }
4340 } else if (start_mode == ME_START_MODE_NONBLOCKING) {
4341 } else {
4342 PERROR("Invalid start mode specified.\n");
4343 err = ME_ERRNO_INVALID_START_MODE;
4344 goto ERROR;
4345 }
4346 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x10000 << instance->ao_idx)) { // Synchronous with external trigger
4347
4348 if ((inl(instance->status_reg) &
4349 ME4600_AO_STATUS_BIT_FSM)) {
4350 spin_unlock_irqrestore(&instance->
4351 subdevice_lock,
4352 cpu_flags);
4353 PERROR("Conversion is already running.\n");
4354 err = ME_ERRNO_SUBDEVICE_BUSY;
4355 goto ERROR;
4356 }
4357
4358 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4359 tmp |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
4360 tmp &=
4361 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4362 ME4600_AO_CTRL_BIT_STOP |
4363 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4364 outl(tmp, instance->ctrl_reg);
4365 spin_unlock_irqrestore(&instance->
4366 subdevice_lock,
4367 cpu_flags);
4368
4369 if (start_mode == ME_START_MODE_BLOCKING) {
4370 init_waitqueue_head(&queue);
4371
4372 if (delay) {
4373 ref = jiffies;
4374
4375 while (!
4376 (inl
4377 (instance->
4378 status_reg) &
4379 ME4600_AO_STATUS_BIT_FSM))
4380 {
4381 interruptible_sleep_on_timeout
4382 (&queue, 1);
4383
4384 if (signal_pending
4385 (current)) {
4386 PERROR
4387 ("Wait on start of state machine interrupted.\n");
4388 stop_immediately
4389 (instance);
4390 err =
4391 ME_ERRNO_SIGNAL;
4392 goto ERROR;
4393 }
4394
4395 if (((jiffies - ref) >=
4396 delay)) {
4397 PERROR
4398 ("Timeout reached.\n");
4399 stop_immediately
4400 (instance);
4401 err =
4402 ME_ERRNO_TIMEOUT;
4403 goto ERROR;
4404 }
4405 }
4406 } else {
4407 while (!
4408 (inl
4409 (instance->
4410 status_reg) &
4411 ME4600_AO_STATUS_BIT_FSM))
4412 {
4413 interruptible_sleep_on_timeout
4414 (&queue, 1);
4415
4416 if (signal_pending
4417 (current)) {
4418 PERROR
4419 ("Wait on start of state machine interrupted.\n");
4420 stop_immediately
4421 (instance);
4422 err =
4423 ME_ERRNO_SIGNAL;
4424 goto ERROR;
4425 }
4426 }
4427 }
4428 } else if (start_mode ==
4429 ME_START_MODE_NONBLOCKING) {
4430 } else {
4431 PERROR
4432 ("Invalid start mode specified.\n");
4433 err = ME_ERRNO_INVALID_START_MODE;
4434 goto ERROR;
4435 }
4436 } else {
4437 tmp &=
4438 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4439 ME4600_AO_CTRL_BIT_STOP |
4440 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4441 outl(tmp, instance->ctrl_reg);
4442 spin_unlock_irqrestore(&instance->
4443 subdevice_lock,
4444 cpu_flags);
4445 }
4446 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x1 << instance->ao_idx)) { // Synchronous wraparound with sw trigger
4447
4448 if ((inl(instance->status_reg) &
4449 ME4600_AO_STATUS_BIT_FSM)) {
4450 spin_unlock_irqrestore(&instance->
4451 subdevice_lock,
4452 cpu_flags);
4453 PERROR("Conversion is already running.\n");
4454 err = ME_ERRNO_SUBDEVICE_BUSY;
4455 goto ERROR;
4456 }
4457
4458 tmp &=
4459 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4460 ME4600_AO_CTRL_BIT_STOP |
4461 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4462
4463 outl(tmp, instance->ctrl_reg);
4464
4465 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4466 outl(0x8000, instance->single_reg);
4467 instance->single_value = 0x8000;
4468 }
4469
4470 spin_unlock_irqrestore(&instance->subdevice_lock,
4471 cpu_flags);
4472 } else { // Software start
4473
4474 if ((inl(instance->status_reg) &
4475 ME4600_AO_STATUS_BIT_FSM)) {
4476 spin_unlock_irqrestore(&instance->
4477 subdevice_lock,
4478 cpu_flags);
4479 PERROR("Conversion is already running.\n");
4480 err = ME_ERRNO_SUBDEVICE_BUSY;
4481 goto ERROR;
4482 }
4483
4484 tmp &=
4485 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4486 ME4600_AO_CTRL_BIT_STOP |
4487 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4488
4489 outl(tmp, instance->ctrl_reg);
4490
4491 outl(0x8000, instance->single_reg);
4492 instance->single_value = 0x8000;
4493
4494 spin_unlock_irqrestore(&instance->subdevice_lock,
4495 cpu_flags);
4496 }
4497
4498 break;
4499
4500 case 2: // Continuous mode
4501 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) { // Externally triggered
4502
4503 if ((inl(instance->status_reg) &
4504 ME4600_AO_STATUS_BIT_FSM)) {
4505 spin_unlock_irqrestore(&instance->
4506 subdevice_lock,
4507 cpu_flags);
4508 PERROR("Conversion is already running.\n");
4509 err = ME_ERRNO_SUBDEVICE_BUSY;
4510 goto ERROR;
4511 }
4512
4513 tmp &=
4514 ~(ME4600_AO_CTRL_BIT_STOP |
4515 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4516 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4517 outl(tmp, instance->ctrl_reg);
4518 instance->wrap_remaining = instance->wrap_count;
4519 instance->circ_buf.tail = 0;
4520 spin_unlock_irqrestore(&instance->subdevice_lock,
4521 cpu_flags);
4522
4523 if (start_mode == ME_START_MODE_BLOCKING) {
4524 init_waitqueue_head(&queue);
4525
4526 if (delay) {
4527 ref = jiffies;
4528
4529 while (!
4530 (inl(instance->status_reg) &
4531 ME4600_AO_STATUS_BIT_FSM)) {
4532 interruptible_sleep_on_timeout
4533 (&queue, 1);
4534
4535 if (signal_pending(current)) {
4536 PERROR
4537 ("Wait on start of state machine interrupted.\n");
4538 stop_immediately
4539 (instance);
4540 err = ME_ERRNO_SIGNAL;
4541 goto ERROR;
4542 }
4543
4544 if (((jiffies - ref) >= delay)) {
4545 PERROR
4546 ("Timeout reached.\n");
4547 stop_immediately
4548 (instance);
4549 err = ME_ERRNO_TIMEOUT;
4550 goto ERROR;
4551 }
4552 }
4553 } else {
4554 while (!
4555 (inl(instance->status_reg) &
4556 ME4600_AO_STATUS_BIT_FSM)) {
4557 interruptible_sleep_on_timeout
4558 (&queue, 1);
4559
4560 if (signal_pending(current)) {
4561 PERROR
4562 ("Wait on start of state machine interrupted.\n");
4563 stop_immediately
4564 (instance);
4565 err = ME_ERRNO_SIGNAL;
4566 goto ERROR;
4567 }
4568 }
4569 }
4570 } else if (start_mode == ME_START_MODE_NONBLOCKING) {
4571 /* Do nothing */
4572 } else {
4573 PERROR("Invalid start mode specified.\n");
4574 stop_immediately(instance);
4575 err = ME_ERRNO_INVALID_START_MODE;
4576 goto ERROR;
4577 }
4578 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x10000 << instance->ao_idx)) { // Synchronous with external trigger
4579
4580 if ((inl(instance->status_reg) &
4581 ME4600_AO_STATUS_BIT_FSM)) {
4582 spin_unlock_irqrestore(&instance->
4583 subdevice_lock,
4584 cpu_flags);
4585 PERROR("Conversion is already running.\n");
4586 err = ME_ERRNO_SUBDEVICE_BUSY;
4587 goto ERROR;
4588 }
4589
4590 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4591 tmp |=
4592 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG |
4593 ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4594 tmp &=
4595 ~(ME4600_AO_CTRL_BIT_STOP |
4596 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4597 outl(tmp, instance->ctrl_reg);
4598 instance->wrap_remaining = instance->wrap_count;
4599 instance->circ_buf.tail = 0;
4600
4601 spin_unlock_irqrestore(&instance->
4602 subdevice_lock,
4603 cpu_flags);
4604
4605 if (start_mode == ME_START_MODE_BLOCKING) {
4606 init_waitqueue_head(&queue);
4607
4608 if (delay) {
4609 ref = jiffies;
4610
4611 while (!
4612 (inl
4613 (instance->
4614 status_reg) &
4615 ME4600_AO_STATUS_BIT_FSM))
4616 {
4617 interruptible_sleep_on_timeout
4618 (&queue, 1);
4619
4620 if (signal_pending
4621 (current)) {
4622 PERROR
4623 ("Wait on start of state machine interrupted.\n");
4624 stop_immediately
4625 (instance);
4626 err =
4627 ME_ERRNO_SIGNAL;
4628 goto ERROR;
4629 }
4630
4631 if (((jiffies - ref) >=
4632 delay)) {
4633 PERROR
4634 ("Timeout reached.\n");
4635 stop_immediately
4636 (instance);
4637 err =
4638 ME_ERRNO_TIMEOUT;
4639 goto ERROR;
4640 }
4641 }
4642 } else {
4643 while (!
4644 (inl
4645 (instance->
4646 status_reg) &
4647 ME4600_AO_STATUS_BIT_FSM))
4648 {
4649 interruptible_sleep_on_timeout
4650 (&queue, 1);
4651
4652 if (signal_pending
4653 (current)) {
4654 PERROR
4655 ("Wait on start of state machine interrupted.\n");
4656 stop_immediately
4657 (instance);
4658 err =
4659 ME_ERRNO_SIGNAL;
4660 goto ERROR;
4661 }
4662 }
4663 }
4664 } else if (start_mode ==
4665 ME_START_MODE_NONBLOCKING) {
4666 } else {
4667 PERROR
4668 ("Invalid start mode specified.\n");
4669 stop_immediately(instance);
4670 err = ME_ERRNO_INVALID_START_MODE;
4671 goto ERROR;
4672 }
4673 } else {
4674 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4675 tmp &=
4676 ~(ME4600_AO_CTRL_BIT_STOP |
4677 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4678 outl(tmp, instance->ctrl_reg);
4679 instance->wrap_remaining = instance->wrap_count;
4680 instance->circ_buf.tail = 0;
4681 spin_unlock_irqrestore(&instance->
4682 subdevice_lock,
4683 cpu_flags);
4684 }
4685 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x1 << instance->ao_idx)) { // Synchronous wraparound with sw trigger
4686
4687 if ((inl(instance->status_reg) &
4688 ME4600_AO_STATUS_BIT_FSM)) {
4689 spin_unlock_irqrestore(&instance->
4690 subdevice_lock,
4691 cpu_flags);
4692 PERROR("Conversion is already running.\n");
4693 err = ME_ERRNO_SUBDEVICE_BUSY;
4694 goto ERROR;
4695 }
4696
4697 tmp &=
4698 ~(ME4600_AO_CTRL_BIT_STOP |
4699 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4700 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4701 instance->wrap_remaining = instance->wrap_count;
4702 instance->circ_buf.tail = 0;
4703 PDEBUG("CTRL Reg = 0x%X.\n", inl(instance->ctrl_reg));
4704 outl(tmp, instance->ctrl_reg);
4705
4706 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4707 outl(0x8000, instance->single_reg);
4708 instance->single_value = 0x8000;
4709 }
4710
4711 spin_unlock_irqrestore(&instance->subdevice_lock,
4712 cpu_flags);
4713 } else { // Software start
4714
4715 if ((inl(instance->status_reg) &
4716 ME4600_AO_STATUS_BIT_FSM)) {
4717 spin_unlock_irqrestore(&instance->
4718 subdevice_lock,
4719 cpu_flags);
4720 PERROR("Conversion is already running.\n");
4721 err = ME_ERRNO_SUBDEVICE_BUSY;
4722 goto ERROR;
4723 }
4724
4725 tmp &=
4726 ~(ME4600_AO_CTRL_BIT_STOP |
4727 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4728
4729 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4730 outl(tmp, instance->ctrl_reg);
4731 outl(0x8000, instance->single_reg);
4732 instance->single_value = 0x8000;
4733 instance->wrap_remaining = instance->wrap_count;
4734 instance->circ_buf.tail = 0;
4735 spin_unlock_irqrestore(&instance->subdevice_lock,
4736 cpu_flags);
4737 }
4738
4739 break;
4740
4741 default:
4742 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4743 PERROR("Invalid mode configured.\n");
4744 err = ME_ERRNO_INTERNAL;
4745 goto ERROR;
4746 }
4747
4748 ERROR:
4749
4750 ME_SUBDEVICE_EXIT;
4751
4752 return err;
4753 }
4754
4755 static int me4600_ao_io_stream_status(me_subdevice_t *subdevice,
4756 struct file *filep,
4757 int wait,
4758 int *status, int *values, int flags)
4759 {
4760 me4600_ao_subdevice_t *instance;
4761 int err = ME_ERRNO_SUCCESS;
4762 wait_queue_head_t queue;
4763
4764 PDEBUG("executed.\n");
4765
4766 instance = (me4600_ao_subdevice_t *) subdevice;
4767
4768 init_waitqueue_head(&queue);
4769
4770 if (!instance->fifo) {
4771 PERROR("Not a streaming ao.\n");
4772 return ME_ERRNO_NOT_SUPPORTED;
4773 }
4774
4775 ME_SUBDEVICE_ENTER;
4776
4777 if (wait == ME_WAIT_NONE) {
4778 *status =
4779 (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ?
4780 ME_STATUS_BUSY : ME_STATUS_IDLE;
4781 *values = me_circ_buf_space(&instance->circ_buf);
4782 } else if (wait == ME_WAIT_IDLE) {
4783 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) {
4784 interruptible_sleep_on_timeout(&queue, 1);
4785
4786 if (instance->flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
4787 PERROR("Output stream was interrupted.\n");
4788 *status = ME_STATUS_ERROR;
4789 err = ME_ERRNO_SUCCESS;
4790 goto ERROR;
4791 }
4792
4793 if (signal_pending(current)) {
4794 PERROR
4795 ("Wait on state machine interrupted by signal.\n");
4796 *status = ME_STATUS_INVALID;
4797 err = ME_ERRNO_SIGNAL;
4798 goto ERROR;
4799 }
4800 }
4801
4802 *status = ME_STATUS_IDLE;
4803
4804 *values = me_circ_buf_space(&instance->circ_buf);
4805 } else {
4806 PERROR("Invalid wait argument specified.\n");
4807 *status = ME_STATUS_INVALID;
4808 err = ME_ERRNO_INVALID_WAIT;
4809 goto ERROR;
4810 }
4811
4812 ERROR:
4813
4814 ME_SUBDEVICE_EXIT;
4815
4816 return err;
4817 }
4818
4819 static int me4600_ao_io_stream_stop(me_subdevice_t *subdevice,
4820 struct file *filep,
4821 int stop_mode, int flags)
4822 {
4823 int err = ME_ERRNO_SUCCESS;
4824 me4600_ao_subdevice_t *instance;
4825 unsigned long cpu_flags;
4826 unsigned long tmp;
4827
4828 PDEBUG("executed.\n");
4829
4830 instance = (me4600_ao_subdevice_t *) subdevice;
4831
4832 if (!instance->fifo) {
4833 PERROR("Not a streaming ao.\n");
4834 return ME_ERRNO_NOT_SUPPORTED;
4835 }
4836
4837 ME_SUBDEVICE_ENTER;
4838
4839 if (stop_mode == ME_STOP_MODE_IMMEDIATE) {
4840 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4841 tmp = inl(instance->ctrl_reg);
4842 tmp |=
4843 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4844 outl(tmp, instance->ctrl_reg);
4845
4846 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
4847
4848 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4849 } else if (stop_mode == ME_STOP_MODE_LAST_VALUE) {
4850 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4851 tmp = inl(instance->ctrl_reg);
4852 tmp |= ME4600_AO_CTRL_BIT_STOP;
4853 outl(tmp, instance->ctrl_reg);
4854 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4855 } else {
4856 PERROR("Invalid stop mode specified.\n");
4857 err = ME_ERRNO_INVALID_STOP_MODE;
4858 goto ERROR;
4859 }
4860
4861 ERROR:
4862
4863 ME_SUBDEVICE_EXIT;
4864
4865 return err;
4866 }
4867
4868 static int me4600_ao_io_stream_write(me_subdevice_t *subdevice,
4869 struct file *filep,
4870 int write_mode,
4871 int *values, int *count, int flags)
4872 {
4873 int err = ME_ERRNO_SUCCESS;
4874 me4600_ao_subdevice_t *instance;
4875 unsigned long tmp;
4876 int i;
4877 int value;
4878 int cnt = *count;
4879 int c;
4880 int k;
4881 int ret = 0;
4882 unsigned long cpu_flags = 0;
4883
4884 PDEBUG("executed.\n");
4885
4886 instance = (me4600_ao_subdevice_t *) subdevice;
4887
4888 if (!instance->fifo) {
4889 PERROR("Not a streaming ao.\n");
4890 return ME_ERRNO_NOT_SUPPORTED;
4891 }
4892
4893 ME_SUBDEVICE_ENTER;
4894
4895 if (*count <= 0) {
4896 PERROR("Invalid count of values specified.\n");
4897 err = ME_ERRNO_INVALID_VALUE_COUNT;
4898 goto ERROR;
4899 }
4900
4901 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4902
4903 tmp = inl(instance->ctrl_reg);
4904
4905 switch (tmp & 0x3) {
4906
4907 case 1: // Wraparound mode
4908 if (instance->bosch_fw) { // Bosch firmware
4909 spin_unlock_irqrestore(&instance->subdevice_lock,
4910 cpu_flags);
4911
4912 if (cnt != 7) {
4913 PERROR
4914 ("Invalid count of values specified. 7 expected.\n");
4915 err = ME_ERRNO_INVALID_VALUE_COUNT;
4916 goto ERROR;
4917 }
4918
4919 for (i = 0; i < 7; i++) {
4920 if (get_user(value, values)) {
4921 PERROR
4922 ("Can't copy value from user space.\n");
4923 err = ME_ERRNO_INTERNAL;
4924 goto ERROR;
4925 }
4926
4927 if (i == 0) {
4928 /* Maximum voltage */
4929 value <<= 16;
4930 value |=
4931 inl(instance->reg_base +
4932 0xD4) & 0xFFFF;
4933 outl(value, instance->reg_base + 0xD4);
4934 } else if (i == 1) {
4935 /* Minimum voltage */
4936 value &= 0xFFFF;
4937 value |=
4938 inl(instance->reg_base +
4939 0xD4) & 0xFFFF0000;
4940 outl(value, instance->reg_base + 0xD4);
4941 } else if (i == 2) {
4942 /* Delta up */
4943 value <<= 16;
4944 value |=
4945 inl(instance->reg_base +
4946 0xD8) & 0xFFFF;
4947 outl(value, instance->reg_base + 0xD8);
4948 } else if (i == 3) {
4949 /* Delta down */
4950 value &= 0xFFFF;
4951 value |=
4952 inl(instance->reg_base +
4953 0xD8) & 0xFFFF0000;
4954 outl(value, instance->reg_base + 0xD8);
4955 } else if (i == 4) {
4956 /* Start value */
4957 outl(value, instance->reg_base + 0xDC);
4958 } else if (i == 5) {
4959 /* Invert */
4960 if (value) {
4961 value = inl(instance->ctrl_reg);
4962 value |= 0x100;
4963 outl(value, instance->ctrl_reg);
4964 } else {
4965 value = inl(instance->ctrl_reg);
4966 value &= ~0x100;
4967 outl(value, instance->ctrl_reg);
4968 }
4969 } else if (i == 6) {
4970 /* Timer for positive ramp */
4971 outl(value, instance->reg_base + 0xE0);
4972 }
4973
4974 values++;
4975 }
4976 } else { // Normal firmware
4977 PDEBUG("Write for wraparound mode.\n");
4978
4979 if (inl(instance->status_reg) &
4980 ME4600_AO_STATUS_BIT_FSM) {
4981 spin_unlock_irqrestore(&instance->
4982 subdevice_lock,
4983 cpu_flags);
4984 PERROR
4985 ("There is already a conversion running.\n");
4986 err = ME_ERRNO_SUBDEVICE_BUSY;
4987 goto ERROR;
4988 }
4989
4990 tmp |= ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4991 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
4992 outl(tmp, instance->ctrl_reg);
4993 tmp |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
4994
4995 if ((*count > ME4600_AO_FIFO_COUNT) ||
4996 ((instance->
4997 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
4998 ME4600_AO_FLAGS_SW_WRAP_MODE_FIN)) {
4999 tmp &=
5000 ~(ME4600_AO_CTRL_BIT_MODE_0 |
5001 ME4600_AO_CTRL_BIT_MODE_1);
5002 tmp |= ME4600_AO_CTRL_BIT_MODE_1;
5003 }
5004
5005 outl(tmp, instance->ctrl_reg);
5006 spin_unlock_irqrestore(&instance->subdevice_lock,
5007 cpu_flags);
5008
5009 if ((*count <= ME4600_AO_FIFO_COUNT) &&
5010 ((instance->
5011 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5012 ME4600_AO_FLAGS_SW_WRAP_MODE_INF)) {
5013 for (i = 0; i < *count; i++) {
5014 if (get_user(value, values + i)) {
5015 PERROR
5016 ("Cannot copy value from user space.\n");
5017 err = ME_ERRNO_INTERNAL;
5018 goto ERROR;
5019 }
5020
5021 if (instance->ao_idx & 0x1)
5022 value <<= 16;
5023
5024 outl(value, instance->fifo_reg);
5025 }
5026 } else if ((*count <= ME4600_AO_CIRC_BUF_COUNT) &&
5027 ((instance->
5028 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK)
5029 == ME4600_AO_FLAGS_SW_WRAP_MODE_INF)) {
5030 for (i = 0; i < *count; i++) {
5031 if (get_user(value, values + i)) {
5032 PERROR
5033 ("Cannot copy value from user space.\n");
5034 err = ME_ERRNO_INTERNAL;
5035 goto ERROR;
5036 }
5037
5038 instance->circ_buf.buf[i] = value; /* Used to hold the values. */
5039 }
5040
5041 instance->circ_buf.tail = 0; /* Used as the current read position. */
5042 instance->circ_buf.head = *count; /* Used as the buffer size. */
5043
5044 /* Preload the FIFO. */
5045
5046 for (i = 0; i < ME4600_AO_FIFO_COUNT;
5047 i++, instance->circ_buf.tail++) {
5048 if (instance->circ_buf.tail >=
5049 instance->circ_buf.head)
5050 instance->circ_buf.tail = 0;
5051
5052 if (instance->ao_idx & 0x1)
5053 outl(instance->circ_buf.
5054 buf[instance->circ_buf.
5055 tail] << 16,
5056 instance->fifo_reg);
5057 else
5058 outl(instance->circ_buf.
5059 buf[instance->circ_buf.
5060 tail],
5061 instance->fifo_reg);
5062 }
5063 } else if ((*count <= ME4600_AO_CIRC_BUF_COUNT) &&
5064 ((instance->
5065 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK)
5066 == ME4600_AO_FLAGS_SW_WRAP_MODE_FIN)) {
5067 unsigned int preload_count;
5068
5069 for (i = 0; i < *count; i++) {
5070 if (get_user(value, values + i)) {
5071 PERROR
5072 ("Cannot copy value from user space.\n");
5073 err = ME_ERRNO_INTERNAL;
5074 goto ERROR;
5075 }
5076
5077 instance->circ_buf.buf[i] = value; /* Used to hold the values. */
5078 }
5079
5080 instance->circ_buf.tail = 0; /* Used as the current read position. */
5081 instance->circ_buf.head = *count; /* Used as the buffer size. */
5082
5083 /* Try to preload the whole FIFO. */
5084 preload_count = ME4600_AO_FIFO_COUNT;
5085
5086 if (preload_count > instance->wrap_count)
5087 preload_count = instance->wrap_count;
5088
5089 /* Preload the FIFO. */
5090 for (i = 0; i < preload_count;
5091 i++, instance->circ_buf.tail++) {
5092 if (instance->circ_buf.tail >=
5093 instance->circ_buf.head)
5094 instance->circ_buf.tail = 0;
5095
5096 if (instance->ao_idx & 0x1)
5097 outl(instance->circ_buf.
5098 buf[instance->circ_buf.
5099 tail] << 16,
5100 instance->fifo_reg);
5101 else
5102 outl(instance->circ_buf.
5103 buf[instance->circ_buf.
5104 tail],
5105 instance->fifo_reg);
5106 }
5107
5108 instance->wrap_remaining =
5109 instance->wrap_count - preload_count;
5110 } else {
5111 PERROR("To many values written.\n");
5112 err = ME_ERRNO_INVALID_VALUE_COUNT;
5113 goto ERROR;
5114 }
5115 }
5116
5117 break;
5118
5119 case 2: // Continuous mode
5120 /* Check if in SW wrapround mode */
5121 if (instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) {
5122 spin_unlock_irqrestore(&instance->subdevice_lock,
5123 cpu_flags);
5124 PERROR("Subdevice is configured SW wrapround mode.\n");
5125 err = ME_ERRNO_PREVIOUS_CONFIG;
5126 goto ERROR;
5127 }
5128
5129 switch (write_mode) {
5130
5131 case ME_WRITE_MODE_BLOCKING:
5132 spin_unlock_irqrestore(&instance->subdevice_lock,
5133 cpu_flags);
5134
5135 PDEBUG("Write for blocking continuous mode.\n");
5136
5137 while (cnt > 0) {
5138 wait_event_interruptible(instance->wait_queue,
5139 (c =
5140 me_circ_buf_space_to_end
5141 (&instance->
5142 circ_buf)));
5143
5144 if (instance->
5145 flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
5146 PERROR
5147 ("Broken pipe in blocking write.\n");
5148 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
5149 goto ERROR;
5150 } else if (signal_pending(current)) {
5151 PERROR
5152 ("Wait for free buffer interrupted from signal.\n");
5153 err = ME_ERRNO_SIGNAL;
5154 goto ERROR;
5155 }
5156
5157 PDEBUG("Space to end = %d.\n", c);
5158
5159 /* Only able to write size of free buffer or size of count */
5160
5161 if (cnt < c)
5162 c = cnt;
5163 k = sizeof(int) * c;
5164 k -= copy_from_user(instance->circ_buf.buf +
5165 instance->circ_buf.head,
5166 values, k);
5167 c = k / sizeof(int);
5168
5169 PDEBUG("Copy %d values from user space.\n", c);
5170
5171 if (!c) {
5172 PERROR
5173 ("Cannot copy values from user space.\n");
5174 err = ME_ERRNO_INTERNAL;
5175 goto ERROR;
5176 }
5177
5178 instance->circ_buf.head =
5179 (instance->circ_buf.head +
5180 c) & (instance->circ_buf.mask);
5181
5182 values += c;
5183 cnt -= c;
5184 ret += c;
5185
5186 /* Values are now available so enable interrupts */
5187 spin_lock_irqsave(&instance->subdevice_lock,
5188 cpu_flags);
5189
5190 if (me_circ_buf_space(&instance->circ_buf)) {
5191 tmp = inl(instance->ctrl_reg);
5192 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5193 outl(tmp, instance->ctrl_reg);
5194 }
5195
5196 spin_unlock_irqrestore(&instance->
5197 subdevice_lock,
5198 cpu_flags);
5199 }
5200
5201 *count = ret;
5202
5203 break;
5204
5205 case ME_WRITE_MODE_NONBLOCKING:
5206 spin_unlock_irqrestore(&instance->subdevice_lock,
5207 cpu_flags);
5208
5209 PDEBUG("Write for non blocking continuous mode.\n");
5210
5211 while (cnt > 0) {
5212 if (instance->
5213 flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
5214 PERROR
5215 ("ME4600:Broken pipe in nonblocking write.\n");
5216 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
5217 goto ERROR;
5218 }
5219
5220 c = me_circ_buf_space_to_end(&instance->
5221 circ_buf);
5222
5223 if (!c) {
5224 PDEBUG
5225 ("Returning from nonblocking write.\n");
5226 break;
5227 }
5228
5229 PDEBUG("Space to end = %d.\n", c);
5230
5231 /* Only able to write size of free buffer or size of count */
5232
5233 if (cnt < c)
5234 c = cnt;
5235 k = sizeof(int) * c;
5236 k -= copy_from_user(instance->circ_buf.buf +
5237 instance->circ_buf.head,
5238 values, k);
5239 c = k / sizeof(int);
5240
5241 PDEBUG("Copy %d values from user space.\n", c);
5242
5243 if (!c) {
5244 PERROR
5245 ("Cannot copy values from user space.\n");
5246 err = ME_ERRNO_INTERNAL;
5247 goto ERROR;
5248 }
5249
5250 instance->circ_buf.head =
5251 (instance->circ_buf.head +
5252 c) & (instance->circ_buf.mask);
5253
5254 values += c;
5255 cnt -= c;
5256 ret += c;
5257
5258 /* Values are now available so enable interrupts */
5259 spin_lock_irqsave(&instance->subdevice_lock,
5260 cpu_flags);
5261
5262 if (me_circ_buf_space(&instance->circ_buf)) {
5263 tmp = inl(instance->ctrl_reg);
5264 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5265 outl(tmp, instance->ctrl_reg);
5266 }
5267
5268 spin_unlock_irqrestore(&instance->
5269 subdevice_lock,
5270 cpu_flags);
5271 }
5272
5273 *count = ret;
5274
5275 break;
5276
5277 case ME_WRITE_MODE_PRELOAD:
5278 PDEBUG("Write for preload continuous mode.\n");
5279
5280 if ((inl(instance->status_reg) &
5281 ME4600_AO_STATUS_BIT_FSM)) {
5282 spin_unlock_irqrestore(&instance->
5283 subdevice_lock,
5284 cpu_flags);
5285 PERROR
5286 ("Can't Preload DAC FIFO while conversion is running.\n");
5287 err = ME_ERRNO_SUBDEVICE_BUSY;
5288 goto ERROR;
5289 }
5290
5291 tmp = inl(instance->ctrl_reg);
5292
5293 tmp |=
5294 ME4600_AO_CTRL_BIT_STOP |
5295 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
5296 outl(tmp, instance->ctrl_reg);
5297 tmp &=
5298 ~(ME4600_AO_CTRL_BIT_ENABLE_FIFO |
5299 ME4600_AO_CTRL_BIT_ENABLE_IRQ);
5300 outl(tmp, instance->ctrl_reg);
5301 tmp |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
5302 outl(tmp, instance->ctrl_reg);
5303
5304 instance->circ_buf.head = 0;
5305 instance->circ_buf.tail = 0;
5306 instance->flags &= ~ME4600_AO_FLAGS_BROKEN_PIPE;
5307
5308 spin_unlock_irqrestore(&instance->subdevice_lock,
5309 cpu_flags);
5310
5311 c = ME4600_AO_FIFO_COUNT;
5312
5313 if (cnt < c)
5314 c = cnt;
5315
5316 for (i = 0; i < c; i++) {
5317 if (get_user(value, values)) {
5318 PERROR
5319 ("Can't copy value from user space.\n");
5320 err = ME_ERRNO_INTERNAL;
5321 goto ERROR;
5322 }
5323
5324 if (instance->ao_idx & 0x1)
5325 value <<= 16;
5326
5327 outl(value, instance->fifo_reg);
5328
5329 values++;
5330 }
5331
5332 cnt -= c;
5333
5334 ret += c;
5335
5336 PDEBUG("Wrote %d values to fifo.\n", c);
5337
5338 while (1) {
5339 c = me_circ_buf_space_to_end(&instance->
5340 circ_buf);
5341
5342 if (c == 0)
5343 break;
5344
5345 if (cnt < c)
5346 c = cnt;
5347
5348 if (c <= 0)
5349 break;
5350
5351 k = sizeof(int) * c;
5352
5353 k -= copy_from_user(instance->circ_buf.buf +
5354 instance->circ_buf.head,
5355 values, k);
5356
5357 c = k / sizeof(int);
5358
5359 PDEBUG("Wrote %d values to circular buffer.\n",
5360 c);
5361
5362 if (!c) {
5363 PERROR
5364 ("Can't copy values from user space.\n");
5365 err = ME_ERRNO_INTERNAL;
5366 goto ERROR;
5367 }
5368
5369 instance->circ_buf.head =
5370 (instance->circ_buf.head +
5371 c) & (instance->circ_buf.mask);
5372
5373 values += c;
5374 cnt -= c;
5375 ret += c;
5376 }
5377
5378 *count = ret;
5379
5380 break;
5381
5382 default:
5383 spin_unlock_irqrestore(&instance->subdevice_lock,
5384 cpu_flags);
5385
5386 PERROR("Invalid write mode specified.\n");
5387
5388 err = ME_ERRNO_INVALID_WRITE_MODE;
5389
5390 goto ERROR;
5391 }
5392
5393 break;
5394
5395 default: // Single mode of invalid
5396 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
5397 PERROR("Subdevice is configured in single mode.\n");
5398 err = ME_ERRNO_PREVIOUS_CONFIG;
5399 goto ERROR;
5400 }
5401
5402 ERROR:
5403
5404 ME_SUBDEVICE_EXIT;
5405
5406 return err;
5407 }
5408
5409 static irqreturn_t me4600_ao_isr(int irq, void *dev_id)
5410 {
5411 unsigned long tmp;
5412 int value;
5413 me4600_ao_subdevice_t *instance = dev_id;
5414 int i;
5415 int c = 0;
5416 int c1 = 0;
5417
5418 if (irq != instance->irq) {
5419 PDEBUG("Incorrect interrupt num: %d.\n", irq);
5420 return IRQ_NONE;
5421 }
5422
5423 if (!((0x1 << (instance->ao_idx + 3)) & inl(instance->irq_status_reg))) {
5424 return IRQ_NONE;
5425 }
5426
5427 PDEBUG("executed.\n");
5428
5429 tmp = inl(instance->status_reg);
5430
5431 if (!(tmp & ME4600_AO_STATUS_BIT_EF) &&
5432 (tmp & ME4600_AO_STATUS_BIT_HF) &&
5433 (tmp & ME4600_AO_STATUS_BIT_HF)) {
5434 c = ME4600_AO_FIFO_COUNT;
5435 PDEBUG("Fifo empty.\n");
5436 } else if ((tmp & ME4600_AO_STATUS_BIT_EF) &&
5437 (tmp & ME4600_AO_STATUS_BIT_HF) &&
5438 (tmp & ME4600_AO_STATUS_BIT_HF)) {
5439 c = ME4600_AO_FIFO_COUNT / 2;
5440 PDEBUG("Fifo under half full.\n");
5441 } else {
5442 c = 0;
5443 PDEBUG("Fifo full.\n");
5444 }
5445
5446 PDEBUG("Try to write 0x%04X values.\n", c);
5447
5448 if ((instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5449 ME4600_AO_FLAGS_SW_WRAP_MODE_INF) {
5450 while (c) {
5451 c1 = c;
5452
5453 if (c1 > (instance->circ_buf.head - instance->circ_buf.tail)) /* Only up to the end of the buffer */
5454 c1 = (instance->circ_buf.head -
5455 instance->circ_buf.tail);
5456
5457 /* Write the values to the FIFO */
5458 for (i = 0; i < c1; i++, instance->circ_buf.tail++, c--) {
5459 if (instance->ao_idx & 0x1)
5460 outl(instance->circ_buf.
5461 buf[instance->circ_buf.tail] << 16,
5462 instance->fifo_reg);
5463 else
5464 outl(instance->circ_buf.
5465 buf[instance->circ_buf.tail],
5466 instance->fifo_reg);
5467 }
5468
5469 if (instance->circ_buf.tail >= instance->circ_buf.head) /* Start from beginning */
5470 instance->circ_buf.tail = 0;
5471 }
5472
5473 spin_lock(&instance->subdevice_lock);
5474
5475 tmp = inl(instance->ctrl_reg);
5476 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5477 outl(tmp, instance->ctrl_reg);
5478 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5479 outl(tmp, instance->ctrl_reg);
5480
5481 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5482 PERROR("Broken pipe.\n");
5483 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5484 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5485 outl(tmp, instance->ctrl_reg);
5486 }
5487
5488 spin_unlock(&instance->subdevice_lock);
5489 } else if ((instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5490 ME4600_AO_FLAGS_SW_WRAP_MODE_FIN) {
5491 while (c && instance->wrap_remaining) {
5492 c1 = c;
5493
5494 if (c1 > (instance->circ_buf.head - instance->circ_buf.tail)) /* Only up to the end of the buffer */
5495 c1 = (instance->circ_buf.head -
5496 instance->circ_buf.tail);
5497
5498 if (c1 > instance->wrap_remaining) /* Only up to count of user defined number of values */
5499 c1 = instance->wrap_remaining;
5500
5501 /* Write the values to the FIFO */
5502 for (i = 0; i < c1;
5503 i++, instance->circ_buf.tail++, c--,
5504 instance->wrap_remaining--) {
5505 if (instance->ao_idx & 0x1)
5506 outl(instance->circ_buf.
5507 buf[instance->circ_buf.tail] << 16,
5508 instance->fifo_reg);
5509 else
5510 outl(instance->circ_buf.
5511 buf[instance->circ_buf.tail],
5512 instance->fifo_reg);
5513 }
5514
5515 if (instance->circ_buf.tail >= instance->circ_buf.head) /* Start from beginning */
5516 instance->circ_buf.tail = 0;
5517 }
5518
5519 spin_lock(&instance->subdevice_lock);
5520
5521 tmp = inl(instance->ctrl_reg);
5522
5523 if (!instance->wrap_remaining) {
5524 PDEBUG("Finite SW wraparound done.\n");
5525 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5526 }
5527
5528 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5529
5530 outl(tmp, instance->ctrl_reg);
5531 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5532 outl(tmp, instance->ctrl_reg);
5533
5534 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5535 PERROR("Broken pipe.\n");
5536 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5537 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5538 outl(tmp, instance->ctrl_reg);
5539 }
5540
5541 spin_unlock(&instance->subdevice_lock);
5542
5543 } else { /* Regular continuous mode */
5544
5545 while (1) {
5546 c1 = me_circ_buf_values_to_end(&instance->circ_buf);
5547 PDEBUG("Values to end = %d.\n", c1);
5548
5549 if (c1 > c)
5550 c1 = c;
5551
5552 if (c1 <= 0) {
5553 PDEBUG("Work done or buffer empty.\n");
5554 break;
5555 }
5556
5557 if (instance->ao_idx & 0x1) {
5558 for (i = 0; i < c1; i++) {
5559 value =
5560 *(instance->circ_buf.buf +
5561 instance->circ_buf.tail +
5562 i) << 16;
5563 outl(value, instance->fifo_reg);
5564 }
5565 } else
5566 outsl(instance->fifo_reg,
5567 instance->circ_buf.buf +
5568 instance->circ_buf.tail, c1);
5569
5570 instance->circ_buf.tail =
5571 (instance->circ_buf.tail +
5572 c1) & (instance->circ_buf.mask);
5573
5574 PDEBUG("%d values wrote to port 0x%04X.\n", c1,
5575 instance->fifo_reg);
5576
5577 c -= c1;
5578 }
5579
5580 spin_lock(&instance->subdevice_lock);
5581
5582 tmp = inl(instance->ctrl_reg);
5583
5584 if (!me_circ_buf_values(&instance->circ_buf)) {
5585 PDEBUG
5586 ("Disable Interrupt because no values left in buffer.\n");
5587 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5588 }
5589
5590 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5591
5592 outl(tmp, instance->ctrl_reg);
5593 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5594 outl(tmp, instance->ctrl_reg);
5595
5596 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5597 PDEBUG("Broken pipe in me4600_ao_isr.\n");
5598 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5599 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5600 outl(tmp, instance->ctrl_reg);
5601 }
5602
5603 spin_unlock(&instance->subdevice_lock);
5604
5605 wake_up_interruptible(&instance->wait_queue);
5606 }
5607
5608 return IRQ_HANDLED;
5609 }
5610
5611 static void me4600_ao_destructor(struct me_subdevice *subdevice)
5612 {
5613 me4600_ao_subdevice_t *instance;
5614
5615 PDEBUG("executed.\n");
5616
5617 instance = (me4600_ao_subdevice_t *) subdevice;
5618
5619 free_irq(instance->irq, instance);
5620 kfree(instance->circ_buf.buf);
5621 me_subdevice_deinit(&instance->base);
5622 kfree(instance);
5623 }
5624
5625 me4600_ao_subdevice_t *me4600_ao_constructor(uint32_t reg_base,
5626 spinlock_t *preload_reg_lock,
5627 uint32_t *preload_flags,
5628 int ao_idx, int fifo, int irq)
5629 {
5630 me4600_ao_subdevice_t *subdevice;
5631 int err;
5632
5633 PDEBUG("executed.\n");
5634
5635 /* Allocate memory for subdevice instance */
5636 subdevice = kmalloc(sizeof(me4600_ao_subdevice_t), GFP_KERNEL);
5637
5638 if (!subdevice) {
5639 PERROR("Cannot get memory for subdevice instance.\n");
5640 return NULL;
5641 }
5642
5643 memset(subdevice, 0, sizeof(me4600_ao_subdevice_t));
5644
5645 /* Initialize subdevice base class */
5646 err = me_subdevice_init(&subdevice->base);
5647
5648 if (err) {
5649 PERROR("Cannot initialize subdevice base class instance.\n");
5650 kfree(subdevice);
5651 return NULL;
5652 }
5653 // Initialize spin locks.
5654 spin_lock_init(&subdevice->subdevice_lock);
5655
5656 subdevice->preload_reg_lock = preload_reg_lock;
5657 subdevice->preload_flags = preload_flags;
5658
5659 /* Allocate and initialize circular buffer */
5660 subdevice->circ_buf.mask = ME4600_AO_CIRC_BUF_COUNT - 1;
5661 subdevice->circ_buf.buf = kmalloc(ME4600_AO_CIRC_BUF_SIZE, GFP_KERNEL);
5662
5663 if (!subdevice->circ_buf.buf) {
5664 PERROR("Cannot initialize subdevice base class instance.\n");
5665 me_subdevice_deinit((me_subdevice_t *) subdevice);
5666 kfree(subdevice);
5667 return NULL;
5668 }
5669
5670 memset(subdevice->circ_buf.buf, 0, ME4600_AO_CIRC_BUF_SIZE);
5671
5672 subdevice->circ_buf.head = 0;
5673 subdevice->circ_buf.tail = 0;
5674
5675 /* Initialize wait queue */
5676 init_waitqueue_head(&subdevice->wait_queue);
5677
5678 /* Initialize single value to 0V */
5679 subdevice->single_value = 0x8000;
5680
5681 /* Store analog output index */
5682 subdevice->ao_idx = ao_idx;
5683
5684 /* Store if analog output has fifo */
5685 subdevice->fifo = fifo;
5686
5687 /* Initialize registers */
5688
5689 if (ao_idx == 0) {
5690 subdevice->ctrl_reg = reg_base + ME4600_AO_00_CTRL_REG;
5691 subdevice->status_reg = reg_base + ME4600_AO_00_STATUS_REG;
5692 subdevice->fifo_reg = reg_base + ME4600_AO_00_FIFO_REG;
5693 subdevice->single_reg = reg_base + ME4600_AO_00_SINGLE_REG;
5694 subdevice->timer_reg = reg_base + ME4600_AO_00_TIMER_REG;
5695 subdevice->reg_base = reg_base;
5696
5697 if (inl(subdevice->reg_base + ME4600_AO_BOSCH_REG) == 0x20000) {
5698 PINFO("Bosch firmware in use for channel 0.\n");
5699 subdevice->bosch_fw = 1;
5700 } else {
5701 subdevice->bosch_fw = 0;
5702 }
5703 } else if (ao_idx == 1) {
5704 subdevice->ctrl_reg = reg_base + ME4600_AO_01_CTRL_REG;
5705 subdevice->status_reg = reg_base + ME4600_AO_01_STATUS_REG;
5706 subdevice->fifo_reg = reg_base + ME4600_AO_01_FIFO_REG;
5707 subdevice->single_reg = reg_base + ME4600_AO_01_SINGLE_REG;
5708 subdevice->timer_reg = reg_base + ME4600_AO_01_TIMER_REG;
5709 subdevice->reg_base = reg_base;
5710 subdevice->bosch_fw = 0;
5711 } else if (ao_idx == 2) {
5712 subdevice->ctrl_reg = reg_base + ME4600_AO_02_CTRL_REG;
5713 subdevice->status_reg = reg_base + ME4600_AO_02_STATUS_REG;
5714 subdevice->fifo_reg = reg_base + ME4600_AO_02_FIFO_REG;
5715 subdevice->single_reg = reg_base + ME4600_AO_02_SINGLE_REG;
5716 subdevice->timer_reg = reg_base + ME4600_AO_02_TIMER_REG;
5717 subdevice->reg_base = reg_base;
5718 subdevice->bosch_fw = 0;
5719 } else {
5720 subdevice->ctrl_reg = reg_base + ME4600_AO_03_CTRL_REG;
5721 subdevice->status_reg = reg_base + ME4600_AO_03_STATUS_REG;
5722 subdevice->fifo_reg = reg_base + ME4600_AO_03_FIFO_REG;
5723 subdevice->single_reg = reg_base + ME4600_AO_03_SINGLE_REG;
5724 subdevice->timer_reg = reg_base + ME4600_AO_03_TIMER_REG;
5725 subdevice->reg_base = reg_base;
5726 subdevice->bosch_fw = 0;
5727 }
5728
5729 subdevice->irq_status_reg = reg_base + ME4600_IRQ_STATUS_REG;
5730 subdevice->preload_reg = reg_base + ME4600_AO_LOADSETREG_XX;
5731
5732 /* Register interrupt service routine */
5733 subdevice->irq = irq;
5734
5735 if (request_irq
5736 (subdevice->irq, me4600_ao_isr, IRQF_DISABLED | IRQF_SHARED,
5737 ME4600_NAME, subdevice)) {
5738 PERROR("Cannot get interrupt line.\n");
5739 me_subdevice_deinit((me_subdevice_t *) subdevice);
5740 kfree(subdevice->circ_buf.buf);
5741 kfree(subdevice);
5742 return NULL;
5743 }
5744
5745 /* Override base class methods. */
5746 subdevice->base.me_subdevice_destructor = me4600_ao_destructor;
5747 subdevice->base.me_subdevice_io_reset_subdevice =
5748 me4600_ao_io_reset_subdevice;
5749 subdevice->base.me_subdevice_io_single_config =
5750 me4600_ao_io_single_config;
5751 subdevice->base.me_subdevice_io_single_read = me4600_ao_io_single_read;
5752 subdevice->base.me_subdevice_io_single_write =
5753 me4600_ao_io_single_write;
5754 subdevice->base.me_subdevice_io_stream_config =
5755 me4600_ao_io_stream_config;
5756 subdevice->base.me_subdevice_io_stream_new_values =
5757 me4600_ao_io_stream_new_values;
5758 subdevice->base.me_subdevice_io_stream_write =
5759 me4600_ao_io_stream_write;
5760 subdevice->base.me_subdevice_io_stream_start =
5761 me4600_ao_io_stream_start;
5762 subdevice->base.me_subdevice_io_stream_status =
5763 me4600_ao_io_stream_status;
5764 subdevice->base.me_subdevice_io_stream_stop = me4600_ao_io_stream_stop;
5765 subdevice->base.me_subdevice_query_number_channels =
5766 me4600_ao_query_number_channels;
5767 subdevice->base.me_subdevice_query_subdevice_type =
5768 me4600_ao_query_subdevice_type;
5769 subdevice->base.me_subdevice_query_subdevice_caps =
5770 me4600_ao_query_subdevice_caps;
5771 subdevice->base.me_subdevice_query_subdevice_caps_args =
5772 me4600_ao_query_subdevice_caps_args;
5773 subdevice->base.me_subdevice_query_range_by_min_max =
5774 me4600_ao_query_range_by_min_max;
5775 subdevice->base.me_subdevice_query_number_ranges =
5776 me4600_ao_query_number_ranges;
5777 subdevice->base.me_subdevice_query_range_info =
5778 me4600_ao_query_range_info;
5779 subdevice->base.me_subdevice_query_timer = me4600_ao_query_timer;
5780
5781 return subdevice;
5782 }
5783
5784 #endif // BOSCH
5785
5786 /* Common functions
5787 */
5788
5789 static int me4600_ao_query_range_by_min_max(me_subdevice_t *subdevice,
5790 int unit,
5791 int *min,
5792 int *max, int *maxdata, int *range)
5793 {
5794 me4600_ao_subdevice_t *instance;
5795
5796 instance = (me4600_ao_subdevice_t *) subdevice;
5797
5798 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5799
5800 if ((*max - *min) < 0) {
5801 PERROR("Invalid minimum and maximum values specified.\n");
5802 return ME_ERRNO_INVALID_MIN_MAX;
5803 }
5804
5805 if ((unit == ME_UNIT_VOLT) || (unit == ME_UNIT_ANY)) {
5806 if ((*max <= (ME4600_AO_MAX_RANGE + 1000))
5807 && (*min >= ME4600_AO_MIN_RANGE)) {
5808 *min = ME4600_AO_MIN_RANGE;
5809 *max = ME4600_AO_MAX_RANGE;
5810 *maxdata = ME4600_AO_MAX_DATA;
5811 *range = 0;
5812 } else {
5813 PERROR("No matching range available.\n");
5814 return ME_ERRNO_NO_RANGE;
5815 }
5816 } else {
5817 PERROR("Invalid physical unit specified.\n");
5818 return ME_ERRNO_INVALID_UNIT;
5819 }
5820
5821 return ME_ERRNO_SUCCESS;
5822 }
5823
5824 static int me4600_ao_query_number_ranges(me_subdevice_t *subdevice,
5825 int unit, int *count)
5826 {
5827 me4600_ao_subdevice_t *instance;
5828
5829 instance = (me4600_ao_subdevice_t *) subdevice;
5830
5831 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5832
5833 if ((unit == ME_UNIT_VOLT) || (unit == ME_UNIT_ANY)) {
5834 *count = 1;
5835 } else {
5836 *count = 0;
5837 }
5838
5839 return ME_ERRNO_SUCCESS;
5840 }
5841
5842 static int me4600_ao_query_range_info(me_subdevice_t *subdevice,
5843 int range,
5844 int *unit,
5845 int *min, int *max, int *maxdata)
5846 {
5847 me4600_ao_subdevice_t *instance;
5848
5849 instance = (me4600_ao_subdevice_t *) subdevice;
5850
5851 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5852
5853 if (range == 0) {
5854 *unit = ME_UNIT_VOLT;
5855 *min = ME4600_AO_MIN_RANGE;
5856 *max = ME4600_AO_MAX_RANGE;
5857 *maxdata = ME4600_AO_MAX_DATA;
5858 } else {
5859 PERROR("Invalid range number specified.\n");
5860 return ME_ERRNO_INVALID_RANGE;
5861 }
5862
5863 return ME_ERRNO_SUCCESS;
5864 }
5865
5866 static int me4600_ao_query_timer(me_subdevice_t *subdevice,
5867 int timer,
5868 int *base_frequency,
5869 long long *min_ticks, long long *max_ticks)
5870 {
5871 me4600_ao_subdevice_t *instance;
5872
5873 instance = (me4600_ao_subdevice_t *) subdevice;
5874
5875 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5876
5877 if ((timer != ME_TIMER_ACQ_START) && (timer != ME_TIMER_CONV_START)) {
5878 PERROR("Invalid timer specified.\n");
5879 return ME_ERRNO_INVALID_TIMER;
5880 }
5881
5882 if (instance->fifo) { //Streaming device.
5883 *base_frequency = ME4600_AO_BASE_FREQUENCY;
5884 if (timer == ME_TIMER_ACQ_START) {
5885 *min_ticks = ME4600_AO_MIN_ACQ_TICKS;
5886 *max_ticks = ME4600_AO_MAX_ACQ_TICKS;
5887 } else if (timer == ME_TIMER_CONV_START) {
5888 *min_ticks = ME4600_AO_MIN_CHAN_TICKS;
5889 *max_ticks = ME4600_AO_MAX_CHAN_TICKS;
5890 }
5891 } else { //Not streaming device!
5892 *base_frequency = 0;
5893 *min_ticks = 0;
5894 *max_ticks = 0;
5895 }
5896
5897 return ME_ERRNO_SUCCESS;
5898 }
5899
5900 static int me4600_ao_query_number_channels(me_subdevice_t *subdevice,
5901 int *number)
5902 {
5903 me4600_ao_subdevice_t *instance;
5904 instance = (me4600_ao_subdevice_t *) subdevice;
5905
5906 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5907
5908 *number = 1;
5909
5910 return ME_ERRNO_SUCCESS;
5911 }
5912
5913 static int me4600_ao_query_subdevice_type(me_subdevice_t *subdevice,
5914 int *type, int *subtype)
5915 {
5916 me4600_ao_subdevice_t *instance;
5917
5918 instance = (me4600_ao_subdevice_t *) subdevice;
5919
5920 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5921
5922 *type = ME_TYPE_AO;
5923 *subtype = (instance->fifo) ? ME_SUBTYPE_STREAMING : ME_SUBTYPE_SINGLE;
5924
5925 return ME_ERRNO_SUCCESS;
5926 }
5927
5928 static int me4600_ao_query_subdevice_caps(me_subdevice_t *subdevice, int *caps)
5929 {
5930 me4600_ao_subdevice_t *instance;
5931 instance = (me4600_ao_subdevice_t *) subdevice;
5932
5933 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5934
5935 *caps =
5936 ME_CAPS_AO_TRIG_SYNCHRONOUS | ((instance->fifo) ? ME_CAPS_AO_FIFO :
5937 ME_CAPS_NONE);
5938
5939 return ME_ERRNO_SUCCESS;
5940 }
5941
5942 static int me4600_ao_query_subdevice_caps_args(struct me_subdevice *subdevice,
5943 int cap, int *args, int count)
5944 {
5945 me4600_ao_subdevice_t *instance;
5946 int err = ME_ERRNO_SUCCESS;
5947
5948 instance = (me4600_ao_subdevice_t *) subdevice;
5949
5950 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5951
5952 if (count != 1) {
5953 PERROR("Invalid capability argument count.\n");
5954 return ME_ERRNO_INVALID_CAP_ARG_COUNT;
5955 }
5956
5957 switch (cap) {
5958 case ME_CAP_AI_FIFO_SIZE:
5959 args[0] = (instance->fifo) ? ME4600_AO_FIFO_COUNT : 0;
5960 break;
5961
5962 case ME_CAP_AI_BUFFER_SIZE:
5963 args[0] =
5964 (instance->circ_buf.buf) ? ME4600_AO_CIRC_BUF_COUNT : 0;
5965 break;
5966
5967 default:
5968 PERROR("Invalid capability.\n");
5969 err = ME_ERRNO_INVALID_CAP;
5970 args[0] = 0;
5971 }
5972
5973 return err;
5974 }
ubuntu-zesty-kernel mirror