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1 /*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51 #include <linux/spinlock.h>
52 #include <linux/pci.h>
53 #include <linux/io.h>
54 #include <linux/delay.h>
55 #include <linux/netdevice.h>
56 #include <linux/vmalloc.h>
57 #include <linux/module.h>
58 #include <linux/prefetch.h>
59
60 #include "hfi.h"
61 #include "trace.h"
62 #include "qp.h"
63 #include "sdma.h"
64
65 #undef pr_fmt
66 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
67
68 /*
69 * The size has to be longer than this string, so we can append
70 * board/chip information to it in the initialization code.
71 */
72 const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n";
73
74 DEFINE_SPINLOCK(hfi1_devs_lock);
75 LIST_HEAD(hfi1_dev_list);
76 DEFINE_MUTEX(hfi1_mutex); /* general driver use */
77
78 unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
79 module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO);
80 MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is 8192");
81
82 unsigned int hfi1_cu = 1;
83 module_param_named(cu, hfi1_cu, uint, S_IRUGO);
84 MODULE_PARM_DESC(cu, "Credit return units");
85
86 unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT;
87 static int hfi1_caps_set(const char *, const struct kernel_param *);
88 static int hfi1_caps_get(char *, const struct kernel_param *);
89 static const struct kernel_param_ops cap_ops = {
90 .set = hfi1_caps_set,
91 .get = hfi1_caps_get
92 };
93 module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO);
94 MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features");
95
96 MODULE_LICENSE("Dual BSD/GPL");
97 MODULE_DESCRIPTION("Intel Omni-Path Architecture driver");
98 MODULE_VERSION(HFI1_DRIVER_VERSION);
99
100 /*
101 * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
102 */
103 #define MAX_PKT_RECV 64
104 #define EGR_HEAD_UPDATE_THRESHOLD 16
105
106 struct hfi1_ib_stats hfi1_stats;
107
108 static int hfi1_caps_set(const char *val, const struct kernel_param *kp)
109 {
110 int ret = 0;
111 unsigned long *cap_mask_ptr = (unsigned long *)kp->arg,
112 cap_mask = *cap_mask_ptr, value, diff,
113 write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) |
114 HFI1_CAP_WRITABLE_MASK);
115
116 ret = kstrtoul(val, 0, &value);
117 if (ret) {
118 pr_warn("Invalid module parameter value for 'cap_mask'\n");
119 goto done;
120 }
121 /* Get the changed bits (except the locked bit) */
122 diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
123
124 /* Remove any bits that are not allowed to change after driver load */
125 if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
126 pr_warn("Ignoring non-writable capability bits %#lx\n",
127 diff & ~write_mask);
128 diff &= write_mask;
129 }
130
131 /* Mask off any reserved bits */
132 diff &= ~HFI1_CAP_RESERVED_MASK;
133 /* Clear any previously set and changing bits */
134 cap_mask &= ~diff;
135 /* Update the bits with the new capability */
136 cap_mask |= (value & diff);
137 /* Check for any kernel/user restrictions */
138 diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
139 ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
140 cap_mask &= ~diff;
141 /* Set the bitmask to the final set */
142 *cap_mask_ptr = cap_mask;
143 done:
144 return ret;
145 }
146
147 static int hfi1_caps_get(char *buffer, const struct kernel_param *kp)
148 {
149 unsigned long cap_mask = *(unsigned long *)kp->arg;
150
151 cap_mask &= ~HFI1_CAP_LOCKED_SMASK;
152 cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT);
153
154 return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask);
155 }
156
157 const char *get_unit_name(int unit)
158 {
159 static char iname[16];
160
161 snprintf(iname, sizeof(iname), DRIVER_NAME"_%u", unit);
162 return iname;
163 }
164
165 /*
166 * Return count of units with at least one port ACTIVE.
167 */
168 int hfi1_count_active_units(void)
169 {
170 struct hfi1_devdata *dd;
171 struct hfi1_pportdata *ppd;
172 unsigned long flags;
173 int pidx, nunits_active = 0;
174
175 spin_lock_irqsave(&hfi1_devs_lock, flags);
176 list_for_each_entry(dd, &hfi1_dev_list, list) {
177 if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase)
178 continue;
179 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
180 ppd = dd->pport + pidx;
181 if (ppd->lid && ppd->linkup) {
182 nunits_active++;
183 break;
184 }
185 }
186 }
187 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
188 return nunits_active;
189 }
190
191 /*
192 * Return count of all units, optionally return in arguments
193 * the number of usable (present) units, and the number of
194 * ports that are up.
195 */
196 int hfi1_count_units(int *npresentp, int *nupp)
197 {
198 int nunits = 0, npresent = 0, nup = 0;
199 struct hfi1_devdata *dd;
200 unsigned long flags;
201 int pidx;
202 struct hfi1_pportdata *ppd;
203
204 spin_lock_irqsave(&hfi1_devs_lock, flags);
205
206 list_for_each_entry(dd, &hfi1_dev_list, list) {
207 nunits++;
208 if ((dd->flags & HFI1_PRESENT) && dd->kregbase)
209 npresent++;
210 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
211 ppd = dd->pport + pidx;
212 if (ppd->lid && ppd->linkup)
213 nup++;
214 }
215 }
216
217 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
218
219 if (npresentp)
220 *npresentp = npresent;
221 if (nupp)
222 *nupp = nup;
223
224 return nunits;
225 }
226
227 /*
228 * Get address of eager buffer from it's index (allocated in chunks, not
229 * contiguous).
230 */
231 static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf,
232 u8 *update)
233 {
234 u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf);
235
236 *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset;
237 return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) +
238 (offset * RCV_BUF_BLOCK_SIZE));
239 }
240
241 /*
242 * Validate and encode the a given RcvArray Buffer size.
243 * The function will check whether the given size falls within
244 * allowed size ranges for the respective type and, optionally,
245 * return the proper encoding.
246 */
247 inline int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
248 {
249 if (unlikely(!IS_ALIGNED(size, PAGE_SIZE)))
250 return 0;
251 if (unlikely(size < MIN_EAGER_BUFFER))
252 return 0;
253 if (size >
254 (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER))
255 return 0;
256 if (encoded)
257 *encoded = ilog2(size / PAGE_SIZE) + 1;
258 return 1;
259 }
260
261 static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
262 struct hfi1_packet *packet)
263 {
264 struct hfi1_message_header *rhdr = packet->hdr;
265 u32 rte = rhf_rcv_type_err(packet->rhf);
266 int lnh = be16_to_cpu(rhdr->lrh[0]) & 3;
267 struct hfi1_ibport *ibp = &ppd->ibport_data;
268
269 if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR))
270 return;
271
272 if (packet->rhf & RHF_TID_ERR) {
273 /* For TIDERR and RC QPs preemptively schedule a NAK */
274 struct hfi1_ib_header *hdr = (struct hfi1_ib_header *)rhdr;
275 struct hfi1_other_headers *ohdr = NULL;
276 u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */
277 u16 lid = be16_to_cpu(hdr->lrh[1]);
278 u32 qp_num;
279 u32 rcv_flags = 0;
280
281 /* Sanity check packet */
282 if (tlen < 24)
283 goto drop;
284
285 /* Check for GRH */
286 if (lnh == HFI1_LRH_BTH)
287 ohdr = &hdr->u.oth;
288 else if (lnh == HFI1_LRH_GRH) {
289 u32 vtf;
290
291 ohdr = &hdr->u.l.oth;
292 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
293 goto drop;
294 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
295 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
296 goto drop;
297 rcv_flags |= HFI1_HAS_GRH;
298 } else
299 goto drop;
300
301 /* Get the destination QP number. */
302 qp_num = be32_to_cpu(ohdr->bth[1]) & HFI1_QPN_MASK;
303 if (lid < HFI1_MULTICAST_LID_BASE) {
304 struct hfi1_qp *qp;
305 unsigned long flags;
306
307 rcu_read_lock();
308 qp = hfi1_lookup_qpn(ibp, qp_num);
309 if (!qp) {
310 rcu_read_unlock();
311 goto drop;
312 }
313
314 /*
315 * Handle only RC QPs - for other QP types drop error
316 * packet.
317 */
318 spin_lock_irqsave(&qp->r_lock, flags);
319
320 /* Check for valid receive state. */
321 if (!(ib_hfi1_state_ops[qp->state] &
322 HFI1_PROCESS_RECV_OK)) {
323 ibp->n_pkt_drops++;
324 }
325
326 switch (qp->ibqp.qp_type) {
327 case IB_QPT_RC:
328 hfi1_rc_hdrerr(
329 rcd,
330 hdr,
331 rcv_flags,
332 qp);
333 break;
334 default:
335 /* For now don't handle any other QP types */
336 break;
337 }
338
339 spin_unlock_irqrestore(&qp->r_lock, flags);
340 rcu_read_unlock();
341 } /* Unicast QP */
342 } /* Valid packet with TIDErr */
343
344 /* handle "RcvTypeErr" flags */
345 switch (rte) {
346 case RHF_RTE_ERROR_OP_CODE_ERR:
347 {
348 u32 opcode;
349 void *ebuf = NULL;
350 __be32 *bth = NULL;
351
352 if (rhf_use_egr_bfr(packet->rhf))
353 ebuf = packet->ebuf;
354
355 if (ebuf == NULL)
356 goto drop; /* this should never happen */
357
358 if (lnh == HFI1_LRH_BTH)
359 bth = (__be32 *)ebuf;
360 else if (lnh == HFI1_LRH_GRH)
361 bth = (__be32 *)((char *)ebuf + sizeof(struct ib_grh));
362 else
363 goto drop;
364
365 opcode = be32_to_cpu(bth[0]) >> 24;
366 opcode &= 0xff;
367
368 if (opcode == IB_OPCODE_CNP) {
369 /*
370 * Only in pre-B0 h/w is the CNP_OPCODE handled
371 * via this code path (errata 291394).
372 */
373 struct hfi1_qp *qp = NULL;
374 u32 lqpn, rqpn;
375 u16 rlid;
376 u8 svc_type, sl, sc5;
377
378 sc5 = (be16_to_cpu(rhdr->lrh[0]) >> 12) & 0xf;
379 if (rhf_dc_info(packet->rhf))
380 sc5 |= 0x10;
381 sl = ibp->sc_to_sl[sc5];
382
383 lqpn = be32_to_cpu(bth[1]) & HFI1_QPN_MASK;
384 rcu_read_lock();
385 qp = hfi1_lookup_qpn(ibp, lqpn);
386 if (qp == NULL) {
387 rcu_read_unlock();
388 goto drop;
389 }
390
391 switch (qp->ibqp.qp_type) {
392 case IB_QPT_UD:
393 rlid = 0;
394 rqpn = 0;
395 svc_type = IB_CC_SVCTYPE_UD;
396 break;
397 case IB_QPT_UC:
398 rlid = be16_to_cpu(rhdr->lrh[3]);
399 rqpn = qp->remote_qpn;
400 svc_type = IB_CC_SVCTYPE_UC;
401 break;
402 default:
403 goto drop;
404 }
405
406 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
407 rcu_read_unlock();
408 }
409
410 packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK;
411 break;
412 }
413 default:
414 break;
415 }
416
417 drop:
418 return;
419 }
420
421 static inline void init_packet(struct hfi1_ctxtdata *rcd,
422 struct hfi1_packet *packet)
423 {
424
425 packet->rsize = rcd->rcvhdrqentsize; /* words */
426 packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */
427 packet->rcd = rcd;
428 packet->updegr = 0;
429 packet->etail = -1;
430 packet->rhf_addr = get_rhf_addr(rcd);
431 packet->rhf = rhf_to_cpu(packet->rhf_addr);
432 packet->rhqoff = rcd->head;
433 packet->numpkt = 0;
434 packet->rcv_flags = 0;
435 }
436
437 #ifndef CONFIG_PRESCAN_RXQ
438 static void prescan_rxq(struct hfi1_packet *packet) {}
439 #else /* CONFIG_PRESCAN_RXQ */
440 static int prescan_receive_queue;
441
442 static void process_ecn(struct hfi1_qp *qp, struct hfi1_ib_header *hdr,
443 struct hfi1_other_headers *ohdr,
444 u64 rhf, struct ib_grh *grh)
445 {
446 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
447 u32 bth1;
448 u8 sc5, svc_type;
449 int is_fecn, is_becn;
450
451 switch (qp->ibqp.qp_type) {
452 case IB_QPT_UD:
453 svc_type = IB_CC_SVCTYPE_UD;
454 break;
455 case IB_QPT_UC: /* LATER */
456 case IB_QPT_RC: /* LATER */
457 default:
458 return;
459 }
460
461 is_fecn = (be32_to_cpu(ohdr->bth[1]) >> HFI1_FECN_SHIFT) &
462 HFI1_FECN_MASK;
463 is_becn = (be32_to_cpu(ohdr->bth[1]) >> HFI1_BECN_SHIFT) &
464 HFI1_BECN_MASK;
465
466 sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf;
467 if (rhf_dc_info(rhf))
468 sc5 |= 0x10;
469
470 if (is_fecn) {
471 u32 src_qpn = be32_to_cpu(ohdr->u.ud.deth[1]) & HFI1_QPN_MASK;
472 u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
473 u16 dlid = be16_to_cpu(hdr->lrh[1]);
474 u16 slid = be16_to_cpu(hdr->lrh[3]);
475
476 return_cnp(ibp, qp, src_qpn, pkey, dlid, slid, sc5, grh);
477 }
478
479 if (is_becn) {
480 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
481 u32 lqpn = be32_to_cpu(ohdr->bth[1]) & HFI1_QPN_MASK;
482 u8 sl = ibp->sc_to_sl[sc5];
483
484 process_becn(ppd, sl, 0, lqpn, 0, svc_type);
485 }
486
487 /* turn off BECN, or FECN */
488 bth1 = be32_to_cpu(ohdr->bth[1]);
489 bth1 &= ~(HFI1_FECN_MASK << HFI1_FECN_SHIFT);
490 bth1 &= ~(HFI1_BECN_MASK << HFI1_BECN_SHIFT);
491 ohdr->bth[1] = cpu_to_be32(bth1);
492 }
493
494 struct ps_mdata {
495 struct hfi1_ctxtdata *rcd;
496 u32 rsize;
497 u32 maxcnt;
498 u32 ps_head;
499 u32 ps_tail;
500 u32 ps_seq;
501 };
502
503 static inline void init_ps_mdata(struct ps_mdata *mdata,
504 struct hfi1_packet *packet)
505 {
506 struct hfi1_ctxtdata *rcd = packet->rcd;
507
508 mdata->rcd = rcd;
509 mdata->rsize = packet->rsize;
510 mdata->maxcnt = packet->maxcnt;
511
512 mdata->ps_head = packet->rhqoff;
513
514 if (HFI1_CAP_IS_KSET(DMA_RTAIL)) {
515 mdata->ps_tail = get_rcvhdrtail(rcd);
516 mdata->ps_seq = 0; /* not used with DMA_RTAIL */
517 } else {
518 mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
519 mdata->ps_seq = rcd->seq_cnt;
520 }
521 }
522
523 static inline int ps_done(struct ps_mdata *mdata, u64 rhf)
524 {
525 if (HFI1_CAP_IS_KSET(DMA_RTAIL))
526 return mdata->ps_head == mdata->ps_tail;
527 return mdata->ps_seq != rhf_rcv_seq(rhf);
528 }
529
530 static inline void update_ps_mdata(struct ps_mdata *mdata)
531 {
532 mdata->ps_head += mdata->rsize;
533 if (mdata->ps_head >= mdata->maxcnt)
534 mdata->ps_head = 0;
535 if (!HFI1_CAP_IS_KSET(DMA_RTAIL)) {
536 if (++mdata->ps_seq > 13)
537 mdata->ps_seq = 1;
538 }
539 }
540
541 /*
542 * prescan_rxq - search through the receive queue looking for packets
543 * containing Excplicit Congestion Notifications (FECNs, or BECNs).
544 * When an ECN is found, process the Congestion Notification, and toggle
545 * it off.
546 */
547 static void prescan_rxq(struct hfi1_packet *packet)
548 {
549 struct hfi1_ctxtdata *rcd = packet->rcd;
550 struct ps_mdata mdata;
551
552 if (!prescan_receive_queue)
553 return;
554
555 init_ps_mdata(&mdata, packet);
556
557 while (1) {
558 struct hfi1_devdata *dd = rcd->dd;
559 struct hfi1_ibport *ibp = &rcd->ppd->ibport_data;
560 __le32 *rhf_addr = (__le32 *) rcd->rcvhdrq + mdata.ps_head +
561 dd->rhf_offset;
562 struct hfi1_qp *qp;
563 struct hfi1_ib_header *hdr;
564 struct hfi1_other_headers *ohdr;
565 struct ib_grh *grh = NULL;
566 u64 rhf = rhf_to_cpu(rhf_addr);
567 u32 etype = rhf_rcv_type(rhf), qpn;
568 int is_ecn = 0;
569 u8 lnh;
570
571 if (ps_done(&mdata, rhf))
572 break;
573
574 if (etype != RHF_RCV_TYPE_IB)
575 goto next;
576
577 hdr = (struct hfi1_ib_header *)
578 hfi1_get_msgheader(dd, rhf_addr);
579 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
580
581 if (lnh == HFI1_LRH_BTH)
582 ohdr = &hdr->u.oth;
583 else if (lnh == HFI1_LRH_GRH) {
584 ohdr = &hdr->u.l.oth;
585 grh = &hdr->u.l.grh;
586 } else
587 goto next; /* just in case */
588
589 is_ecn |= be32_to_cpu(ohdr->bth[1]) &
590 (HFI1_FECN_MASK << HFI1_FECN_SHIFT);
591 is_ecn |= be32_to_cpu(ohdr->bth[1]) &
592 (HFI1_BECN_MASK << HFI1_BECN_SHIFT);
593
594 if (!is_ecn)
595 goto next;
596
597 qpn = be32_to_cpu(ohdr->bth[1]) & HFI1_QPN_MASK;
598 rcu_read_lock();
599 qp = hfi1_lookup_qpn(ibp, qpn);
600
601 if (qp == NULL) {
602 rcu_read_unlock();
603 goto next;
604 }
605
606 process_ecn(qp, hdr, ohdr, rhf, grh);
607 rcu_read_unlock();
608 next:
609 update_ps_mdata(&mdata);
610 }
611 }
612 #endif /* CONFIG_PRESCAN_RXQ */
613
614 static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
615 {
616 int ret = RCV_PKT_OK;
617
618 packet->hdr = hfi1_get_msgheader(packet->rcd->dd,
619 packet->rhf_addr);
620 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr;
621 packet->etype = rhf_rcv_type(packet->rhf);
622 /* total length */
623 packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */
624 /* retrieve eager buffer details */
625 packet->ebuf = NULL;
626 if (rhf_use_egr_bfr(packet->rhf)) {
627 packet->etail = rhf_egr_index(packet->rhf);
628 packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
629 &packet->updegr);
630 /*
631 * Prefetch the contents of the eager buffer. It is
632 * OK to send a negative length to prefetch_range().
633 * The +2 is the size of the RHF.
634 */
635 prefetch_range(packet->ebuf,
636 packet->tlen - ((packet->rcd->rcvhdrqentsize -
637 (rhf_hdrq_offset(packet->rhf)+2)) * 4));
638 }
639
640 /*
641 * Call a type specific handler for the packet. We
642 * should be able to trust that etype won't be beyond
643 * the range of valid indexes. If so something is really
644 * wrong and we can probably just let things come
645 * crashing down. There is no need to eat another
646 * comparison in this performance critical code.
647 */
648 packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet);
649 packet->numpkt++;
650
651 /* Set up for the next packet */
652 packet->rhqoff += packet->rsize;
653 if (packet->rhqoff >= packet->maxcnt)
654 packet->rhqoff = 0;
655
656 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
657 if (thread) {
658 cond_resched();
659 } else {
660 ret = RCV_PKT_LIMIT;
661 this_cpu_inc(*packet->rcd->dd->rcv_limit);
662 }
663 }
664
665 packet->rhf_addr = (__le32 *) packet->rcd->rcvhdrq + packet->rhqoff +
666 packet->rcd->dd->rhf_offset;
667 packet->rhf = rhf_to_cpu(packet->rhf_addr);
668
669 return ret;
670 }
671
672 static inline void process_rcv_update(int last, struct hfi1_packet *packet)
673 {
674 /*
675 * Update head regs etc., every 16 packets, if not last pkt,
676 * to help prevent rcvhdrq overflows, when many packets
677 * are processed and queue is nearly full.
678 * Don't request an interrupt for intermediate updates.
679 */
680 if (!last && !(packet->numpkt & 0xf)) {
681 update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
682 packet->etail, 0, 0);
683 packet->updegr = 0;
684 }
685 packet->rcv_flags = 0;
686 }
687
688 static inline void finish_packet(struct hfi1_packet *packet)
689 {
690
691 /*
692 * Nothing we need to free for the packet.
693 *
694 * The only thing we need to do is a final update and call for an
695 * interrupt
696 */
697 update_usrhead(packet->rcd, packet->rcd->head, packet->updegr,
698 packet->etail, rcv_intr_dynamic, packet->numpkt);
699
700 }
701
702 static inline void process_rcv_qp_work(struct hfi1_packet *packet)
703 {
704
705 struct hfi1_ctxtdata *rcd;
706 struct hfi1_qp *qp, *nqp;
707
708 rcd = packet->rcd;
709 rcd->head = packet->rhqoff;
710
711 /*
712 * Iterate over all QPs waiting to respond.
713 * The list won't change since the IRQ is only run on one CPU.
714 */
715 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
716 list_del_init(&qp->rspwait);
717 if (qp->r_flags & HFI1_R_RSP_NAK) {
718 qp->r_flags &= ~HFI1_R_RSP_NAK;
719 hfi1_send_rc_ack(rcd, qp, 0);
720 }
721 if (qp->r_flags & HFI1_R_RSP_SEND) {
722 unsigned long flags;
723
724 qp->r_flags &= ~HFI1_R_RSP_SEND;
725 spin_lock_irqsave(&qp->s_lock, flags);
726 if (ib_hfi1_state_ops[qp->state] &
727 HFI1_PROCESS_OR_FLUSH_SEND)
728 hfi1_schedule_send(qp);
729 spin_unlock_irqrestore(&qp->s_lock, flags);
730 }
731 if (atomic_dec_and_test(&qp->refcount))
732 wake_up(&qp->wait);
733 }
734 }
735
736 /*
737 * Handle receive interrupts when using the no dma rtail option.
738 */
739 int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
740 {
741 u32 seq;
742 int last = RCV_PKT_OK;
743 struct hfi1_packet packet;
744
745 init_packet(rcd, &packet);
746 seq = rhf_rcv_seq(packet.rhf);
747 if (seq != rcd->seq_cnt) {
748 last = RCV_PKT_DONE;
749 goto bail;
750 }
751
752 prescan_rxq(&packet);
753
754 while (last == RCV_PKT_OK) {
755 last = process_rcv_packet(&packet, thread);
756 seq = rhf_rcv_seq(packet.rhf);
757 if (++rcd->seq_cnt > 13)
758 rcd->seq_cnt = 1;
759 if (seq != rcd->seq_cnt)
760 last = RCV_PKT_DONE;
761 process_rcv_update(last, &packet);
762 }
763 process_rcv_qp_work(&packet);
764 bail:
765 finish_packet(&packet);
766 return last;
767 }
768
769 int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
770 {
771 u32 hdrqtail;
772 int last = RCV_PKT_OK;
773 struct hfi1_packet packet;
774
775 init_packet(rcd, &packet);
776 hdrqtail = get_rcvhdrtail(rcd);
777 if (packet.rhqoff == hdrqtail) {
778 last = RCV_PKT_DONE;
779 goto bail;
780 }
781 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
782
783 prescan_rxq(&packet);
784
785 while (last == RCV_PKT_OK) {
786 last = process_rcv_packet(&packet, thread);
787 hdrqtail = get_rcvhdrtail(rcd);
788 if (packet.rhqoff == hdrqtail)
789 last = RCV_PKT_DONE;
790 process_rcv_update(last, &packet);
791 }
792 process_rcv_qp_work(&packet);
793 bail:
794 finish_packet(&packet);
795 return last;
796 }
797
798 static inline void set_all_nodma_rtail(struct hfi1_devdata *dd)
799 {
800 int i;
801
802 for (i = 0; i < dd->first_user_ctxt; i++)
803 dd->rcd[i]->do_interrupt =
804 &handle_receive_interrupt_nodma_rtail;
805 }
806
807 static inline void set_all_dma_rtail(struct hfi1_devdata *dd)
808 {
809 int i;
810
811 for (i = 0; i < dd->first_user_ctxt; i++)
812 dd->rcd[i]->do_interrupt =
813 &handle_receive_interrupt_dma_rtail;
814 }
815
816 /*
817 * handle_receive_interrupt - receive a packet
818 * @rcd: the context
819 *
820 * Called from interrupt handler for errors or receive interrupt.
821 * This is the slow path interrupt handler.
822 */
823 int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
824 {
825 struct hfi1_devdata *dd = rcd->dd;
826 u32 hdrqtail;
827 int last = RCV_PKT_OK, needset = 1;
828 struct hfi1_packet packet;
829
830 init_packet(rcd, &packet);
831
832 if (!HFI1_CAP_IS_KSET(DMA_RTAIL)) {
833 u32 seq = rhf_rcv_seq(packet.rhf);
834
835 if (seq != rcd->seq_cnt) {
836 last = RCV_PKT_DONE;
837 goto bail;
838 }
839 hdrqtail = 0;
840 } else {
841 hdrqtail = get_rcvhdrtail(rcd);
842 if (packet.rhqoff == hdrqtail) {
843 last = RCV_PKT_DONE;
844 goto bail;
845 }
846 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
847 }
848
849 prescan_rxq(&packet);
850
851 while (last == RCV_PKT_OK) {
852
853 if (unlikely(dd->do_drop && atomic_xchg(&dd->drop_packet,
854 DROP_PACKET_OFF) == DROP_PACKET_ON)) {
855 dd->do_drop = 0;
856
857 /* On to the next packet */
858 packet.rhqoff += packet.rsize;
859 packet.rhf_addr = (__le32 *) rcd->rcvhdrq +
860 packet.rhqoff +
861 dd->rhf_offset;
862 packet.rhf = rhf_to_cpu(packet.rhf_addr);
863
864 } else {
865 last = process_rcv_packet(&packet, thread);
866 }
867
868 if (!HFI1_CAP_IS_KSET(DMA_RTAIL)) {
869 u32 seq = rhf_rcv_seq(packet.rhf);
870
871 if (++rcd->seq_cnt > 13)
872 rcd->seq_cnt = 1;
873 if (seq != rcd->seq_cnt)
874 last = RCV_PKT_DONE;
875 if (needset) {
876 dd_dev_info(dd,
877 "Switching to NO_DMA_RTAIL\n");
878 set_all_nodma_rtail(dd);
879 needset = 0;
880 }
881 } else {
882 if (packet.rhqoff == hdrqtail)
883 last = RCV_PKT_DONE;
884 if (needset) {
885 dd_dev_info(dd,
886 "Switching to DMA_RTAIL\n");
887 set_all_dma_rtail(dd);
888 needset = 0;
889 }
890 }
891
892 process_rcv_update(last, &packet);
893 }
894
895 process_rcv_qp_work(&packet);
896
897 bail:
898 /*
899 * Always write head at end, and setup rcv interrupt, even
900 * if no packets were processed.
901 */
902 finish_packet(&packet);
903 return last;
904 }
905
906 /*
907 * Convert a given MTU size to the on-wire MAD packet enumeration.
908 * Return -1 if the size is invalid.
909 */
910 int mtu_to_enum(u32 mtu, int default_if_bad)
911 {
912 switch (mtu) {
913 case 0: return OPA_MTU_0;
914 case 256: return OPA_MTU_256;
915 case 512: return OPA_MTU_512;
916 case 1024: return OPA_MTU_1024;
917 case 2048: return OPA_MTU_2048;
918 case 4096: return OPA_MTU_4096;
919 case 8192: return OPA_MTU_8192;
920 case 10240: return OPA_MTU_10240;
921 }
922 return default_if_bad;
923 }
924
925 u16 enum_to_mtu(int mtu)
926 {
927 switch (mtu) {
928 case OPA_MTU_0: return 0;
929 case OPA_MTU_256: return 256;
930 case OPA_MTU_512: return 512;
931 case OPA_MTU_1024: return 1024;
932 case OPA_MTU_2048: return 2048;
933 case OPA_MTU_4096: return 4096;
934 case OPA_MTU_8192: return 8192;
935 case OPA_MTU_10240: return 10240;
936 default: return 0xffff;
937 }
938 }
939
940 /*
941 * set_mtu - set the MTU
942 * @ppd: the per port data
943 *
944 * We can handle "any" incoming size, the issue here is whether we
945 * need to restrict our outgoing size. We do not deal with what happens
946 * to programs that are already running when the size changes.
947 */
948 int set_mtu(struct hfi1_pportdata *ppd)
949 {
950 struct hfi1_devdata *dd = ppd->dd;
951 int i, drain, ret = 0, is_up = 0;
952
953 ppd->ibmtu = 0;
954 for (i = 0; i < ppd->vls_supported; i++)
955 if (ppd->ibmtu < dd->vld[i].mtu)
956 ppd->ibmtu = dd->vld[i].mtu;
957 ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
958
959 mutex_lock(&ppd->hls_lock);
960 if (ppd->host_link_state == HLS_UP_INIT
961 || ppd->host_link_state == HLS_UP_ARMED
962 || ppd->host_link_state == HLS_UP_ACTIVE)
963 is_up = 1;
964
965 drain = !is_ax(dd) && is_up;
966
967 if (drain)
968 /*
969 * MTU is specified per-VL. To ensure that no packet gets
970 * stuck (due, e.g., to the MTU for the packet's VL being
971 * reduced), empty the per-VL FIFOs before adjusting MTU.
972 */
973 ret = stop_drain_data_vls(dd);
974
975 if (ret) {
976 dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
977 __func__);
978 goto err;
979 }
980
981 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
982
983 if (drain)
984 open_fill_data_vls(dd); /* reopen all VLs */
985
986 err:
987 mutex_unlock(&ppd->hls_lock);
988
989 return ret;
990 }
991
992 int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc)
993 {
994 struct hfi1_devdata *dd = ppd->dd;
995
996 ppd->lid = lid;
997 ppd->lmc = lmc;
998 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0);
999
1000 dd_dev_info(dd, "IB%u:%u got a lid: 0x%x\n", dd->unit, ppd->port, lid);
1001
1002 return 0;
1003 }
1004
1005 /*
1006 * Following deal with the "obviously simple" task of overriding the state
1007 * of the LEDs, which normally indicate link physical and logical status.
1008 * The complications arise in dealing with different hardware mappings
1009 * and the board-dependent routine being called from interrupts.
1010 * and then there's the requirement to _flash_ them.
1011 */
1012 #define LED_OVER_FREQ_SHIFT 8
1013 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1014 /* Below is "non-zero" to force override, but both actual LEDs are off */
1015 #define LED_OVER_BOTH_OFF (8)
1016
1017 static void run_led_override(unsigned long opaque)
1018 {
1019 struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)opaque;
1020 struct hfi1_devdata *dd = ppd->dd;
1021 int timeoff;
1022 int ph_idx;
1023
1024 if (!(dd->flags & HFI1_INITTED))
1025 return;
1026
1027 ph_idx = ppd->led_override_phase++ & 1;
1028 ppd->led_override = ppd->led_override_vals[ph_idx];
1029 timeoff = ppd->led_override_timeoff;
1030
1031 /*
1032 * don't re-fire the timer if user asked for it to be off; we let
1033 * it fire one more time after they turn it off to simplify
1034 */
1035 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1036 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
1037 }
1038
1039 void hfi1_set_led_override(struct hfi1_pportdata *ppd, unsigned int val)
1040 {
1041 struct hfi1_devdata *dd = ppd->dd;
1042 int timeoff, freq;
1043
1044 if (!(dd->flags & HFI1_INITTED))
1045 return;
1046
1047 /* First check if we are blinking. If not, use 1HZ polling */
1048 timeoff = HZ;
1049 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
1050
1051 if (freq) {
1052 /* For blink, set each phase from one nybble of val */
1053 ppd->led_override_vals[0] = val & 0xF;
1054 ppd->led_override_vals[1] = (val >> 4) & 0xF;
1055 timeoff = (HZ << 4)/freq;
1056 } else {
1057 /* Non-blink set both phases the same. */
1058 ppd->led_override_vals[0] = val & 0xF;
1059 ppd->led_override_vals[1] = val & 0xF;
1060 }
1061 ppd->led_override_timeoff = timeoff;
1062
1063 /*
1064 * If the timer has not already been started, do so. Use a "quick"
1065 * timeout so the function will be called soon, to look at our request.
1066 */
1067 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
1068 /* Need to start timer */
1069 setup_timer(&ppd->led_override_timer, run_led_override,
1070 (unsigned long)ppd);
1071
1072 ppd->led_override_timer.expires = jiffies + 1;
1073 add_timer(&ppd->led_override_timer);
1074 } else {
1075 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1076 mod_timer(&ppd->led_override_timer, jiffies + 1);
1077 atomic_dec(&ppd->led_override_timer_active);
1078 }
1079 }
1080
1081 /**
1082 * hfi1_reset_device - reset the chip if possible
1083 * @unit: the device to reset
1084 *
1085 * Whether or not reset is successful, we attempt to re-initialize the chip
1086 * (that is, much like a driver unload/reload). We clear the INITTED flag
1087 * so that the various entry points will fail until we reinitialize. For
1088 * now, we only allow this if no user contexts are open that use chip resources
1089 */
1090 int hfi1_reset_device(int unit)
1091 {
1092 int ret, i;
1093 struct hfi1_devdata *dd = hfi1_lookup(unit);
1094 struct hfi1_pportdata *ppd;
1095 unsigned long flags;
1096 int pidx;
1097
1098 if (!dd) {
1099 ret = -ENODEV;
1100 goto bail;
1101 }
1102
1103 dd_dev_info(dd, "Reset on unit %u requested\n", unit);
1104
1105 if (!dd->kregbase || !(dd->flags & HFI1_PRESENT)) {
1106 dd_dev_info(dd,
1107 "Invalid unit number %u or not initialized or not present\n",
1108 unit);
1109 ret = -ENXIO;
1110 goto bail;
1111 }
1112
1113 spin_lock_irqsave(&dd->uctxt_lock, flags);
1114 if (dd->rcd)
1115 for (i = dd->first_user_ctxt; i < dd->num_rcv_contexts; i++) {
1116 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
1117 continue;
1118 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1119 ret = -EBUSY;
1120 goto bail;
1121 }
1122 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1123
1124 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1125 ppd = dd->pport + pidx;
1126 if (atomic_read(&ppd->led_override_timer_active)) {
1127 /* Need to stop LED timer, _then_ shut off LEDs */
1128 del_timer_sync(&ppd->led_override_timer);
1129 atomic_set(&ppd->led_override_timer_active, 0);
1130 }
1131
1132 /* Shut off LEDs after we are sure timer is not running */
1133 ppd->led_override = LED_OVER_BOTH_OFF;
1134 }
1135 if (dd->flags & HFI1_HAS_SEND_DMA)
1136 sdma_exit(dd);
1137
1138 hfi1_reset_cpu_counters(dd);
1139
1140 ret = hfi1_init(dd, 1);
1141
1142 if (ret)
1143 dd_dev_err(dd,
1144 "Reinitialize unit %u after reset failed with %d\n",
1145 unit, ret);
1146 else
1147 dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
1148 unit);
1149
1150 bail:
1151 return ret;
1152 }
1153
1154 void handle_eflags(struct hfi1_packet *packet)
1155 {
1156 struct hfi1_ctxtdata *rcd = packet->rcd;
1157 u32 rte = rhf_rcv_type_err(packet->rhf);
1158
1159 dd_dev_err(rcd->dd,
1160 "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n",
1161 rcd->ctxt, packet->rhf,
1162 packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "",
1163 packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "",
1164 packet->rhf & RHF_DC_ERR ? "dc " : "",
1165 packet->rhf & RHF_TID_ERR ? "tid " : "",
1166 packet->rhf & RHF_LEN_ERR ? "len " : "",
1167 packet->rhf & RHF_ECC_ERR ? "ecc " : "",
1168 packet->rhf & RHF_VCRC_ERR ? "vcrc " : "",
1169 packet->rhf & RHF_ICRC_ERR ? "icrc " : "",
1170 rte);
1171
1172 rcv_hdrerr(rcd, rcd->ppd, packet);
1173 }
1174
1175 /*
1176 * The following functions are called by the interrupt handler. They are type
1177 * specific handlers for each packet type.
1178 */
1179 int process_receive_ib(struct hfi1_packet *packet)
1180 {
1181 trace_hfi1_rcvhdr(packet->rcd->ppd->dd,
1182 packet->rcd->ctxt,
1183 rhf_err_flags(packet->rhf),
1184 RHF_RCV_TYPE_IB,
1185 packet->hlen,
1186 packet->tlen,
1187 packet->updegr,
1188 rhf_egr_index(packet->rhf));
1189
1190 if (unlikely(rhf_err_flags(packet->rhf))) {
1191 handle_eflags(packet);
1192 return RHF_RCV_CONTINUE;
1193 }
1194
1195 hfi1_ib_rcv(packet);
1196 return RHF_RCV_CONTINUE;
1197 }
1198
1199 int process_receive_bypass(struct hfi1_packet *packet)
1200 {
1201 if (unlikely(rhf_err_flags(packet->rhf)))
1202 handle_eflags(packet);
1203
1204 dd_dev_err(packet->rcd->dd,
1205 "Bypass packets are not supported in normal operation. Dropping\n");
1206 return RHF_RCV_CONTINUE;
1207 }
1208
1209 int process_receive_error(struct hfi1_packet *packet)
1210 {
1211 handle_eflags(packet);
1212
1213 if (unlikely(rhf_err_flags(packet->rhf)))
1214 dd_dev_err(packet->rcd->dd,
1215 "Unhandled error packet received. Dropping.\n");
1216
1217 return RHF_RCV_CONTINUE;
1218 }
1219
1220 int kdeth_process_expected(struct hfi1_packet *packet)
1221 {
1222 if (unlikely(rhf_err_flags(packet->rhf)))
1223 handle_eflags(packet);
1224
1225 dd_dev_err(packet->rcd->dd,
1226 "Unhandled expected packet received. Dropping.\n");
1227 return RHF_RCV_CONTINUE;
1228 }
1229
1230 int kdeth_process_eager(struct hfi1_packet *packet)
1231 {
1232 if (unlikely(rhf_err_flags(packet->rhf)))
1233 handle_eflags(packet);
1234
1235 dd_dev_err(packet->rcd->dd,
1236 "Unhandled eager packet received. Dropping.\n");
1237 return RHF_RCV_CONTINUE;
1238 }
1239
1240 int process_receive_invalid(struct hfi1_packet *packet)
1241 {
1242 dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n",
1243 rhf_rcv_type(packet->rhf));
1244 return RHF_RCV_CONTINUE;
1245 }