5 * This file is provided under a dual BSD/GPLv2 license. When using or
6 * redistributing this file, you may do so under either license.
10 * Copyright(c) 2015 Intel Corporation.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
23 * Copyright(c) 2015 Intel Corporation.
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
29 * - Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
31 * - Redistributions in binary form must reproduce the above copyright
32 * notice, this list of conditions and the following disclaimer in
33 * the documentation and/or other materials provided with the
35 * - Neither the name of Intel Corporation nor the names of its
36 * contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
40 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
41 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
42 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
43 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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45 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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49 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 #include <linux/interrupt.h>
54 #include <linux/pci.h>
55 #include <linux/dma-mapping.h>
56 #include <linux/mutex.h>
57 #include <linux/list.h>
58 #include <linux/scatterlist.h>
59 #include <linux/slab.h>
62 #include <linux/completion.h>
63 #include <linux/kref.h>
64 #include <linux/sched.h>
65 #include <linux/cdev.h>
66 #include <linux/delay.h>
67 #include <linux/kthread.h>
68 #include <rdma/rdma_vt.h>
70 #include "chip_registers.h"
79 /* bumped 1 from s/w major version of TrueScale */
80 #define HFI1_CHIP_VERS_MAJ 3U
82 /* don't care about this except printing */
83 #define HFI1_CHIP_VERS_MIN 0U
85 /* The Organization Unique Identifier (Mfg code), and its position in GUID */
86 #define HFI1_OUI 0x001175
87 #define HFI1_OUI_LSB 40
89 #define DROP_PACKET_OFF 0
90 #define DROP_PACKET_ON 1
92 extern unsigned long hfi1_cap_mask
;
93 #define HFI1_CAP_KGET_MASK(mask, cap) ((mask) & HFI1_CAP_##cap)
94 #define HFI1_CAP_UGET_MASK(mask, cap) \
95 (((mask) >> HFI1_CAP_USER_SHIFT) & HFI1_CAP_##cap)
96 #define HFI1_CAP_KGET(cap) (HFI1_CAP_KGET_MASK(hfi1_cap_mask, cap))
97 #define HFI1_CAP_UGET(cap) (HFI1_CAP_UGET_MASK(hfi1_cap_mask, cap))
98 #define HFI1_CAP_IS_KSET(cap) (!!HFI1_CAP_KGET(cap))
99 #define HFI1_CAP_IS_USET(cap) (!!HFI1_CAP_UGET(cap))
100 #define HFI1_MISC_GET() ((hfi1_cap_mask >> HFI1_CAP_MISC_SHIFT) & \
102 /* Offline Disabled Reason is 4-bits */
103 #define HFI1_ODR_MASK(rsn) ((rsn) & OPA_PI_MASK_OFFLINE_REASON)
106 * Control context is always 0 and handles the error packets.
107 * It also handles the VL15 and multicast packets.
109 #define HFI1_CTRL_CTXT 0
112 * Driver context will store software counters for each of the events
113 * associated with these status registers
115 #define NUM_CCE_ERR_STATUS_COUNTERS 41
116 #define NUM_RCV_ERR_STATUS_COUNTERS 64
117 #define NUM_MISC_ERR_STATUS_COUNTERS 13
118 #define NUM_SEND_PIO_ERR_STATUS_COUNTERS 36
119 #define NUM_SEND_DMA_ERR_STATUS_COUNTERS 4
120 #define NUM_SEND_EGRESS_ERR_STATUS_COUNTERS 64
121 #define NUM_SEND_ERR_STATUS_COUNTERS 3
122 #define NUM_SEND_CTXT_ERR_STATUS_COUNTERS 5
123 #define NUM_SEND_DMA_ENG_ERR_STATUS_COUNTERS 24
126 * per driver stats, either not device nor port-specific, or
127 * summed over all of the devices and ports.
128 * They are described by name via ipathfs filesystem, so layout
129 * and number of elements can change without breaking compatibility.
130 * If members are added or deleted hfi1_statnames[] in debugfs.c must
133 struct hfi1_ib_stats
{
134 __u64 sps_ints
; /* number of interrupts handled */
135 __u64 sps_errints
; /* number of error interrupts */
136 __u64 sps_txerrs
; /* tx-related packet errors */
137 __u64 sps_rcverrs
; /* non-crc rcv packet errors */
138 __u64 sps_hwerrs
; /* hardware errors reported (parity, etc.) */
139 __u64 sps_nopiobufs
; /* no pio bufs avail from kernel */
140 __u64 sps_ctxts
; /* number of contexts currently open */
141 __u64 sps_lenerrs
; /* number of kernel packets where RHF != LRH len */
146 extern struct hfi1_ib_stats hfi1_stats
;
147 extern const struct pci_error_handlers hfi1_pci_err_handler
;
150 * First-cut criterion for "device is active" is
151 * two thousand dwords combined Tx, Rx traffic per
152 * 5-second interval. SMA packets are 64 dwords,
153 * and occur "a few per second", presumably each way.
155 #define HFI1_TRAFFIC_ACTIVE_THRESHOLD (2000)
158 * Below contains all data related to a single context (formerly called port).
161 #ifdef CONFIG_DEBUG_FS
162 struct hfi1_opcode_stats_perctx
;
165 struct ctxt_eager_bufs
{
166 ssize_t size
; /* total size of eager buffers */
167 u32 count
; /* size of buffers array */
168 u32 numbufs
; /* number of buffers allocated */
169 u32 alloced
; /* number of rcvarray entries used */
170 u32 rcvtid_size
; /* size of each eager rcv tid */
171 u32 threshold
; /* head update threshold */
172 struct eager_buffer
{
184 struct list_head list
;
188 struct hfi1_ctxtdata
{
189 /* shadow the ctxt's RcvCtrl register */
191 /* rcvhdrq base, needs mmap before useful */
193 /* kernel virtual address where hdrqtail is updated */
194 volatile __le64
*rcvhdrtail_kvaddr
;
196 * Shared page for kernel to signal user processes that send buffers
197 * need disarming. The process should call HFI1_CMD_DISARM_BUFS
198 * or HFI1_CMD_ACK_EVENT with IPATH_EVENT_DISARM_BUFS set.
200 unsigned long *user_event_mask
;
201 /* when waiting for rcv or pioavail */
202 wait_queue_head_t wait
;
203 /* rcvhdrq size (for freeing) */
205 /* number of rcvhdrq entries */
207 /* size of each of the rcvhdrq entries */
209 /* mmap of hdrq, must fit in 44 bits */
210 dma_addr_t rcvhdrq_phys
;
211 dma_addr_t rcvhdrqtailaddr_phys
;
212 struct ctxt_eager_bufs egrbufs
;
213 /* this receive context's assigned PIO ACK send context */
214 struct send_context
*sc
;
216 /* dynamic receive available interrupt timeout */
217 u32 rcvavail_timeout
;
219 * number of opens (including slave sub-contexts) on this instance
220 * (ignoring forks, dup, etc. for now)
224 * how much space to leave at start of eager TID entries for
225 * protocol use, on each TID
227 /* instead of calculating it */
229 /* non-zero if ctxt is being shared. */
231 /* non-zero if ctxt is being shared. */
236 /* number of RcvArray groups for this context. */
237 u32 rcv_array_groups
;
238 /* index of first eager TID entry. */
240 /* number of expected TID entries */
242 /* index of first expected TID entry. */
245 struct exp_tid_set tid_group_list
;
246 struct exp_tid_set tid_used_list
;
247 struct exp_tid_set tid_full_list
;
249 /* lock protecting all Expected TID data */
250 struct mutex exp_lock
;
251 /* number of pio bufs for this ctxt (all procs, if shared) */
253 /* first pio buffer for this ctxt */
255 /* chip offset of PIO buffers for this ctxt */
257 /* per-context configuration flags */
259 /* per-context event flags for fileops/intr communication */
260 unsigned long event_flags
;
261 /* WAIT_RCV that timed out, no interrupt */
263 /* WAIT_PIO that timed out, no interrupt */
265 /* WAIT_RCV already happened, no wait */
267 /* WAIT_PIO already happened, no wait */
269 /* total number of polled urgent packets */
271 /* saved total number of polled urgent packets for poll edge trigger */
273 /* pid of process using this ctxt */
275 pid_t subpid
[HFI1_MAX_SHARED_CTXTS
];
276 /* same size as task_struct .comm[], command that opened context */
277 char comm
[TASK_COMM_LEN
];
278 /* so file ops can get at unit */
279 struct hfi1_devdata
*dd
;
280 /* so functions that need physical port can get it easily */
281 struct hfi1_pportdata
*ppd
;
282 /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
283 void *subctxt_uregbase
;
284 /* An array of pages for the eager receive buffers * N */
285 void *subctxt_rcvegrbuf
;
286 /* An array of pages for the eager header queue entries * N */
287 void *subctxt_rcvhdr_base
;
288 /* The version of the library which opened this ctxt */
290 /* Bitmask of active slaves */
292 /* Type of packets or conditions we want to poll for */
294 /* receive packet sequence counter */
297 /* ctxt rcvhdrq head offset */
300 /* QPs waiting for context processing */
301 struct list_head qp_wait_list
;
302 /* interrupt handling */
303 u64 imask
; /* clear interrupt mask */
304 int ireg
; /* clear interrupt register */
305 unsigned numa_id
; /* numa node of this context */
306 /* verbs stats per CTX */
307 struct hfi1_opcode_stats_perctx
*opstats
;
309 * This is the kernel thread that will keep making
310 * progress on the user sdma requests behind the scenes.
311 * There is one per context (shared contexts use the master's).
313 struct task_struct
*progress
;
314 struct list_head sdma_queues
;
315 spinlock_t sdma_qlock
;
318 * The interrupt handler for a particular receive context can vary
319 * throughout it's lifetime. This is not a lock protected data member so
320 * it must be updated atomically and the prev and new value must always
321 * be valid. Worst case is we process an extra interrupt and up to 64
322 * packets with the wrong interrupt handler.
324 int (*do_interrupt
)(struct hfi1_ctxtdata
*rcd
, int threaded
);
328 * Represents a single packet at a high level. Put commonly computed things in
329 * here so we do not have to keep doing them over and over. The rule of thumb is
330 * if something is used one time to derive some value, store that something in
331 * here. If it is used multiple times, then store the result of that derivation
337 struct hfi1_ctxtdata
*rcd
;
340 struct hfi1_other_headers
*ohdr
;
355 static inline bool has_sc4_bit(struct hfi1_packet
*p
)
357 return !!rhf_dc_info(p
->rhf
);
361 * Private data for snoop/capture support.
363 struct hfi1_snoop_data
{
366 struct device
*class_dev
;
367 spinlock_t snoop_lock
;
368 struct list_head queue
;
369 wait_queue_head_t waitq
;
371 int (*filter_callback
)(void *hdr
, void *data
, void *value
);
372 u64 dcc_cfg
; /* saved value of DCC Cfg register */
375 /* snoop mode_flag values */
376 #define HFI1_PORT_SNOOP_MODE 1U
377 #define HFI1_PORT_CAPTURE_MODE 2U
379 struct rvt_sge_state
;
382 * Get/Set IB link-level config parameters for f_get/set_ib_cfg()
383 * Mostly for MADs that set or query link parameters, also ipath
386 #define HFI1_IB_CFG_LIDLMC 0 /* LID (LS16b) and Mask (MS16b) */
387 #define HFI1_IB_CFG_LWID_DG_ENB 1 /* allowed Link-width downgrade */
388 #define HFI1_IB_CFG_LWID_ENB 2 /* allowed Link-width */
389 #define HFI1_IB_CFG_LWID 3 /* currently active Link-width */
390 #define HFI1_IB_CFG_SPD_ENB 4 /* allowed Link speeds */
391 #define HFI1_IB_CFG_SPD 5 /* current Link spd */
392 #define HFI1_IB_CFG_RXPOL_ENB 6 /* Auto-RX-polarity enable */
393 #define HFI1_IB_CFG_LREV_ENB 7 /* Auto-Lane-reversal enable */
394 #define HFI1_IB_CFG_LINKLATENCY 8 /* Link Latency (IB1.2 only) */
395 #define HFI1_IB_CFG_HRTBT 9 /* IB heartbeat off/enable/auto; DDR/QDR only */
396 #define HFI1_IB_CFG_OP_VLS 10 /* operational VLs */
397 #define HFI1_IB_CFG_VL_HIGH_CAP 11 /* num of VL high priority weights */
398 #define HFI1_IB_CFG_VL_LOW_CAP 12 /* num of VL low priority weights */
399 #define HFI1_IB_CFG_OVERRUN_THRESH 13 /* IB overrun threshold */
400 #define HFI1_IB_CFG_PHYERR_THRESH 14 /* IB PHY error threshold */
401 #define HFI1_IB_CFG_LINKDEFAULT 15 /* IB link default (sleep/poll) */
402 #define HFI1_IB_CFG_PKEYS 16 /* update partition keys */
403 #define HFI1_IB_CFG_MTU 17 /* update MTU in IBC */
404 #define HFI1_IB_CFG_VL_HIGH_LIMIT 19
405 #define HFI1_IB_CFG_PMA_TICKS 20 /* PMA sample tick resolution */
406 #define HFI1_IB_CFG_PORT 21 /* switch port we are connected to */
409 * HFI or Host Link States
411 * These describe the states the driver thinks the logical and physical
412 * states are in. Used as an argument to set_link_state(). Implemented
413 * as bits for easy multi-state checking. The actual state can only be
416 #define __HLS_UP_INIT_BP 0
417 #define __HLS_UP_ARMED_BP 1
418 #define __HLS_UP_ACTIVE_BP 2
419 #define __HLS_DN_DOWNDEF_BP 3 /* link down default */
420 #define __HLS_DN_POLL_BP 4
421 #define __HLS_DN_DISABLE_BP 5
422 #define __HLS_DN_OFFLINE_BP 6
423 #define __HLS_VERIFY_CAP_BP 7
424 #define __HLS_GOING_UP_BP 8
425 #define __HLS_GOING_OFFLINE_BP 9
426 #define __HLS_LINK_COOLDOWN_BP 10
428 #define HLS_UP_INIT BIT(__HLS_UP_INIT_BP)
429 #define HLS_UP_ARMED BIT(__HLS_UP_ARMED_BP)
430 #define HLS_UP_ACTIVE BIT(__HLS_UP_ACTIVE_BP)
431 #define HLS_DN_DOWNDEF BIT(__HLS_DN_DOWNDEF_BP) /* link down default */
432 #define HLS_DN_POLL BIT(__HLS_DN_POLL_BP)
433 #define HLS_DN_DISABLE BIT(__HLS_DN_DISABLE_BP)
434 #define HLS_DN_OFFLINE BIT(__HLS_DN_OFFLINE_BP)
435 #define HLS_VERIFY_CAP BIT(__HLS_VERIFY_CAP_BP)
436 #define HLS_GOING_UP BIT(__HLS_GOING_UP_BP)
437 #define HLS_GOING_OFFLINE BIT(__HLS_GOING_OFFLINE_BP)
438 #define HLS_LINK_COOLDOWN BIT(__HLS_LINK_COOLDOWN_BP)
440 #define HLS_UP (HLS_UP_INIT | HLS_UP_ARMED | HLS_UP_ACTIVE)
442 /* use this MTU size if none other is given */
443 #define HFI1_DEFAULT_ACTIVE_MTU 8192
444 /* use this MTU size as the default maximum */
445 #define HFI1_DEFAULT_MAX_MTU 8192
446 /* default partition key */
447 #define DEFAULT_PKEY 0xffff
450 * Possible fabric manager config parameters for fm_{get,set}_table()
452 #define FM_TBL_VL_HIGH_ARB 1 /* Get/set VL high prio weights */
453 #define FM_TBL_VL_LOW_ARB 2 /* Get/set VL low prio weights */
454 #define FM_TBL_BUFFER_CONTROL 3 /* Get/set Buffer Control */
455 #define FM_TBL_SC2VLNT 4 /* Get/set SC->VLnt */
456 #define FM_TBL_VL_PREEMPT_ELEMS 5 /* Get (no set) VL preempt elems */
457 #define FM_TBL_VL_PREEMPT_MATRIX 6 /* Get (no set) VL preempt matrix */
460 * Possible "operations" for f_rcvctrl(ppd, op, ctxt)
461 * these are bits so they can be combined, e.g.
462 * HFI1_RCVCTRL_INTRAVAIL_ENB | HFI1_RCVCTRL_CTXT_ENB
464 #define HFI1_RCVCTRL_TAILUPD_ENB 0x01
465 #define HFI1_RCVCTRL_TAILUPD_DIS 0x02
466 #define HFI1_RCVCTRL_CTXT_ENB 0x04
467 #define HFI1_RCVCTRL_CTXT_DIS 0x08
468 #define HFI1_RCVCTRL_INTRAVAIL_ENB 0x10
469 #define HFI1_RCVCTRL_INTRAVAIL_DIS 0x20
470 #define HFI1_RCVCTRL_PKEY_ENB 0x40 /* Note, default is enabled */
471 #define HFI1_RCVCTRL_PKEY_DIS 0x80
472 #define HFI1_RCVCTRL_TIDFLOW_ENB 0x0400
473 #define HFI1_RCVCTRL_TIDFLOW_DIS 0x0800
474 #define HFI1_RCVCTRL_ONE_PKT_EGR_ENB 0x1000
475 #define HFI1_RCVCTRL_ONE_PKT_EGR_DIS 0x2000
476 #define HFI1_RCVCTRL_NO_RHQ_DROP_ENB 0x4000
477 #define HFI1_RCVCTRL_NO_RHQ_DROP_DIS 0x8000
478 #define HFI1_RCVCTRL_NO_EGR_DROP_ENB 0x10000
479 #define HFI1_RCVCTRL_NO_EGR_DROP_DIS 0x20000
481 /* partition enforcement flags */
482 #define HFI1_PART_ENFORCE_IN 0x1
483 #define HFI1_PART_ENFORCE_OUT 0x2
485 /* how often we check for synthetic counter wrap around */
486 #define SYNTH_CNT_TIME 2
489 #define CNTR_NORMAL 0x0 /* Normal counters, just read register */
490 #define CNTR_SYNTH 0x1 /* Synthetic counters, saturate at all 1s */
491 #define CNTR_DISABLED 0x2 /* Disable this counter */
492 #define CNTR_32BIT 0x4 /* Simulate 64 bits for this counter */
493 #define CNTR_VL 0x8 /* Per VL counter */
494 #define CNTR_SDMA 0x10
495 #define CNTR_INVALID_VL -1 /* Specifies invalid VL */
496 #define CNTR_MODE_W 0x0
497 #define CNTR_MODE_R 0x1
499 /* VLs Supported/Operational */
500 #define HFI1_MIN_VLS_SUPPORTED 1
501 #define HFI1_MAX_VLS_SUPPORTED 8
503 static inline void incr_cntr64(u64
*cntr
)
505 if (*cntr
< (u64
)-1LL)
509 static inline void incr_cntr32(u32
*cntr
)
511 if (*cntr
< (u32
)-1LL)
515 #define MAX_NAME_SIZE 64
516 struct hfi1_msix_entry
{
517 struct msix_entry msix
;
519 char name
[MAX_NAME_SIZE
];
523 /* per-SL CCA information */
525 struct hrtimer hrtimer
;
526 struct hfi1_pportdata
*ppd
; /* read-only */
527 int sl
; /* read-only */
528 u16 ccti
; /* read/write - current value of CCTI */
531 struct link_down_reason
{
533 * SMA-facing value. Should be set from .latest when
534 * HLS_UP_* -> HLS_DN_* transition actually occurs.
546 struct vl_arb_cache
{
548 struct ib_vl_weight_elem table
[VL_ARB_TABLE_SIZE
];
552 * The structure below encapsulates data relevant to a physical IB Port.
553 * Current chips support only one such port, but the separation
554 * clarifies things a bit. Note that to conform to IB conventions,
555 * port-numbers are one-based. The first or only port is port1.
557 struct hfi1_pportdata
{
558 struct hfi1_ibport ibport_data
;
560 struct hfi1_devdata
*dd
;
561 struct kobject pport_cc_kobj
;
562 struct kobject sc2vl_kobj
;
563 struct kobject sl2sc_kobj
;
564 struct kobject vl2mtu_kobj
;
568 struct qsfp_data qsfp_info
;
570 /* GUID for this interface, in host order */
572 /* GUID for peer interface, in host order */
575 /* up or down physical link state */
579 * this address is mapped read-only into user processes so they can
580 * get status cheaply, whenever they want. One qword of status per port
584 /* SendDMA related entries */
586 struct workqueue_struct
*hfi1_wq
;
588 /* move out of interrupt context */
589 struct work_struct link_vc_work
;
590 struct work_struct link_up_work
;
591 struct work_struct link_down_work
;
592 struct work_struct sma_message_work
;
593 struct work_struct freeze_work
;
594 struct work_struct link_downgrade_work
;
595 struct work_struct link_bounce_work
;
596 /* host link state variables */
597 struct mutex hls_lock
;
600 spinlock_t sdma_alllock ____cacheline_aligned_in_smp
;
602 u32 lstate
; /* logical link state */
604 /* these are the "32 bit" regs */
606 u32 ibmtu
; /* The MTU programmed for this unit */
608 * Current max size IB packet (in bytes) including IB headers, that
609 * we can send. Changes when ibmtu changes.
612 u32 current_egress_rate
; /* units [10^6 bits/sec] */
613 /* LID programmed for this instance */
615 /* list of pkeys programmed; 0 if not set */
616 u16 pkeys
[MAX_PKEY_VALUES
];
617 u16 link_width_supported
;
618 u16 link_width_downgrade_supported
;
619 u16 link_speed_supported
;
620 u16 link_width_enabled
;
621 u16 link_width_downgrade_enabled
;
622 u16 link_speed_enabled
;
623 u16 link_width_active
;
624 u16 link_width_downgrade_tx_active
;
625 u16 link_width_downgrade_rx_active
;
626 u16 link_speed_active
;
629 /* LID mask control */
631 /* Rx Polarity inversion (compensate for ~tx on partner) */
634 u8 hw_pidx
; /* physical port index */
635 u8 port
; /* IB port number and index into dd->pports - 1 */
636 /* type of neighbor node */
639 u8 neighbor_fm_security
; /* 1 if firmware checking is disabled */
640 u8 neighbor_port_number
;
641 u8 is_sm_config_started
;
642 u8 offline_disabled_reason
;
643 u8 is_active_optimize_enabled
;
644 u8 driver_link_ready
; /* driver ready for active link */
645 u8 link_enabled
; /* link enabled? */
647 u8 local_tx_rate
; /* rate given to 8051 firmware */
649 /* placeholders for IB MAD packet settings */
650 u8 overrun_threshold
;
651 u8 phy_error_threshold
;
653 /* used to override LED behavior */
654 u8 led_override
; /* Substituted for normal value, if non-zero */
655 u16 led_override_timeoff
; /* delta to next timer event */
656 u8 led_override_vals
[2]; /* Alternates per blink-frame */
657 u8 led_override_phase
; /* Just counts, LSB picks from vals[] */
658 atomic_t led_override_timer_active
;
659 /* Used to flash LEDs in override mode */
660 struct timer_list led_override_timer
;
665 * cca_timer_lock protects access to the per-SL cca_timer
666 * structures (specifically the ccti member).
668 spinlock_t cca_timer_lock ____cacheline_aligned_in_smp
;
669 struct cca_timer cca_timer
[OPA_MAX_SLS
];
671 /* List of congestion control table entries */
672 struct ib_cc_table_entry_shadow ccti_entries
[CC_TABLE_SHADOW_MAX
];
674 /* congestion entries, each entry corresponding to a SL */
675 struct opa_congestion_setting_entry_shadow
676 congestion_entries
[OPA_MAX_SLS
];
679 * cc_state_lock protects (write) access to the per-port
682 spinlock_t cc_state_lock ____cacheline_aligned_in_smp
;
684 struct cc_state __rcu
*cc_state
;
686 /* Total number of congestion control table entries */
689 /* Bit map identifying service level */
690 u32 cc_sl_control_map
;
692 /* CA's max number of 64 entry units in the congestion control table */
693 u8 cc_max_table_entries
;
695 /* begin congestion log related entries
696 * cc_log_lock protects all congestion log related data */
697 spinlock_t cc_log_lock ____cacheline_aligned_in_smp
;
698 u8 threshold_cong_event_map
[OPA_MAX_SLS
/8];
699 u16 threshold_event_counter
;
700 struct opa_hfi1_cong_log_event_internal cc_events
[OPA_CONG_LOG_ELEMS
];
701 int cc_log_idx
; /* index for logging events */
702 int cc_mad_idx
; /* index for reporting events */
703 /* end congestion log related entries */
705 struct vl_arb_cache vl_arb_cache
[MAX_PRIO_TABLE
];
707 /* port relative counter buffer */
709 /* port relative synthetic counter buffer */
711 /* we synthesize port_xmit_discards from several egress errors */
712 u64 port_xmit_discards
;
713 u64 port_xmit_constraint_errors
;
714 u64 port_rcv_constraint_errors
;
715 /* count of 'link_err' interrupts from DC */
717 /* number of times link retrained successfully */
719 /* number of times a link unknown frame was reported */
720 u64 unknown_frame_count
;
721 /* port_ltp_crc_mode is returned in 'portinfo' MADs */
722 u16 port_ltp_crc_mode
;
723 /* port_crc_mode_enabled is the crc we support */
724 u8 port_crc_mode_enabled
;
725 /* mgmt_allowed is also returned in 'portinfo' MADs */
727 u8 part_enforce
; /* partition enforcement flags */
728 struct link_down_reason local_link_down_reason
;
729 struct link_down_reason neigh_link_down_reason
;
730 /* Value to be sent to link peer on LinkDown .*/
731 u8 remote_link_down_reason
;
732 /* Error events that will cause a port bounce. */
733 u32 port_error_action
;
734 struct work_struct linkstate_active_work
;
737 typedef int (*rhf_rcv_function_ptr
)(struct hfi1_packet
*packet
);
739 typedef void (*opcode_handler
)(struct hfi1_packet
*packet
);
741 /* return values for the RHF receive functions */
742 #define RHF_RCV_CONTINUE 0 /* keep going */
743 #define RHF_RCV_DONE 1 /* stop, this packet processed */
744 #define RHF_RCV_REPROCESS 2 /* stop. retain this packet */
746 struct rcv_array_data
{
754 struct send_context
*sc
;
757 /* 16 to directly index */
758 #define PER_VL_SEND_CONTEXTS 16
760 struct err_info_rcvport
{
766 struct err_info_constraint
{
773 unsigned int curr
; /* current temperature */
774 unsigned int lo_lim
; /* low temperature limit */
775 unsigned int hi_lim
; /* high temperature limit */
776 unsigned int crit_lim
; /* critical temperature limit */
777 u8 triggers
; /* temperature triggers */
780 /* device data struct now contains only "general per-device" info.
781 * fields related to a physical IB port are in a hfi1_pportdata struct.
786 #define BOARD_VERS_MAX 96 /* how long the version string can be */
787 #define SERIAL_MAX 16 /* length of the serial number */
789 struct hfi1_devdata
{
790 struct hfi1_ibdev verbs_dev
; /* must be first */
791 struct list_head list
;
792 /* pointers to related structs for this device */
793 /* pci access data structure */
794 struct pci_dev
*pcidev
;
795 struct cdev user_cdev
;
796 struct cdev diag_cdev
;
798 struct device
*user_device
;
799 struct device
*diag_device
;
800 struct device
*ui_device
;
802 /* mem-mapped pointer to base of chip regs */
803 u8 __iomem
*kregbase
;
804 /* end of mem-mapped chip space excluding sendbuf and user regs */
806 /* physical address of chip for io_remap, etc. */
807 resource_size_t physaddr
;
808 /* receive context data */
809 struct hfi1_ctxtdata
**rcd
;
810 /* send context data */
811 struct send_context_info
*send_contexts
;
812 /* map hardware send contexts to software index */
814 /* spinlock for allocating and releasing send context resources */
816 /* Per VL data. Enough for all VLs but not all elements are set/used. */
817 struct per_vl_data vld
[PER_VL_SEND_CONTEXTS
];
818 /* seqlock for sc2vl */
819 seqlock_t sc2vl_lock
;
821 /* Send Context initialization lock. */
822 spinlock_t sc_init_lock
;
824 /* fields common to all SDMA engines */
826 /* default flags to last descriptor */
828 volatile __le64
*sdma_heads_dma
; /* DMA'ed by chip */
829 dma_addr_t sdma_heads_phys
;
830 void *sdma_pad_dma
; /* DMA'ed by chip */
831 dma_addr_t sdma_pad_phys
;
832 /* for deallocation */
833 size_t sdma_heads_size
;
834 /* number from the chip */
835 u32 chip_sdma_engines
;
838 /* lock for sdma_map */
839 spinlock_t sde_map_lock
;
840 /* array of engines sized by num_sdma */
841 struct sdma_engine
*per_sdma
;
842 /* array of vl maps */
843 struct sdma_vl_map __rcu
*sdma_map
;
844 /* SPC freeze waitqueue and variable */
845 wait_queue_head_t sdma_unfreeze_wq
;
846 atomic_t sdma_unfreeze_count
;
849 /* hfi1_pportdata, points to array of (physical) port-specific
850 * data structs, indexed by pidx (0..n-1)
852 struct hfi1_pportdata
*pport
;
854 /* mem-mapped pointer to base of PIO buffers */
855 void __iomem
*piobase
;
857 * write-combining mem-mapped pointer to base of RcvArray
860 void __iomem
*rcvarray_wc
;
862 * credit return base - a per-NUMA range of DMA address that
863 * the chip will use to update the per-context free counter
865 struct credit_return_base
*cr_base
;
867 /* send context numbers and sizes for each type */
868 struct sc_config_sizes sc_sizes
[SC_MAX
];
870 u32 lcb_access_count
; /* count of LCB users */
872 char *boardname
; /* human readable board info */
874 /* device (not port) flags, basically device capabilities */
880 /* percpu int_counter */
881 u64 __percpu
*int_counter
;
882 u64 __percpu
*rcv_limit
;
884 /* number of receive contexts in use by the driver */
885 u32 num_rcv_contexts
;
886 /* number of pio send contexts in use by the driver */
887 u32 num_send_contexts
;
889 * number of ctxts available for PSM open
892 /* base receive interrupt timeout, in CSR units */
893 u32 rcv_intr_timeout_csr
;
895 u64 __iomem
*egrtidbase
;
896 spinlock_t sendctrl_lock
; /* protect changes to SendCtrl */
897 spinlock_t rcvctrl_lock
; /* protect changes to RcvCtrl */
898 /* around rcd and (user ctxts) ctxt_cnt use (intr vs free) */
899 spinlock_t uctxt_lock
; /* rcd and user context changes */
900 /* exclusive access to 8051 */
901 spinlock_t dc8051_lock
;
902 /* exclusive access to 8051 memory */
903 spinlock_t dc8051_memlock
;
904 int dc8051_timed_out
; /* remember if the 8051 timed out */
906 * A page that will hold event notification bitmaps for all
907 * contexts. This page will be mapped into all processes.
909 unsigned long *events
;
911 * per unit status, see also portdata statusp
912 * mapped read-only into user processes so they can get unit and
913 * IB link status cheaply
915 struct hfi1_status
*status
;
916 u32 freezelen
; /* max length of freezemsg */
918 /* revision register shadow */
920 /* Base GUID for device (network order) */
923 /* these are the "32 bit" regs */
925 /* value we put in kr_rcvhdrsize */
927 /* number of receive contexts the chip supports */
928 u32 chip_rcv_contexts
;
929 /* number of receive array entries */
930 u32 chip_rcv_array_count
;
931 /* number of PIO send contexts the chip supports */
932 u32 chip_send_contexts
;
933 /* number of bytes in the PIO memory buffer */
934 u32 chip_pio_mem_size
;
935 /* number of bytes in the SDMA memory buffer */
936 u32 chip_sdma_mem_size
;
938 /* size of each rcvegrbuffer */
941 u16 rcvegrbufsize_shift
;
942 /* both sides of the PCIe link are gen3 capable */
943 u8 link_gen3_capable
;
944 /* localbus width (1, 2,4,8,16,32) from config space */
946 /* localbus speed in MHz */
948 int unit
; /* unit # of this chip */
949 int node
; /* home node of this chip */
951 /* save these PCI fields to restore after a reset */
964 * ASCII serial number, from flash, large enough for original
965 * all digit strings, and longer serial number format
967 u8 serial
[SERIAL_MAX
];
968 /* human readable board version */
969 u8 boardversion
[BOARD_VERS_MAX
];
970 u8 lbus_info
[32]; /* human readable localbus info */
971 /* chip major rev, from CceRevision */
973 /* chip minor rev, from CceRevision */
977 /* implementation code */
979 /* default link down value (poll/sleep) */
981 /* vAU of this device */
983 /* vCU of this device */
985 /* link credits of this device */
987 /* initial vl15 credits to use */
990 /* Misc small ints */
991 /* Number of physical ports available */
993 /* Lowest context number which can be used by user processes */
999 u16 rhf_offset
; /* offset of RHF within receive header entry */
1000 u16 irev
; /* implementation revision */
1001 u16 dc8051_ver
; /* 8051 firmware version */
1003 struct platform_config_cache pcfg_cache
;
1004 /* control high-level access to qsfp */
1005 struct mutex qsfp_i2c_mutex
;
1007 struct diag_client
*diag_client
;
1008 spinlock_t hfi1_diag_trans_lock
; /* protect diag observer ops */
1010 u8 psxmitwait_supported
;
1011 /* cycle length of PS* counters in HW (in picoseconds) */
1012 u16 psxmitwait_check_rate
;
1013 /* high volume overflow errors deferred to tasklet */
1014 struct tasklet_struct error_tasklet
;
1016 /* MSI-X information */
1017 struct hfi1_msix_entry
*msix_entries
;
1018 u32 num_msix_entries
;
1020 /* INTx information */
1021 u32 requested_intx_irq
; /* did we request one? */
1022 char intx_name
[MAX_NAME_SIZE
]; /* INTx name */
1024 /* general interrupt: mask of handled interrupts */
1025 u64 gi_mask
[CCE_NUM_INT_CSRS
];
1027 struct rcv_array_data rcv_entries
;
1030 * 64 bit synthetic counters
1032 struct timer_list synth_stats_timer
;
1038 size_t cntrnameslen
;
1044 * remembered values for synthetic counters
1053 char *portcntrnames
;
1054 size_t portcntrnameslen
;
1056 struct hfi1_snoop_data hfi1_snoop
;
1058 struct err_info_rcvport err_info_rcvport
;
1059 struct err_info_constraint err_info_rcv_constraint
;
1060 struct err_info_constraint err_info_xmit_constraint
;
1061 u8 err_info_uncorrectable
;
1062 u8 err_info_fmconfig
;
1064 atomic_t drop_packet
;
1068 * Software counters for the status bits defined by the
1069 * associated error status registers
1071 u64 cce_err_status_cnt
[NUM_CCE_ERR_STATUS_COUNTERS
];
1072 u64 rcv_err_status_cnt
[NUM_RCV_ERR_STATUS_COUNTERS
];
1073 u64 misc_err_status_cnt
[NUM_MISC_ERR_STATUS_COUNTERS
];
1074 u64 send_pio_err_status_cnt
[NUM_SEND_PIO_ERR_STATUS_COUNTERS
];
1075 u64 send_dma_err_status_cnt
[NUM_SEND_DMA_ERR_STATUS_COUNTERS
];
1076 u64 send_egress_err_status_cnt
[NUM_SEND_EGRESS_ERR_STATUS_COUNTERS
];
1077 u64 send_err_status_cnt
[NUM_SEND_ERR_STATUS_COUNTERS
];
1079 /* Software counter that spans all contexts */
1080 u64 sw_ctxt_err_status_cnt
[NUM_SEND_CTXT_ERR_STATUS_COUNTERS
];
1081 /* Software counter that spans all DMA engines */
1082 u64 sw_send_dma_eng_err_status_cnt
[
1083 NUM_SEND_DMA_ENG_ERR_STATUS_COUNTERS
];
1084 /* Software counter that aggregates all cce_err_status errors */
1085 u64 sw_cce_err_status_aggregate
;
1087 /* receive interrupt functions */
1088 rhf_rcv_function_ptr
*rhf_rcv_function_map
;
1089 rhf_rcv_function_ptr normal_rhf_rcv_functions
[8];
1092 * Handlers for outgoing data so that snoop/capture does not
1093 * have to have its hooks in the send path
1095 int (*process_pio_send
)(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
1097 int (*process_dma_send
)(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
1099 void (*pio_inline_send
)(struct hfi1_devdata
*dd
, struct pio_buf
*pbuf
,
1100 u64 pbc
, const void *from
, size_t count
);
1102 /* OUI comes from the HW. Used everywhere as 3 separate bytes. */
1106 /* Timer and counter used to detect RcvBufOvflCnt changes */
1107 struct timer_list rcverr_timer
;
1110 int assigned_node_id
;
1111 wait_queue_head_t event_queue
;
1113 /* Save the enabled LCB error bits */
1117 /* receive context tail dummy address */
1118 __le64
*rcvhdrtail_dummy_kvaddr
;
1119 dma_addr_t rcvhdrtail_dummy_physaddr
;
1122 /* 8051 firmware version helper */
1123 #define dc8051_ver(a, b) ((a) << 8 | (b))
1125 /* f_put_tid types */
1126 #define PT_EXPECTED 0
1128 #define PT_INVALID 2
1132 /* Private data for file operations */
1133 struct hfi1_filedata
{
1134 struct hfi1_ctxtdata
*uctxt
;
1136 struct hfi1_user_sdma_comp_q
*cq
;
1137 struct hfi1_user_sdma_pkt_q
*pq
;
1138 /* for cpu affinity; -1 if none */
1140 struct mmu_notifier mn
;
1141 struct rb_root tid_rb_root
;
1142 spinlock_t tid_lock
; /* protect tid_[limit,used] counters */
1145 spinlock_t rb_lock
; /* protect tid_rb_root RB tree */
1147 u32 invalid_tid_idx
;
1148 spinlock_t invalid_lock
; /* protect the invalid_tids array */
1149 int (*mmu_rb_insert
)(struct rb_root
*, struct mmu_rb_node
*);
1152 extern struct list_head hfi1_dev_list
;
1153 extern spinlock_t hfi1_devs_lock
;
1154 struct hfi1_devdata
*hfi1_lookup(int unit
);
1155 extern u32 hfi1_cpulist_count
;
1156 extern unsigned long *hfi1_cpulist
;
1158 extern unsigned int snoop_drop_send
;
1159 extern unsigned int snoop_force_capture
;
1160 int hfi1_init(struct hfi1_devdata
*, int);
1161 int hfi1_count_units(int *npresentp
, int *nupp
);
1162 int hfi1_count_active_units(void);
1164 int hfi1_diag_add(struct hfi1_devdata
*);
1165 void hfi1_diag_remove(struct hfi1_devdata
*);
1166 void handle_linkup_change(struct hfi1_devdata
*dd
, u32 linkup
);
1168 void handle_user_interrupt(struct hfi1_ctxtdata
*rcd
);
1170 int hfi1_create_rcvhdrq(struct hfi1_devdata
*, struct hfi1_ctxtdata
*);
1171 int hfi1_setup_eagerbufs(struct hfi1_ctxtdata
*);
1172 int hfi1_create_ctxts(struct hfi1_devdata
*dd
);
1173 struct hfi1_ctxtdata
*hfi1_create_ctxtdata(struct hfi1_pportdata
*, u32
);
1174 void hfi1_init_pportdata(struct pci_dev
*, struct hfi1_pportdata
*,
1175 struct hfi1_devdata
*, u8
, u8
);
1176 void hfi1_free_ctxtdata(struct hfi1_devdata
*, struct hfi1_ctxtdata
*);
1178 int handle_receive_interrupt(struct hfi1_ctxtdata
*, int);
1179 int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata
*, int);
1180 int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata
*, int);
1181 void set_all_slowpath(struct hfi1_devdata
*dd
);
1183 /* receive packet handler dispositions */
1184 #define RCV_PKT_OK 0x0 /* keep going */
1185 #define RCV_PKT_LIMIT 0x1 /* stop, hit limit, start thread */
1186 #define RCV_PKT_DONE 0x2 /* stop, no more packets detected */
1188 /* calculate the current RHF address */
1189 static inline __le32
*get_rhf_addr(struct hfi1_ctxtdata
*rcd
)
1191 return (__le32
*)rcd
->rcvhdrq
+ rcd
->head
+ rcd
->dd
->rhf_offset
;
1194 int hfi1_reset_device(int);
1196 /* return the driver's idea of the logical OPA port state */
1197 static inline u32
driver_lstate(struct hfi1_pportdata
*ppd
)
1199 return ppd
->lstate
; /* use the cached value */
1202 void receive_interrupt_work(struct work_struct
*work
);
1204 /* extract service channel from header and rhf */
1205 static inline int hdr2sc(struct hfi1_message_header
*hdr
, u64 rhf
)
1207 return ((be16_to_cpu(hdr
->lrh
[0]) >> 12) & 0xf) |
1208 ((!!(rhf
& RHF_DC_INFO_MASK
)) << 4);
1211 static inline u16
generate_jkey(kuid_t uid
)
1213 return from_kuid(current_user_ns(), uid
) & 0xffff;
1217 * active_egress_rate
1219 * returns the active egress rate in units of [10^6 bits/sec]
1221 static inline u32
active_egress_rate(struct hfi1_pportdata
*ppd
)
1223 u16 link_speed
= ppd
->link_speed_active
;
1224 u16 link_width
= ppd
->link_width_active
;
1227 if (link_speed
== OPA_LINK_SPEED_25G
)
1228 egress_rate
= 25000;
1229 else /* assume OPA_LINK_SPEED_12_5G */
1230 egress_rate
= 12500;
1232 switch (link_width
) {
1233 case OPA_LINK_WIDTH_4X
:
1236 case OPA_LINK_WIDTH_3X
:
1239 case OPA_LINK_WIDTH_2X
:
1243 /* assume IB_WIDTH_1X */
1253 * Returns the number of 'fabric clock cycles' to egress a packet
1254 * of length 'len' bytes, at 'rate' Mbit/s. Since the fabric clock
1255 * rate is (approximately) 805 MHz, the units of the returned value
1258 static inline u32
egress_cycles(u32 len
, u32 rate
)
1265 * (length) [bits] / (rate) [bits/sec]
1266 * ---------------------------------------------------
1267 * fabric_clock_period == 1 /(805 * 10^6) [cycles/sec]
1270 cycles
= len
* 8; /* bits */
1277 void set_link_ipg(struct hfi1_pportdata
*ppd
);
1278 void process_becn(struct hfi1_pportdata
*ppd
, u8 sl
, u16 rlid
, u32 lqpn
,
1279 u32 rqpn
, u8 svc_type
);
1280 void return_cnp(struct hfi1_ibport
*ibp
, struct rvt_qp
*qp
, u32 remote_qpn
,
1281 u32 pkey
, u32 slid
, u32 dlid
, u8 sc5
,
1282 const struct ib_grh
*old_grh
);
1284 #define PACKET_EGRESS_TIMEOUT 350
1285 static inline void pause_for_credit_return(struct hfi1_devdata
*dd
)
1287 /* Pause at least 1us, to ensure chip returns all credits */
1288 u32 usec
= cclock_to_ns(dd
, PACKET_EGRESS_TIMEOUT
) / 1000;
1290 udelay(usec
? usec
: 1);
1294 * sc_to_vlt() reverse lookup sc to vl
1298 static inline u8
sc_to_vlt(struct hfi1_devdata
*dd
, u8 sc5
)
1303 if (sc5
>= OPA_MAX_SCS
)
1307 seq
= read_seqbegin(&dd
->sc2vl_lock
);
1308 rval
= *(((u8
*)dd
->sc2vl
) + sc5
);
1309 } while (read_seqretry(&dd
->sc2vl_lock
, seq
));
1314 #define PKEY_MEMBER_MASK 0x8000
1315 #define PKEY_LOW_15_MASK 0x7fff
1318 * ingress_pkey_matches_entry - return 1 if the pkey matches ent (ent
1319 * being an entry from the ingress partition key table), return 0
1320 * otherwise. Use the matching criteria for ingress partition keys
1321 * specified in the OPAv1 spec., section 9.10.14.
1323 static inline int ingress_pkey_matches_entry(u16 pkey
, u16 ent
)
1325 u16 mkey
= pkey
& PKEY_LOW_15_MASK
;
1326 u16 ment
= ent
& PKEY_LOW_15_MASK
;
1330 * If pkey[15] is clear (limited partition member),
1331 * is bit 15 in the corresponding table element
1332 * clear (limited member)?
1334 if (!(pkey
& PKEY_MEMBER_MASK
))
1335 return !!(ent
& PKEY_MEMBER_MASK
);
1342 * ingress_pkey_table_search - search the entire pkey table for
1343 * an entry which matches 'pkey'. return 0 if a match is found,
1346 static int ingress_pkey_table_search(struct hfi1_pportdata
*ppd
, u16 pkey
)
1350 for (i
= 0; i
< MAX_PKEY_VALUES
; i
++) {
1351 if (ingress_pkey_matches_entry(pkey
, ppd
->pkeys
[i
]))
1358 * ingress_pkey_table_fail - record a failure of ingress pkey validation,
1359 * i.e., increment port_rcv_constraint_errors for the port, and record
1360 * the 'error info' for this failure.
1362 static void ingress_pkey_table_fail(struct hfi1_pportdata
*ppd
, u16 pkey
,
1365 struct hfi1_devdata
*dd
= ppd
->dd
;
1367 incr_cntr64(&ppd
->port_rcv_constraint_errors
);
1368 if (!(dd
->err_info_rcv_constraint
.status
& OPA_EI_STATUS_SMASK
)) {
1369 dd
->err_info_rcv_constraint
.status
|= OPA_EI_STATUS_SMASK
;
1370 dd
->err_info_rcv_constraint
.slid
= slid
;
1371 dd
->err_info_rcv_constraint
.pkey
= pkey
;
1376 * ingress_pkey_check - Return 0 if the ingress pkey is valid, return 1
1377 * otherwise. Use the criteria in the OPAv1 spec, section 9.10.14. idx
1378 * is a hint as to the best place in the partition key table to begin
1379 * searching. This function should not be called on the data path because
1380 * of performance reasons. On datapath pkey check is expected to be done
1381 * by HW and rcv_pkey_check function should be called instead.
1383 static inline int ingress_pkey_check(struct hfi1_pportdata
*ppd
, u16 pkey
,
1384 u8 sc5
, u8 idx
, u16 slid
)
1386 if (!(ppd
->part_enforce
& HFI1_PART_ENFORCE_IN
))
1389 /* If SC15, pkey[0:14] must be 0x7fff */
1390 if ((sc5
== 0xf) && ((pkey
& PKEY_LOW_15_MASK
) != PKEY_LOW_15_MASK
))
1393 /* Is the pkey = 0x0, or 0x8000? */
1394 if ((pkey
& PKEY_LOW_15_MASK
) == 0)
1397 /* The most likely matching pkey has index 'idx' */
1398 if (ingress_pkey_matches_entry(pkey
, ppd
->pkeys
[idx
]))
1401 /* no match - try the whole table */
1402 if (!ingress_pkey_table_search(ppd
, pkey
))
1406 ingress_pkey_table_fail(ppd
, pkey
, slid
);
1411 * rcv_pkey_check - Return 0 if the ingress pkey is valid, return 1
1412 * otherwise. It only ensures pkey is vlid for QP0. This function
1413 * should be called on the data path instead of ingress_pkey_check
1414 * as on data path, pkey check is done by HW (except for QP0).
1416 static inline int rcv_pkey_check(struct hfi1_pportdata
*ppd
, u16 pkey
,
1419 if (!(ppd
->part_enforce
& HFI1_PART_ENFORCE_IN
))
1422 /* If SC15, pkey[0:14] must be 0x7fff */
1423 if ((sc5
== 0xf) && ((pkey
& PKEY_LOW_15_MASK
) != PKEY_LOW_15_MASK
))
1428 ingress_pkey_table_fail(ppd
, pkey
, slid
);
1434 /* MTU enumeration, 256-4k match IB */
1436 #define OPA_MTU_256 1
1437 #define OPA_MTU_512 2
1438 #define OPA_MTU_1024 3
1439 #define OPA_MTU_2048 4
1440 #define OPA_MTU_4096 5
1442 u32
lrh_max_header_bytes(struct hfi1_devdata
*dd
);
1443 int mtu_to_enum(u32 mtu
, int default_if_bad
);
1444 u16
enum_to_mtu(int);
1445 static inline int valid_ib_mtu(unsigned int mtu
)
1447 return mtu
== 256 || mtu
== 512 ||
1448 mtu
== 1024 || mtu
== 2048 ||
1451 static inline int valid_opa_max_mtu(unsigned int mtu
)
1453 return mtu
>= 2048 &&
1454 (valid_ib_mtu(mtu
) || mtu
== 8192 || mtu
== 10240);
1457 int set_mtu(struct hfi1_pportdata
*);
1459 int hfi1_set_lid(struct hfi1_pportdata
*, u32
, u8
);
1460 void hfi1_disable_after_error(struct hfi1_devdata
*);
1461 int hfi1_set_uevent_bits(struct hfi1_pportdata
*, const int);
1462 int hfi1_rcvbuf_validate(u32
, u8
, u16
*);
1464 int fm_get_table(struct hfi1_pportdata
*, int, void *);
1465 int fm_set_table(struct hfi1_pportdata
*, int, void *);
1467 void set_up_vl15(struct hfi1_devdata
*dd
, u8 vau
, u16 vl15buf
);
1468 void reset_link_credits(struct hfi1_devdata
*dd
);
1469 void assign_remote_cm_au_table(struct hfi1_devdata
*dd
, u8 vcu
);
1471 int snoop_recv_handler(struct hfi1_packet
*packet
);
1472 int snoop_send_dma_handler(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
1474 int snoop_send_pio_handler(struct rvt_qp
*qp
, struct hfi1_pkt_state
*ps
,
1476 void snoop_inline_pio_send(struct hfi1_devdata
*dd
, struct pio_buf
*pbuf
,
1477 u64 pbc
, const void *from
, size_t count
);
1479 static inline struct hfi1_devdata
*dd_from_ppd(struct hfi1_pportdata
*ppd
)
1484 static inline struct hfi1_devdata
*dd_from_dev(struct hfi1_ibdev
*dev
)
1486 return container_of(dev
, struct hfi1_devdata
, verbs_dev
);
1489 static inline struct hfi1_devdata
*dd_from_ibdev(struct ib_device
*ibdev
)
1491 return dd_from_dev(to_idev(ibdev
));
1494 static inline struct hfi1_pportdata
*ppd_from_ibp(struct hfi1_ibport
*ibp
)
1496 return container_of(ibp
, struct hfi1_pportdata
, ibport_data
);
1499 static inline struct hfi1_ibport
*to_iport(struct ib_device
*ibdev
, u8 port
)
1501 struct hfi1_devdata
*dd
= dd_from_ibdev(ibdev
);
1502 unsigned pidx
= port
- 1; /* IB number port from 1, hdw from 0 */
1504 WARN_ON(pidx
>= dd
->num_pports
);
1505 return &dd
->pport
[pidx
].ibport_data
;
1509 * Return the indexed PKEY from the port PKEY table.
1511 static inline u16
hfi1_get_pkey(struct hfi1_ibport
*ibp
, unsigned index
)
1513 struct hfi1_pportdata
*ppd
= ppd_from_ibp(ibp
);
1516 if (index
>= ARRAY_SIZE(ppd
->pkeys
))
1519 ret
= ppd
->pkeys
[index
];
1525 * Readers of cc_state must call get_cc_state() under rcu_read_lock().
1526 * Writers of cc_state must call get_cc_state() under cc_state_lock.
1528 static inline struct cc_state
*get_cc_state(struct hfi1_pportdata
*ppd
)
1530 return rcu_dereference(ppd
->cc_state
);
1534 * values for dd->flags (_device_ related flags)
1536 #define HFI1_INITTED 0x1 /* chip and driver up and initted */
1537 #define HFI1_PRESENT 0x2 /* chip accesses can be done */
1538 #define HFI1_FROZEN 0x4 /* chip in SPC freeze */
1539 #define HFI1_HAS_SDMA_TIMEOUT 0x8
1540 #define HFI1_HAS_SEND_DMA 0x10 /* Supports Send DMA */
1541 #define HFI1_FORCED_FREEZE 0x80 /* driver forced freeze mode */
1542 #define HFI1_DO_INIT_ASIC 0x100 /* This device will init the ASIC */
1544 /* IB dword length mask in PBC (lower 11 bits); same for all chips */
1545 #define HFI1_PBC_LENGTH_MASK ((1 << 11) - 1)
1548 /* ctxt_flag bit offsets */
1549 /* context has been setup */
1550 #define HFI1_CTXT_SETUP_DONE 1
1551 /* waiting for a packet to arrive */
1552 #define HFI1_CTXT_WAITING_RCV 2
1553 /* master has not finished initializing */
1554 #define HFI1_CTXT_MASTER_UNINIT 4
1555 /* waiting for an urgent packet to arrive */
1556 #define HFI1_CTXT_WAITING_URG 5
1558 /* free up any allocated data at closes */
1559 struct hfi1_devdata
*hfi1_init_dd(struct pci_dev
*,
1560 const struct pci_device_id
*);
1561 void hfi1_free_devdata(struct hfi1_devdata
*);
1562 void cc_state_reclaim(struct rcu_head
*rcu
);
1563 struct hfi1_devdata
*hfi1_alloc_devdata(struct pci_dev
*pdev
, size_t extra
);
1566 * Set LED override, only the two LSBs have "public" meaning, but
1567 * any non-zero value substitutes them for the Link and LinkTrain
1570 #define HFI1_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
1571 #define HFI1_LED_LOG 2 /* Logical (link) YELLOW LED */
1572 void hfi1_set_led_override(struct hfi1_pportdata
*ppd
, unsigned int val
);
1574 #define HFI1_CREDIT_RETURN_RATE (100)
1577 * The number of words for the KDETH protocol field. If this is
1578 * larger then the actual field used, then part of the payload
1579 * will be in the header.
1581 * Optimally, we want this sized so that a typical case will
1582 * use full cache lines. The typical local KDETH header would
1593 * For a 64-byte cache line, KDETH would need to be 36 bytes or 9 DWORDS
1595 #define DEFAULT_RCVHDRSIZE 9
1598 * Maximal header byte count:
1609 * We also want to maintain a cache line alignment to assist DMA'ing
1610 * of the header bytes. Round up to a good size.
1612 #define DEFAULT_RCVHDR_ENTSIZE 32
1614 int hfi1_acquire_user_pages(unsigned long, size_t, bool, struct page
**);
1615 void hfi1_release_user_pages(struct page
**, size_t, bool);
1617 static inline void clear_rcvhdrtail(const struct hfi1_ctxtdata
*rcd
)
1619 *((u64
*) rcd
->rcvhdrtail_kvaddr
) = 0ULL;
1622 static inline u32
get_rcvhdrtail(const struct hfi1_ctxtdata
*rcd
)
1625 * volatile because it's a DMA target from the chip, routine is
1626 * inlined, and don't want register caching or reordering.
1628 return (u32
) le64_to_cpu(*rcd
->rcvhdrtail_kvaddr
);
1635 extern const char ib_hfi1_version
[];
1637 int hfi1_device_create(struct hfi1_devdata
*);
1638 void hfi1_device_remove(struct hfi1_devdata
*);
1640 int hfi1_create_port_files(struct ib_device
*ibdev
, u8 port_num
,
1641 struct kobject
*kobj
);
1642 int hfi1_verbs_register_sysfs(struct hfi1_devdata
*);
1643 void hfi1_verbs_unregister_sysfs(struct hfi1_devdata
*);
1644 /* Hook for sysfs read of QSFP */
1645 int qsfp_dump(struct hfi1_pportdata
*ppd
, char *buf
, int len
);
1647 int hfi1_pcie_init(struct pci_dev
*, const struct pci_device_id
*);
1648 void hfi1_pcie_cleanup(struct pci_dev
*);
1649 int hfi1_pcie_ddinit(struct hfi1_devdata
*, struct pci_dev
*,
1650 const struct pci_device_id
*);
1651 void hfi1_pcie_ddcleanup(struct hfi1_devdata
*);
1652 void hfi1_pcie_flr(struct hfi1_devdata
*);
1653 int pcie_speeds(struct hfi1_devdata
*);
1654 void request_msix(struct hfi1_devdata
*, u32
*, struct hfi1_msix_entry
*);
1655 void hfi1_enable_intx(struct pci_dev
*);
1656 void restore_pci_variables(struct hfi1_devdata
*dd
);
1657 int do_pcie_gen3_transition(struct hfi1_devdata
*dd
);
1658 int parse_platform_config(struct hfi1_devdata
*dd
);
1659 int get_platform_config_field(struct hfi1_devdata
*dd
,
1660 enum platform_config_table_type_encoding table_type
,
1661 int table_index
, int field_index
, u32
*data
, u32 len
);
1663 const char *get_unit_name(int unit
);
1664 const char *get_card_name(struct rvt_dev_info
*rdi
);
1665 struct pci_dev
*get_pci_dev(struct rvt_dev_info
*rdi
);
1668 * Flush write combining store buffers (if present) and perform a write
1671 static inline void flush_wc(void)
1673 asm volatile("sfence" : : : "memory");
1676 void handle_eflags(struct hfi1_packet
*packet
);
1677 int process_receive_ib(struct hfi1_packet
*packet
);
1678 int process_receive_bypass(struct hfi1_packet
*packet
);
1679 int process_receive_error(struct hfi1_packet
*packet
);
1680 int kdeth_process_expected(struct hfi1_packet
*packet
);
1681 int kdeth_process_eager(struct hfi1_packet
*packet
);
1682 int process_receive_invalid(struct hfi1_packet
*packet
);
1684 extern rhf_rcv_function_ptr snoop_rhf_rcv_functions
[8];
1686 void update_sge(struct rvt_sge_state
*ss
, u32 length
);
1688 /* global module parameter variables */
1689 extern unsigned int hfi1_max_mtu
;
1690 extern unsigned int hfi1_cu
;
1691 extern unsigned int user_credit_return_threshold
;
1692 extern int num_user_contexts
;
1693 extern unsigned n_krcvqs
;
1694 extern uint krcvqs
[];
1695 extern int krcvqsset
;
1696 extern uint kdeth_qp
;
1697 extern uint loopback
;
1698 extern uint quick_linkup
;
1699 extern uint rcv_intr_timeout
;
1700 extern uint rcv_intr_count
;
1701 extern uint rcv_intr_dynamic
;
1702 extern ushort link_crc_mask
;
1704 extern struct mutex hfi1_mutex
;
1706 /* Number of seconds before our card status check... */
1707 #define STATUS_TIMEOUT 60
1709 #define DRIVER_NAME "hfi1"
1710 #define HFI1_USER_MINOR_BASE 0
1711 #define HFI1_TRACE_MINOR 127
1712 #define HFI1_DIAGPKT_MINOR 128
1713 #define HFI1_DIAG_MINOR_BASE 129
1714 #define HFI1_SNOOP_CAPTURE_BASE 200
1715 #define HFI1_NMINORS 255
1717 #define PCI_VENDOR_ID_INTEL 0x8086
1718 #define PCI_DEVICE_ID_INTEL0 0x24f0
1719 #define PCI_DEVICE_ID_INTEL1 0x24f1
1721 #define HFI1_PKT_USER_SC_INTEGRITY \
1722 (SEND_CTXT_CHECK_ENABLE_DISALLOW_NON_KDETH_PACKETS_SMASK \
1723 | SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_SMASK \
1724 | SEND_CTXT_CHECK_ENABLE_DISALLOW_GRH_SMASK)
1726 #define HFI1_PKT_KERNEL_SC_INTEGRITY \
1727 (SEND_CTXT_CHECK_ENABLE_DISALLOW_KDETH_PACKETS_SMASK)
1729 static inline u64
hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata
*dd
,
1732 u64 base_sc_integrity
=
1733 SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1734 | SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1735 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
1736 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK
1737 | SEND_CTXT_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK
1738 | SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_TEST_SMASK
1739 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_SMALL_BYPASS_PACKETS_SMASK
1740 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_SMALL_IB_PACKETS_SMASK
1741 | SEND_CTXT_CHECK_ENABLE_DISALLOW_RAW_IPV6_SMASK
1742 | SEND_CTXT_CHECK_ENABLE_DISALLOW_RAW_SMASK
1743 | SEND_CTXT_CHECK_ENABLE_CHECK_BYPASS_VL_MAPPING_SMASK
1744 | SEND_CTXT_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1745 | SEND_CTXT_CHECK_ENABLE_CHECK_OPCODE_SMASK
1746 | SEND_CTXT_CHECK_ENABLE_CHECK_SLID_SMASK
1747 | SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1748 | SEND_CTXT_CHECK_ENABLE_CHECK_VL_SMASK
1749 | SEND_CTXT_CHECK_ENABLE_CHECK_ENABLE_SMASK
;
1751 if (ctxt_type
== SC_USER
)
1752 base_sc_integrity
|= HFI1_PKT_USER_SC_INTEGRITY
;
1754 base_sc_integrity
|= HFI1_PKT_KERNEL_SC_INTEGRITY
;
1757 /* turn off send-side job key checks - A0 */
1758 return base_sc_integrity
&
1759 ~SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
;
1760 return base_sc_integrity
;
1763 static inline u64
hfi1_pkt_base_sdma_integrity(struct hfi1_devdata
*dd
)
1765 u64 base_sdma_integrity
=
1766 SEND_DMA_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1767 | SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1768 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
1769 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK
1770 | SEND_DMA_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK
1771 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_SMALL_BYPASS_PACKETS_SMASK
1772 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_SMALL_IB_PACKETS_SMASK
1773 | SEND_DMA_CHECK_ENABLE_DISALLOW_RAW_IPV6_SMASK
1774 | SEND_DMA_CHECK_ENABLE_DISALLOW_RAW_SMASK
1775 | SEND_DMA_CHECK_ENABLE_CHECK_BYPASS_VL_MAPPING_SMASK
1776 | SEND_DMA_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1777 | SEND_DMA_CHECK_ENABLE_CHECK_OPCODE_SMASK
1778 | SEND_DMA_CHECK_ENABLE_CHECK_SLID_SMASK
1779 | SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1780 | SEND_DMA_CHECK_ENABLE_CHECK_VL_SMASK
1781 | SEND_DMA_CHECK_ENABLE_CHECK_ENABLE_SMASK
;
1784 /* turn off send-side job key checks - A0 */
1785 return base_sdma_integrity
&
1786 ~SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
;
1787 return base_sdma_integrity
;
1791 * hfi1_early_err is used (only!) to print early errors before devdata is
1792 * allocated, or when dd->pcidev may not be valid, and at the tail end of
1793 * cleanup when devdata may have been freed, etc. hfi1_dev_porterr is
1794 * the same as dd_dev_err, but is used when the message really needs
1795 * the IB port# to be definitive as to what's happening..
1797 #define hfi1_early_err(dev, fmt, ...) \
1798 dev_err(dev, fmt, ##__VA_ARGS__)
1800 #define hfi1_early_info(dev, fmt, ...) \
1801 dev_info(dev, fmt, ##__VA_ARGS__)
1803 #define dd_dev_emerg(dd, fmt, ...) \
1804 dev_emerg(&(dd)->pcidev->dev, "%s: " fmt, \
1805 get_unit_name((dd)->unit), ##__VA_ARGS__)
1806 #define dd_dev_err(dd, fmt, ...) \
1807 dev_err(&(dd)->pcidev->dev, "%s: " fmt, \
1808 get_unit_name((dd)->unit), ##__VA_ARGS__)
1809 #define dd_dev_warn(dd, fmt, ...) \
1810 dev_warn(&(dd)->pcidev->dev, "%s: " fmt, \
1811 get_unit_name((dd)->unit), ##__VA_ARGS__)
1813 #define dd_dev_warn_ratelimited(dd, fmt, ...) \
1814 dev_warn_ratelimited(&(dd)->pcidev->dev, "%s: " fmt, \
1815 get_unit_name((dd)->unit), ##__VA_ARGS__)
1817 #define dd_dev_info(dd, fmt, ...) \
1818 dev_info(&(dd)->pcidev->dev, "%s: " fmt, \
1819 get_unit_name((dd)->unit), ##__VA_ARGS__)
1821 #define dd_dev_dbg(dd, fmt, ...) \
1822 dev_dbg(&(dd)->pcidev->dev, "%s: " fmt, \
1823 get_unit_name((dd)->unit), ##__VA_ARGS__)
1825 #define hfi1_dev_porterr(dd, port, fmt, ...) \
1826 dev_err(&(dd)->pcidev->dev, "%s: IB%u:%u " fmt, \
1827 get_unit_name((dd)->unit), (dd)->unit, (port), \
1831 * this is used for formatting hw error messages...
1833 struct hfi1_hwerror_msgs
{
1840 void hfi1_format_hwerrors(u64 hwerrs
,
1841 const struct hfi1_hwerror_msgs
*hwerrmsgs
,
1842 size_t nhwerrmsgs
, char *msg
, size_t lmsg
);
1844 #define USER_OPCODE_CHECK_VAL 0xC0
1845 #define USER_OPCODE_CHECK_MASK 0xC0
1846 #define OPCODE_CHECK_VAL_DISABLED 0x0
1847 #define OPCODE_CHECK_MASK_DISABLED 0x0
1849 static inline void hfi1_reset_cpu_counters(struct hfi1_devdata
*dd
)
1851 struct hfi1_pportdata
*ppd
;
1854 dd
->z_int_counter
= get_all_cpu_total(dd
->int_counter
);
1855 dd
->z_rcv_limit
= get_all_cpu_total(dd
->rcv_limit
);
1857 ppd
= (struct hfi1_pportdata
*)(dd
+ 1);
1858 for (i
= 0; i
< dd
->num_pports
; i
++, ppd
++) {
1859 ppd
->ibport_data
.rvp
.z_rc_acks
=
1860 get_all_cpu_total(ppd
->ibport_data
.rvp
.rc_acks
);
1861 ppd
->ibport_data
.rvp
.z_rc_qacks
=
1862 get_all_cpu_total(ppd
->ibport_data
.rvp
.rc_qacks
);
1866 /* Control LED state */
1867 static inline void setextled(struct hfi1_devdata
*dd
, u32 on
)
1870 write_csr(dd
, DCC_CFG_LED_CNTRL
, 0x1F);
1872 write_csr(dd
, DCC_CFG_LED_CNTRL
, 0x10);
1875 int hfi1_tempsense_rd(struct hfi1_devdata
*dd
, struct hfi1_temp
*temp
);
1877 #endif /* _HFI1_KERNEL_H */