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staging/rdma/hfi1: optionally prescan rx queue for {B, F}ECNs - UC, RC
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1 /*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51 #include <linux/io.h>
52
53 #include "hfi.h"
54 #include "qp.h"
55 #include "sdma.h"
56 #include "trace.h"
57
58 /* cut down ridiculously long IB macro names */
59 #define OP(x) IB_OPCODE_RC_##x
60
61 static void rc_timeout(unsigned long arg);
62
63 static u32 restart_sge(struct hfi1_sge_state *ss, struct hfi1_swqe *wqe,
64 u32 psn, u32 pmtu)
65 {
66 u32 len;
67
68 len = delta_psn(psn, wqe->psn) * pmtu;
69 ss->sge = wqe->sg_list[0];
70 ss->sg_list = wqe->sg_list + 1;
71 ss->num_sge = wqe->wr.num_sge;
72 ss->total_len = wqe->length;
73 hfi1_skip_sge(ss, len, 0);
74 return wqe->length - len;
75 }
76
77 static void start_timer(struct hfi1_qp *qp)
78 {
79 qp->s_flags |= HFI1_S_TIMER;
80 qp->s_timer.function = rc_timeout;
81 /* 4.096 usec. * (1 << qp->timeout) */
82 qp->s_timer.expires = jiffies + qp->timeout_jiffies;
83 add_timer(&qp->s_timer);
84 }
85
86 /**
87 * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
88 * @dev: the device for this QP
89 * @qp: a pointer to the QP
90 * @ohdr: a pointer to the IB header being constructed
91 * @pmtu: the path MTU
92 *
93 * Return 1 if constructed; otherwise, return 0.
94 * Note that we are in the responder's side of the QP context.
95 * Note the QP s_lock must be held.
96 */
97 static int make_rc_ack(struct hfi1_ibdev *dev, struct hfi1_qp *qp,
98 struct hfi1_other_headers *ohdr, u32 pmtu)
99 {
100 struct hfi1_ack_entry *e;
101 u32 hwords;
102 u32 len;
103 u32 bth0;
104 u32 bth2;
105 int middle = 0;
106
107 /* Don't send an ACK if we aren't supposed to. */
108 if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_RECV_OK))
109 goto bail;
110
111 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
112 hwords = 5;
113
114 switch (qp->s_ack_state) {
115 case OP(RDMA_READ_RESPONSE_LAST):
116 case OP(RDMA_READ_RESPONSE_ONLY):
117 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
118 if (e->rdma_sge.mr) {
119 hfi1_put_mr(e->rdma_sge.mr);
120 e->rdma_sge.mr = NULL;
121 }
122 /* FALLTHROUGH */
123 case OP(ATOMIC_ACKNOWLEDGE):
124 /*
125 * We can increment the tail pointer now that the last
126 * response has been sent instead of only being
127 * constructed.
128 */
129 if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
130 qp->s_tail_ack_queue = 0;
131 /* FALLTHROUGH */
132 case OP(SEND_ONLY):
133 case OP(ACKNOWLEDGE):
134 /* Check for no next entry in the queue. */
135 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
136 if (qp->s_flags & HFI1_S_ACK_PENDING)
137 goto normal;
138 goto bail;
139 }
140
141 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
142 if (e->opcode == OP(RDMA_READ_REQUEST)) {
143 /*
144 * If a RDMA read response is being resent and
145 * we haven't seen the duplicate request yet,
146 * then stop sending the remaining responses the
147 * responder has seen until the requester re-sends it.
148 */
149 len = e->rdma_sge.sge_length;
150 if (len && !e->rdma_sge.mr) {
151 qp->s_tail_ack_queue = qp->r_head_ack_queue;
152 goto bail;
153 }
154 /* Copy SGE state in case we need to resend */
155 qp->s_rdma_mr = e->rdma_sge.mr;
156 if (qp->s_rdma_mr)
157 hfi1_get_mr(qp->s_rdma_mr);
158 qp->s_ack_rdma_sge.sge = e->rdma_sge;
159 qp->s_ack_rdma_sge.num_sge = 1;
160 qp->s_cur_sge = &qp->s_ack_rdma_sge;
161 if (len > pmtu) {
162 len = pmtu;
163 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
164 } else {
165 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
166 e->sent = 1;
167 }
168 ohdr->u.aeth = hfi1_compute_aeth(qp);
169 hwords++;
170 qp->s_ack_rdma_psn = e->psn;
171 bth2 = mask_psn(qp->s_ack_rdma_psn++);
172 } else {
173 /* COMPARE_SWAP or FETCH_ADD */
174 qp->s_cur_sge = NULL;
175 len = 0;
176 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
177 ohdr->u.at.aeth = hfi1_compute_aeth(qp);
178 ohdr->u.at.atomic_ack_eth[0] =
179 cpu_to_be32(e->atomic_data >> 32);
180 ohdr->u.at.atomic_ack_eth[1] =
181 cpu_to_be32(e->atomic_data);
182 hwords += sizeof(ohdr->u.at) / sizeof(u32);
183 bth2 = mask_psn(e->psn);
184 e->sent = 1;
185 }
186 bth0 = qp->s_ack_state << 24;
187 break;
188
189 case OP(RDMA_READ_RESPONSE_FIRST):
190 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
191 /* FALLTHROUGH */
192 case OP(RDMA_READ_RESPONSE_MIDDLE):
193 qp->s_cur_sge = &qp->s_ack_rdma_sge;
194 qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
195 if (qp->s_rdma_mr)
196 hfi1_get_mr(qp->s_rdma_mr);
197 len = qp->s_ack_rdma_sge.sge.sge_length;
198 if (len > pmtu) {
199 len = pmtu;
200 middle = HFI1_CAP_IS_KSET(SDMA_AHG);
201 } else {
202 ohdr->u.aeth = hfi1_compute_aeth(qp);
203 hwords++;
204 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
205 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
206 e->sent = 1;
207 }
208 bth0 = qp->s_ack_state << 24;
209 bth2 = mask_psn(qp->s_ack_rdma_psn++);
210 break;
211
212 default:
213 normal:
214 /*
215 * Send a regular ACK.
216 * Set the s_ack_state so we wait until after sending
217 * the ACK before setting s_ack_state to ACKNOWLEDGE
218 * (see above).
219 */
220 qp->s_ack_state = OP(SEND_ONLY);
221 qp->s_flags &= ~HFI1_S_ACK_PENDING;
222 qp->s_cur_sge = NULL;
223 if (qp->s_nak_state)
224 ohdr->u.aeth =
225 cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) |
226 (qp->s_nak_state <<
227 HFI1_AETH_CREDIT_SHIFT));
228 else
229 ohdr->u.aeth = hfi1_compute_aeth(qp);
230 hwords++;
231 len = 0;
232 bth0 = OP(ACKNOWLEDGE) << 24;
233 bth2 = mask_psn(qp->s_ack_psn);
234 }
235 qp->s_rdma_ack_cnt++;
236 qp->s_hdrwords = hwords;
237 qp->s_cur_size = len;
238 hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle);
239 return 1;
240
241 bail:
242 qp->s_ack_state = OP(ACKNOWLEDGE);
243 /*
244 * Ensure s_rdma_ack_cnt changes are committed prior to resetting
245 * HFI1_S_RESP_PENDING
246 */
247 smp_wmb();
248 qp->s_flags &= ~(HFI1_S_RESP_PENDING
249 | HFI1_S_ACK_PENDING
250 | HFI1_S_AHG_VALID);
251 return 0;
252 }
253
254 /**
255 * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
256 * @qp: a pointer to the QP
257 *
258 * Return 1 if constructed; otherwise, return 0.
259 */
260 int hfi1_make_rc_req(struct hfi1_qp *qp)
261 {
262 struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
263 struct hfi1_other_headers *ohdr;
264 struct hfi1_sge_state *ss;
265 struct hfi1_swqe *wqe;
266 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
267 u32 hwords = 5;
268 u32 len;
269 u32 bth0 = 0;
270 u32 bth2;
271 u32 pmtu = qp->pmtu;
272 char newreq;
273 unsigned long flags;
274 int ret = 0;
275 int middle = 0;
276 int delta;
277
278 ohdr = &qp->s_hdr->ibh.u.oth;
279 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
280 ohdr = &qp->s_hdr->ibh.u.l.oth;
281
282 /*
283 * The lock is needed to synchronize between the sending tasklet,
284 * the receive interrupt handler, and timeout re-sends.
285 */
286 spin_lock_irqsave(&qp->s_lock, flags);
287
288 /* Sending responses has higher priority over sending requests. */
289 if ((qp->s_flags & HFI1_S_RESP_PENDING) &&
290 make_rc_ack(dev, qp, ohdr, pmtu))
291 goto done;
292
293 if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_SEND_OK)) {
294 if (!(ib_hfi1_state_ops[qp->state] & HFI1_FLUSH_SEND))
295 goto bail;
296 /* We are in the error state, flush the work request. */
297 if (qp->s_last == qp->s_head)
298 goto bail;
299 /* If DMAs are in progress, we can't flush immediately. */
300 if (atomic_read(&qp->s_iowait.sdma_busy)) {
301 qp->s_flags |= HFI1_S_WAIT_DMA;
302 goto bail;
303 }
304 clear_ahg(qp);
305 wqe = get_swqe_ptr(qp, qp->s_last);
306 hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
307 IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
308 /* will get called again */
309 goto done;
310 }
311
312 if (qp->s_flags & (HFI1_S_WAIT_RNR | HFI1_S_WAIT_ACK))
313 goto bail;
314
315 if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
316 if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
317 qp->s_flags |= HFI1_S_WAIT_PSN;
318 goto bail;
319 }
320 qp->s_sending_psn = qp->s_psn;
321 qp->s_sending_hpsn = qp->s_psn - 1;
322 }
323
324 /* Send a request. */
325 wqe = get_swqe_ptr(qp, qp->s_cur);
326 switch (qp->s_state) {
327 default:
328 if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_NEXT_SEND_OK))
329 goto bail;
330 /*
331 * Resend an old request or start a new one.
332 *
333 * We keep track of the current SWQE so that
334 * we don't reset the "furthest progress" state
335 * if we need to back up.
336 */
337 newreq = 0;
338 if (qp->s_cur == qp->s_tail) {
339 /* Check if send work queue is empty. */
340 if (qp->s_tail == qp->s_head) {
341 clear_ahg(qp);
342 goto bail;
343 }
344 /*
345 * If a fence is requested, wait for previous
346 * RDMA read and atomic operations to finish.
347 */
348 if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
349 qp->s_num_rd_atomic) {
350 qp->s_flags |= HFI1_S_WAIT_FENCE;
351 goto bail;
352 }
353 wqe->psn = qp->s_next_psn;
354 newreq = 1;
355 }
356 /*
357 * Note that we have to be careful not to modify the
358 * original work request since we may need to resend
359 * it.
360 */
361 len = wqe->length;
362 ss = &qp->s_sge;
363 bth2 = mask_psn(qp->s_psn);
364 switch (wqe->wr.opcode) {
365 case IB_WR_SEND:
366 case IB_WR_SEND_WITH_IMM:
367 /* If no credit, return. */
368 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT) &&
369 cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
370 qp->s_flags |= HFI1_S_WAIT_SSN_CREDIT;
371 goto bail;
372 }
373 wqe->lpsn = wqe->psn;
374 if (len > pmtu) {
375 wqe->lpsn += (len - 1) / pmtu;
376 qp->s_state = OP(SEND_FIRST);
377 len = pmtu;
378 break;
379 }
380 if (wqe->wr.opcode == IB_WR_SEND)
381 qp->s_state = OP(SEND_ONLY);
382 else {
383 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
384 /* Immediate data comes after the BTH */
385 ohdr->u.imm_data = wqe->wr.ex.imm_data;
386 hwords += 1;
387 }
388 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
389 bth0 |= IB_BTH_SOLICITED;
390 bth2 |= IB_BTH_REQ_ACK;
391 if (++qp->s_cur == qp->s_size)
392 qp->s_cur = 0;
393 break;
394
395 case IB_WR_RDMA_WRITE:
396 if (newreq && !(qp->s_flags & HFI1_S_UNLIMITED_CREDIT))
397 qp->s_lsn++;
398 /* FALLTHROUGH */
399 case IB_WR_RDMA_WRITE_WITH_IMM:
400 /* If no credit, return. */
401 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT) &&
402 cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
403 qp->s_flags |= HFI1_S_WAIT_SSN_CREDIT;
404 goto bail;
405 }
406 ohdr->u.rc.reth.vaddr =
407 cpu_to_be64(wqe->rdma_wr.remote_addr);
408 ohdr->u.rc.reth.rkey =
409 cpu_to_be32(wqe->rdma_wr.rkey);
410 ohdr->u.rc.reth.length = cpu_to_be32(len);
411 hwords += sizeof(struct ib_reth) / sizeof(u32);
412 wqe->lpsn = wqe->psn;
413 if (len > pmtu) {
414 wqe->lpsn += (len - 1) / pmtu;
415 qp->s_state = OP(RDMA_WRITE_FIRST);
416 len = pmtu;
417 break;
418 }
419 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
420 qp->s_state = OP(RDMA_WRITE_ONLY);
421 else {
422 qp->s_state =
423 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
424 /* Immediate data comes after RETH */
425 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
426 hwords += 1;
427 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
428 bth0 |= IB_BTH_SOLICITED;
429 }
430 bth2 |= IB_BTH_REQ_ACK;
431 if (++qp->s_cur == qp->s_size)
432 qp->s_cur = 0;
433 break;
434
435 case IB_WR_RDMA_READ:
436 /*
437 * Don't allow more operations to be started
438 * than the QP limits allow.
439 */
440 if (newreq) {
441 if (qp->s_num_rd_atomic >=
442 qp->s_max_rd_atomic) {
443 qp->s_flags |= HFI1_S_WAIT_RDMAR;
444 goto bail;
445 }
446 qp->s_num_rd_atomic++;
447 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT))
448 qp->s_lsn++;
449 /*
450 * Adjust s_next_psn to count the
451 * expected number of responses.
452 */
453 if (len > pmtu)
454 qp->s_next_psn += (len - 1) / pmtu;
455 wqe->lpsn = qp->s_next_psn++;
456 }
457 ohdr->u.rc.reth.vaddr =
458 cpu_to_be64(wqe->rdma_wr.remote_addr);
459 ohdr->u.rc.reth.rkey =
460 cpu_to_be32(wqe->rdma_wr.rkey);
461 ohdr->u.rc.reth.length = cpu_to_be32(len);
462 qp->s_state = OP(RDMA_READ_REQUEST);
463 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
464 ss = NULL;
465 len = 0;
466 bth2 |= IB_BTH_REQ_ACK;
467 if (++qp->s_cur == qp->s_size)
468 qp->s_cur = 0;
469 break;
470
471 case IB_WR_ATOMIC_CMP_AND_SWP:
472 case IB_WR_ATOMIC_FETCH_AND_ADD:
473 /*
474 * Don't allow more operations to be started
475 * than the QP limits allow.
476 */
477 if (newreq) {
478 if (qp->s_num_rd_atomic >=
479 qp->s_max_rd_atomic) {
480 qp->s_flags |= HFI1_S_WAIT_RDMAR;
481 goto bail;
482 }
483 qp->s_num_rd_atomic++;
484 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT))
485 qp->s_lsn++;
486 wqe->lpsn = wqe->psn;
487 }
488 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
489 qp->s_state = OP(COMPARE_SWAP);
490 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
491 wqe->atomic_wr.swap);
492 ohdr->u.atomic_eth.compare_data = cpu_to_be64(
493 wqe->atomic_wr.compare_add);
494 } else {
495 qp->s_state = OP(FETCH_ADD);
496 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
497 wqe->atomic_wr.compare_add);
498 ohdr->u.atomic_eth.compare_data = 0;
499 }
500 ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
501 wqe->atomic_wr.remote_addr >> 32);
502 ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
503 wqe->atomic_wr.remote_addr);
504 ohdr->u.atomic_eth.rkey = cpu_to_be32(
505 wqe->atomic_wr.rkey);
506 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
507 ss = NULL;
508 len = 0;
509 bth2 |= IB_BTH_REQ_ACK;
510 if (++qp->s_cur == qp->s_size)
511 qp->s_cur = 0;
512 break;
513
514 default:
515 goto bail;
516 }
517 qp->s_sge.sge = wqe->sg_list[0];
518 qp->s_sge.sg_list = wqe->sg_list + 1;
519 qp->s_sge.num_sge = wqe->wr.num_sge;
520 qp->s_sge.total_len = wqe->length;
521 qp->s_len = wqe->length;
522 if (newreq) {
523 qp->s_tail++;
524 if (qp->s_tail >= qp->s_size)
525 qp->s_tail = 0;
526 }
527 if (wqe->wr.opcode == IB_WR_RDMA_READ)
528 qp->s_psn = wqe->lpsn + 1;
529 else {
530 qp->s_psn++;
531 if (cmp_psn(qp->s_psn, qp->s_next_psn) > 0)
532 qp->s_next_psn = qp->s_psn;
533 }
534 break;
535
536 case OP(RDMA_READ_RESPONSE_FIRST):
537 /*
538 * qp->s_state is normally set to the opcode of the
539 * last packet constructed for new requests and therefore
540 * is never set to RDMA read response.
541 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
542 * thread to indicate a SEND needs to be restarted from an
543 * earlier PSN without interfering with the sending thread.
544 * See restart_rc().
545 */
546 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
547 /* FALLTHROUGH */
548 case OP(SEND_FIRST):
549 qp->s_state = OP(SEND_MIDDLE);
550 /* FALLTHROUGH */
551 case OP(SEND_MIDDLE):
552 bth2 = mask_psn(qp->s_psn++);
553 if (cmp_psn(qp->s_psn, qp->s_next_psn) > 0)
554 qp->s_next_psn = qp->s_psn;
555 ss = &qp->s_sge;
556 len = qp->s_len;
557 if (len > pmtu) {
558 len = pmtu;
559 middle = HFI1_CAP_IS_KSET(SDMA_AHG);
560 break;
561 }
562 if (wqe->wr.opcode == IB_WR_SEND)
563 qp->s_state = OP(SEND_LAST);
564 else {
565 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
566 /* Immediate data comes after the BTH */
567 ohdr->u.imm_data = wqe->wr.ex.imm_data;
568 hwords += 1;
569 }
570 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
571 bth0 |= IB_BTH_SOLICITED;
572 bth2 |= IB_BTH_REQ_ACK;
573 qp->s_cur++;
574 if (qp->s_cur >= qp->s_size)
575 qp->s_cur = 0;
576 break;
577
578 case OP(RDMA_READ_RESPONSE_LAST):
579 /*
580 * qp->s_state is normally set to the opcode of the
581 * last packet constructed for new requests and therefore
582 * is never set to RDMA read response.
583 * RDMA_READ_RESPONSE_LAST is used by the ACK processing
584 * thread to indicate a RDMA write needs to be restarted from
585 * an earlier PSN without interfering with the sending thread.
586 * See restart_rc().
587 */
588 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
589 /* FALLTHROUGH */
590 case OP(RDMA_WRITE_FIRST):
591 qp->s_state = OP(RDMA_WRITE_MIDDLE);
592 /* FALLTHROUGH */
593 case OP(RDMA_WRITE_MIDDLE):
594 bth2 = mask_psn(qp->s_psn++);
595 if (cmp_psn(qp->s_psn, qp->s_next_psn) > 0)
596 qp->s_next_psn = qp->s_psn;
597 ss = &qp->s_sge;
598 len = qp->s_len;
599 if (len > pmtu) {
600 len = pmtu;
601 middle = HFI1_CAP_IS_KSET(SDMA_AHG);
602 break;
603 }
604 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
605 qp->s_state = OP(RDMA_WRITE_LAST);
606 else {
607 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
608 /* Immediate data comes after the BTH */
609 ohdr->u.imm_data = wqe->wr.ex.imm_data;
610 hwords += 1;
611 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
612 bth0 |= IB_BTH_SOLICITED;
613 }
614 bth2 |= IB_BTH_REQ_ACK;
615 qp->s_cur++;
616 if (qp->s_cur >= qp->s_size)
617 qp->s_cur = 0;
618 break;
619
620 case OP(RDMA_READ_RESPONSE_MIDDLE):
621 /*
622 * qp->s_state is normally set to the opcode of the
623 * last packet constructed for new requests and therefore
624 * is never set to RDMA read response.
625 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
626 * thread to indicate a RDMA read needs to be restarted from
627 * an earlier PSN without interfering with the sending thread.
628 * See restart_rc().
629 */
630 len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
631 ohdr->u.rc.reth.vaddr =
632 cpu_to_be64(wqe->rdma_wr.remote_addr + len);
633 ohdr->u.rc.reth.rkey =
634 cpu_to_be32(wqe->rdma_wr.rkey);
635 ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
636 qp->s_state = OP(RDMA_READ_REQUEST);
637 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
638 bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
639 qp->s_psn = wqe->lpsn + 1;
640 ss = NULL;
641 len = 0;
642 qp->s_cur++;
643 if (qp->s_cur == qp->s_size)
644 qp->s_cur = 0;
645 break;
646 }
647 qp->s_sending_hpsn = bth2;
648 delta = delta_psn(bth2, wqe->psn);
649 if (delta && delta % HFI1_PSN_CREDIT == 0)
650 bth2 |= IB_BTH_REQ_ACK;
651 if (qp->s_flags & HFI1_S_SEND_ONE) {
652 qp->s_flags &= ~HFI1_S_SEND_ONE;
653 qp->s_flags |= HFI1_S_WAIT_ACK;
654 bth2 |= IB_BTH_REQ_ACK;
655 }
656 qp->s_len -= len;
657 qp->s_hdrwords = hwords;
658 qp->s_cur_sge = ss;
659 qp->s_cur_size = len;
660 hfi1_make_ruc_header(
661 qp,
662 ohdr,
663 bth0 | (qp->s_state << 24),
664 bth2,
665 middle);
666 done:
667 ret = 1;
668 goto unlock;
669
670 bail:
671 qp->s_flags &= ~HFI1_S_BUSY;
672 unlock:
673 spin_unlock_irqrestore(&qp->s_lock, flags);
674 return ret;
675 }
676
677 /**
678 * hfi1_send_rc_ack - Construct an ACK packet and send it
679 * @qp: a pointer to the QP
680 *
681 * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
682 * Note that RDMA reads and atomics are handled in the
683 * send side QP state and tasklet.
684 */
685 void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct hfi1_qp *qp,
686 int is_fecn)
687 {
688 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
689 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
690 u64 pbc, pbc_flags = 0;
691 u16 lrh0;
692 u16 sc5;
693 u32 bth0;
694 u32 hwords;
695 u32 vl, plen;
696 struct send_context *sc;
697 struct pio_buf *pbuf;
698 struct hfi1_ib_header hdr;
699 struct hfi1_other_headers *ohdr;
700 unsigned long flags;
701
702 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
703 if (qp->s_flags & HFI1_S_RESP_PENDING)
704 goto queue_ack;
705
706 /* Ensure s_rdma_ack_cnt changes are committed */
707 smp_read_barrier_depends();
708 if (qp->s_rdma_ack_cnt)
709 goto queue_ack;
710
711 /* Construct the header */
712 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
713 hwords = 6;
714 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
715 hwords += hfi1_make_grh(ibp, &hdr.u.l.grh,
716 &qp->remote_ah_attr.grh, hwords, 0);
717 ohdr = &hdr.u.l.oth;
718 lrh0 = HFI1_LRH_GRH;
719 } else {
720 ohdr = &hdr.u.oth;
721 lrh0 = HFI1_LRH_BTH;
722 }
723 /* read pkey_index w/o lock (its atomic) */
724 bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
725 if (qp->s_mig_state == IB_MIG_MIGRATED)
726 bth0 |= IB_BTH_MIG_REQ;
727 if (qp->r_nak_state)
728 ohdr->u.aeth = cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) |
729 (qp->r_nak_state <<
730 HFI1_AETH_CREDIT_SHIFT));
731 else
732 ohdr->u.aeth = hfi1_compute_aeth(qp);
733 sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
734 /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
735 pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
736 lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4;
737 hdr.lrh[0] = cpu_to_be16(lrh0);
738 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
739 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
740 hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
741 ohdr->bth[0] = cpu_to_be32(bth0);
742 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
743 ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT);
744 ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
745
746 /* Don't try to send ACKs if the link isn't ACTIVE */
747 if (driver_lstate(ppd) != IB_PORT_ACTIVE)
748 return;
749
750 sc = rcd->sc;
751 plen = 2 /* PBC */ + hwords;
752 vl = sc_to_vlt(ppd->dd, sc5);
753 pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen);
754
755 pbuf = sc_buffer_alloc(sc, plen, NULL, NULL);
756 if (!pbuf) {
757 /*
758 * We have no room to send at the moment. Pass
759 * responsibility for sending the ACK to the send tasklet
760 * so that when enough buffer space becomes available,
761 * the ACK is sent ahead of other outgoing packets.
762 */
763 goto queue_ack;
764 }
765
766 trace_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr);
767
768 /* write the pbc and data */
769 ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords);
770
771 return;
772
773 queue_ack:
774 this_cpu_inc(*ibp->rc_qacks);
775 spin_lock_irqsave(&qp->s_lock, flags);
776 qp->s_flags |= HFI1_S_ACK_PENDING | HFI1_S_RESP_PENDING;
777 qp->s_nak_state = qp->r_nak_state;
778 qp->s_ack_psn = qp->r_ack_psn;
779 if (is_fecn)
780 qp->s_flags |= HFI1_S_ECN;
781
782 /* Schedule the send tasklet. */
783 hfi1_schedule_send(qp);
784 spin_unlock_irqrestore(&qp->s_lock, flags);
785 }
786
787 /**
788 * reset_psn - reset the QP state to send starting from PSN
789 * @qp: the QP
790 * @psn: the packet sequence number to restart at
791 *
792 * This is called from hfi1_rc_rcv() to process an incoming RC ACK
793 * for the given QP.
794 * Called at interrupt level with the QP s_lock held.
795 */
796 static void reset_psn(struct hfi1_qp *qp, u32 psn)
797 {
798 u32 n = qp->s_acked;
799 struct hfi1_swqe *wqe = get_swqe_ptr(qp, n);
800 u32 opcode;
801
802 qp->s_cur = n;
803
804 /*
805 * If we are starting the request from the beginning,
806 * let the normal send code handle initialization.
807 */
808 if (cmp_psn(psn, wqe->psn) <= 0) {
809 qp->s_state = OP(SEND_LAST);
810 goto done;
811 }
812
813 /* Find the work request opcode corresponding to the given PSN. */
814 opcode = wqe->wr.opcode;
815 for (;;) {
816 int diff;
817
818 if (++n == qp->s_size)
819 n = 0;
820 if (n == qp->s_tail)
821 break;
822 wqe = get_swqe_ptr(qp, n);
823 diff = cmp_psn(psn, wqe->psn);
824 if (diff < 0)
825 break;
826 qp->s_cur = n;
827 /*
828 * If we are starting the request from the beginning,
829 * let the normal send code handle initialization.
830 */
831 if (diff == 0) {
832 qp->s_state = OP(SEND_LAST);
833 goto done;
834 }
835 opcode = wqe->wr.opcode;
836 }
837
838 /*
839 * Set the state to restart in the middle of a request.
840 * Don't change the s_sge, s_cur_sge, or s_cur_size.
841 * See hfi1_make_rc_req().
842 */
843 switch (opcode) {
844 case IB_WR_SEND:
845 case IB_WR_SEND_WITH_IMM:
846 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
847 break;
848
849 case IB_WR_RDMA_WRITE:
850 case IB_WR_RDMA_WRITE_WITH_IMM:
851 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
852 break;
853
854 case IB_WR_RDMA_READ:
855 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
856 break;
857
858 default:
859 /*
860 * This case shouldn't happen since its only
861 * one PSN per req.
862 */
863 qp->s_state = OP(SEND_LAST);
864 }
865 done:
866 qp->s_psn = psn;
867 /*
868 * Set HFI1_S_WAIT_PSN as rc_complete() may start the timer
869 * asynchronously before the send tasklet can get scheduled.
870 * Doing it in hfi1_make_rc_req() is too late.
871 */
872 if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
873 (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
874 qp->s_flags |= HFI1_S_WAIT_PSN;
875 qp->s_flags &= ~HFI1_S_AHG_VALID;
876 }
877
878 /*
879 * Back up requester to resend the last un-ACKed request.
880 * The QP r_lock and s_lock should be held and interrupts disabled.
881 */
882 static void restart_rc(struct hfi1_qp *qp, u32 psn, int wait)
883 {
884 struct hfi1_swqe *wqe = get_swqe_ptr(qp, qp->s_acked);
885 struct hfi1_ibport *ibp;
886
887 if (qp->s_retry == 0) {
888 if (qp->s_mig_state == IB_MIG_ARMED) {
889 hfi1_migrate_qp(qp);
890 qp->s_retry = qp->s_retry_cnt;
891 } else if (qp->s_last == qp->s_acked) {
892 hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
893 hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
894 return;
895 } else /* need to handle delayed completion */
896 return;
897 } else
898 qp->s_retry--;
899
900 ibp = to_iport(qp->ibqp.device, qp->port_num);
901 if (wqe->wr.opcode == IB_WR_RDMA_READ)
902 ibp->n_rc_resends++;
903 else
904 ibp->n_rc_resends += delta_psn(qp->s_psn, psn);
905
906 qp->s_flags &= ~(HFI1_S_WAIT_FENCE | HFI1_S_WAIT_RDMAR |
907 HFI1_S_WAIT_SSN_CREDIT | HFI1_S_WAIT_PSN |
908 HFI1_S_WAIT_ACK);
909 if (wait)
910 qp->s_flags |= HFI1_S_SEND_ONE;
911 reset_psn(qp, psn);
912 }
913
914 /*
915 * This is called from s_timer for missing responses.
916 */
917 static void rc_timeout(unsigned long arg)
918 {
919 struct hfi1_qp *qp = (struct hfi1_qp *)arg;
920 struct hfi1_ibport *ibp;
921 unsigned long flags;
922
923 spin_lock_irqsave(&qp->r_lock, flags);
924 spin_lock(&qp->s_lock);
925 if (qp->s_flags & HFI1_S_TIMER) {
926 ibp = to_iport(qp->ibqp.device, qp->port_num);
927 ibp->n_rc_timeouts++;
928 qp->s_flags &= ~HFI1_S_TIMER;
929 del_timer(&qp->s_timer);
930 trace_hfi1_rc_timeout(qp, qp->s_last_psn + 1);
931 restart_rc(qp, qp->s_last_psn + 1, 1);
932 hfi1_schedule_send(qp);
933 }
934 spin_unlock(&qp->s_lock);
935 spin_unlock_irqrestore(&qp->r_lock, flags);
936 }
937
938 /*
939 * This is called from s_timer for RNR timeouts.
940 */
941 void hfi1_rc_rnr_retry(unsigned long arg)
942 {
943 struct hfi1_qp *qp = (struct hfi1_qp *)arg;
944 unsigned long flags;
945
946 spin_lock_irqsave(&qp->s_lock, flags);
947 if (qp->s_flags & HFI1_S_WAIT_RNR) {
948 qp->s_flags &= ~HFI1_S_WAIT_RNR;
949 del_timer(&qp->s_timer);
950 hfi1_schedule_send(qp);
951 }
952 spin_unlock_irqrestore(&qp->s_lock, flags);
953 }
954
955 /*
956 * Set qp->s_sending_psn to the next PSN after the given one.
957 * This would be psn+1 except when RDMA reads are present.
958 */
959 static void reset_sending_psn(struct hfi1_qp *qp, u32 psn)
960 {
961 struct hfi1_swqe *wqe;
962 u32 n = qp->s_last;
963
964 /* Find the work request corresponding to the given PSN. */
965 for (;;) {
966 wqe = get_swqe_ptr(qp, n);
967 if (cmp_psn(psn, wqe->lpsn) <= 0) {
968 if (wqe->wr.opcode == IB_WR_RDMA_READ)
969 qp->s_sending_psn = wqe->lpsn + 1;
970 else
971 qp->s_sending_psn = psn + 1;
972 break;
973 }
974 if (++n == qp->s_size)
975 n = 0;
976 if (n == qp->s_tail)
977 break;
978 }
979 }
980
981 /*
982 * This should be called with the QP s_lock held and interrupts disabled.
983 */
984 void hfi1_rc_send_complete(struct hfi1_qp *qp, struct hfi1_ib_header *hdr)
985 {
986 struct hfi1_other_headers *ohdr;
987 struct hfi1_swqe *wqe;
988 struct ib_wc wc;
989 unsigned i;
990 u32 opcode;
991 u32 psn;
992
993 if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_OR_FLUSH_SEND))
994 return;
995
996 /* Find out where the BTH is */
997 if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH)
998 ohdr = &hdr->u.oth;
999 else
1000 ohdr = &hdr->u.l.oth;
1001
1002 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
1003 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1004 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1005 WARN_ON(!qp->s_rdma_ack_cnt);
1006 qp->s_rdma_ack_cnt--;
1007 return;
1008 }
1009
1010 psn = be32_to_cpu(ohdr->bth[2]);
1011 reset_sending_psn(qp, psn);
1012
1013 /*
1014 * Start timer after a packet requesting an ACK has been sent and
1015 * there are still requests that haven't been acked.
1016 */
1017 if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
1018 !(qp->s_flags &
1019 (HFI1_S_TIMER | HFI1_S_WAIT_RNR | HFI1_S_WAIT_PSN)) &&
1020 (ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_RECV_OK))
1021 start_timer(qp);
1022
1023 while (qp->s_last != qp->s_acked) {
1024 wqe = get_swqe_ptr(qp, qp->s_last);
1025 if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1026 cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1027 break;
1028 for (i = 0; i < wqe->wr.num_sge; i++) {
1029 struct hfi1_sge *sge = &wqe->sg_list[i];
1030
1031 hfi1_put_mr(sge->mr);
1032 }
1033 /* Post a send completion queue entry if requested. */
1034 if (!(qp->s_flags & HFI1_S_SIGNAL_REQ_WR) ||
1035 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1036 memset(&wc, 0, sizeof(wc));
1037 wc.wr_id = wqe->wr.wr_id;
1038 wc.status = IB_WC_SUCCESS;
1039 wc.opcode = ib_hfi1_wc_opcode[wqe->wr.opcode];
1040 wc.byte_len = wqe->length;
1041 wc.qp = &qp->ibqp;
1042 hfi1_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1043 }
1044 if (++qp->s_last >= qp->s_size)
1045 qp->s_last = 0;
1046 }
1047 /*
1048 * If we were waiting for sends to complete before re-sending,
1049 * and they are now complete, restart sending.
1050 */
1051 trace_hfi1_rc_sendcomplete(qp, psn);
1052 if (qp->s_flags & HFI1_S_WAIT_PSN &&
1053 cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1054 qp->s_flags &= ~HFI1_S_WAIT_PSN;
1055 qp->s_sending_psn = qp->s_psn;
1056 qp->s_sending_hpsn = qp->s_psn - 1;
1057 hfi1_schedule_send(qp);
1058 }
1059 }
1060
1061 static inline void update_last_psn(struct hfi1_qp *qp, u32 psn)
1062 {
1063 qp->s_last_psn = psn;
1064 }
1065
1066 /*
1067 * Generate a SWQE completion.
1068 * This is similar to hfi1_send_complete but has to check to be sure
1069 * that the SGEs are not being referenced if the SWQE is being resent.
1070 */
1071 static struct hfi1_swqe *do_rc_completion(struct hfi1_qp *qp,
1072 struct hfi1_swqe *wqe,
1073 struct hfi1_ibport *ibp)
1074 {
1075 struct ib_wc wc;
1076 unsigned i;
1077
1078 /*
1079 * Don't decrement refcount and don't generate a
1080 * completion if the SWQE is being resent until the send
1081 * is finished.
1082 */
1083 if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
1084 cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1085 for (i = 0; i < wqe->wr.num_sge; i++) {
1086 struct hfi1_sge *sge = &wqe->sg_list[i];
1087
1088 hfi1_put_mr(sge->mr);
1089 }
1090 /* Post a send completion queue entry if requested. */
1091 if (!(qp->s_flags & HFI1_S_SIGNAL_REQ_WR) ||
1092 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1093 memset(&wc, 0, sizeof(wc));
1094 wc.wr_id = wqe->wr.wr_id;
1095 wc.status = IB_WC_SUCCESS;
1096 wc.opcode = ib_hfi1_wc_opcode[wqe->wr.opcode];
1097 wc.byte_len = wqe->length;
1098 wc.qp = &qp->ibqp;
1099 hfi1_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1100 }
1101 if (++qp->s_last >= qp->s_size)
1102 qp->s_last = 0;
1103 } else {
1104 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1105
1106 this_cpu_inc(*ibp->rc_delayed_comp);
1107 /*
1108 * If send progress not running attempt to progress
1109 * SDMA queue.
1110 */
1111 if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
1112 struct sdma_engine *engine;
1113 u8 sc5;
1114
1115 /* For now use sc to find engine */
1116 sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
1117 engine = qp_to_sdma_engine(qp, sc5);
1118 sdma_engine_progress_schedule(engine);
1119 }
1120 }
1121
1122 qp->s_retry = qp->s_retry_cnt;
1123 update_last_psn(qp, wqe->lpsn);
1124
1125 /*
1126 * If we are completing a request which is in the process of
1127 * being resent, we can stop re-sending it since we know the
1128 * responder has already seen it.
1129 */
1130 if (qp->s_acked == qp->s_cur) {
1131 if (++qp->s_cur >= qp->s_size)
1132 qp->s_cur = 0;
1133 qp->s_acked = qp->s_cur;
1134 wqe = get_swqe_ptr(qp, qp->s_cur);
1135 if (qp->s_acked != qp->s_tail) {
1136 qp->s_state = OP(SEND_LAST);
1137 qp->s_psn = wqe->psn;
1138 }
1139 } else {
1140 if (++qp->s_acked >= qp->s_size)
1141 qp->s_acked = 0;
1142 if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1143 qp->s_draining = 0;
1144 wqe = get_swqe_ptr(qp, qp->s_acked);
1145 }
1146 return wqe;
1147 }
1148
1149 /**
1150 * do_rc_ack - process an incoming RC ACK
1151 * @qp: the QP the ACK came in on
1152 * @psn: the packet sequence number of the ACK
1153 * @opcode: the opcode of the request that resulted in the ACK
1154 *
1155 * This is called from rc_rcv_resp() to process an incoming RC ACK
1156 * for the given QP.
1157 * May be called at interrupt level, with the QP s_lock held.
1158 * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1159 */
1160 static int do_rc_ack(struct hfi1_qp *qp, u32 aeth, u32 psn, int opcode,
1161 u64 val, struct hfi1_ctxtdata *rcd)
1162 {
1163 struct hfi1_ibport *ibp;
1164 enum ib_wc_status status;
1165 struct hfi1_swqe *wqe;
1166 int ret = 0;
1167 u32 ack_psn;
1168 int diff;
1169
1170 /* Remove QP from retry timer */
1171 if (qp->s_flags & (HFI1_S_TIMER | HFI1_S_WAIT_RNR)) {
1172 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_WAIT_RNR);
1173 del_timer(&qp->s_timer);
1174 }
1175
1176 /*
1177 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1178 * requests and implicitly NAK RDMA read and atomic requests issued
1179 * before the NAK'ed request. The MSN won't include the NAK'ed
1180 * request but will include an ACK'ed request(s).
1181 */
1182 ack_psn = psn;
1183 if (aeth >> 29)
1184 ack_psn--;
1185 wqe = get_swqe_ptr(qp, qp->s_acked);
1186 ibp = to_iport(qp->ibqp.device, qp->port_num);
1187
1188 /*
1189 * The MSN might be for a later WQE than the PSN indicates so
1190 * only complete WQEs that the PSN finishes.
1191 */
1192 while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
1193 /*
1194 * RDMA_READ_RESPONSE_ONLY is a special case since
1195 * we want to generate completion events for everything
1196 * before the RDMA read, copy the data, then generate
1197 * the completion for the read.
1198 */
1199 if (wqe->wr.opcode == IB_WR_RDMA_READ &&
1200 opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
1201 diff == 0) {
1202 ret = 1;
1203 goto bail;
1204 }
1205 /*
1206 * If this request is a RDMA read or atomic, and the ACK is
1207 * for a later operation, this ACK NAKs the RDMA read or
1208 * atomic. In other words, only a RDMA_READ_LAST or ONLY
1209 * can ACK a RDMA read and likewise for atomic ops. Note
1210 * that the NAK case can only happen if relaxed ordering is
1211 * used and requests are sent after an RDMA read or atomic
1212 * is sent but before the response is received.
1213 */
1214 if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
1215 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
1216 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1217 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
1218 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
1219 /* Retry this request. */
1220 if (!(qp->r_flags & HFI1_R_RDMAR_SEQ)) {
1221 qp->r_flags |= HFI1_R_RDMAR_SEQ;
1222 restart_rc(qp, qp->s_last_psn + 1, 0);
1223 if (list_empty(&qp->rspwait)) {
1224 qp->r_flags |= HFI1_R_RSP_SEND;
1225 atomic_inc(&qp->refcount);
1226 list_add_tail(&qp->rspwait,
1227 &rcd->qp_wait_list);
1228 }
1229 }
1230 /*
1231 * No need to process the ACK/NAK since we are
1232 * restarting an earlier request.
1233 */
1234 goto bail;
1235 }
1236 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1237 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1238 u64 *vaddr = wqe->sg_list[0].vaddr;
1239 *vaddr = val;
1240 }
1241 if (qp->s_num_rd_atomic &&
1242 (wqe->wr.opcode == IB_WR_RDMA_READ ||
1243 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1244 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
1245 qp->s_num_rd_atomic--;
1246 /* Restart sending task if fence is complete */
1247 if ((qp->s_flags & HFI1_S_WAIT_FENCE) &&
1248 !qp->s_num_rd_atomic) {
1249 qp->s_flags &= ~(HFI1_S_WAIT_FENCE |
1250 HFI1_S_WAIT_ACK);
1251 hfi1_schedule_send(qp);
1252 } else if (qp->s_flags & HFI1_S_WAIT_RDMAR) {
1253 qp->s_flags &= ~(HFI1_S_WAIT_RDMAR |
1254 HFI1_S_WAIT_ACK);
1255 hfi1_schedule_send(qp);
1256 }
1257 }
1258 wqe = do_rc_completion(qp, wqe, ibp);
1259 if (qp->s_acked == qp->s_tail)
1260 break;
1261 }
1262
1263 switch (aeth >> 29) {
1264 case 0: /* ACK */
1265 this_cpu_inc(*ibp->rc_acks);
1266 if (qp->s_acked != qp->s_tail) {
1267 /*
1268 * We are expecting more ACKs so
1269 * reset the re-transmit timer.
1270 */
1271 start_timer(qp);
1272 /*
1273 * We can stop re-sending the earlier packets and
1274 * continue with the next packet the receiver wants.
1275 */
1276 if (cmp_psn(qp->s_psn, psn) <= 0)
1277 reset_psn(qp, psn + 1);
1278 } else if (cmp_psn(qp->s_psn, psn) <= 0) {
1279 qp->s_state = OP(SEND_LAST);
1280 qp->s_psn = psn + 1;
1281 }
1282 if (qp->s_flags & HFI1_S_WAIT_ACK) {
1283 qp->s_flags &= ~HFI1_S_WAIT_ACK;
1284 hfi1_schedule_send(qp);
1285 }
1286 hfi1_get_credit(qp, aeth);
1287 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1288 qp->s_retry = qp->s_retry_cnt;
1289 update_last_psn(qp, psn);
1290 ret = 1;
1291 goto bail;
1292
1293 case 1: /* RNR NAK */
1294 ibp->n_rnr_naks++;
1295 if (qp->s_acked == qp->s_tail)
1296 goto bail;
1297 if (qp->s_flags & HFI1_S_WAIT_RNR)
1298 goto bail;
1299 if (qp->s_rnr_retry == 0) {
1300 status = IB_WC_RNR_RETRY_EXC_ERR;
1301 goto class_b;
1302 }
1303 if (qp->s_rnr_retry_cnt < 7)
1304 qp->s_rnr_retry--;
1305
1306 /* The last valid PSN is the previous PSN. */
1307 update_last_psn(qp, psn - 1);
1308
1309 ibp->n_rc_resends += delta_psn(qp->s_psn, psn);
1310
1311 reset_psn(qp, psn);
1312
1313 qp->s_flags &= ~(HFI1_S_WAIT_SSN_CREDIT | HFI1_S_WAIT_ACK);
1314 qp->s_flags |= HFI1_S_WAIT_RNR;
1315 qp->s_timer.function = hfi1_rc_rnr_retry;
1316 qp->s_timer.expires = jiffies + usecs_to_jiffies(
1317 ib_hfi1_rnr_table[(aeth >> HFI1_AETH_CREDIT_SHIFT) &
1318 HFI1_AETH_CREDIT_MASK]);
1319 add_timer(&qp->s_timer);
1320 goto bail;
1321
1322 case 3: /* NAK */
1323 if (qp->s_acked == qp->s_tail)
1324 goto bail;
1325 /* The last valid PSN is the previous PSN. */
1326 update_last_psn(qp, psn - 1);
1327 switch ((aeth >> HFI1_AETH_CREDIT_SHIFT) &
1328 HFI1_AETH_CREDIT_MASK) {
1329 case 0: /* PSN sequence error */
1330 ibp->n_seq_naks++;
1331 /*
1332 * Back up to the responder's expected PSN.
1333 * Note that we might get a NAK in the middle of an
1334 * RDMA READ response which terminates the RDMA
1335 * READ.
1336 */
1337 restart_rc(qp, psn, 0);
1338 hfi1_schedule_send(qp);
1339 break;
1340
1341 case 1: /* Invalid Request */
1342 status = IB_WC_REM_INV_REQ_ERR;
1343 ibp->n_other_naks++;
1344 goto class_b;
1345
1346 case 2: /* Remote Access Error */
1347 status = IB_WC_REM_ACCESS_ERR;
1348 ibp->n_other_naks++;
1349 goto class_b;
1350
1351 case 3: /* Remote Operation Error */
1352 status = IB_WC_REM_OP_ERR;
1353 ibp->n_other_naks++;
1354 class_b:
1355 if (qp->s_last == qp->s_acked) {
1356 hfi1_send_complete(qp, wqe, status);
1357 hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1358 }
1359 break;
1360
1361 default:
1362 /* Ignore other reserved NAK error codes */
1363 goto reserved;
1364 }
1365 qp->s_retry = qp->s_retry_cnt;
1366 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1367 goto bail;
1368
1369 default: /* 2: reserved */
1370 reserved:
1371 /* Ignore reserved NAK codes. */
1372 goto bail;
1373 }
1374
1375 bail:
1376 return ret;
1377 }
1378
1379 /*
1380 * We have seen an out of sequence RDMA read middle or last packet.
1381 * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
1382 */
1383 static void rdma_seq_err(struct hfi1_qp *qp, struct hfi1_ibport *ibp, u32 psn,
1384 struct hfi1_ctxtdata *rcd)
1385 {
1386 struct hfi1_swqe *wqe;
1387
1388 /* Remove QP from retry timer */
1389 if (qp->s_flags & (HFI1_S_TIMER | HFI1_S_WAIT_RNR)) {
1390 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_WAIT_RNR);
1391 del_timer(&qp->s_timer);
1392 }
1393
1394 wqe = get_swqe_ptr(qp, qp->s_acked);
1395
1396 while (cmp_psn(psn, wqe->lpsn) > 0) {
1397 if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1398 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1399 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
1400 break;
1401 wqe = do_rc_completion(qp, wqe, ibp);
1402 }
1403
1404 ibp->n_rdma_seq++;
1405 qp->r_flags |= HFI1_R_RDMAR_SEQ;
1406 restart_rc(qp, qp->s_last_psn + 1, 0);
1407 if (list_empty(&qp->rspwait)) {
1408 qp->r_flags |= HFI1_R_RSP_SEND;
1409 atomic_inc(&qp->refcount);
1410 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1411 }
1412 }
1413
1414 /**
1415 * rc_rcv_resp - process an incoming RC response packet
1416 * @ibp: the port this packet came in on
1417 * @ohdr: the other headers for this packet
1418 * @data: the packet data
1419 * @tlen: the packet length
1420 * @qp: the QP for this packet
1421 * @opcode: the opcode for this packet
1422 * @psn: the packet sequence number for this packet
1423 * @hdrsize: the header length
1424 * @pmtu: the path MTU
1425 *
1426 * This is called from hfi1_rc_rcv() to process an incoming RC response
1427 * packet for the given QP.
1428 * Called at interrupt level.
1429 */
1430 static void rc_rcv_resp(struct hfi1_ibport *ibp,
1431 struct hfi1_other_headers *ohdr,
1432 void *data, u32 tlen, struct hfi1_qp *qp,
1433 u32 opcode, u32 psn, u32 hdrsize, u32 pmtu,
1434 struct hfi1_ctxtdata *rcd)
1435 {
1436 struct hfi1_swqe *wqe;
1437 enum ib_wc_status status;
1438 unsigned long flags;
1439 int diff;
1440 u32 pad;
1441 u32 aeth;
1442 u64 val;
1443
1444 spin_lock_irqsave(&qp->s_lock, flags);
1445
1446 trace_hfi1_rc_ack(qp, psn);
1447
1448 /* Ignore invalid responses. */
1449 if (cmp_psn(psn, qp->s_next_psn) >= 0)
1450 goto ack_done;
1451
1452 /* Ignore duplicate responses. */
1453 diff = cmp_psn(psn, qp->s_last_psn);
1454 if (unlikely(diff <= 0)) {
1455 /* Update credits for "ghost" ACKs */
1456 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1457 aeth = be32_to_cpu(ohdr->u.aeth);
1458 if ((aeth >> 29) == 0)
1459 hfi1_get_credit(qp, aeth);
1460 }
1461 goto ack_done;
1462 }
1463
1464 /*
1465 * Skip everything other than the PSN we expect, if we are waiting
1466 * for a reply to a restarted RDMA read or atomic op.
1467 */
1468 if (qp->r_flags & HFI1_R_RDMAR_SEQ) {
1469 if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
1470 goto ack_done;
1471 qp->r_flags &= ~HFI1_R_RDMAR_SEQ;
1472 }
1473
1474 if (unlikely(qp->s_acked == qp->s_tail))
1475 goto ack_done;
1476 wqe = get_swqe_ptr(qp, qp->s_acked);
1477 status = IB_WC_SUCCESS;
1478
1479 switch (opcode) {
1480 case OP(ACKNOWLEDGE):
1481 case OP(ATOMIC_ACKNOWLEDGE):
1482 case OP(RDMA_READ_RESPONSE_FIRST):
1483 aeth = be32_to_cpu(ohdr->u.aeth);
1484 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
1485 __be32 *p = ohdr->u.at.atomic_ack_eth;
1486
1487 val = ((u64) be32_to_cpu(p[0]) << 32) |
1488 be32_to_cpu(p[1]);
1489 } else
1490 val = 0;
1491 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
1492 opcode != OP(RDMA_READ_RESPONSE_FIRST))
1493 goto ack_done;
1494 wqe = get_swqe_ptr(qp, qp->s_acked);
1495 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1496 goto ack_op_err;
1497 /*
1498 * If this is a response to a resent RDMA read, we
1499 * have to be careful to copy the data to the right
1500 * location.
1501 */
1502 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1503 wqe, psn, pmtu);
1504 goto read_middle;
1505
1506 case OP(RDMA_READ_RESPONSE_MIDDLE):
1507 /* no AETH, no ACK */
1508 if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
1509 goto ack_seq_err;
1510 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1511 goto ack_op_err;
1512 read_middle:
1513 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1514 goto ack_len_err;
1515 if (unlikely(pmtu >= qp->s_rdma_read_len))
1516 goto ack_len_err;
1517
1518 /*
1519 * We got a response so update the timeout.
1520 * 4.096 usec. * (1 << qp->timeout)
1521 */
1522 qp->s_flags |= HFI1_S_TIMER;
1523 mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies);
1524 if (qp->s_flags & HFI1_S_WAIT_ACK) {
1525 qp->s_flags &= ~HFI1_S_WAIT_ACK;
1526 hfi1_schedule_send(qp);
1527 }
1528
1529 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1530 qp->s_retry = qp->s_retry_cnt;
1531
1532 /*
1533 * Update the RDMA receive state but do the copy w/o
1534 * holding the locks and blocking interrupts.
1535 */
1536 qp->s_rdma_read_len -= pmtu;
1537 update_last_psn(qp, psn);
1538 spin_unlock_irqrestore(&qp->s_lock, flags);
1539 hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0);
1540 goto bail;
1541
1542 case OP(RDMA_READ_RESPONSE_ONLY):
1543 aeth = be32_to_cpu(ohdr->u.aeth);
1544 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
1545 goto ack_done;
1546 /* Get the number of bytes the message was padded by. */
1547 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1548 /*
1549 * Check that the data size is >= 0 && <= pmtu.
1550 * Remember to account for ICRC (4).
1551 */
1552 if (unlikely(tlen < (hdrsize + pad + 4)))
1553 goto ack_len_err;
1554 /*
1555 * If this is a response to a resent RDMA read, we
1556 * have to be careful to copy the data to the right
1557 * location.
1558 */
1559 wqe = get_swqe_ptr(qp, qp->s_acked);
1560 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1561 wqe, psn, pmtu);
1562 goto read_last;
1563
1564 case OP(RDMA_READ_RESPONSE_LAST):
1565 /* ACKs READ req. */
1566 if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
1567 goto ack_seq_err;
1568 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1569 goto ack_op_err;
1570 /* Get the number of bytes the message was padded by. */
1571 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1572 /*
1573 * Check that the data size is >= 1 && <= pmtu.
1574 * Remember to account for ICRC (4).
1575 */
1576 if (unlikely(tlen <= (hdrsize + pad + 4)))
1577 goto ack_len_err;
1578 read_last:
1579 tlen -= hdrsize + pad + 4;
1580 if (unlikely(tlen != qp->s_rdma_read_len))
1581 goto ack_len_err;
1582 aeth = be32_to_cpu(ohdr->u.aeth);
1583 hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0);
1584 WARN_ON(qp->s_rdma_read_sge.num_sge);
1585 (void) do_rc_ack(qp, aeth, psn,
1586 OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
1587 goto ack_done;
1588 }
1589
1590 ack_op_err:
1591 status = IB_WC_LOC_QP_OP_ERR;
1592 goto ack_err;
1593
1594 ack_seq_err:
1595 rdma_seq_err(qp, ibp, psn, rcd);
1596 goto ack_done;
1597
1598 ack_len_err:
1599 status = IB_WC_LOC_LEN_ERR;
1600 ack_err:
1601 if (qp->s_last == qp->s_acked) {
1602 hfi1_send_complete(qp, wqe, status);
1603 hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1604 }
1605 ack_done:
1606 spin_unlock_irqrestore(&qp->s_lock, flags);
1607 bail:
1608 return;
1609 }
1610
1611 /**
1612 * rc_rcv_error - process an incoming duplicate or error RC packet
1613 * @ohdr: the other headers for this packet
1614 * @data: the packet data
1615 * @qp: the QP for this packet
1616 * @opcode: the opcode for this packet
1617 * @psn: the packet sequence number for this packet
1618 * @diff: the difference between the PSN and the expected PSN
1619 *
1620 * This is called from hfi1_rc_rcv() to process an unexpected
1621 * incoming RC packet for the given QP.
1622 * Called at interrupt level.
1623 * Return 1 if no more processing is needed; otherwise return 0 to
1624 * schedule a response to be sent.
1625 */
1626 static noinline int rc_rcv_error(struct hfi1_other_headers *ohdr, void *data,
1627 struct hfi1_qp *qp, u32 opcode, u32 psn, int diff,
1628 struct hfi1_ctxtdata *rcd)
1629 {
1630 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
1631 struct hfi1_ack_entry *e;
1632 unsigned long flags;
1633 u8 i, prev;
1634 int old_req;
1635
1636 trace_hfi1_rc_rcv_error(qp, psn);
1637 if (diff > 0) {
1638 /*
1639 * Packet sequence error.
1640 * A NAK will ACK earlier sends and RDMA writes.
1641 * Don't queue the NAK if we already sent one.
1642 */
1643 if (!qp->r_nak_state) {
1644 ibp->n_rc_seqnak++;
1645 qp->r_nak_state = IB_NAK_PSN_ERROR;
1646 /* Use the expected PSN. */
1647 qp->r_ack_psn = qp->r_psn;
1648 /*
1649 * Wait to send the sequence NAK until all packets
1650 * in the receive queue have been processed.
1651 * Otherwise, we end up propagating congestion.
1652 */
1653 if (list_empty(&qp->rspwait)) {
1654 qp->r_flags |= HFI1_R_RSP_NAK;
1655 atomic_inc(&qp->refcount);
1656 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1657 }
1658 }
1659 goto done;
1660 }
1661
1662 /*
1663 * Handle a duplicate request. Don't re-execute SEND, RDMA
1664 * write or atomic op. Don't NAK errors, just silently drop
1665 * the duplicate request. Note that r_sge, r_len, and
1666 * r_rcv_len may be in use so don't modify them.
1667 *
1668 * We are supposed to ACK the earliest duplicate PSN but we
1669 * can coalesce an outstanding duplicate ACK. We have to
1670 * send the earliest so that RDMA reads can be restarted at
1671 * the requester's expected PSN.
1672 *
1673 * First, find where this duplicate PSN falls within the
1674 * ACKs previously sent.
1675 * old_req is true if there is an older response that is scheduled
1676 * to be sent before sending this one.
1677 */
1678 e = NULL;
1679 old_req = 1;
1680 ibp->n_rc_dupreq++;
1681
1682 spin_lock_irqsave(&qp->s_lock, flags);
1683
1684 for (i = qp->r_head_ack_queue; ; i = prev) {
1685 if (i == qp->s_tail_ack_queue)
1686 old_req = 0;
1687 if (i)
1688 prev = i - 1;
1689 else
1690 prev = HFI1_MAX_RDMA_ATOMIC;
1691 if (prev == qp->r_head_ack_queue) {
1692 e = NULL;
1693 break;
1694 }
1695 e = &qp->s_ack_queue[prev];
1696 if (!e->opcode) {
1697 e = NULL;
1698 break;
1699 }
1700 if (cmp_psn(psn, e->psn) >= 0) {
1701 if (prev == qp->s_tail_ack_queue &&
1702 cmp_psn(psn, e->lpsn) <= 0)
1703 old_req = 0;
1704 break;
1705 }
1706 }
1707 switch (opcode) {
1708 case OP(RDMA_READ_REQUEST): {
1709 struct ib_reth *reth;
1710 u32 offset;
1711 u32 len;
1712
1713 /*
1714 * If we didn't find the RDMA read request in the ack queue,
1715 * we can ignore this request.
1716 */
1717 if (!e || e->opcode != OP(RDMA_READ_REQUEST))
1718 goto unlock_done;
1719 /* RETH comes after BTH */
1720 reth = &ohdr->u.rc.reth;
1721 /*
1722 * Address range must be a subset of the original
1723 * request and start on pmtu boundaries.
1724 * We reuse the old ack_queue slot since the requester
1725 * should not back up and request an earlier PSN for the
1726 * same request.
1727 */
1728 offset = delta_psn(psn, e->psn) * qp->pmtu;
1729 len = be32_to_cpu(reth->length);
1730 if (unlikely(offset + len != e->rdma_sge.sge_length))
1731 goto unlock_done;
1732 if (e->rdma_sge.mr) {
1733 hfi1_put_mr(e->rdma_sge.mr);
1734 e->rdma_sge.mr = NULL;
1735 }
1736 if (len != 0) {
1737 u32 rkey = be32_to_cpu(reth->rkey);
1738 u64 vaddr = be64_to_cpu(reth->vaddr);
1739 int ok;
1740
1741 ok = hfi1_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
1742 IB_ACCESS_REMOTE_READ);
1743 if (unlikely(!ok))
1744 goto unlock_done;
1745 } else {
1746 e->rdma_sge.vaddr = NULL;
1747 e->rdma_sge.length = 0;
1748 e->rdma_sge.sge_length = 0;
1749 }
1750 e->psn = psn;
1751 if (old_req)
1752 goto unlock_done;
1753 qp->s_tail_ack_queue = prev;
1754 break;
1755 }
1756
1757 case OP(COMPARE_SWAP):
1758 case OP(FETCH_ADD): {
1759 /*
1760 * If we didn't find the atomic request in the ack queue
1761 * or the send tasklet is already backed up to send an
1762 * earlier entry, we can ignore this request.
1763 */
1764 if (!e || e->opcode != (u8) opcode || old_req)
1765 goto unlock_done;
1766 qp->s_tail_ack_queue = prev;
1767 break;
1768 }
1769
1770 default:
1771 /*
1772 * Ignore this operation if it doesn't request an ACK
1773 * or an earlier RDMA read or atomic is going to be resent.
1774 */
1775 if (!(psn & IB_BTH_REQ_ACK) || old_req)
1776 goto unlock_done;
1777 /*
1778 * Resend the most recent ACK if this request is
1779 * after all the previous RDMA reads and atomics.
1780 */
1781 if (i == qp->r_head_ack_queue) {
1782 spin_unlock_irqrestore(&qp->s_lock, flags);
1783 qp->r_nak_state = 0;
1784 qp->r_ack_psn = qp->r_psn - 1;
1785 goto send_ack;
1786 }
1787
1788 /*
1789 * Resend the RDMA read or atomic op which
1790 * ACKs this duplicate request.
1791 */
1792 qp->s_tail_ack_queue = i;
1793 break;
1794 }
1795 qp->s_ack_state = OP(ACKNOWLEDGE);
1796 qp->s_flags |= HFI1_S_RESP_PENDING;
1797 qp->r_nak_state = 0;
1798 hfi1_schedule_send(qp);
1799
1800 unlock_done:
1801 spin_unlock_irqrestore(&qp->s_lock, flags);
1802 done:
1803 return 1;
1804
1805 send_ack:
1806 return 0;
1807 }
1808
1809 void hfi1_rc_error(struct hfi1_qp *qp, enum ib_wc_status err)
1810 {
1811 unsigned long flags;
1812 int lastwqe;
1813
1814 spin_lock_irqsave(&qp->s_lock, flags);
1815 lastwqe = hfi1_error_qp(qp, err);
1816 spin_unlock_irqrestore(&qp->s_lock, flags);
1817
1818 if (lastwqe) {
1819 struct ib_event ev;
1820
1821 ev.device = qp->ibqp.device;
1822 ev.element.qp = &qp->ibqp;
1823 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
1824 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1825 }
1826 }
1827
1828 static inline void update_ack_queue(struct hfi1_qp *qp, unsigned n)
1829 {
1830 unsigned next;
1831
1832 next = n + 1;
1833 if (next > HFI1_MAX_RDMA_ATOMIC)
1834 next = 0;
1835 qp->s_tail_ack_queue = next;
1836 qp->s_ack_state = OP(ACKNOWLEDGE);
1837 }
1838
1839 static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
1840 u32 lqpn, u32 rqpn, u8 svc_type)
1841 {
1842 struct opa_hfi1_cong_log_event_internal *cc_event;
1843 unsigned long flags;
1844
1845 if (sl >= OPA_MAX_SLS)
1846 return;
1847
1848 spin_lock_irqsave(&ppd->cc_log_lock, flags);
1849
1850 ppd->threshold_cong_event_map[sl/8] |= 1 << (sl % 8);
1851 ppd->threshold_event_counter++;
1852
1853 cc_event = &ppd->cc_events[ppd->cc_log_idx++];
1854 if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
1855 ppd->cc_log_idx = 0;
1856 cc_event->lqpn = lqpn & HFI1_QPN_MASK;
1857 cc_event->rqpn = rqpn & HFI1_QPN_MASK;
1858 cc_event->sl = sl;
1859 cc_event->svc_type = svc_type;
1860 cc_event->rlid = rlid;
1861 /* keep timestamp in units of 1.024 usec */
1862 cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024;
1863
1864 spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
1865 }
1866
1867 void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn,
1868 u32 rqpn, u8 svc_type)
1869 {
1870 struct cca_timer *cca_timer;
1871 u16 ccti, ccti_incr, ccti_timer, ccti_limit;
1872 u8 trigger_threshold;
1873 struct cc_state *cc_state;
1874 unsigned long flags;
1875
1876 if (sl >= OPA_MAX_SLS)
1877 return;
1878
1879 cca_timer = &ppd->cca_timer[sl];
1880
1881 cc_state = get_cc_state(ppd);
1882
1883 if (cc_state == NULL)
1884 return;
1885
1886 /*
1887 * 1) increase CCTI (for this SL)
1888 * 2) select IPG (i.e., call set_link_ipg())
1889 * 3) start timer
1890 */
1891 ccti_limit = cc_state->cct.ccti_limit;
1892 ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
1893 ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
1894 trigger_threshold =
1895 cc_state->cong_setting.entries[sl].trigger_threshold;
1896
1897 spin_lock_irqsave(&ppd->cca_timer_lock, flags);
1898
1899 if (cca_timer->ccti < ccti_limit) {
1900 if (cca_timer->ccti + ccti_incr <= ccti_limit)
1901 cca_timer->ccti += ccti_incr;
1902 else
1903 cca_timer->ccti = ccti_limit;
1904 set_link_ipg(ppd);
1905 }
1906
1907 spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
1908
1909 ccti = cca_timer->ccti;
1910
1911 if (!hrtimer_active(&cca_timer->hrtimer)) {
1912 /* ccti_timer is in units of 1.024 usec */
1913 unsigned long nsec = 1024 * ccti_timer;
1914
1915 hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
1916 HRTIMER_MODE_REL);
1917 }
1918
1919 if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
1920 log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
1921 }
1922
1923 /**
1924 * hfi1_rc_rcv - process an incoming RC packet
1925 * @rcd: the context pointer
1926 * @hdr: the header of this packet
1927 * @rcv_flags: flags relevant to rcv processing
1928 * @data: the packet data
1929 * @tlen: the packet length
1930 * @qp: the QP for this packet
1931 *
1932 * This is called from qp_rcv() to process an incoming RC packet
1933 * for the given QP.
1934 * May be called at interrupt level.
1935 */
1936 void hfi1_rc_rcv(struct hfi1_packet *packet)
1937 {
1938 struct hfi1_ctxtdata *rcd = packet->rcd;
1939 struct hfi1_ib_header *hdr = packet->hdr;
1940 u32 rcv_flags = packet->rcv_flags;
1941 void *data = packet->ebuf;
1942 u32 tlen = packet->tlen;
1943 struct hfi1_qp *qp = packet->qp;
1944 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
1945 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1946 struct hfi1_other_headers *ohdr = packet->ohdr;
1947 u32 bth0, opcode;
1948 u32 hdrsize = packet->hlen;
1949 u32 psn;
1950 u32 pad;
1951 struct ib_wc wc;
1952 u32 pmtu = qp->pmtu;
1953 int diff;
1954 struct ib_reth *reth;
1955 unsigned long flags;
1956 u32 bth1;
1957 int ret, is_fecn = 0;
1958
1959 bth0 = be32_to_cpu(ohdr->bth[0]);
1960 if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0))
1961 return;
1962
1963 bth1 = be32_to_cpu(ohdr->bth[1]);
1964 if (unlikely(bth1 & (HFI1_BECN_SMASK | HFI1_FECN_SMASK))) {
1965 if (bth1 & HFI1_BECN_SMASK) {
1966 u16 rlid = qp->remote_ah_attr.dlid;
1967 u32 lqpn, rqpn;
1968
1969 lqpn = qp->ibqp.qp_num;
1970 rqpn = qp->remote_qpn;
1971 process_becn(
1972 ppd,
1973 qp->remote_ah_attr.sl,
1974 rlid, lqpn, rqpn,
1975 IB_CC_SVCTYPE_RC);
1976 }
1977 is_fecn = bth1 & HFI1_FECN_SMASK;
1978 }
1979
1980 psn = be32_to_cpu(ohdr->bth[2]);
1981 opcode = (bth0 >> 24) & 0xff;
1982
1983 /*
1984 * Process responses (ACKs) before anything else. Note that the
1985 * packet sequence number will be for something in the send work
1986 * queue rather than the expected receive packet sequence number.
1987 * In other words, this QP is the requester.
1988 */
1989 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1990 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1991 rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
1992 hdrsize, pmtu, rcd);
1993 if (is_fecn)
1994 goto send_ack;
1995 return;
1996 }
1997
1998 /* Compute 24 bits worth of difference. */
1999 diff = delta_psn(psn, qp->r_psn);
2000 if (unlikely(diff)) {
2001 if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
2002 return;
2003 goto send_ack;
2004 }
2005
2006 /* Check for opcode sequence errors. */
2007 switch (qp->r_state) {
2008 case OP(SEND_FIRST):
2009 case OP(SEND_MIDDLE):
2010 if (opcode == OP(SEND_MIDDLE) ||
2011 opcode == OP(SEND_LAST) ||
2012 opcode == OP(SEND_LAST_WITH_IMMEDIATE))
2013 break;
2014 goto nack_inv;
2015
2016 case OP(RDMA_WRITE_FIRST):
2017 case OP(RDMA_WRITE_MIDDLE):
2018 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
2019 opcode == OP(RDMA_WRITE_LAST) ||
2020 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2021 break;
2022 goto nack_inv;
2023
2024 default:
2025 if (opcode == OP(SEND_MIDDLE) ||
2026 opcode == OP(SEND_LAST) ||
2027 opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
2028 opcode == OP(RDMA_WRITE_MIDDLE) ||
2029 opcode == OP(RDMA_WRITE_LAST) ||
2030 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2031 goto nack_inv;
2032 /*
2033 * Note that it is up to the requester to not send a new
2034 * RDMA read or atomic operation before receiving an ACK
2035 * for the previous operation.
2036 */
2037 break;
2038 }
2039
2040 if (qp->state == IB_QPS_RTR && !(qp->r_flags & HFI1_R_COMM_EST))
2041 qp_comm_est(qp);
2042
2043 /* OK, process the packet. */
2044 switch (opcode) {
2045 case OP(SEND_FIRST):
2046 ret = hfi1_get_rwqe(qp, 0);
2047 if (ret < 0)
2048 goto nack_op_err;
2049 if (!ret)
2050 goto rnr_nak;
2051 qp->r_rcv_len = 0;
2052 /* FALLTHROUGH */
2053 case OP(SEND_MIDDLE):
2054 case OP(RDMA_WRITE_MIDDLE):
2055 send_middle:
2056 /* Check for invalid length PMTU or posted rwqe len. */
2057 if (unlikely(tlen != (hdrsize + pmtu + 4)))
2058 goto nack_inv;
2059 qp->r_rcv_len += pmtu;
2060 if (unlikely(qp->r_rcv_len > qp->r_len))
2061 goto nack_inv;
2062 hfi1_copy_sge(&qp->r_sge, data, pmtu, 1);
2063 break;
2064
2065 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
2066 /* consume RWQE */
2067 ret = hfi1_get_rwqe(qp, 1);
2068 if (ret < 0)
2069 goto nack_op_err;
2070 if (!ret)
2071 goto rnr_nak;
2072 goto send_last_imm;
2073
2074 case OP(SEND_ONLY):
2075 case OP(SEND_ONLY_WITH_IMMEDIATE):
2076 ret = hfi1_get_rwqe(qp, 0);
2077 if (ret < 0)
2078 goto nack_op_err;
2079 if (!ret)
2080 goto rnr_nak;
2081 qp->r_rcv_len = 0;
2082 if (opcode == OP(SEND_ONLY))
2083 goto no_immediate_data;
2084 /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
2085 case OP(SEND_LAST_WITH_IMMEDIATE):
2086 send_last_imm:
2087 wc.ex.imm_data = ohdr->u.imm_data;
2088 wc.wc_flags = IB_WC_WITH_IMM;
2089 goto send_last;
2090 case OP(SEND_LAST):
2091 case OP(RDMA_WRITE_LAST):
2092 no_immediate_data:
2093 wc.wc_flags = 0;
2094 wc.ex.imm_data = 0;
2095 send_last:
2096 /* Get the number of bytes the message was padded by. */
2097 pad = (bth0 >> 20) & 3;
2098 /* Check for invalid length. */
2099 /* LAST len should be >= 1 */
2100 if (unlikely(tlen < (hdrsize + pad + 4)))
2101 goto nack_inv;
2102 /* Don't count the CRC. */
2103 tlen -= (hdrsize + pad + 4);
2104 wc.byte_len = tlen + qp->r_rcv_len;
2105 if (unlikely(wc.byte_len > qp->r_len))
2106 goto nack_inv;
2107 hfi1_copy_sge(&qp->r_sge, data, tlen, 1);
2108 hfi1_put_ss(&qp->r_sge);
2109 qp->r_msn++;
2110 if (!test_and_clear_bit(HFI1_R_WRID_VALID, &qp->r_aflags))
2111 break;
2112 wc.wr_id = qp->r_wr_id;
2113 wc.status = IB_WC_SUCCESS;
2114 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2115 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2116 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2117 else
2118 wc.opcode = IB_WC_RECV;
2119 wc.qp = &qp->ibqp;
2120 wc.src_qp = qp->remote_qpn;
2121 wc.slid = qp->remote_ah_attr.dlid;
2122 /*
2123 * It seems that IB mandates the presence of an SL in a
2124 * work completion only for the UD transport (see section
2125 * 11.4.2 of IBTA Vol. 1).
2126 *
2127 * However, the way the SL is chosen below is consistent
2128 * with the way that IB/qib works and is trying avoid
2129 * introducing incompatibilities.
2130 *
2131 * See also OPA Vol. 1, section 9.7.6, and table 9-17.
2132 */
2133 wc.sl = qp->remote_ah_attr.sl;
2134 /* zero fields that are N/A */
2135 wc.vendor_err = 0;
2136 wc.pkey_index = 0;
2137 wc.dlid_path_bits = 0;
2138 wc.port_num = 0;
2139 /* Signal completion event if the solicited bit is set. */
2140 hfi1_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
2141 (bth0 & IB_BTH_SOLICITED) != 0);
2142 break;
2143
2144 case OP(RDMA_WRITE_FIRST):
2145 case OP(RDMA_WRITE_ONLY):
2146 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2147 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2148 goto nack_inv;
2149 /* consume RWQE */
2150 reth = &ohdr->u.rc.reth;
2151 qp->r_len = be32_to_cpu(reth->length);
2152 qp->r_rcv_len = 0;
2153 qp->r_sge.sg_list = NULL;
2154 if (qp->r_len != 0) {
2155 u32 rkey = be32_to_cpu(reth->rkey);
2156 u64 vaddr = be64_to_cpu(reth->vaddr);
2157 int ok;
2158
2159 /* Check rkey & NAK */
2160 ok = hfi1_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2161 rkey, IB_ACCESS_REMOTE_WRITE);
2162 if (unlikely(!ok))
2163 goto nack_acc;
2164 qp->r_sge.num_sge = 1;
2165 } else {
2166 qp->r_sge.num_sge = 0;
2167 qp->r_sge.sge.mr = NULL;
2168 qp->r_sge.sge.vaddr = NULL;
2169 qp->r_sge.sge.length = 0;
2170 qp->r_sge.sge.sge_length = 0;
2171 }
2172 if (opcode == OP(RDMA_WRITE_FIRST))
2173 goto send_middle;
2174 else if (opcode == OP(RDMA_WRITE_ONLY))
2175 goto no_immediate_data;
2176 ret = hfi1_get_rwqe(qp, 1);
2177 if (ret < 0)
2178 goto nack_op_err;
2179 if (!ret)
2180 goto rnr_nak;
2181 wc.ex.imm_data = ohdr->u.rc.imm_data;
2182 wc.wc_flags = IB_WC_WITH_IMM;
2183 goto send_last;
2184
2185 case OP(RDMA_READ_REQUEST): {
2186 struct hfi1_ack_entry *e;
2187 u32 len;
2188 u8 next;
2189
2190 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
2191 goto nack_inv;
2192 next = qp->r_head_ack_queue + 1;
2193 /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
2194 if (next > HFI1_MAX_RDMA_ATOMIC)
2195 next = 0;
2196 spin_lock_irqsave(&qp->s_lock, flags);
2197 if (unlikely(next == qp->s_tail_ack_queue)) {
2198 if (!qp->s_ack_queue[next].sent)
2199 goto nack_inv_unlck;
2200 update_ack_queue(qp, next);
2201 }
2202 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2203 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2204 hfi1_put_mr(e->rdma_sge.mr);
2205 e->rdma_sge.mr = NULL;
2206 }
2207 reth = &ohdr->u.rc.reth;
2208 len = be32_to_cpu(reth->length);
2209 if (len) {
2210 u32 rkey = be32_to_cpu(reth->rkey);
2211 u64 vaddr = be64_to_cpu(reth->vaddr);
2212 int ok;
2213
2214 /* Check rkey & NAK */
2215 ok = hfi1_rkey_ok(qp, &e->rdma_sge, len, vaddr,
2216 rkey, IB_ACCESS_REMOTE_READ);
2217 if (unlikely(!ok))
2218 goto nack_acc_unlck;
2219 /*
2220 * Update the next expected PSN. We add 1 later
2221 * below, so only add the remainder here.
2222 */
2223 if (len > pmtu)
2224 qp->r_psn += (len - 1) / pmtu;
2225 } else {
2226 e->rdma_sge.mr = NULL;
2227 e->rdma_sge.vaddr = NULL;
2228 e->rdma_sge.length = 0;
2229 e->rdma_sge.sge_length = 0;
2230 }
2231 e->opcode = opcode;
2232 e->sent = 0;
2233 e->psn = psn;
2234 e->lpsn = qp->r_psn;
2235 /*
2236 * We need to increment the MSN here instead of when we
2237 * finish sending the result since a duplicate request would
2238 * increment it more than once.
2239 */
2240 qp->r_msn++;
2241 qp->r_psn++;
2242 qp->r_state = opcode;
2243 qp->r_nak_state = 0;
2244 qp->r_head_ack_queue = next;
2245
2246 /* Schedule the send tasklet. */
2247 qp->s_flags |= HFI1_S_RESP_PENDING;
2248 hfi1_schedule_send(qp);
2249
2250 spin_unlock_irqrestore(&qp->s_lock, flags);
2251 if (is_fecn)
2252 goto send_ack;
2253 return;
2254 }
2255
2256 case OP(COMPARE_SWAP):
2257 case OP(FETCH_ADD): {
2258 struct ib_atomic_eth *ateth;
2259 struct hfi1_ack_entry *e;
2260 u64 vaddr;
2261 atomic64_t *maddr;
2262 u64 sdata;
2263 u32 rkey;
2264 u8 next;
2265
2266 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
2267 goto nack_inv;
2268 next = qp->r_head_ack_queue + 1;
2269 if (next > HFI1_MAX_RDMA_ATOMIC)
2270 next = 0;
2271 spin_lock_irqsave(&qp->s_lock, flags);
2272 if (unlikely(next == qp->s_tail_ack_queue)) {
2273 if (!qp->s_ack_queue[next].sent)
2274 goto nack_inv_unlck;
2275 update_ack_queue(qp, next);
2276 }
2277 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2278 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2279 hfi1_put_mr(e->rdma_sge.mr);
2280 e->rdma_sge.mr = NULL;
2281 }
2282 ateth = &ohdr->u.atomic_eth;
2283 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
2284 be32_to_cpu(ateth->vaddr[1]);
2285 if (unlikely(vaddr & (sizeof(u64) - 1)))
2286 goto nack_inv_unlck;
2287 rkey = be32_to_cpu(ateth->rkey);
2288 /* Check rkey & NAK */
2289 if (unlikely(!hfi1_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
2290 vaddr, rkey,
2291 IB_ACCESS_REMOTE_ATOMIC)))
2292 goto nack_acc_unlck;
2293 /* Perform atomic OP and save result. */
2294 maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
2295 sdata = be64_to_cpu(ateth->swap_data);
2296 e->atomic_data = (opcode == OP(FETCH_ADD)) ?
2297 (u64) atomic64_add_return(sdata, maddr) - sdata :
2298 (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
2299 be64_to_cpu(ateth->compare_data),
2300 sdata);
2301 hfi1_put_mr(qp->r_sge.sge.mr);
2302 qp->r_sge.num_sge = 0;
2303 e->opcode = opcode;
2304 e->sent = 0;
2305 e->psn = psn;
2306 e->lpsn = psn;
2307 qp->r_msn++;
2308 qp->r_psn++;
2309 qp->r_state = opcode;
2310 qp->r_nak_state = 0;
2311 qp->r_head_ack_queue = next;
2312
2313 /* Schedule the send tasklet. */
2314 qp->s_flags |= HFI1_S_RESP_PENDING;
2315 hfi1_schedule_send(qp);
2316
2317 spin_unlock_irqrestore(&qp->s_lock, flags);
2318 if (is_fecn)
2319 goto send_ack;
2320 return;
2321 }
2322
2323 default:
2324 /* NAK unknown opcodes. */
2325 goto nack_inv;
2326 }
2327 qp->r_psn++;
2328 qp->r_state = opcode;
2329 qp->r_ack_psn = psn;
2330 qp->r_nak_state = 0;
2331 /* Send an ACK if requested or required. */
2332 if (psn & (1 << 31))
2333 goto send_ack;
2334 return;
2335
2336 rnr_nak:
2337 qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
2338 qp->r_ack_psn = qp->r_psn;
2339 /* Queue RNR NAK for later */
2340 if (list_empty(&qp->rspwait)) {
2341 qp->r_flags |= HFI1_R_RSP_NAK;
2342 atomic_inc(&qp->refcount);
2343 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2344 }
2345 return;
2346
2347 nack_op_err:
2348 hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2349 qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
2350 qp->r_ack_psn = qp->r_psn;
2351 /* Queue NAK for later */
2352 if (list_empty(&qp->rspwait)) {
2353 qp->r_flags |= HFI1_R_RSP_NAK;
2354 atomic_inc(&qp->refcount);
2355 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2356 }
2357 return;
2358
2359 nack_inv_unlck:
2360 spin_unlock_irqrestore(&qp->s_lock, flags);
2361 nack_inv:
2362 hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2363 qp->r_nak_state = IB_NAK_INVALID_REQUEST;
2364 qp->r_ack_psn = qp->r_psn;
2365 /* Queue NAK for later */
2366 if (list_empty(&qp->rspwait)) {
2367 qp->r_flags |= HFI1_R_RSP_NAK;
2368 atomic_inc(&qp->refcount);
2369 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2370 }
2371 return;
2372
2373 nack_acc_unlck:
2374 spin_unlock_irqrestore(&qp->s_lock, flags);
2375 nack_acc:
2376 hfi1_rc_error(qp, IB_WC_LOC_PROT_ERR);
2377 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
2378 qp->r_ack_psn = qp->r_psn;
2379 send_ack:
2380 hfi1_send_rc_ack(rcd, qp, is_fecn);
2381 }
2382
2383 void hfi1_rc_hdrerr(
2384 struct hfi1_ctxtdata *rcd,
2385 struct hfi1_ib_header *hdr,
2386 u32 rcv_flags,
2387 struct hfi1_qp *qp)
2388 {
2389 int has_grh = rcv_flags & HFI1_HAS_GRH;
2390 struct hfi1_other_headers *ohdr;
2391 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
2392 int diff;
2393 u32 opcode;
2394 u32 psn, bth0;
2395
2396 /* Check for GRH */
2397 ohdr = &hdr->u.oth;
2398 if (has_grh)
2399 ohdr = &hdr->u.l.oth;
2400
2401 bth0 = be32_to_cpu(ohdr->bth[0]);
2402 if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
2403 return;
2404
2405 psn = be32_to_cpu(ohdr->bth[2]);
2406 opcode = (bth0 >> 24) & 0xff;
2407
2408 /* Only deal with RDMA Writes for now */
2409 if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
2410 diff = delta_psn(psn, qp->r_psn);
2411 if (!qp->r_nak_state && diff >= 0) {
2412 ibp->n_rc_seqnak++;
2413 qp->r_nak_state = IB_NAK_PSN_ERROR;
2414 /* Use the expected PSN. */
2415 qp->r_ack_psn = qp->r_psn;
2416 /*
2417 * Wait to send the sequence
2418 * NAK until all packets
2419 * in the receive queue have
2420 * been processed.
2421 * Otherwise, we end up
2422 * propagating congestion.
2423 */
2424 if (list_empty(&qp->rspwait)) {
2425 qp->r_flags |= HFI1_R_RSP_NAK;
2426 atomic_inc(&qp->refcount);
2427 list_add_tail(
2428 &qp->rspwait,
2429 &rcd->qp_wait_list);
2430 }
2431 } /* Out of sequence NAK */
2432 } /* QP Request NAKs */
2433 }