drivers/staging/rdma/ipath/ipath_common.h

   1 /*
   2  * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef _IPATH_COMMON_H
  35 #define _IPATH_COMMON_H
  36
  37 /*
  38  * This file contains defines, structures, etc. that are used
  39  * to communicate between kernel and user code.
  40  */
  41
  42
  43 /* This is the IEEE-assigned OUI for QLogic Inc. InfiniPath */
  44 #define IPATH_SRC_OUI_1 0x00
  45 #define IPATH_SRC_OUI_2 0x11
  46 #define IPATH_SRC_OUI_3 0x75
  47
  48 /* version of protocol header (known to chip also). In the long run,
  49  * we should be able to generate and accept a range of version numbers;
  50  * for now we only accept one, and it's compiled in.
  51  */
  52 #define IPS_PROTO_VERSION 2
  53
  54 /*
  55  * These are compile time constants that you may want to enable or disable
  56  * if you are trying to debug problems with code or performance.
  57  * IPATH_VERBOSE_TRACING define as 1 if you want additional tracing in
  58  * fastpath code
  59  * IPATH_TRACE_REGWRITES define as 1 if you want register writes to be
  60  * traced in faspath code
  61  * _IPATH_TRACING define as 0 if you want to remove all tracing in a
  62  * compilation unit
  63  * _IPATH_DEBUGGING define as 0 if you want to remove debug prints
  64  */
  65
  66 /*
  67  * The value in the BTH QP field that InfiniPath uses to differentiate
  68  * an infinipath protocol IB packet vs standard IB transport
  69  */
  70 #define IPATH_KD_QP 0x656b79
  71
  72 /*
  73  * valid states passed to ipath_set_linkstate() user call
  74  */
  75 #define IPATH_IB_LINKDOWN               0
  76 #define IPATH_IB_LINKARM                1
  77 #define IPATH_IB_LINKACTIVE             2
  78 #define IPATH_IB_LINKDOWN_ONLY          3
  79 #define IPATH_IB_LINKDOWN_SLEEP         4
  80 #define IPATH_IB_LINKDOWN_DISABLE       5
  81 #define IPATH_IB_LINK_LOOPBACK  6 /* enable local loopback */
  82 #define IPATH_IB_LINK_EXTERNAL  7 /* normal, disable local loopback */
  83 #define IPATH_IB_LINK_NO_HRTBT  8 /* disable Heartbeat, e.g. for loopback */
  84 #define IPATH_IB_LINK_HRTBT     9 /* enable heartbeat, normal, non-loopback */
  85
  86 /*
  87  * These 3 values (SDR and DDR may be ORed for auto-speed
  88  * negotiation) are used for the 3rd argument to path_f_set_ib_cfg
  89  * with cmd IPATH_IB_CFG_SPD_ENB, by direct calls or via sysfs.  They
  90  * are also the the possible values for ipath_link_speed_enabled and active
  91  * The values were chosen to match values used within the IB spec.
  92  */
  93 #define IPATH_IB_SDR 1
  94 #define IPATH_IB_DDR 2
  95
  96 /*
  97  * stats maintained by the driver.  For now, at least, this is global
  98  * to all minor devices.
  99  */
 100 struct infinipath_stats {
 101         /* number of interrupts taken */
 102         __u64 sps_ints;
 103         /* number of interrupts for errors */
 104         __u64 sps_errints;
 105         /* number of errors from chip (not incl. packet errors or CRC) */
 106         __u64 sps_errs;
 107         /* number of packet errors from chip other than CRC */
 108         __u64 sps_pkterrs;
 109         /* number of packets with CRC errors (ICRC and VCRC) */
 110         __u64 sps_crcerrs;
 111         /* number of hardware errors reported (parity, etc.) */
 112         __u64 sps_hwerrs;
 113         /* number of times IB link changed state unexpectedly */
 114         __u64 sps_iblink;
 115         __u64 sps_unused; /* was fastrcvint, no longer implemented */
 116         /* number of kernel (port0) packets received */
 117         __u64 sps_port0pkts;
 118         /* number of "ethernet" packets sent by driver */
 119         __u64 sps_ether_spkts;
 120         /* number of "ethernet" packets received by driver */
 121         __u64 sps_ether_rpkts;
 122         /* number of SMA packets sent by driver. Obsolete. */
 123         __u64 sps_sma_spkts;
 124         /* number of SMA packets received by driver. Obsolete. */
 125         __u64 sps_sma_rpkts;
 126         /* number of times all ports rcvhdrq was full and packet dropped */
 127         __u64 sps_hdrqfull;
 128         /* number of times all ports egrtid was full and packet dropped */
 129         __u64 sps_etidfull;
 130         /*
 131          * number of times we tried to send from driver, but no pio buffers
 132          * avail
 133          */
 134         __u64 sps_nopiobufs;
 135         /* number of ports currently open */
 136         __u64 sps_ports;
 137         /* list of pkeys (other than default) accepted (0 means not set) */
 138         __u16 sps_pkeys[4];
 139         __u16 sps_unused16[4]; /* available; maintaining compatible layout */
 140         /* number of user ports per chip (not IB ports) */
 141         __u32 sps_nports;
 142         /* not our interrupt, or already handled */
 143         __u32 sps_nullintr;
 144         /* max number of packets handled per receive call */
 145         __u32 sps_maxpkts_call;
 146         /* avg number of packets handled per receive call */
 147         __u32 sps_avgpkts_call;
 148         /* total number of pages locked */
 149         __u64 sps_pagelocks;
 150         /* total number of pages unlocked */
 151         __u64 sps_pageunlocks;
 152         /*
 153          * Number of packets dropped in kernel other than errors (ether
 154          * packets if ipath not configured, etc.)
 155          */
 156         __u64 sps_krdrops;
 157         __u64 sps_txeparity; /* PIO buffer parity error, recovered */
 158         /* pad for future growth */
 159         __u64 __sps_pad[45];
 160 };
 161
 162 /*
 163  * These are the status bits readable (in ascii form, 64bit value)
 164  * from the "status" sysfs file.
 165  */
 166 #define IPATH_STATUS_INITTED       0x1  /* basic initialization done */
 167 #define IPATH_STATUS_DISABLED      0x2  /* hardware disabled */
 168 /* Device has been disabled via admin request */
 169 #define IPATH_STATUS_ADMIN_DISABLED    0x4
 170 /* Chip has been found and initted */
 171 #define IPATH_STATUS_CHIP_PRESENT 0x20
 172 /* IB link is at ACTIVE, usable for data traffic */
 173 #define IPATH_STATUS_IB_READY     0x40
 174 /* link is configured, LID, MTU, etc. have been set */
 175 #define IPATH_STATUS_IB_CONF      0x80
 176 /* no link established, probably no cable */
 177 #define IPATH_STATUS_IB_NOCABLE  0x100
 178 /* A Fatal hardware error has occurred. */
 179 #define IPATH_STATUS_HWERROR     0x200
 180
 181 /*
 182  * The list of usermode accessible registers.  Also see Reg_* later in file.
 183  */
 184 typedef enum _ipath_ureg {
 185         /* (RO)  DMA RcvHdr to be used next. */
 186         ur_rcvhdrtail = 0,
 187         /* (RW)  RcvHdr entry to be processed next by host. */
 188         ur_rcvhdrhead = 1,
 189         /* (RO)  Index of next Eager index to use. */
 190         ur_rcvegrindextail = 2,
 191         /* (RW)  Eager TID to be processed next */
 192         ur_rcvegrindexhead = 3,
 193         /* For internal use only; max register number. */
 194         _IPATH_UregMax
 195 } ipath_ureg;
 196
 197 /* bit values for spi_runtime_flags */
 198 #define IPATH_RUNTIME_HT        0x1
 199 #define IPATH_RUNTIME_PCIE      0x2
 200 #define IPATH_RUNTIME_FORCE_WC_ORDER    0x4
 201 #define IPATH_RUNTIME_RCVHDR_COPY       0x8
 202 #define IPATH_RUNTIME_MASTER    0x10
 203 #define IPATH_RUNTIME_NODMA_RTAIL 0x80
 204 #define IPATH_RUNTIME_SDMA            0x200
 205 #define IPATH_RUNTIME_FORCE_PIOAVAIL 0x400
 206 #define IPATH_RUNTIME_PIO_REGSWAPPED 0x800
 207
 208 /*
 209  * This structure is returned by ipath_userinit() immediately after
 210  * open to get implementation-specific info, and info specific to this
 211  * instance.
 212  *
 213  * This struct must have explict pad fields where type sizes
 214  * may result in different alignments between 32 and 64 bit
 215  * programs, since the 64 bit * bit kernel requires the user code
 216  * to have matching offsets
 217  */
 218 struct ipath_base_info {
 219         /* version of hardware, for feature checking. */
 220         __u32 spi_hw_version;
 221         /* version of software, for feature checking. */
 222         __u32 spi_sw_version;
 223         /* InfiniPath port assigned, goes into sent packets */
 224         __u16 spi_port;
 225         __u16 spi_subport;
 226         /*
 227          * IB MTU, packets IB data must be less than this.
 228          * The MTU is in bytes, and will be a multiple of 4 bytes.
 229          */
 230         __u32 spi_mtu;
 231         /*
 232          * Size of a PIO buffer.  Any given packet's total size must be less
 233          * than this (in words).  Included is the starting control word, so
 234          * if 513 is returned, then total pkt size is 512 words or less.
 235          */
 236         __u32 spi_piosize;
 237         /* size of the TID cache in infinipath, in entries */
 238         __u32 spi_tidcnt;
 239         /* size of the TID Eager list in infinipath, in entries */
 240         __u32 spi_tidegrcnt;
 241         /* size of a single receive header queue entry in words. */
 242         __u32 spi_rcvhdrent_size;
 243         /*
 244          * Count of receive header queue entries allocated.
 245          * This may be less than the spu_rcvhdrcnt passed in!.
 246          */
 247         __u32 spi_rcvhdr_cnt;
 248
 249         /* per-chip and other runtime features bitmap (IPATH_RUNTIME_*) */
 250         __u32 spi_runtime_flags;
 251
 252         /* address where receive buffer queue is mapped into */
 253         __u64 spi_rcvhdr_base;
 254
 255         /* user program. */
 256
 257         /* base address of eager TID receive buffers. */
 258         __u64 spi_rcv_egrbufs;
 259
 260         /* Allocated by initialization code, not by protocol. */
 261
 262         /*
 263          * Size of each TID buffer in host memory, starting at
 264          * spi_rcv_egrbufs.  The buffers are virtually contiguous.
 265          */
 266         __u32 spi_rcv_egrbufsize;
 267         /*
 268          * The special QP (queue pair) value that identifies an infinipath
 269          * protocol packet from standard IB packets.  More, probably much
 270          * more, to be added.
 271          */
 272         __u32 spi_qpair;
 273
 274         /*
 275          * User register base for init code, not to be used directly by
 276          * protocol or applications.
 277          */
 278         __u64 __spi_uregbase;
 279         /*
 280          * Maximum buffer size in bytes that can be used in a single TID
 281          * entry (assuming the buffer is aligned to this boundary).  This is
 282          * the minimum of what the hardware and software support Guaranteed
 283          * to be a power of 2.
 284          */
 285         __u32 spi_tid_maxsize;
 286         /*
 287          * alignment of each pio send buffer (byte count
 288          * to add to spi_piobufbase to get to second buffer)
 289          */
 290         __u32 spi_pioalign;
 291         /*
 292          * The index of the first pio buffer available to this process;
 293          * needed to do lookup in spi_pioavailaddr; not added to
 294          * spi_piobufbase.
 295          */
 296         __u32 spi_pioindex;
 297          /* number of buffers mapped for this process */
 298         __u32 spi_piocnt;
 299
 300         /*
 301          * Base address of writeonly pio buffers for this process.
 302          * Each buffer has spi_piosize words, and is aligned on spi_pioalign
 303          * boundaries.  spi_piocnt buffers are mapped from this address
 304          */
 305         __u64 spi_piobufbase;
 306
 307         /*
 308          * Base address of readonly memory copy of the pioavail registers.
 309          * There are 2 bits for each buffer.
 310          */
 311         __u64 spi_pioavailaddr;
 312
 313         /*
 314          * Address where driver updates a copy of the interface and driver
 315          * status (IPATH_STATUS_*) as a 64 bit value.  It's followed by a
 316          * string indicating hardware error, if there was one.
 317          */
 318         __u64 spi_status;
 319
 320         /* number of chip ports available to user processes */
 321         __u32 spi_nports;
 322         /* unit number of chip we are using */
 323         __u32 spi_unit;
 324         /* num bufs in each contiguous set */
 325         __u32 spi_rcv_egrperchunk;
 326         /* size in bytes of each contiguous set */
 327         __u32 spi_rcv_egrchunksize;
 328         /* total size of mmap to cover full rcvegrbuffers */
 329         __u32 spi_rcv_egrbuftotlen;
 330         __u32 spi_filler_for_align;
 331         /* address of readonly memory copy of the rcvhdrq tail register. */
 332         __u64 spi_rcvhdr_tailaddr;
 333
 334         /* shared memory pages for subports if port is shared */
 335         __u64 spi_subport_uregbase;
 336         __u64 spi_subport_rcvegrbuf;
 337         __u64 spi_subport_rcvhdr_base;
 338
 339         /* shared memory page for hardware port if it is shared */
 340         __u64 spi_port_uregbase;
 341         __u64 spi_port_rcvegrbuf;
 342         __u64 spi_port_rcvhdr_base;
 343         __u64 spi_port_rcvhdr_tailaddr;
 344
 345 } __attribute__ ((aligned(8)));
 346
 347
 348 /*
 349  * This version number is given to the driver by the user code during
 350  * initialization in the spu_userversion field of ipath_user_info, so
 351  * the driver can check for compatibility with user code.
 352  *
 353  * The major version changes when data structures
 354  * change in an incompatible way.  The driver must be the same or higher
 355  * for initialization to succeed.  In some cases, a higher version
 356  * driver will not interoperate with older software, and initialization
 357  * will return an error.
 358  */
 359 #define IPATH_USER_SWMAJOR 1
 360
 361 /*
 362  * Minor version differences are always compatible
 363  * a within a major version, however if user software is larger
 364  * than driver software, some new features and/or structure fields
 365  * may not be implemented; the user code must deal with this if it
 366  * cares, or it must abort after initialization reports the difference.
 367  */
 368 #define IPATH_USER_SWMINOR 6
 369
 370 #define IPATH_USER_SWVERSION ((IPATH_USER_SWMAJOR<<16) | IPATH_USER_SWMINOR)
 371
 372 #define IPATH_KERN_TYPE 0
 373
 374 /*
 375  * Similarly, this is the kernel version going back to the user.  It's
 376  * slightly different, in that we want to tell if the driver was built as
 377  * part of a QLogic release, or from the driver from openfabrics.org,
 378  * kernel.org, or a standard distribution, for support reasons.
 379  * The high bit is 0 for non-QLogic and 1 for QLogic-built/supplied.
 380  *
 381  * It's returned by the driver to the user code during initialization in the
 382  * spi_sw_version field of ipath_base_info, so the user code can in turn
 383  * check for compatibility with the kernel.
 384 */
 385 #define IPATH_KERN_SWVERSION ((IPATH_KERN_TYPE<<31) | IPATH_USER_SWVERSION)
 386
 387 /*
 388  * This structure is passed to ipath_userinit() to tell the driver where
 389  * user code buffers are, sizes, etc.   The offsets and sizes of the
 390  * fields must remain unchanged, for binary compatibility.  It can
 391  * be extended, if userversion is changed so user code can tell, if needed
 392  */
 393 struct ipath_user_info {
 394         /*
 395          * version of user software, to detect compatibility issues.
 396          * Should be set to IPATH_USER_SWVERSION.
 397          */
 398         __u32 spu_userversion;
 399
 400         /* desired number of receive header queue entries */
 401         __u32 spu_rcvhdrcnt;
 402
 403         /* size of struct base_info to write to */
 404         __u32 spu_base_info_size;
 405
 406         /*
 407          * number of words in KD protocol header
 408          * This tells InfiniPath how many words to copy to rcvhdrq.  If 0,
 409          * kernel uses a default.  Once set, attempts to set any other value
 410          * are an error (EAGAIN) until driver is reloaded.
 411          */
 412         __u32 spu_rcvhdrsize;
 413
 414         /*
 415          * If two or more processes wish to share a port, each process
 416          * must set the spu_subport_cnt and spu_subport_id to the same
 417          * values.  The only restriction on the spu_subport_id is that
 418          * it be unique for a given node.
 419          */
 420         __u16 spu_subport_cnt;
 421         __u16 spu_subport_id;
 422
 423         __u32 spu_unused; /* kept for compatible layout */
 424
 425         /*
 426          * address of struct base_info to write to
 427          */
 428         __u64 spu_base_info;
 429
 430 } __attribute__ ((aligned(8)));
 431
 432 /* User commands. */
 433
 434 #define IPATH_CMD_MIN           16
 435
 436 #define __IPATH_CMD_USER_INIT   16      /* old set up userspace (for old user code) */
 437 #define IPATH_CMD_PORT_INFO     17      /* find out what resources we got */
 438 #define IPATH_CMD_RECV_CTRL     18      /* control receipt of packets */
 439 #define IPATH_CMD_TID_UPDATE    19      /* update expected TID entries */
 440 #define IPATH_CMD_TID_FREE      20      /* free expected TID entries */
 441 #define IPATH_CMD_SET_PART_KEY  21      /* add partition key */
 442 #define __IPATH_CMD_SLAVE_INFO  22      /* return info on slave processes (for old user code) */
 443 #define IPATH_CMD_ASSIGN_PORT   23      /* allocate HCA and port */
 444 #define IPATH_CMD_USER_INIT     24      /* set up userspace */
 445 #define IPATH_CMD_UNUSED_1      25
 446 #define IPATH_CMD_UNUSED_2      26
 447 #define IPATH_CMD_PIOAVAILUPD   27      /* force an update of PIOAvail reg */
 448 #define IPATH_CMD_POLL_TYPE     28      /* set the kind of polling we want */
 449 #define IPATH_CMD_ARMLAUNCH_CTRL        29 /* armlaunch detection control */
 450 /* 30 is unused */
 451 #define IPATH_CMD_SDMA_INFLIGHT 31      /* sdma inflight counter request */
 452 #define IPATH_CMD_SDMA_COMPLETE 32      /* sdma completion counter request */
 453
 454 /*
 455  * Poll types
 456  */
 457 #define IPATH_POLL_TYPE_URGENT   0x01
 458 #define IPATH_POLL_TYPE_OVERFLOW 0x02
 459
 460 struct ipath_port_info {
 461         __u32 num_active;       /* number of active units */
 462         __u32 unit;             /* unit (chip) assigned to caller */
 463         __u16 port;             /* port on unit assigned to caller */
 464         __u16 subport;          /* subport on unit assigned to caller */
 465         __u16 num_ports;        /* number of ports available on unit */
 466         __u16 num_subports;     /* number of subports opened on port */
 467 };
 468
 469 struct ipath_tid_info {
 470         __u32 tidcnt;
 471         /* make structure same size in 32 and 64 bit */
 472         __u32 tid__unused;
 473         /* virtual address of first page in transfer */
 474         __u64 tidvaddr;
 475         /* pointer (same size 32/64 bit) to __u16 tid array */
 476         __u64 tidlist;
 477
 478         /*
 479          * pointer (same size 32/64 bit) to bitmap of TIDs used
 480          * for this call; checked for being large enough at open
 481          */
 482         __u64 tidmap;
 483 };
 484
 485 struct ipath_cmd {
 486         __u32 type;                     /* command type */
 487         union {
 488                 struct ipath_tid_info tid_info;
 489                 struct ipath_user_info user_info;
 490
 491                 /*
 492                  * address in userspace where we should put the sdma
 493                  * inflight counter
 494                  */
 495                 __u64 sdma_inflight;
 496                 /*
 497                  * address in userspace where we should put the sdma
 498                  * completion counter
 499                  */
 500                 __u64 sdma_complete;
 501                 /* address in userspace of struct ipath_port_info to
 502                    write result to */
 503                 __u64 port_info;
 504                 /* enable/disable receipt of packets */
 505                 __u32 recv_ctrl;
 506                 /* enable/disable armlaunch errors (non-zero to enable) */
 507                 __u32 armlaunch_ctrl;
 508                 /* partition key to set */
 509                 __u16 part_key;
 510                 /* user address of __u32 bitmask of active slaves */
 511                 __u64 slave_mask_addr;
 512                 /* type of polling we want */
 513                 __u16 poll_type;
 514         } cmd;
 515 };
 516
 517 struct ipath_iovec {
 518         /* Pointer to data, but same size 32 and 64 bit */
 519         __u64 iov_base;
 520
 521         /*
 522          * Length of data; don't need 64 bits, but want
 523          * ipath_sendpkt to remain same size as before 32 bit changes, so...
 524          */
 525         __u64 iov_len;
 526 };
 527
 528 /*
 529  * Describes a single packet for send.  Each packet can have one or more
 530  * buffers, but the total length (exclusive of IB headers) must be less
 531  * than the MTU, and if using the PIO method, entire packet length,
 532  * including IB headers, must be less than the ipath_piosize value (words).
 533  * Use of this necessitates including sys/uio.h
 534  */
 535 struct __ipath_sendpkt {
 536         __u32 sps_flags;        /* flags for packet (TBD) */
 537         __u32 sps_cnt;          /* number of entries to use in sps_iov */
 538         /* array of iov's describing packet. TEMPORARY */
 539         struct ipath_iovec sps_iov[4];
 540 };
 541
 542 /*
 543  * diagnostics can send a packet by "writing" one of the following
 544  * two structs to diag data special file
 545  * The first is the legacy version for backward compatibility
 546  */
 547 struct ipath_diag_pkt {
 548         __u32 unit;
 549         __u64 data;
 550         __u32 len;
 551 };
 552
 553 /* The second diag_pkt struct is the expanded version that allows
 554  * more control over the packet, specifically, by allowing a custom
 555  * pbc (+ static rate) qword, so that special modes and deliberate
 556  * changes to CRCs can be used. The elements were also re-ordered
 557  * for better alignment and to avoid padding issues.
 558  */
 559 struct ipath_diag_xpkt {
 560         __u64 data;
 561         __u64 pbc_wd;
 562         __u32 unit;
 563         __u32 len;
 564 };
 565
 566 /*
 567  * Data layout in I2C flash (for GUID, etc.)
 568  * All fields are little-endian binary unless otherwise stated
 569  */
 570 #define IPATH_FLASH_VERSION 2
 571 struct ipath_flash {
 572         /* flash layout version (IPATH_FLASH_VERSION) */
 573         __u8 if_fversion;
 574         /* checksum protecting if_length bytes */
 575         __u8 if_csum;
 576         /*
 577          * valid length (in use, protected by if_csum), including
 578          * if_fversion and if_csum themselves)
 579          */
 580         __u8 if_length;
 581         /* the GUID, in network order */
 582         __u8 if_guid[8];
 583         /* number of GUIDs to use, starting from if_guid */
 584         __u8 if_numguid;
 585         /* the (last 10 characters of) board serial number, in ASCII */
 586         char if_serial[12];
 587         /* board mfg date (YYYYMMDD ASCII) */
 588         char if_mfgdate[8];
 589         /* last board rework/test date (YYYYMMDD ASCII) */
 590         char if_testdate[8];
 591         /* logging of error counts, TBD */
 592         __u8 if_errcntp[4];
 593         /* powered on hours, updated at driver unload */
 594         __u8 if_powerhour[2];
 595         /* ASCII free-form comment field */
 596         char if_comment[32];
 597         /* Backwards compatible prefix for longer QLogic Serial Numbers */
 598         char if_sprefix[4];
 599         /* 82 bytes used, min flash size is 128 bytes */
 600         __u8 if_future[46];
 601 };
 602
 603 /*
 604  * These are the counters implemented in the chip, and are listed in order.
 605  * The InterCaps naming is taken straight from the chip spec.
 606  */
 607 struct infinipath_counters {
 608         __u64 LBIntCnt;
 609         __u64 LBFlowStallCnt;
 610         __u64 TxSDmaDescCnt;    /* was Reserved1 */
 611         __u64 TxUnsupVLErrCnt;
 612         __u64 TxDataPktCnt;
 613         __u64 TxFlowPktCnt;
 614         __u64 TxDwordCnt;
 615         __u64 TxLenErrCnt;
 616         __u64 TxMaxMinLenErrCnt;
 617         __u64 TxUnderrunCnt;
 618         __u64 TxFlowStallCnt;
 619         __u64 TxDroppedPktCnt;
 620         __u64 RxDroppedPktCnt;
 621         __u64 RxDataPktCnt;
 622         __u64 RxFlowPktCnt;
 623         __u64 RxDwordCnt;
 624         __u64 RxLenErrCnt;
 625         __u64 RxMaxMinLenErrCnt;
 626         __u64 RxICRCErrCnt;
 627         __u64 RxVCRCErrCnt;
 628         __u64 RxFlowCtrlErrCnt;
 629         __u64 RxBadFormatCnt;
 630         __u64 RxLinkProblemCnt;
 631         __u64 RxEBPCnt;
 632         __u64 RxLPCRCErrCnt;
 633         __u64 RxBufOvflCnt;
 634         __u64 RxTIDFullErrCnt;
 635         __u64 RxTIDValidErrCnt;
 636         __u64 RxPKeyMismatchCnt;
 637         __u64 RxP0HdrEgrOvflCnt;
 638         __u64 RxP1HdrEgrOvflCnt;
 639         __u64 RxP2HdrEgrOvflCnt;
 640         __u64 RxP3HdrEgrOvflCnt;
 641         __u64 RxP4HdrEgrOvflCnt;
 642         __u64 RxP5HdrEgrOvflCnt;
 643         __u64 RxP6HdrEgrOvflCnt;
 644         __u64 RxP7HdrEgrOvflCnt;
 645         __u64 RxP8HdrEgrOvflCnt;
 646         __u64 RxP9HdrEgrOvflCnt;        /* was Reserved6 */
 647         __u64 RxP10HdrEgrOvflCnt;       /* was Reserved7 */
 648         __u64 RxP11HdrEgrOvflCnt;       /* new for IBA7220 */
 649         __u64 RxP12HdrEgrOvflCnt;       /* new for IBA7220 */
 650         __u64 RxP13HdrEgrOvflCnt;       /* new for IBA7220 */
 651         __u64 RxP14HdrEgrOvflCnt;       /* new for IBA7220 */
 652         __u64 RxP15HdrEgrOvflCnt;       /* new for IBA7220 */
 653         __u64 RxP16HdrEgrOvflCnt;       /* new for IBA7220 */
 654         __u64 IBStatusChangeCnt;
 655         __u64 IBLinkErrRecoveryCnt;
 656         __u64 IBLinkDownedCnt;
 657         __u64 IBSymbolErrCnt;
 658         /* The following are new for IBA7220 */
 659         __u64 RxVL15DroppedPktCnt;
 660         __u64 RxOtherLocalPhyErrCnt;
 661         __u64 PcieRetryBufDiagQwordCnt;
 662         __u64 ExcessBufferOvflCnt;
 663         __u64 LocalLinkIntegrityErrCnt;
 664         __u64 RxVlErrCnt;
 665         __u64 RxDlidFltrCnt;
 666 };
 667
 668 /*
 669  * The next set of defines are for packet headers, and chip register
 670  * and memory bits that are visible to and/or used by user-mode software
 671  * The other bits that are used only by the driver or diags are in
 672  * ipath_registers.h
 673  */
 674
 675 /* RcvHdrFlags bits */
 676 #define INFINIPATH_RHF_LENGTH_MASK 0x7FF
 677 #define INFINIPATH_RHF_LENGTH_SHIFT 0
 678 #define INFINIPATH_RHF_RCVTYPE_MASK 0x7
 679 #define INFINIPATH_RHF_RCVTYPE_SHIFT 11
 680 #define INFINIPATH_RHF_EGRINDEX_MASK 0xFFF
 681 #define INFINIPATH_RHF_EGRINDEX_SHIFT 16
 682 #define INFINIPATH_RHF_SEQ_MASK 0xF
 683 #define INFINIPATH_RHF_SEQ_SHIFT 0
 684 #define INFINIPATH_RHF_HDRQ_OFFSET_MASK 0x7FF
 685 #define INFINIPATH_RHF_HDRQ_OFFSET_SHIFT 4
 686 #define INFINIPATH_RHF_H_ICRCERR   0x80000000
 687 #define INFINIPATH_RHF_H_VCRCERR   0x40000000
 688 #define INFINIPATH_RHF_H_PARITYERR 0x20000000
 689 #define INFINIPATH_RHF_H_LENERR    0x10000000
 690 #define INFINIPATH_RHF_H_MTUERR    0x08000000
 691 #define INFINIPATH_RHF_H_IHDRERR   0x04000000
 692 #define INFINIPATH_RHF_H_TIDERR    0x02000000
 693 #define INFINIPATH_RHF_H_MKERR     0x01000000
 694 #define INFINIPATH_RHF_H_IBERR     0x00800000
 695 #define INFINIPATH_RHF_H_ERR_MASK  0xFF800000
 696 #define INFINIPATH_RHF_L_USE_EGR   0x80000000
 697 #define INFINIPATH_RHF_L_SWA       0x00008000
 698 #define INFINIPATH_RHF_L_SWB       0x00004000
 699
 700 /* infinipath header fields */
 701 #define INFINIPATH_I_VERS_MASK 0xF
 702 #define INFINIPATH_I_VERS_SHIFT 28
 703 #define INFINIPATH_I_PORT_MASK 0xF
 704 #define INFINIPATH_I_PORT_SHIFT 24
 705 #define INFINIPATH_I_TID_MASK 0x7FF
 706 #define INFINIPATH_I_TID_SHIFT 13
 707 #define INFINIPATH_I_OFFSET_MASK 0x1FFF
 708 #define INFINIPATH_I_OFFSET_SHIFT 0
 709
 710 /* K_PktFlags bits */
 711 #define INFINIPATH_KPF_INTR 0x1
 712 #define INFINIPATH_KPF_SUBPORT_MASK 0x3
 713 #define INFINIPATH_KPF_SUBPORT_SHIFT 1
 714
 715 #define INFINIPATH_MAX_SUBPORT  4
 716
 717 /* SendPIO per-buffer control */
 718 #define INFINIPATH_SP_TEST    0x40
 719 #define INFINIPATH_SP_TESTEBP 0x20
 720 #define INFINIPATH_SP_TRIGGER_SHIFT  15
 721
 722 /* SendPIOAvail bits */
 723 #define INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT 1
 724 #define INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT 0
 725
 726 /* infinipath header format */
 727 struct ipath_header {
 728         /*
 729          * Version - 4 bits, Port - 4 bits, TID - 10 bits and Offset -
 730          * 14 bits before ECO change ~28 Dec 03.  After that, Vers 4,
 731          * Port 4, TID 11, offset 13.
 732          */
 733         __le32 ver_port_tid_offset;
 734         __le16 chksum;
 735         __le16 pkt_flags;
 736 };
 737
 738 /* infinipath user message header format.
 739  * This structure contains the first 4 fields common to all protocols
 740  * that employ infinipath.
 741  */
 742 struct ipath_message_header {
 743         __be16 lrh[4];
 744         __be32 bth[3];
 745         /* fields below this point are in host byte order */
 746         struct ipath_header iph;
 747         __u8 sub_opcode;
 748 };
 749
 750 /* infinipath ethernet header format */
 751 struct ether_header {
 752         __be16 lrh[4];
 753         __be32 bth[3];
 754         struct ipath_header iph;
 755         __u8 sub_opcode;
 756         __u8 cmd;
 757         __be16 lid;
 758         __u16 mac[3];
 759         __u8 frag_num;
 760         __u8 seq_num;
 761         __le32 len;
 762         /* MUST be of word size due to PIO write requirements */
 763         __le32 csum;
 764         __le16 csum_offset;
 765         __le16 flags;
 766         __u16 first_2_bytes;
 767         __u8 unused[2];         /* currently unused */
 768 };
 769
 770
 771 /* IB - LRH header consts */
 772 #define IPATH_LRH_GRH 0x0003    /* 1. word of IB LRH - next header: GRH */
 773 #define IPATH_LRH_BTH 0x0002    /* 1. word of IB LRH - next header: BTH */
 774
 775 /* misc. */
 776 #define SIZE_OF_CRC 1
 777
 778 #define IPATH_DEFAULT_P_KEY 0xFFFF
 779 #define IPATH_PERMISSIVE_LID 0xFFFF
 780 #define IPATH_AETH_CREDIT_SHIFT 24
 781 #define IPATH_AETH_CREDIT_MASK 0x1F
 782 #define IPATH_AETH_CREDIT_INVAL 0x1F
 783 #define IPATH_PSN_MASK 0xFFFFFF
 784 #define IPATH_MSN_MASK 0xFFFFFF
 785 #define IPATH_QPN_MASK 0xFFFFFF
 786 #define IPATH_MULTICAST_LID_BASE 0xC000
 787 #define IPATH_EAGER_TID_ID INFINIPATH_I_TID_MASK
 788 #define IPATH_MULTICAST_QPN 0xFFFFFF
 789
 790 /* Receive Header Queue: receive type (from infinipath) */
 791 #define RCVHQ_RCV_TYPE_EXPECTED  0
 792 #define RCVHQ_RCV_TYPE_EAGER     1
 793 #define RCVHQ_RCV_TYPE_NON_KD    2
 794 #define RCVHQ_RCV_TYPE_ERROR     3
 795
 796
 797 /* sub OpCodes - ith4x  */
 798 #define IPATH_ITH4X_OPCODE_ENCAP 0x81
 799 #define IPATH_ITH4X_OPCODE_LID_ARP 0x82
 800
 801 #define IPATH_HEADER_QUEUE_WORDS 9
 802
 803 /* functions for extracting fields from rcvhdrq entries for the driver.
 804  */
 805 static inline __u32 ipath_hdrget_err_flags(const __le32 * rbuf)
 806 {
 807         return __le32_to_cpu(rbuf[1]) & INFINIPATH_RHF_H_ERR_MASK;
 808 }
 809
 810 static inline __u32 ipath_hdrget_rcv_type(const __le32 * rbuf)
 811 {
 812         return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_RCVTYPE_SHIFT)
 813             & INFINIPATH_RHF_RCVTYPE_MASK;
 814 }
 815
 816 static inline __u32 ipath_hdrget_length_in_bytes(const __le32 * rbuf)
 817 {
 818         return ((__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_LENGTH_SHIFT)
 819                 & INFINIPATH_RHF_LENGTH_MASK) << 2;
 820 }
 821
 822 static inline __u32 ipath_hdrget_index(const __le32 * rbuf)
 823 {
 824         return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_EGRINDEX_SHIFT)
 825             & INFINIPATH_RHF_EGRINDEX_MASK;
 826 }
 827
 828 static inline __u32 ipath_hdrget_seq(const __le32 *rbuf)
 829 {
 830         return (__le32_to_cpu(rbuf[1]) >> INFINIPATH_RHF_SEQ_SHIFT)
 831                 & INFINIPATH_RHF_SEQ_MASK;
 832 }
 833
 834 static inline __u32 ipath_hdrget_offset(const __le32 *rbuf)
 835 {
 836         return (__le32_to_cpu(rbuf[1]) >> INFINIPATH_RHF_HDRQ_OFFSET_SHIFT)
 837                 & INFINIPATH_RHF_HDRQ_OFFSET_MASK;
 838 }
 839
 840 static inline __u32 ipath_hdrget_use_egr_buf(const __le32 *rbuf)
 841 {
 842         return __le32_to_cpu(rbuf[0]) & INFINIPATH_RHF_L_USE_EGR;
 843 }
 844
 845 static inline __u32 ipath_hdrget_ipath_ver(__le32 hdrword)
 846 {
 847         return (__le32_to_cpu(hdrword) >> INFINIPATH_I_VERS_SHIFT)
 848             & INFINIPATH_I_VERS_MASK;
 849 }
 850
 851 #endif                          /* _IPATH_COMMON_H */