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[mirror_ubuntu-zesty-kernel.git] / drivers / staging / rtl8187se / r8180_core.c
1 /*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25
26 Power management interface routines.
27 Written by Mariusz Matuszek.
28 */
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #undef RX_DONT_PASS_UL
33 #undef DUMMY_RX
34
35 #include <linux/slab.h>
36 #include <linux/syscalls.h>
37 #include <linux/eeprom_93cx6.h>
38 #include <linux/interrupt.h>
39 #include <linux/proc_fs.h>
40 #include <linux/seq_file.h>
41
42 #include "r8180_hw.h"
43 #include "r8180.h"
44 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
45 #include "r8180_93cx6.h" /* Card EEPROM */
46 #include "r8180_wx.h"
47 #include "r8180_dm.h"
48
49 #include "ieee80211/dot11d.h"
50
51 static struct pci_device_id rtl8180_pci_id_tbl[] = {
52 {
53 .vendor = PCI_VENDOR_ID_REALTEK,
54 .device = 0x8199,
55 .subvendor = PCI_ANY_ID,
56 .subdevice = PCI_ANY_ID,
57 .driver_data = 0,
58 },
59 {
60 .vendor = 0,
61 .device = 0,
62 .subvendor = 0,
63 .subdevice = 0,
64 .driver_data = 0,
65 }
66 };
67
68 static char ifname[IFNAMSIZ] = "wlan%d";
69 static int hwwep;
70
71 MODULE_LICENSE("GPL");
72 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
73 MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
74 MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
75
76 module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
77 module_param(hwwep, int, S_IRUGO|S_IWUSR);
78
79 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
80
81 static int rtl8180_pci_probe(struct pci_dev *pdev,
82 const struct pci_device_id *id);
83
84 static void rtl8180_pci_remove(struct pci_dev *pdev);
85
86 static void rtl8180_shutdown(struct pci_dev *pdev)
87 {
88 struct net_device *dev = pci_get_drvdata(pdev);
89 if (dev->netdev_ops->ndo_stop)
90 dev->netdev_ops->ndo_stop(dev);
91 pci_disable_device(pdev);
92 }
93
94 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
95 {
96 struct net_device *dev = pci_get_drvdata(pdev);
97
98 if (!netif_running(dev))
99 goto out_pci_suspend;
100
101 if (dev->netdev_ops->ndo_stop)
102 dev->netdev_ops->ndo_stop(dev);
103
104 netif_device_detach(dev);
105
106 out_pci_suspend:
107 pci_save_state(pdev);
108 pci_disable_device(pdev);
109 pci_set_power_state(pdev, pci_choose_state(pdev, state));
110 return 0;
111 }
112
113 static int rtl8180_resume(struct pci_dev *pdev)
114 {
115 struct net_device *dev = pci_get_drvdata(pdev);
116 int err;
117 u32 val;
118
119 pci_set_power_state(pdev, PCI_D0);
120
121 err = pci_enable_device(pdev);
122 if (err) {
123 dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
124
125 return err;
126 }
127
128 pci_restore_state(pdev);
129
130 /*
131 * Suspend/Resume resets the PCI configuration space, so we have to
132 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
133 * from interfering with C3 CPU state. pci_restore_state won't help
134 * here since it only restores the first 64 bytes pci config header.
135 */
136 pci_read_config_dword(pdev, 0x40, &val);
137 if ((val & 0x0000ff00) != 0)
138 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
139
140 if (!netif_running(dev))
141 goto out;
142
143 if (dev->netdev_ops->ndo_open)
144 dev->netdev_ops->ndo_open(dev);
145
146 netif_device_attach(dev);
147 out:
148 return 0;
149 }
150
151 static struct pci_driver rtl8180_pci_driver = {
152 .name = RTL8180_MODULE_NAME,
153 .id_table = rtl8180_pci_id_tbl,
154 .probe = rtl8180_pci_probe,
155 .remove = rtl8180_pci_remove,
156 .suspend = rtl8180_suspend,
157 .resume = rtl8180_resume,
158 .shutdown = rtl8180_shutdown,
159 };
160
161 u8 read_nic_byte(struct net_device *dev, int x)
162 {
163 return 0xff&readb((u8 __iomem *)dev->mem_start + x);
164 }
165
166 u32 read_nic_dword(struct net_device *dev, int x)
167 {
168 return readl((u8 __iomem *)dev->mem_start + x);
169 }
170
171 u16 read_nic_word(struct net_device *dev, int x)
172 {
173 return readw((u8 __iomem *)dev->mem_start + x);
174 }
175
176 void write_nic_byte(struct net_device *dev, int x, u8 y)
177 {
178 writeb(y, (u8 __iomem *)dev->mem_start + x);
179 udelay(20);
180 }
181
182 void write_nic_dword(struct net_device *dev, int x, u32 y)
183 {
184 writel(y, (u8 __iomem *)dev->mem_start + x);
185 udelay(20);
186 }
187
188 void write_nic_word(struct net_device *dev, int x, u16 y)
189 {
190 writew(y, (u8 __iomem *)dev->mem_start + x);
191 udelay(20);
192 }
193
194 inline void force_pci_posting(struct net_device *dev)
195 {
196 read_nic_byte(dev, EPROM_CMD);
197 mb();
198 }
199
200 static irqreturn_t rtl8180_interrupt(int irq, void *netdev);
201 void set_nic_rxring(struct net_device *dev);
202 void set_nic_txring(struct net_device *dev);
203 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
204 void rtl8180_commit(struct net_device *dev);
205 void rtl8180_start_tx_beacon(struct net_device *dev);
206
207 static struct proc_dir_entry *rtl8180_proc;
208
209 static int proc_get_registers(struct seq_file *m, void *v)
210 {
211 struct net_device *dev = m->private;
212 int i, n, max = 0xff;
213
214 /* This dump the current register page */
215 for (n = 0; n <= max;) {
216 seq_printf(m, "\nD: %2x > ", n);
217
218 for (i = 0; i < 16 && n <= max; i++, n++)
219 seq_printf(m, "%2x ", read_nic_byte(dev, n));
220 }
221 seq_putc(m, '\n');
222 return 0;
223 }
224
225 int get_curr_tx_free_desc(struct net_device *dev, int priority);
226
227 static int proc_get_stats_hw(struct seq_file *m, void *v)
228 {
229 return 0;
230 }
231
232 static int proc_get_stats_rx(struct seq_file *m, void *v)
233 {
234 struct net_device *dev = m->private;
235 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
236
237 seq_printf(m,
238 "RX OK: %lu\n"
239 "RX Retry: %lu\n"
240 "RX CRC Error(0-500): %lu\n"
241 "RX CRC Error(500-1000): %lu\n"
242 "RX CRC Error(>1000): %lu\n"
243 "RX ICV Error: %lu\n",
244 priv->stats.rxint,
245 priv->stats.rxerr,
246 priv->stats.rxcrcerrmin,
247 priv->stats.rxcrcerrmid,
248 priv->stats.rxcrcerrmax,
249 priv->stats.rxicverr
250 );
251
252 return 0;
253 }
254
255 static int proc_get_stats_tx(struct seq_file *m, void *v)
256 {
257 struct net_device *dev = m->private;
258 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
259 unsigned long totalOK;
260
261 totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
262 seq_printf(m,
263 "TX OK: %lu\n"
264 "TX Error: %lu\n"
265 "TX Retry: %lu\n"
266 "TX beacon OK: %lu\n"
267 "TX beacon error: %lu\n",
268 totalOK,
269 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
270 priv->stats.txretry,
271 priv->stats.txbeacon,
272 priv->stats.txbeaconerr
273 );
274
275 return 0;
276 }
277
278 static void rtl8180_proc_module_init(void)
279 {
280 DMESG("Initializing proc filesystem");
281 rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
282 }
283
284 static void rtl8180_proc_module_remove(void)
285 {
286 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
287 }
288
289 static void rtl8180_proc_remove_one(struct net_device *dev)
290 {
291 remove_proc_subtree(dev->name, rtl8180_proc);
292 }
293
294 /*
295 * seq_file wrappers for procfile show routines.
296 */
297 static int rtl8180_proc_open(struct inode *inode, struct file *file)
298 {
299 struct net_device *dev = proc_get_parent_data(inode);
300 int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
301
302 return single_open(file, show, dev);
303 }
304
305 static const struct file_operations rtl8180_proc_fops = {
306 .open = rtl8180_proc_open,
307 .read = seq_read,
308 .llseek = seq_lseek,
309 .release = single_release,
310 };
311
312 /*
313 * Table of proc files we need to create.
314 */
315 struct rtl8180_proc_file {
316 char name[12];
317 int (*show)(struct seq_file *, void *);
318 };
319
320 static const struct rtl8180_proc_file rtl8180_proc_files[] = {
321 { "stats-hw", &proc_get_stats_hw },
322 { "stats-rx", &proc_get_stats_rx },
323 { "stats-tx", &proc_get_stats_tx },
324 { "registers", &proc_get_registers },
325 { "" }
326 };
327
328 static void rtl8180_proc_init_one(struct net_device *dev)
329 {
330 const struct rtl8180_proc_file *f;
331 struct proc_dir_entry *dir;
332
333 dir = proc_mkdir_data(dev->name, 0, rtl8180_proc, dev);
334 if (!dir) {
335 DMESGE("Unable to initialize /proc/net/r8180/%s\n", dev->name);
336 return;
337 }
338
339 for (f = rtl8180_proc_files; f->name[0]; f++) {
340 if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir,
341 &rtl8180_proc_fops, f->show)) {
342 DMESGE("Unable to initialize /proc/net/r8180/%s/%s\n",
343 dev->name, f->name);
344 return;
345 }
346 }
347 }
348
349 /*
350 FIXME: check if we can use some standard already-existent
351 data type+functions in kernel
352 */
353
354 static short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
355 struct buffer **bufferhead)
356 {
357 struct buffer *tmp;
358
359 if (!*buffer) {
360
361 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
362
363 if (*buffer == NULL) {
364 DMESGE("Failed to kmalloc head of TX/RX struct");
365 return -1;
366 }
367 (*buffer)->next = *buffer;
368 (*buffer)->buf = buf;
369 (*buffer)->dma = dma;
370 if (bufferhead != NULL)
371 (*bufferhead) = (*buffer);
372 return 0;
373 }
374 tmp = *buffer;
375
376 while (tmp->next != (*buffer))
377 tmp = tmp->next;
378 tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
379 if (tmp->next == NULL) {
380 DMESGE("Failed to kmalloc TX/RX struct");
381 return -1;
382 }
383 tmp->next->buf = buf;
384 tmp->next->dma = dma;
385 tmp->next->next = *buffer;
386
387 return 0;
388 }
389
390 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
391 {
392
393 struct buffer *tmp, *next;
394 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
395 struct pci_dev *pdev = priv->pdev;
396
397 if (!*buffer)
398 return;
399
400 tmp = *buffer;
401
402 do {
403 next = tmp->next;
404 if (consistent) {
405 pci_free_consistent(pdev, len,
406 tmp->buf, tmp->dma);
407 } else {
408 pci_unmap_single(pdev, tmp->dma,
409 len, PCI_DMA_FROMDEVICE);
410 kfree(tmp->buf);
411 }
412 kfree(tmp);
413 tmp = next;
414 } while (next != *buffer);
415
416 *buffer = NULL;
417 }
418
419 int get_curr_tx_free_desc(struct net_device *dev, int priority)
420 {
421 struct r8180_priv *priv = ieee80211_priv(dev);
422 u32 *tail;
423 u32 *head;
424 int ret;
425
426 switch (priority) {
427 case MANAGE_PRIORITY:
428 head = priv->txmapringhead;
429 tail = priv->txmapringtail;
430 break;
431 case BK_PRIORITY:
432 head = priv->txbkpringhead;
433 tail = priv->txbkpringtail;
434 break;
435 case BE_PRIORITY:
436 head = priv->txbepringhead;
437 tail = priv->txbepringtail;
438 break;
439 case VI_PRIORITY:
440 head = priv->txvipringhead;
441 tail = priv->txvipringtail;
442 break;
443 case VO_PRIORITY:
444 head = priv->txvopringhead;
445 tail = priv->txvopringtail;
446 break;
447 case HI_PRIORITY:
448 head = priv->txhpringhead;
449 tail = priv->txhpringtail;
450 break;
451 default:
452 return -1;
453 }
454
455 if (head <= tail)
456 ret = priv->txringcount - (tail - head)/8;
457 else
458 ret = (head - tail)/8;
459
460 if (ret > priv->txringcount)
461 DMESG("BUG");
462
463 return ret;
464 }
465
466 static short check_nic_enought_desc(struct net_device *dev, int priority)
467 {
468 struct r8180_priv *priv = ieee80211_priv(dev);
469 struct ieee80211_device *ieee = netdev_priv(dev);
470 int requiredbyte, required;
471
472 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
473
474 if (ieee->current_network.QoS_Enable)
475 requiredbyte += 2;
476
477 required = requiredbyte / (priv->txbuffsize-4);
478
479 if (requiredbyte % priv->txbuffsize)
480 required++;
481
482 /* for now we keep two free descriptor as a safety boundary
483 * between the tail and the head
484 */
485
486 return (required+2 < get_curr_tx_free_desc(dev, priority));
487 }
488
489 void fix_tx_fifo(struct net_device *dev)
490 {
491 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
492 u32 *tmp;
493 int i;
494
495 for (tmp = priv->txmapring, i = 0;
496 i < priv->txringcount;
497 tmp += 8, i++) {
498 *tmp = *tmp & ~(1<<31);
499 }
500
501 for (tmp = priv->txbkpring, i = 0;
502 i < priv->txringcount;
503 tmp += 8, i++) {
504 *tmp = *tmp & ~(1<<31);
505 }
506
507 for (tmp = priv->txbepring, i = 0;
508 i < priv->txringcount;
509 tmp += 8, i++) {
510 *tmp = *tmp & ~(1<<31);
511 }
512 for (tmp = priv->txvipring, i = 0;
513 i < priv->txringcount;
514 tmp += 8, i++) {
515 *tmp = *tmp & ~(1<<31);
516 }
517
518 for (tmp = priv->txvopring, i = 0;
519 i < priv->txringcount;
520 tmp += 8, i++) {
521 *tmp = *tmp & ~(1<<31);
522 }
523
524 for (tmp = priv->txhpring, i = 0;
525 i < priv->txringcount;
526 tmp += 8, i++) {
527 *tmp = *tmp & ~(1<<31);
528 }
529
530 for (tmp = priv->txbeaconring, i = 0;
531 i < priv->txbeaconcount;
532 tmp += 8, i++) {
533 *tmp = *tmp & ~(1<<31);
534 }
535
536 priv->txmapringtail = priv->txmapring;
537 priv->txmapringhead = priv->txmapring;
538 priv->txmapbufstail = priv->txmapbufs;
539
540 priv->txbkpringtail = priv->txbkpring;
541 priv->txbkpringhead = priv->txbkpring;
542 priv->txbkpbufstail = priv->txbkpbufs;
543
544 priv->txbepringtail = priv->txbepring;
545 priv->txbepringhead = priv->txbepring;
546 priv->txbepbufstail = priv->txbepbufs;
547
548 priv->txvipringtail = priv->txvipring;
549 priv->txvipringhead = priv->txvipring;
550 priv->txvipbufstail = priv->txvipbufs;
551
552 priv->txvopringtail = priv->txvopring;
553 priv->txvopringhead = priv->txvopring;
554 priv->txvopbufstail = priv->txvopbufs;
555
556 priv->txhpringtail = priv->txhpring;
557 priv->txhpringhead = priv->txhpring;
558 priv->txhpbufstail = priv->txhpbufs;
559
560 priv->txbeaconringtail = priv->txbeaconring;
561 priv->txbeaconbufstail = priv->txbeaconbufs;
562 set_nic_txring(dev);
563
564 ieee80211_reset_queue(priv->ieee80211);
565 priv->ack_tx_to_ieee = 0;
566 }
567
568 void fix_rx_fifo(struct net_device *dev)
569 {
570 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
571 u32 *tmp;
572 struct buffer *rxbuf;
573 u8 rx_desc_size;
574
575 rx_desc_size = 8; /* 4*8 = 32 bytes */
576
577 for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
578 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
579 tmp += rx_desc_size, rxbuf = rxbuf->next) {
580 *(tmp+2) = rxbuf->dma;
581 *tmp = *tmp & ~0xfff;
582 *tmp = *tmp | priv->rxbuffersize;
583 *tmp |= (1<<31);
584 }
585
586 priv->rxringtail = priv->rxring;
587 priv->rxbuffer = priv->rxbufferhead;
588 priv->rx_skb_complete = 1;
589 set_nic_rxring(dev);
590 }
591
592 static void rtl8180_irq_disable(struct net_device *dev)
593 {
594 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
595
596 write_nic_dword(dev, IMR, 0);
597 force_pci_posting(dev);
598 priv->irq_enabled = 0;
599 }
600
601 void rtl8180_set_mode(struct net_device *dev, int mode)
602 {
603 u8 ecmd;
604
605 ecmd = read_nic_byte(dev, EPROM_CMD);
606 ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
607 ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
608 ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
609 ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
610 write_nic_byte(dev, EPROM_CMD, ecmd);
611 }
612
613 void rtl8180_beacon_tx_enable(struct net_device *dev);
614
615 void rtl8180_update_msr(struct net_device *dev)
616 {
617 struct r8180_priv *priv = ieee80211_priv(dev);
618 u8 msr;
619 u32 rxconf;
620
621 msr = read_nic_byte(dev, MSR);
622 msr &= ~MSR_LINK_MASK;
623
624 rxconf = read_nic_dword(dev, RX_CONF);
625
626 if (priv->ieee80211->state == IEEE80211_LINKED) {
627 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
628 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
629 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
630 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
631 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
632 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
633 else
634 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
635 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
636
637 } else {
638 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
639 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
640 }
641
642 write_nic_byte(dev, MSR, msr);
643 write_nic_dword(dev, RX_CONF, rxconf);
644 }
645
646 void rtl8180_set_chan(struct net_device *dev, short ch)
647 {
648 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
649
650 if ((ch > 14) || (ch < 1)) {
651 printk("In %s: Invalid chnanel %d\n", __func__, ch);
652 return;
653 }
654
655 priv->chan = ch;
656 priv->rf_set_chan(dev, priv->chan);
657 }
658
659 void set_nic_txring(struct net_device *dev)
660 {
661 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
662
663 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
664 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
665 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
666 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
667 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
668 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
669 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
670 }
671
672 void rtl8180_beacon_tx_enable(struct net_device *dev)
673 {
674 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
675
676 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
677 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
678 write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
679 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
680 }
681
682 void rtl8180_beacon_tx_disable(struct net_device *dev)
683 {
684 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
685
686 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
687 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
688 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
689 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
690
691 }
692
693 void rtl8180_rtx_disable(struct net_device *dev)
694 {
695 u8 cmd;
696 struct r8180_priv *priv = ieee80211_priv(dev);
697
698 cmd = read_nic_byte(dev, CMD);
699 write_nic_byte(dev, CMD, cmd &
700 ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
701 force_pci_posting(dev);
702 mdelay(10);
703
704 if (!priv->rx_skb_complete)
705 dev_kfree_skb_any(priv->rx_skb);
706 }
707
708 static short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
709 int addr)
710 {
711 int i;
712 u32 *desc;
713 u32 *tmp;
714 dma_addr_t dma_desc, dma_tmp;
715 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
716 struct pci_dev *pdev = priv->pdev;
717 void *buf;
718
719 if ((bufsize & 0xfff) != bufsize) {
720 DMESGE("TX buffer allocation too large");
721 return 0;
722 }
723 desc = (u32 *)pci_alloc_consistent(pdev,
724 sizeof(u32)*8*count+256, &dma_desc);
725 if (desc == NULL)
726 return -1;
727
728 if (dma_desc & 0xff)
729 /*
730 * descriptor's buffer must be 256 byte aligned
731 * we shouldn't be here, since we set DMA mask !
732 */
733 WARN(1, "DMA buffer is not aligned\n");
734
735 tmp = desc;
736
737 for (i = 0; i < count; i++) {
738 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
739 if (buf == NULL)
740 return -ENOMEM;
741
742 switch (addr) {
743 case TX_MANAGEPRIORITY_RING_ADDR:
744 if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
745 DMESGE("Unable to allocate mem for buffer NP");
746 return -ENOMEM;
747 }
748 break;
749 case TX_BKPRIORITY_RING_ADDR:
750 if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
751 DMESGE("Unable to allocate mem for buffer LP");
752 return -ENOMEM;
753 }
754 break;
755 case TX_BEPRIORITY_RING_ADDR:
756 if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
757 DMESGE("Unable to allocate mem for buffer NP");
758 return -ENOMEM;
759 }
760 break;
761 case TX_VIPRIORITY_RING_ADDR:
762 if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
763 DMESGE("Unable to allocate mem for buffer LP");
764 return -ENOMEM;
765 }
766 break;
767 case TX_VOPRIORITY_RING_ADDR:
768 if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
769 DMESGE("Unable to allocate mem for buffer NP");
770 return -ENOMEM;
771 }
772 break;
773 case TX_HIGHPRIORITY_RING_ADDR:
774 if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
775 DMESGE("Unable to allocate mem for buffer HP");
776 return -ENOMEM;
777 }
778 break;
779 case TX_BEACON_RING_ADDR:
780 if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
781 DMESGE("Unable to allocate mem for buffer BP");
782 return -ENOMEM;
783 }
784 break;
785 }
786 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
787 *(tmp+2) = (u32)dma_tmp;
788 *(tmp+3) = bufsize;
789
790 if (i+1 < count)
791 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
792 else
793 *(tmp+4) = (u32)dma_desc;
794
795 tmp = tmp+8;
796 }
797
798 switch (addr) {
799 case TX_MANAGEPRIORITY_RING_ADDR:
800 priv->txmapringdma = dma_desc;
801 priv->txmapring = desc;
802 break;
803 case TX_BKPRIORITY_RING_ADDR:
804 priv->txbkpringdma = dma_desc;
805 priv->txbkpring = desc;
806 break;
807 case TX_BEPRIORITY_RING_ADDR:
808 priv->txbepringdma = dma_desc;
809 priv->txbepring = desc;
810 break;
811 case TX_VIPRIORITY_RING_ADDR:
812 priv->txvipringdma = dma_desc;
813 priv->txvipring = desc;
814 break;
815 case TX_VOPRIORITY_RING_ADDR:
816 priv->txvopringdma = dma_desc;
817 priv->txvopring = desc;
818 break;
819 case TX_HIGHPRIORITY_RING_ADDR:
820 priv->txhpringdma = dma_desc;
821 priv->txhpring = desc;
822 break;
823 case TX_BEACON_RING_ADDR:
824 priv->txbeaconringdma = dma_desc;
825 priv->txbeaconring = desc;
826 break;
827
828 }
829
830 return 0;
831 }
832
833 static void free_tx_desc_rings(struct net_device *dev)
834 {
835 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
836 struct pci_dev *pdev = priv->pdev;
837 int count = priv->txringcount;
838
839 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
840 priv->txmapring, priv->txmapringdma);
841 buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
842
843 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
844 priv->txbkpring, priv->txbkpringdma);
845 buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
846
847 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
848 priv->txbepring, priv->txbepringdma);
849 buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
850
851 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
852 priv->txvipring, priv->txvipringdma);
853 buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
854
855 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
856 priv->txvopring, priv->txvopringdma);
857 buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
858
859 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
860 priv->txhpring, priv->txhpringdma);
861 buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
862
863 count = priv->txbeaconcount;
864 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
865 priv->txbeaconring, priv->txbeaconringdma);
866 buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
867 }
868
869 static void free_rx_desc_ring(struct net_device *dev)
870 {
871 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
872 struct pci_dev *pdev = priv->pdev;
873 int count = priv->rxringcount;
874
875 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
876 priv->rxring, priv->rxringdma);
877
878 buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
879 }
880
881 static short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
882 {
883 int i;
884 u32 *desc;
885 u32 *tmp;
886 dma_addr_t dma_desc, dma_tmp;
887 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
888 struct pci_dev *pdev = priv->pdev;
889 void *buf;
890 u8 rx_desc_size;
891
892 rx_desc_size = 8; /* 4*8 = 32 bytes */
893
894 if ((bufsize & 0xfff) != bufsize) {
895 DMESGE("RX buffer allocation too large");
896 return -1;
897 }
898
899 desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
900 &dma_desc);
901
902 if (dma_desc & 0xff)
903 /*
904 * descriptor's buffer must be 256 byte aligned
905 * should never happen since we specify the DMA mask
906 */
907 WARN(1, "DMA buffer is not aligned\n");
908
909 priv->rxring = desc;
910 priv->rxringdma = dma_desc;
911 tmp = desc;
912
913 for (i = 0; i < count; i++) {
914 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
915 if (buf == NULL) {
916 DMESGE("Failed to kmalloc RX buffer");
917 return -1;
918 }
919
920 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
921 PCI_DMA_FROMDEVICE);
922 if (pci_dma_mapping_error(pdev, dma_tmp))
923 return -1;
924 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
925 &(priv->rxbufferhead))) {
926 DMESGE("Unable to allocate mem RX buf");
927 return -1;
928 }
929 *tmp = 0; /* zero pads the header of the descriptor */
930 *tmp = *tmp | (bufsize&0xfff);
931 *(tmp+2) = (u32)dma_tmp;
932 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
933
934 tmp = tmp+rx_desc_size;
935 }
936
937 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
938
939 return 0;
940 }
941
942
943 void set_nic_rxring(struct net_device *dev)
944 {
945 u8 pgreg;
946 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
947
948 pgreg = read_nic_byte(dev, PGSELECT);
949 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
950
951 write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
952 }
953
954 void rtl8180_reset(struct net_device *dev)
955 {
956 u8 cr;
957
958 rtl8180_irq_disable(dev);
959
960 cr = read_nic_byte(dev, CMD);
961 cr = cr & 2;
962 cr = cr | (1<<CMD_RST_SHIFT);
963 write_nic_byte(dev, CMD, cr);
964
965 force_pci_posting(dev);
966
967 mdelay(200);
968
969 if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
970 DMESGW("Card reset timeout!");
971 else
972 DMESG("Card successfully reset");
973
974 rtl8180_set_mode(dev, EPROM_CMD_LOAD);
975 force_pci_posting(dev);
976 mdelay(200);
977 }
978
979 inline u16 ieeerate2rtlrate(int rate)
980 {
981 switch (rate) {
982 case 10:
983 return 0;
984 case 20:
985 return 1;
986 case 55:
987 return 2;
988 case 110:
989 return 3;
990 case 60:
991 return 4;
992 case 90:
993 return 5;
994 case 120:
995 return 6;
996 case 180:
997 return 7;
998 case 240:
999 return 8;
1000 case 360:
1001 return 9;
1002 case 480:
1003 return 10;
1004 case 540:
1005 return 11;
1006 default:
1007 return 3;
1008 }
1009 }
1010
1011 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1012
1013 inline u16 rtl8180_rate2rate(short rate)
1014 {
1015 if (rate > 12)
1016 return 10;
1017 return rtl_rate[rate];
1018 }
1019
1020 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1021 {
1022 if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1023 return 1;
1024 else
1025 return 0;
1026 }
1027
1028 u16 N_DBPSOfRate(u16 DataRate);
1029
1030 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1031 u8 bShortPreamble)
1032 {
1033 u16 FrameTime;
1034 u16 N_DBPS;
1035 u16 Ceiling;
1036
1037 if (rtl8180_IsWirelessBMode(DataRate)) {
1038 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1039 /* long preamble */
1040 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1041 else
1042 /* short preamble */
1043 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1044
1045 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1046 FrameTime++;
1047 } else { /* 802.11g DSSS-OFDM PLCP length field calculation. */
1048 N_DBPS = N_DBPSOfRate(DataRate);
1049 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1050 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1051 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1052 }
1053 return FrameTime;
1054 }
1055
1056 u16 N_DBPSOfRate(u16 DataRate)
1057 {
1058 u16 N_DBPS = 24;
1059
1060 switch (DataRate) {
1061 case 60:
1062 N_DBPS = 24;
1063 break;
1064 case 90:
1065 N_DBPS = 36;
1066 break;
1067 case 120:
1068 N_DBPS = 48;
1069 break;
1070 case 180:
1071 N_DBPS = 72;
1072 break;
1073 case 240:
1074 N_DBPS = 96;
1075 break;
1076 case 360:
1077 N_DBPS = 144;
1078 break;
1079 case 480:
1080 N_DBPS = 192;
1081 break;
1082 case 540:
1083 N_DBPS = 216;
1084 break;
1085 default:
1086 break;
1087 }
1088
1089 return N_DBPS;
1090 }
1091
1092 /*
1093 * For Netgear case, they want good-looking signal strength.
1094 */
1095 static long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1096 {
1097 long RetSS;
1098
1099 /* Step 1. Scale mapping. */
1100 if (CurrSS >= 71 && CurrSS <= 100)
1101 RetSS = 90 + ((CurrSS - 70) / 3);
1102 else if (CurrSS >= 41 && CurrSS <= 70)
1103 RetSS = 78 + ((CurrSS - 40) / 3);
1104 else if (CurrSS >= 31 && CurrSS <= 40)
1105 RetSS = 66 + (CurrSS - 30);
1106 else if (CurrSS >= 21 && CurrSS <= 30)
1107 RetSS = 54 + (CurrSS - 20);
1108 else if (CurrSS >= 5 && CurrSS <= 20)
1109 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1110 else if (CurrSS == 4)
1111 RetSS = 36;
1112 else if (CurrSS == 3)
1113 RetSS = 27;
1114 else if (CurrSS == 2)
1115 RetSS = 18;
1116 else if (CurrSS == 1)
1117 RetSS = 9;
1118 else
1119 RetSS = CurrSS;
1120
1121 /* Step 2. Smoothing. */
1122 if (LastSS > 0)
1123 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1124
1125 return RetSS;
1126 }
1127
1128 /*
1129 * Translate 0-100 signal strength index into dBm.
1130 */
1131 static long TranslateToDbm8185(u8 SignalStrengthIndex)
1132 {
1133 long SignalPower;
1134
1135 /* Translate to dBm (x=0.5y-95). */
1136 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1137 SignalPower -= 95;
1138
1139 return SignalPower;
1140 }
1141
1142 /*
1143 * Perform signal smoothing for dynamic mechanism.
1144 * This is different with PerformSignalSmoothing8185 in smoothing formula.
1145 * No dramatic adjustion is apply because dynamic mechanism need some degree
1146 * of correctness. Ported from 8187B.
1147 */
1148 static void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1149 bool bCckRate)
1150 {
1151 /* Determin the current packet is CCK rate. */
1152 priv->bCurCCKPkt = bCckRate;
1153
1154 if (priv->UndecoratedSmoothedSS >= 0)
1155 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1156 (priv->SignalStrength * 10)) / 6;
1157 else
1158 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1159
1160 priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) +
1161 (priv->RxPower * 11)) / 60;
1162
1163 if (bCckRate)
1164 priv->CurCCKRSSI = priv->RSSI;
1165 else
1166 priv->CurCCKRSSI = 0;
1167 }
1168
1169
1170 /*
1171 * This is rough RX isr handling routine
1172 */
1173 static void rtl8180_rx(struct net_device *dev)
1174 {
1175 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1176 struct sk_buff *tmp_skb;
1177 short first, last;
1178 u32 len;
1179 int lastlen;
1180 unsigned char quality, signal;
1181 u8 rate;
1182 u32 *tmp, *tmp2;
1183 u8 rx_desc_size;
1184 u8 padding;
1185 char rxpower = 0;
1186 u32 RXAGC = 0;
1187 long RxAGC_dBm = 0;
1188 u8 LNA = 0, BB = 0;
1189 u8 LNA_gain[4] = {02, 17, 29, 39};
1190 u8 Antenna = 0;
1191 struct ieee80211_hdr_4addr *hdr;
1192 u16 fc, type;
1193 u8 bHwError = 0, bCRC = 0, bICV = 0;
1194 bool bCckRate = false;
1195 u8 RSSI = 0;
1196 long SignalStrengthIndex = 0;
1197 struct ieee80211_rx_stats stats = {
1198 .signal = 0,
1199 .noise = -98,
1200 .rate = 0,
1201 .freq = IEEE80211_24GHZ_BAND,
1202 };
1203
1204 stats.nic_type = NIC_8185B;
1205 rx_desc_size = 8;
1206
1207 if ((*(priv->rxringtail)) & (1<<31)) {
1208 /* we have got an RX int, but the descriptor
1209 * we are pointing is empty */
1210
1211 priv->stats.rxnodata++;
1212 priv->ieee80211->stats.rx_errors++;
1213
1214 tmp2 = NULL;
1215 tmp = priv->rxringtail;
1216 do {
1217 if (tmp == priv->rxring)
1218 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1219 else
1220 tmp -= rx_desc_size;
1221
1222 if (!(*tmp & (1<<31)))
1223 tmp2 = tmp;
1224 } while (tmp != priv->rxring);
1225
1226 if (tmp2)
1227 priv->rxringtail = tmp2;
1228 }
1229
1230 /* while there are filled descriptors */
1231 while (!(*(priv->rxringtail) & (1<<31))) {
1232 if (*(priv->rxringtail) & (1<<26))
1233 DMESGW("RX buffer overflow");
1234 if (*(priv->rxringtail) & (1<<12))
1235 priv->stats.rxicverr++;
1236
1237 if (*(priv->rxringtail) & (1<<27)) {
1238 priv->stats.rxdmafail++;
1239 /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1240 goto drop;
1241 }
1242
1243 pci_dma_sync_single_for_cpu(priv->pdev,
1244 priv->rxbuffer->dma,
1245 priv->rxbuffersize * sizeof(u8),
1246 PCI_DMA_FROMDEVICE);
1247
1248 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1249 if (first)
1250 priv->rx_prevlen = 0;
1251
1252 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1253 if (last) {
1254 lastlen = ((*priv->rxringtail) & 0xfff);
1255
1256 /* if the last descriptor (that should
1257 * tell us the total packet len) tell
1258 * us something less than the descriptors
1259 * len we had until now, then there is some
1260 * problem..
1261 * workaround to prevent kernel panic
1262 */
1263 if (lastlen < priv->rx_prevlen)
1264 len = 0;
1265 else
1266 len = lastlen-priv->rx_prevlen;
1267
1268 if (*(priv->rxringtail) & (1<<13)) {
1269 if ((*(priv->rxringtail) & 0xfff) < 500)
1270 priv->stats.rxcrcerrmin++;
1271 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1272 priv->stats.rxcrcerrmax++;
1273 else
1274 priv->stats.rxcrcerrmid++;
1275
1276 }
1277
1278 } else {
1279 len = priv->rxbuffersize;
1280 }
1281
1282 if (first && last) {
1283 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1284 } else if (first) {
1285 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1286 if (padding)
1287 len -= 2;
1288 } else {
1289 padding = 0;
1290 }
1291 padding = 0;
1292 priv->rx_prevlen += len;
1293
1294 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1295 /* HW is probably passing several buggy frames
1296 * without FD or LD flag set.
1297 * Throw this garbage away to prevent skb
1298 * memory exhausting
1299 */
1300 if (!priv->rx_skb_complete)
1301 dev_kfree_skb_any(priv->rx_skb);
1302 priv->rx_skb_complete = 1;
1303 }
1304
1305 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1306 signal = (signal & 0xfe) >> 1;
1307
1308 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1309
1310 stats.mac_time[0] = *(priv->rxringtail+1);
1311 stats.mac_time[1] = *(priv->rxringtail+2);
1312 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1313 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1314
1315 rate = ((*(priv->rxringtail)) &
1316 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1317
1318 stats.rate = rtl8180_rate2rate(rate);
1319 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1320 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1321 RxAGC_dBm = rxpower+1; /* bias */
1322 } else { /* CCK rate. */
1323 RxAGC_dBm = signal; /* bit 0 discard */
1324
1325 LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1326 BB = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1327
1328 RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1329
1330 RxAGC_dBm += 4; /* bias */
1331 }
1332
1333 if (RxAGC_dBm & 0x80) /* absolute value */
1334 RXAGC = ~(RxAGC_dBm)+1;
1335 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1336 /* Translate RXAGC into 1-100. */
1337 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1338 if (RXAGC > 90)
1339 RXAGC = 90;
1340 else if (RXAGC < 25)
1341 RXAGC = 25;
1342 RXAGC = (90-RXAGC)*100/65;
1343 } else { /* CCK rate. */
1344 if (RXAGC > 95)
1345 RXAGC = 95;
1346 else if (RXAGC < 30)
1347 RXAGC = 30;
1348 RXAGC = (95-RXAGC)*100/65;
1349 }
1350 priv->SignalStrength = (u8)RXAGC;
1351 priv->RecvSignalPower = RxAGC_dBm;
1352 priv->RxPower = rxpower;
1353 priv->RSSI = RSSI;
1354 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1355 if (quality >= 127)
1356 quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1357 else if (quality < 27)
1358 quality = 100;
1359 else
1360 quality = 127 - quality;
1361 priv->SignalQuality = quality;
1362
1363 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1364 stats.signalstrength = RXAGC;
1365 if (stats.signalstrength > 100)
1366 stats.signalstrength = 100;
1367 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1368 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1369 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1370 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1371 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1372 (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1373 (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1374 (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1375 (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1376 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1377 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1378 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1379 fc = le16_to_cpu(hdr->frame_ctl);
1380 type = WLAN_FC_GET_TYPE(fc);
1381
1382 if (IEEE80211_FTYPE_CTL != type &&
1383 !bHwError && !bCRC && !bICV &&
1384 eqMacAddr(priv->ieee80211->current_network.bssid,
1385 fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1386 fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1387 hdr->addr3)) {
1388
1389 /* Perform signal smoothing for dynamic
1390 * mechanism on demand. This is different
1391 * with PerformSignalSmoothing8185 in smoothing
1392 * fomula. No dramatic adjustion is apply
1393 * because dynamic mechanism need some degree
1394 * of correctness. */
1395 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1396
1397 /* For good-looking singal strength. */
1398 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1399 priv->LastSignalStrengthInPercent,
1400 priv->SignalStrength);
1401
1402 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1403 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1404 /*
1405 * We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
1406 * so we record the correct power here.
1407 */
1408 priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1409 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1410
1411 /* Figure out which antenna that received the last packet. */
1412 priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1413 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1414 }
1415
1416 if (first) {
1417 if (!priv->rx_skb_complete) {
1418 /* seems that HW sometimes fails to receive and
1419 doesn't provide the last descriptor */
1420 dev_kfree_skb_any(priv->rx_skb);
1421 priv->stats.rxnolast++;
1422 }
1423 priv->rx_skb = dev_alloc_skb(len+2);
1424 if (!priv->rx_skb)
1425 goto drop;
1426
1427 priv->rx_skb_complete = 0;
1428 priv->rx_skb->dev = dev;
1429 } else {
1430 /* if we are here we should have already RXed
1431 * the first frame.
1432 * If we get here and the skb is not allocated then
1433 * we have just throw out garbage (skb not allocated)
1434 * and we are still rxing garbage....
1435 */
1436 if (!priv->rx_skb_complete) {
1437
1438 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1439
1440 if (!tmp_skb)
1441 goto drop;
1442
1443 tmp_skb->dev = dev;
1444
1445 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1446 priv->rx_skb->data,
1447 priv->rx_skb->len);
1448
1449 dev_kfree_skb_any(priv->rx_skb);
1450
1451 priv->rx_skb = tmp_skb;
1452 }
1453 }
1454
1455 if (!priv->rx_skb_complete) {
1456 if (padding) {
1457 memcpy(skb_put(priv->rx_skb, len),
1458 (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1459 } else {
1460 memcpy(skb_put(priv->rx_skb, len),
1461 priv->rxbuffer->buf, len);
1462 }
1463 }
1464
1465 if (last && !priv->rx_skb_complete) {
1466 if (priv->rx_skb->len > 4)
1467 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1468 if (!ieee80211_rtl_rx(priv->ieee80211,
1469 priv->rx_skb, &stats))
1470 dev_kfree_skb_any(priv->rx_skb);
1471 priv->rx_skb_complete = 1;
1472 }
1473
1474 pci_dma_sync_single_for_device(priv->pdev,
1475 priv->rxbuffer->dma,
1476 priv->rxbuffersize * sizeof(u8),
1477 PCI_DMA_FROMDEVICE);
1478
1479 drop: /* this is used when we have not enough mem */
1480 /* restore the descriptor */
1481 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1482 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1483 *(priv->rxringtail) =
1484 *(priv->rxringtail) | priv->rxbuffersize;
1485
1486 *(priv->rxringtail) =
1487 *(priv->rxringtail) | (1<<31);
1488
1489 priv->rxringtail += rx_desc_size;
1490 if (priv->rxringtail >=
1491 (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1492 priv->rxringtail = priv->rxring;
1493
1494 priv->rxbuffer = (priv->rxbuffer->next);
1495 }
1496 }
1497
1498
1499 static void rtl8180_dma_kick(struct net_device *dev, int priority)
1500 {
1501 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1502
1503 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1504 write_nic_byte(dev, TX_DMA_POLLING,
1505 (1 << (priority + 1)) | priv->dma_poll_mask);
1506 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1507
1508 force_pci_posting(dev);
1509 }
1510
1511 static void rtl8180_data_hard_stop(struct net_device *dev)
1512 {
1513 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1514
1515 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1516 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1517 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1518 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1519 }
1520
1521 static void rtl8180_data_hard_resume(struct net_device *dev)
1522 {
1523 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1524
1525 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1526 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1527 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1528 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1529 }
1530
1531 /*
1532 * This function TX data frames when the ieee80211 stack requires this.
1533 * It checks also if we need to stop the ieee tx queue, eventually do it
1534 */
1535 static void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev,
1536 int rate)
1537 {
1538 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1539 int mode;
1540 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1541 short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1542 unsigned long flags;
1543 int priority;
1544
1545 mode = priv->ieee80211->iw_mode;
1546
1547 rate = ieeerate2rtlrate(rate);
1548 /*
1549 * This function doesn't require lock because we make
1550 * sure it's called with the tx_lock already acquired.
1551 * this come from the kernel's hard_xmit callback (through
1552 * the ieee stack, or from the try_wake_queue (again through
1553 * the ieee stack.
1554 */
1555 priority = AC2Q(skb->priority);
1556 spin_lock_irqsave(&priv->tx_lock, flags);
1557
1558 if (priv->ieee80211->bHwRadioOff) {
1559 spin_unlock_irqrestore(&priv->tx_lock, flags);
1560
1561 return;
1562 }
1563
1564 if (!check_nic_enought_desc(dev, priority)) {
1565 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1566 get_curr_tx_free_desc(dev, priority));
1567 ieee80211_rtl_stop_queue(priv->ieee80211);
1568 }
1569 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1570 if (!check_nic_enought_desc(dev, priority))
1571 ieee80211_rtl_stop_queue(priv->ieee80211);
1572
1573 spin_unlock_irqrestore(&priv->tx_lock, flags);
1574 }
1575
1576 /*
1577 * This is a rough attempt to TX a frame
1578 * This is called by the ieee 80211 stack to TX management frames.
1579 * If the ring is full packets are dropped (for data frame the queue
1580 * is stopped before this can happen). For this reason it is better
1581 * if the descriptors are larger than the largest management frame
1582 * we intend to TX: i'm unsure what the HW does if it will not find
1583 * the last fragment of a frame because it has been dropped...
1584 * Since queues for Management and Data frames are different we
1585 * might use a different lock than tx_lock (for example mgmt_tx_lock)
1586 */
1587 /* these function may loop if invoked with 0 descriptors or 0 len buffer */
1588 static int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1589 {
1590 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1591 unsigned long flags;
1592 int priority;
1593
1594 priority = MANAGE_PRIORITY;
1595
1596 spin_lock_irqsave(&priv->tx_lock, flags);
1597
1598 if (priv->ieee80211->bHwRadioOff) {
1599 spin_unlock_irqrestore(&priv->tx_lock, flags);
1600 dev_kfree_skb_any(skb);
1601 return NETDEV_TX_OK;
1602 }
1603
1604 rtl8180_tx(dev, skb->data, skb->len, priority,
1605 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1606
1607 priv->ieee80211->stats.tx_bytes += skb->len;
1608 priv->ieee80211->stats.tx_packets++;
1609 spin_unlock_irqrestore(&priv->tx_lock, flags);
1610
1611 dev_kfree_skb_any(skb);
1612 return NETDEV_TX_OK;
1613 }
1614
1615 /* longpre 144+48 shortpre 72+24 */
1616 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1617 {
1618 u16 duration;
1619 u16 drift;
1620 *ext = 0;
1621
1622 switch (rate) {
1623 case 0: /* 1mbps */
1624 *ext = 0;
1625 duration = ((len+4)<<4) / 0x2;
1626 drift = ((len+4)<<4) % 0x2;
1627 if (drift == 0)
1628 break;
1629 duration++;
1630 break;
1631 case 1: /* 2mbps */
1632 *ext = 0;
1633 duration = ((len+4)<<4) / 0x4;
1634 drift = ((len+4)<<4) % 0x4;
1635 if (drift == 0)
1636 break;
1637 duration++;
1638 break;
1639 case 2: /* 5.5mbps */
1640 *ext = 0;
1641 duration = ((len+4)<<4) / 0xb;
1642 drift = ((len+4)<<4) % 0xb;
1643 if (drift == 0)
1644 break;
1645 duration++;
1646 break;
1647 default:
1648 case 3: /* 11mbps */
1649 *ext = 0;
1650 duration = ((len+4)<<4) / 0x16;
1651 drift = ((len+4)<<4) % 0x16;
1652 if (drift == 0)
1653 break;
1654 duration++;
1655 if (drift > 6)
1656 break;
1657 *ext = 1;
1658 break;
1659 }
1660
1661 return duration;
1662 }
1663
1664 static void rtl8180_prepare_beacon(struct net_device *dev)
1665 {
1666 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1667 struct sk_buff *skb;
1668
1669 u16 word = read_nic_word(dev, BcnItv);
1670 word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1671 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1672 write_nic_word(dev, BcnItv, word);
1673
1674 skb = ieee80211_get_beacon(priv->ieee80211);
1675 if (skb) {
1676 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1677 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1678 dev_kfree_skb_any(skb);
1679 }
1680 }
1681
1682 /*
1683 * This function do the real dirty work: it enqueues a TX command
1684 * descriptor in the ring buffer, copyes the frame in a TX buffer
1685 * and kicks the NIC to ensure it does the DMA transfer.
1686 */
1687 short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
1688 short morefrag, short descfrag, int rate)
1689 {
1690 struct r8180_priv *priv = ieee80211_priv(dev);
1691 u32 *tail, *temp_tail;
1692 u32 *begin;
1693 u32 *buf;
1694 int i;
1695 int remain;
1696 int buflen;
1697 int count;
1698 struct buffer *buflist;
1699 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1700 u8 dest[ETH_ALEN];
1701 u8 bUseShortPreamble = 0;
1702 u8 bCTSEnable = 0;
1703 u8 bRTSEnable = 0;
1704 u16 Duration = 0;
1705 u16 RtsDur = 0;
1706 u16 ThisFrameTime = 0;
1707 u16 TxDescDuration = 0;
1708 bool ownbit_flag = false;
1709
1710 switch (priority) {
1711 case MANAGE_PRIORITY:
1712 tail = priv->txmapringtail;
1713 begin = priv->txmapring;
1714 buflist = priv->txmapbufstail;
1715 count = priv->txringcount;
1716 break;
1717 case BK_PRIORITY:
1718 tail = priv->txbkpringtail;
1719 begin = priv->txbkpring;
1720 buflist = priv->txbkpbufstail;
1721 count = priv->txringcount;
1722 break;
1723 case BE_PRIORITY:
1724 tail = priv->txbepringtail;
1725 begin = priv->txbepring;
1726 buflist = priv->txbepbufstail;
1727 count = priv->txringcount;
1728 break;
1729 case VI_PRIORITY:
1730 tail = priv->txvipringtail;
1731 begin = priv->txvipring;
1732 buflist = priv->txvipbufstail;
1733 count = priv->txringcount;
1734 break;
1735 case VO_PRIORITY:
1736 tail = priv->txvopringtail;
1737 begin = priv->txvopring;
1738 buflist = priv->txvopbufstail;
1739 count = priv->txringcount;
1740 break;
1741 case HI_PRIORITY:
1742 tail = priv->txhpringtail;
1743 begin = priv->txhpring;
1744 buflist = priv->txhpbufstail;
1745 count = priv->txringcount;
1746 break;
1747 case BEACON_PRIORITY:
1748 tail = priv->txbeaconringtail;
1749 begin = priv->txbeaconring;
1750 buflist = priv->txbeaconbufstail;
1751 count = priv->txbeaconcount;
1752 break;
1753 default:
1754 return -1;
1755 break;
1756 }
1757
1758 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1759 if (is_multicast_ether_addr(dest)) {
1760 Duration = 0;
1761 RtsDur = 0;
1762 bRTSEnable = 0;
1763 bCTSEnable = 0;
1764
1765 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1766 0, bUseShortPreamble);
1767 TxDescDuration = ThisFrameTime;
1768 } else { /* Unicast packet */
1769 u16 AckTime;
1770
1771 /* YJ,add,080828,for Keep alive */
1772 priv->NumTxUnicast++;
1773
1774 /* Figure out ACK rate according to BSS basic rate
1775 * and Tx rate. */
1776 AckTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
1777
1778 if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
1779 u16 RtsTime, CtsTime;
1780 /* u16 CtsRate; */
1781 bRTSEnable = 1;
1782 bCTSEnable = 0;
1783
1784 /* Rate and time required for RTS. */
1785 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
1786 /* Rate and time required for CTS. */
1787 CtsTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
1788
1789 /* Figure out time required to transmit this frame. */
1790 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1791 rtl8180_rate2rate(rate),
1792 0,
1793 bUseShortPreamble);
1794
1795 /* RTS-CTS-ThisFrame-ACK. */
1796 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
1797
1798 TxDescDuration = RtsTime + RtsDur;
1799 } else { /* Normal case. */
1800 bCTSEnable = 0;
1801 bRTSEnable = 0;
1802 RtsDur = 0;
1803
1804 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1805 0, bUseShortPreamble);
1806 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
1807 }
1808
1809 if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
1810 /* ThisFrame-ACK. */
1811 Duration = aSifsTime + AckTime;
1812 } else { /* One or more fragments remained. */
1813 u16 NextFragTime;
1814 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
1815 rtl8180_rate2rate(rate),
1816 0,
1817 bUseShortPreamble);
1818
1819 /* ThisFrag-ACk-NextFrag-ACK. */
1820 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
1821 }
1822
1823 } /* End of Unicast packet */
1824
1825 frag_hdr->duration_id = Duration;
1826
1827 buflen = priv->txbuffsize;
1828 remain = len;
1829 temp_tail = tail;
1830
1831 while (remain != 0) {
1832 mb();
1833 if (!buflist) {
1834 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
1835 return -1;
1836 }
1837 buf = buflist->buf;
1838
1839 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
1840 DMESGW("No more TX desc, returning %x of %x",
1841 remain, len);
1842 priv->stats.txrdu++;
1843 return remain;
1844 }
1845
1846 *tail = 0; /* zeroes header */
1847 *(tail+1) = 0;
1848 *(tail+3) = 0;
1849 *(tail+5) = 0;
1850 *(tail+6) = 0;
1851 *(tail+7) = 0;
1852
1853 /* FIXME: this should be triggered by HW encryption parameters.*/
1854 *tail |= (1<<15); /* no encrypt */
1855
1856 if (remain == len && !descfrag) {
1857 ownbit_flag = false;
1858 *tail = *tail | (1<<29) ; /* fist segment of the packet */
1859 *tail = *tail | (len);
1860 } else {
1861 ownbit_flag = true;
1862 }
1863
1864 for (i = 0; i < buflen && remain > 0; i++, remain--) {
1865 ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
1866 if (remain == 4 && i+4 >= buflen)
1867 break;
1868 /* ensure the last desc has at least 4 bytes payload */
1869
1870 }
1871 txbuf = txbuf + i;
1872 *(tail+3) = *(tail+3) & ~0xfff;
1873 *(tail+3) = *(tail+3) | i; /* buffer length */
1874 /* Use short preamble or not */
1875 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
1876 if (priv->plcp_preamble_mode == 1 && rate != 0) /* short mode now, not long! */
1877 ; /* *tail |= (1<<16); */ /* enable short preamble mode. */
1878
1879 if (bCTSEnable)
1880 *tail |= (1<<18);
1881
1882 if (bRTSEnable) { /* rts enable */
1883 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
1884 *tail |= (1<<23); /* rts enable */
1885 *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
1886 }
1887 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
1888 /* *(tail+3) |= (0xe6<<16); */
1889 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
1890
1891 *tail = *tail | ((rate&0xf) << 24);
1892
1893 if (morefrag)
1894 *tail = (*tail) | (1<<17); /* more fragment */
1895 if (!remain)
1896 *tail = (*tail) | (1<<28); /* last segment of frame */
1897
1898 *(tail+5) = *(tail+5)|(2<<27);
1899 *(tail+7) = *(tail+7)|(1<<4);
1900
1901 wmb();
1902 if (ownbit_flag)
1903 *tail = *tail | (1<<31); /* descriptor ready to be txed */
1904
1905 if ((tail - begin)/8 == count-1)
1906 tail = begin;
1907 else
1908 tail = tail+8;
1909
1910 buflist = buflist->next;
1911
1912 mb();
1913
1914 switch (priority) {
1915 case MANAGE_PRIORITY:
1916 priv->txmapringtail = tail;
1917 priv->txmapbufstail = buflist;
1918 break;
1919 case BK_PRIORITY:
1920 priv->txbkpringtail = tail;
1921 priv->txbkpbufstail = buflist;
1922 break;
1923 case BE_PRIORITY:
1924 priv->txbepringtail = tail;
1925 priv->txbepbufstail = buflist;
1926 break;
1927 case VI_PRIORITY:
1928 priv->txvipringtail = tail;
1929 priv->txvipbufstail = buflist;
1930 break;
1931 case VO_PRIORITY:
1932 priv->txvopringtail = tail;
1933 priv->txvopbufstail = buflist;
1934 break;
1935 case HI_PRIORITY:
1936 priv->txhpringtail = tail;
1937 priv->txhpbufstail = buflist;
1938 break;
1939 case BEACON_PRIORITY:
1940 /*
1941 * The HW seems to be happy with the 1st
1942 * descriptor filled and the 2nd empty...
1943 * So always update descriptor 1 and never
1944 * touch 2nd
1945 */
1946 break;
1947 }
1948 }
1949 *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
1950 rtl8180_dma_kick(dev, priority);
1951
1952 return 0;
1953 }
1954
1955 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
1956
1957 static void rtl8180_link_change(struct net_device *dev)
1958 {
1959 struct r8180_priv *priv = ieee80211_priv(dev);
1960 u16 beacon_interval;
1961 struct ieee80211_network *net = &priv->ieee80211->current_network;
1962
1963 rtl8180_update_msr(dev);
1964
1965 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1966
1967 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
1968 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
1969
1970 beacon_interval = read_nic_word(dev, BEACON_INTERVAL);
1971 beacon_interval &= ~BEACON_INTERVAL_MASK;
1972 beacon_interval |= net->beacon_interval;
1973 write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
1974
1975 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1976
1977 rtl8180_set_chan(dev, priv->chan);
1978 }
1979
1980 static void rtl8180_rq_tx_ack(struct net_device *dev)
1981 {
1982
1983 struct r8180_priv *priv = ieee80211_priv(dev);
1984
1985 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
1986 priv->ack_tx_to_ieee = 1;
1987 }
1988
1989 static short rtl8180_is_tx_queue_empty(struct net_device *dev)
1990 {
1991
1992 struct r8180_priv *priv = ieee80211_priv(dev);
1993 u32 *d;
1994
1995 for (d = priv->txmapring;
1996 d < priv->txmapring + priv->txringcount; d += 8)
1997 if (*d & (1<<31))
1998 return 0;
1999
2000 for (d = priv->txbkpring;
2001 d < priv->txbkpring + priv->txringcount; d += 8)
2002 if (*d & (1<<31))
2003 return 0;
2004
2005 for (d = priv->txbepring;
2006 d < priv->txbepring + priv->txringcount; d += 8)
2007 if (*d & (1<<31))
2008 return 0;
2009
2010 for (d = priv->txvipring;
2011 d < priv->txvipring + priv->txringcount; d += 8)
2012 if (*d & (1<<31))
2013 return 0;
2014
2015 for (d = priv->txvopring;
2016 d < priv->txvopring + priv->txringcount; d += 8)
2017 if (*d & (1<<31))
2018 return 0;
2019
2020 for (d = priv->txhpring;
2021 d < priv->txhpring + priv->txringcount; d += 8)
2022 if (*d & (1<<31))
2023 return 0;
2024 return 1;
2025 }
2026
2027 static void rtl8180_hw_wakeup(struct net_device *dev)
2028 {
2029 unsigned long flags;
2030 struct r8180_priv *priv = ieee80211_priv(dev);
2031
2032 spin_lock_irqsave(&priv->ps_lock, flags);
2033 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2034 if (priv->rf_wakeup)
2035 priv->rf_wakeup(dev);
2036 spin_unlock_irqrestore(&priv->ps_lock, flags);
2037 }
2038
2039 static void rtl8180_hw_sleep_down(struct net_device *dev)
2040 {
2041 unsigned long flags;
2042 struct r8180_priv *priv = ieee80211_priv(dev);
2043
2044 spin_lock_irqsave(&priv->ps_lock, flags);
2045 if (priv->rf_sleep)
2046 priv->rf_sleep(dev);
2047 spin_unlock_irqrestore(&priv->ps_lock, flags);
2048 }
2049
2050 static void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2051 {
2052 struct r8180_priv *priv = ieee80211_priv(dev);
2053 u32 rb = jiffies;
2054 unsigned long flags;
2055
2056 spin_lock_irqsave(&priv->ps_lock, flags);
2057
2058 /*
2059 * Writing HW register with 0 equals to disable
2060 * the timer, that is not really what we want
2061 */
2062 tl -= MSECS(4+16+7);
2063
2064 /*
2065 * If the interval in witch we are requested to sleep is too
2066 * short then give up and remain awake
2067 */
2068 if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2069 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2070 spin_unlock_irqrestore(&priv->ps_lock, flags);
2071 printk("too short to sleep\n");
2072 return;
2073 }
2074
2075 {
2076 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2077
2078 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2079 /* as tl may be less than rb */
2080 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp);
2081 }
2082 /*
2083 * If we suspect the TimerInt is gone beyond tl
2084 * while setting it, then give up
2085 */
2086
2087 if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2088 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2089 spin_unlock_irqrestore(&priv->ps_lock, flags);
2090 return;
2091 }
2092
2093 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2094 spin_unlock_irqrestore(&priv->ps_lock, flags);
2095 }
2096
2097 static void rtl8180_wmm_param_update(struct work_struct *work)
2098 {
2099 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2100 struct net_device *dev = ieee->dev;
2101 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2102 u8 mode = ieee->current_network.mode;
2103 AC_CODING eACI;
2104 AC_PARAM AcParam;
2105 PAC_PARAM pAcParam;
2106 u8 i;
2107
2108 if (!ieee->current_network.QoS_Enable) {
2109 /* legacy ac_xx_param update */
2110 AcParam.longData = 0;
2111 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2112 AcParam.f.AciAifsn.f.ACM = 0;
2113 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2114 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2115 AcParam.f.TXOPLimit = 0;
2116 for (eACI = 0; eACI < AC_MAX; eACI++) {
2117 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2118 {
2119 u8 u1bAIFS;
2120 u32 u4bAcParam;
2121 pAcParam = (PAC_PARAM)(&AcParam);
2122 /* Retrieve parameters to update. */
2123 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2124 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2125 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2126 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2127 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2128 switch (eACI) {
2129 case AC1_BK:
2130 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2131 break;
2132 case AC0_BE:
2133 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2134 break;
2135 case AC2_VI:
2136 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2137 break;
2138 case AC3_VO:
2139 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2140 break;
2141 default:
2142 pr_warn("SetHwReg8185():invalid ACI: %d!\n",
2143 eACI);
2144 break;
2145 }
2146 }
2147 }
2148 return;
2149 }
2150
2151 for (i = 0; i < AC_MAX; i++) {
2152 /* AcParam.longData = 0; */
2153 pAcParam = (AC_PARAM *)ac_param;
2154 {
2155 AC_CODING eACI;
2156 u8 u1bAIFS;
2157 u32 u4bAcParam;
2158
2159 /* Retrieve parameters to update. */
2160 eACI = pAcParam->f.AciAifsn.f.ACI;
2161 /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2162 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2163 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
2164 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
2165 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
2166 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2167
2168 switch (eACI) {
2169 case AC1_BK:
2170 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2171 break;
2172 case AC0_BE:
2173 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2174 break;
2175 case AC2_VI:
2176 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2177 break;
2178 case AC3_VO:
2179 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2180 break;
2181 default:
2182 pr_warn("SetHwReg8185(): invalid ACI: %d !\n",
2183 eACI);
2184 break;
2185 }
2186 }
2187 ac_param += (sizeof(AC_PARAM));
2188 }
2189 }
2190
2191 void rtl8180_restart_wq(struct work_struct *work);
2192 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2193 void rtl8180_watch_dog_wq(struct work_struct *work);
2194 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2195 void rtl8180_hw_sleep_wq(struct work_struct *work);
2196 void rtl8180_sw_antenna_wq(struct work_struct *work);
2197 void rtl8180_watch_dog(struct net_device *dev);
2198
2199 static void watch_dog_adaptive(unsigned long data)
2200 {
2201 struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
2202
2203 if (!priv->up) {
2204 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2205 return;
2206 }
2207
2208 /* Tx High Power Mechanism. */
2209 if (CheckHighPower((struct net_device *)data))
2210 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2211
2212 /* Tx Power Tracking on 87SE. */
2213 if (CheckTxPwrTracking((struct net_device *)data))
2214 TxPwrTracking87SE((struct net_device *)data);
2215
2216 /* Perform DIG immediately. */
2217 if (CheckDig((struct net_device *)data))
2218 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2219 rtl8180_watch_dog((struct net_device *)data);
2220
2221 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2222
2223 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2224 add_timer(&priv->watch_dog_timer);
2225 }
2226
2227 static CHANNEL_LIST ChannelPlan[] = {
2228 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, /* FCC */
2229 {{1,2,3,4,5,6,7,8,9,10,11},11}, /* IC */
2230 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* ETSI */
2231 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Spain. Change to ETSI. */
2232 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* France. Change to ETSI. */
2233 {{14,36,40,44,48,52,56,60,64},9}, /* MKK */
2234 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2235 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Israel. */
2236 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, /* For 11a , TELEC */
2237 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2238 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2239 };
2240
2241 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2242 {
2243 int i;
2244
2245 /* lzm add 080826 */
2246 ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2247 ieee->IbssStartChnl = 0;
2248
2249 switch (channel_plan) {
2250 case COUNTRY_CODE_FCC:
2251 case COUNTRY_CODE_IC:
2252 case COUNTRY_CODE_ETSI:
2253 case COUNTRY_CODE_SPAIN:
2254 case COUNTRY_CODE_FRANCE:
2255 case COUNTRY_CODE_MKK:
2256 case COUNTRY_CODE_MKK1:
2257 case COUNTRY_CODE_ISRAEL:
2258 case COUNTRY_CODE_TELEC:
2259 {
2260 Dot11d_Init(ieee);
2261 ieee->bGlobalDomain = false;
2262 if (ChannelPlan[channel_plan].Len != 0) {
2263 /* Clear old channel map */
2264 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2265 /* Set new channel map */
2266 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2267 if (ChannelPlan[channel_plan].Channel[i] <= 14)
2268 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2269 }
2270 }
2271 break;
2272 }
2273 case COUNTRY_CODE_GLOBAL_DOMAIN:
2274 {
2275 GET_DOT11D_INFO(ieee)->bEnabled = false;
2276 Dot11d_Reset(ieee);
2277 ieee->bGlobalDomain = true;
2278 break;
2279 }
2280 case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2281 {
2282 ieee->MinPassiveChnlNum = 12;
2283 ieee->IbssStartChnl = 10;
2284 break;
2285 }
2286 default:
2287 {
2288 Dot11d_Init(ieee);
2289 ieee->bGlobalDomain = false;
2290 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2291 for (i = 1; i <= 14; i++)
2292 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2293 break;
2294 }
2295 }
2296 }
2297
2298 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2299
2300 /* YJ,add,080828 */
2301 static void rtl8180_statistics_init(struct Stats *pstats)
2302 {
2303 memset(pstats, 0, sizeof(struct Stats));
2304 }
2305
2306 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2307 {
2308 memset(plink_detect, 0, sizeof(link_detect_t));
2309 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2310 }
2311
2312 /* YJ,add,080828,end */
2313 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2314 {
2315 struct net_device *dev = eeprom->data;
2316 u8 reg = read_nic_byte(dev, EPROM_CMD);
2317
2318 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2319 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2320 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2321 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2322 }
2323
2324 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2325 {
2326 struct net_device *dev = eeprom->data;
2327 u8 reg = 2 << 6;
2328
2329 if (eeprom->reg_data_in)
2330 reg |= RTL818X_EEPROM_CMD_WRITE;
2331 if (eeprom->reg_data_out)
2332 reg |= RTL818X_EEPROM_CMD_READ;
2333 if (eeprom->reg_data_clock)
2334 reg |= RTL818X_EEPROM_CMD_CK;
2335 if (eeprom->reg_chip_select)
2336 reg |= RTL818X_EEPROM_CMD_CS;
2337
2338 write_nic_byte(dev, EPROM_CMD, reg);
2339 read_nic_byte(dev, EPROM_CMD);
2340 udelay(10);
2341 }
2342
2343 short rtl8180_init(struct net_device *dev)
2344 {
2345 struct r8180_priv *priv = ieee80211_priv(dev);
2346 u16 word;
2347 u16 usValue;
2348 u16 tmpu16;
2349 int i, j;
2350 struct eeprom_93cx6 eeprom;
2351 u16 eeprom_val;
2352
2353 eeprom.data = dev;
2354 eeprom.register_read = rtl8187se_eeprom_register_read;
2355 eeprom.register_write = rtl8187se_eeprom_register_write;
2356 eeprom.width = PCI_EEPROM_WIDTH_93C46;
2357
2358 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2359 priv->channel_plan = eeprom_val & 0xFF;
2360 if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2361 printk("rtl8180_init:Error channel plan! Set to default.\n");
2362 priv->channel_plan = 0;
2363 }
2364
2365 DMESG("Channel plan is %d\n", priv->channel_plan);
2366 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2367
2368 /* FIXME: these constants are placed in a bad pleace. */
2369 priv->txbuffsize = 2048; /* 1024; */
2370 priv->txringcount = 32; /* 32; */
2371 priv->rxbuffersize = 2048; /* 1024; */
2372 priv->rxringcount = 64; /* 32; */
2373 priv->txbeaconcount = 2;
2374 priv->rx_skb_complete = 1;
2375
2376 priv->RFChangeInProgress = false;
2377 priv->SetRFPowerStateInProgress = false;
2378 priv->RFProgType = 0;
2379
2380 priv->irq_enabled = 0;
2381
2382 rtl8180_statistics_init(&priv->stats);
2383 rtl8180_link_detect_init(&priv->link_detect);
2384
2385 priv->ack_tx_to_ieee = 0;
2386 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2387 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2388 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2389 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2390 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2391 priv->ieee80211->active_scan = 1;
2392 priv->ieee80211->rate = 110; /* 11 mbps */
2393 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2394 priv->ieee80211->host_encrypt = 1;
2395 priv->ieee80211->host_decrypt = 1;
2396 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2397 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2398 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2399 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2400
2401 priv->hw_wep = hwwep;
2402 priv->dev = dev;
2403 priv->retry_rts = DEFAULT_RETRY_RTS;
2404 priv->retry_data = DEFAULT_RETRY_DATA;
2405 priv->RFChangeInProgress = false;
2406 priv->SetRFPowerStateInProgress = false;
2407 priv->RFProgType = 0;
2408 priv->bInactivePs = true; /* false; */
2409 priv->ieee80211->bInactivePs = priv->bInactivePs;
2410 priv->bSwRfProcessing = false;
2411 priv->eRFPowerState = eRfOff;
2412 priv->RfOffReason = 0;
2413 priv->LedStrategy = SW_LED_MODE0;
2414 priv->TxPollingTimes = 0; /* lzm add 080826 */
2415 priv->bLeisurePs = true;
2416 priv->dot11PowerSaveMode = eActive;
2417 priv->AdMinCheckPeriod = 5;
2418 priv->AdMaxCheckPeriod = 10;
2419 priv->AdMaxRxSsThreshold = 30; /* 60->30 */
2420 priv->AdRxSsThreshold = 20; /* 50->20 */
2421 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2422 priv->AdTickCount = 0;
2423 priv->AdRxSignalStrength = -1;
2424 priv->RegSwAntennaDiversityMechanism = 0;
2425 priv->RegDefaultAntenna = 0;
2426 priv->SignalStrength = 0;
2427 priv->AdRxOkCnt = 0;
2428 priv->CurrAntennaIndex = 0;
2429 priv->AdRxSsBeforeSwitched = 0;
2430 init_timer(&priv->SwAntennaDiversityTimer);
2431 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2432 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2433 priv->bDigMechanism = true;
2434 priv->InitialGain = 6;
2435 priv->bXtalCalibration = false;
2436 priv->XtalCal_Xin = 0;
2437 priv->XtalCal_Xout = 0;
2438 priv->bTxPowerTrack = false;
2439 priv->ThermalMeter = 0;
2440 priv->FalseAlarmRegValue = 0;
2441 priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm, which is used in DIG. */
2442 priv->DIG_NumberFallbackVote = 0;
2443 priv->DIG_NumberUpgradeVote = 0;
2444 priv->LastSignalStrengthInPercent = 0;
2445 priv->Stats_SignalStrength = 0;
2446 priv->LastRxPktAntenna = 0;
2447 priv->SignalQuality = 0; /* in 0-100 index. */
2448 priv->Stats_SignalQuality = 0;
2449 priv->RecvSignalPower = 0; /* in dBm. */
2450 priv->Stats_RecvSignalPower = 0;
2451 priv->AdMainAntennaRxOkCnt = 0;
2452 priv->AdAuxAntennaRxOkCnt = 0;
2453 priv->bHWAdSwitched = false;
2454 priv->bRegHighPowerMechanism = true;
2455 priv->RegHiPwrUpperTh = 77;
2456 priv->RegHiPwrLowerTh = 75;
2457 priv->RegRSSIHiPwrUpperTh = 70;
2458 priv->RegRSSIHiPwrLowerTh = 20;
2459 priv->bCurCCKPkt = false;
2460 priv->UndecoratedSmoothedSS = -1;
2461 priv->bToUpdateTxPwr = false;
2462 priv->CurCCKRSSI = 0;
2463 priv->RxPower = 0;
2464 priv->RSSI = 0;
2465 priv->NumTxOkTotal = 0;
2466 priv->NumTxUnicast = 0;
2467 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2468 priv->CurrRetryCnt = 0;
2469 priv->LastRetryCnt = 0;
2470 priv->LastTxokCnt = 0;
2471 priv->LastRxokCnt = 0;
2472 priv->LastRetryRate = 0;
2473 priv->bTryuping = 0;
2474 priv->CurrTxRate = 0;
2475 priv->CurrRetryRate = 0;
2476 priv->TryupingCount = 0;
2477 priv->TryupingCountNoData = 0;
2478 priv->TryDownCountLowData = 0;
2479 priv->LastTxOKBytes = 0;
2480 priv->LastFailTxRate = 0;
2481 priv->LastFailTxRateSS = 0;
2482 priv->FailTxRateCount = 0;
2483 priv->LastTxThroughput = 0;
2484 priv->NumTxOkBytesTotal = 0;
2485 priv->ForcedDataRate = 0;
2486 priv->RegBModeGainStage = 1;
2487
2488 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2489 spin_lock_init(&priv->irq_th_lock);
2490 spin_lock_init(&priv->tx_lock);
2491 spin_lock_init(&priv->ps_lock);
2492 spin_lock_init(&priv->rf_ps_lock);
2493 sema_init(&priv->wx_sem, 1);
2494 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2495 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2496 (void *)rtl8180_hw_wakeup_wq);
2497 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2498 (void *)rtl8180_hw_sleep_wq);
2499 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2500 (void *)rtl8180_wmm_param_update);
2501 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2502 (void *)rtl8180_rate_adapter);
2503 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2504 (void *)rtl8180_hw_dig_wq);
2505 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2506 (void *)rtl8180_tx_pw_wq);
2507 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2508 (void *) GPIOChangeRFWorkItemCallBack);
2509 tasklet_init(&priv->irq_rx_tasklet,
2510 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2511 (unsigned long)priv);
2512
2513 init_timer(&priv->watch_dog_timer);
2514 priv->watch_dog_timer.data = (unsigned long)dev;
2515 priv->watch_dog_timer.function = watch_dog_adaptive;
2516
2517 init_timer(&priv->rateadapter_timer);
2518 priv->rateadapter_timer.data = (unsigned long)dev;
2519 priv->rateadapter_timer.function = timer_rate_adaptive;
2520 priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2521 priv->bEnhanceTxPwr = false;
2522
2523 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2524 priv->ieee80211->set_chan = rtl8180_set_chan;
2525 priv->ieee80211->link_change = rtl8180_link_change;
2526 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2527 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2528 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2529
2530 priv->ieee80211->init_wmmparam_flag = 0;
2531
2532 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2533 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2534 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2535
2536 priv->ShortRetryLimit = 7;
2537 priv->LongRetryLimit = 7;
2538 priv->EarlyRxThreshold = 7;
2539
2540 priv->TransmitConfig = (1<<TCR_DurProcMode_OFFSET) |
2541 (7<<TCR_MXDMA_OFFSET) |
2542 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2543 (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2544
2545 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF |
2546 RCR_AB | RCR_AM | RCR_APM |
2547 (7<<RCR_MXDMA_OFFSET) |
2548 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2549 (priv->EarlyRxThreshold == 7 ?
2550 RCR_ONLYERLPKT : 0);
2551
2552 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2553 IMR_THPDER | IMR_THPDOK |
2554 IMR_TVODER | IMR_TVODOK |
2555 IMR_TVIDER | IMR_TVIDOK |
2556 IMR_TBEDER | IMR_TBEDOK |
2557 IMR_TBKDER | IMR_TBKDOK |
2558 IMR_RDU |
2559 IMR_RER | IMR_ROK |
2560 IMR_RQoSOK;
2561
2562 priv->InitialGain = 6;
2563
2564 DMESG("MAC controller is a RTL8187SE b/g");
2565
2566 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2567 priv->ieee80211->short_slot = 1;
2568
2569 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2570 DMESG("usValue is %#hx\n", usValue);
2571 /* 3Read AntennaDiversity */
2572
2573 /* SW Antenna Diversity. */
2574 priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2575 EEPROM_SW_AD_ENABLE;
2576
2577 /* Default Antenna to use. */
2578 priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2579 EEPROM_DEF_ANT_1;
2580
2581 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2582 /* 0: default from EEPROM. */
2583 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2584 else
2585 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2586 priv->bSwAntennaDiverity = priv->RegSwAntennaDiversityMechanism == 2;
2587
2588 if (priv->RegDefaultAntenna == 0)
2589 /* 0: default from EEPROM. */
2590 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2591 else
2592 /* 1: main, 2: aux. */
2593 priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2594
2595 priv->plcp_preamble_mode = 2;
2596 /* the eeprom type is stored in RCR register bit #6 */
2597 if (RCR_9356SEL & read_nic_dword(dev, RCR))
2598 priv->epromtype = EPROM_93c56;
2599 else
2600 priv->epromtype = EPROM_93c46;
2601
2602 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2603 dev->dev_addr, 3);
2604
2605 for (i = 1, j = 0; i < 14; i += 2, j++) {
2606 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2607 priv->chtxpwr[i] = word & 0xff;
2608 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2609 }
2610 for (i = 1, j = 0; i < 14; i += 2, j++) {
2611 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2612 priv->chtxpwr_ofdm[i] = word & 0xff;
2613 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2614 }
2615
2616 /* 3Read crystal calibration and thermal meter indication on 87SE. */
2617 eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2618
2619 /* Crystal calibration for Xin and Xout resp. */
2620 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2621 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2622 if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2623 priv->bXtalCalibration = true;
2624
2625 /* Thermal meter reference indication. */
2626 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2627 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2628 priv->bTxPowerTrack = true;
2629
2630 priv->rf_sleep = rtl8225z4_rf_sleep;
2631 priv->rf_wakeup = rtl8225z4_rf_wakeup;
2632 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2633
2634 priv->rf_close = rtl8225z2_rf_close;
2635 priv->rf_init = rtl8225z2_rf_init;
2636 priv->rf_set_chan = rtl8225z2_rf_set_chan;
2637 priv->rf_set_sens = NULL;
2638
2639 if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2640 return -ENOMEM;
2641
2642 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2643 TX_MANAGEPRIORITY_RING_ADDR))
2644 return -ENOMEM;
2645
2646 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2647 TX_BKPRIORITY_RING_ADDR))
2648 return -ENOMEM;
2649
2650 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2651 TX_BEPRIORITY_RING_ADDR))
2652 return -ENOMEM;
2653
2654 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2655 TX_VIPRIORITY_RING_ADDR))
2656 return -ENOMEM;
2657
2658 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2659 TX_VOPRIORITY_RING_ADDR))
2660 return -ENOMEM;
2661
2662 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2663 TX_HIGHPRIORITY_RING_ADDR))
2664 return -ENOMEM;
2665
2666 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2667 TX_BEACON_RING_ADDR))
2668 return -ENOMEM;
2669
2670 if (request_irq(dev->irq, rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2671 DMESGE("Error allocating IRQ %d", dev->irq);
2672 return -1;
2673 } else {
2674 priv->irq = dev->irq;
2675 DMESG("IRQ %d", dev->irq);
2676 }
2677
2678 return 0;
2679 }
2680
2681 void rtl8180_no_hw_wep(struct net_device *dev)
2682 {
2683 }
2684
2685 void rtl8180_set_hw_wep(struct net_device *dev)
2686 {
2687 struct r8180_priv *priv = ieee80211_priv(dev);
2688 u8 pgreg;
2689 u8 security;
2690 u32 key0_word4;
2691
2692 pgreg = read_nic_byte(dev, PGSELECT);
2693 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2694
2695 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2696 key0_word4 &= ~0xff;
2697 key0_word4 |= priv->key0[3] & 0xff;
2698 write_nic_dword(dev, KEY0, (priv->key0[0]));
2699 write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2700 write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2701 write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2702
2703 security = read_nic_byte(dev, SECURITY);
2704 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2705 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2706 security &= ~SECURITY_ENCRYP_MASK;
2707 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2708
2709 write_nic_byte(dev, SECURITY, security);
2710
2711 DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2712 read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2713 read_nic_dword(dev, KEY0));
2714 }
2715
2716
2717 void rtl8185_rf_pins_enable(struct net_device *dev)
2718 {
2719 /* u16 tmp; */
2720 /* tmp = read_nic_word(dev, RFPinsEnable); */
2721 write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
2722 }
2723
2724 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
2725 {
2726 u8 conf3;
2727
2728 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2729
2730 conf3 = read_nic_byte(dev, CONFIG3);
2731 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2732 write_nic_dword(dev, ANAPARAM2, a);
2733
2734 conf3 = read_nic_byte(dev, CONFIG3);
2735 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2736 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2737 }
2738
2739 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
2740 {
2741 u8 conf3;
2742
2743 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2744
2745 conf3 = read_nic_byte(dev, CONFIG3);
2746 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2747 write_nic_dword(dev, ANAPARAM, a);
2748
2749 conf3 = read_nic_byte(dev, CONFIG3);
2750 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2751 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2752 }
2753
2754 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
2755 {
2756 write_nic_byte(dev, TX_ANTENNA, ant);
2757 force_pci_posting(dev);
2758 mdelay(1);
2759 }
2760
2761 static void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
2762 {
2763 u32 phyw;
2764
2765 adr |= 0x80;
2766
2767 phyw = ((data<<8) | adr);
2768
2769 /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
2770 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
2771 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
2772 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
2773 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
2774
2775 /* this is ok to fail when we write AGC table. check for AGC table might be
2776 * done by masking with 0x7f instead of 0xff
2777 */
2778 /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
2779 }
2780
2781 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
2782 {
2783 data = data & 0xff;
2784 rtl8185_write_phy(dev, adr, data);
2785 }
2786
2787 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
2788 {
2789 data = data & 0xff;
2790 rtl8185_write_phy(dev, adr, data | 0x10000);
2791 }
2792
2793 /*
2794 * This configures registers for beacon tx and enables it via
2795 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
2796 * be used to stop beacon transmission
2797 */
2798 void rtl8180_start_tx_beacon(struct net_device *dev)
2799 {
2800 u16 word;
2801
2802 DMESG("Enabling beacon TX");
2803 rtl8180_prepare_beacon(dev);
2804 rtl8180_irq_disable(dev);
2805 rtl8180_beacon_tx_enable(dev);
2806
2807 word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
2808 write_nic_word(dev, AtimWnd, word); /* word |= */
2809
2810 word = read_nic_word(dev, BintrItv);
2811 word &= ~BintrItv_BintrItv;
2812 word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
2813 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
2814 // FIXME: check if correct ^^ worked with 0x3e8;
2815 */
2816 write_nic_word(dev, BintrItv, word);
2817
2818 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2819
2820 rtl8185b_irq_enable(dev);
2821 }
2822
2823 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
2824 {
2825 struct r8180_priv *priv = ieee80211_priv(dev);
2826
2827 return &priv->ieee80211->stats;
2828 }
2829
2830 /*
2831 * Change current and default preamble mode.
2832 */
2833 bool
2834 MgntActSet_802_11_PowerSaveMode(
2835 struct r8180_priv *priv,
2836 RT_PS_MODE rtPsMode
2837 )
2838 {
2839 /* Currently, we do not change power save mode on IBSS mode. */
2840 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2841 return false;
2842
2843 priv->ieee80211->ps = rtPsMode;
2844
2845 return true;
2846 }
2847
2848 void LeisurePSEnter(struct r8180_priv *priv)
2849 {
2850 if (priv->bLeisurePs) {
2851 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
2852 /* IEEE80211_PS_ENABLE */
2853 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
2854 }
2855 }
2856
2857 void LeisurePSLeave(struct r8180_priv *priv)
2858 {
2859 if (priv->bLeisurePs) {
2860 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
2861 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
2862 }
2863 }
2864
2865 void rtl8180_hw_wakeup_wq(struct work_struct *work)
2866 {
2867 struct delayed_work *dwork = to_delayed_work(work);
2868 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
2869 struct net_device *dev = ieee->dev;
2870
2871 rtl8180_hw_wakeup(dev);
2872 }
2873
2874 void rtl8180_hw_sleep_wq(struct work_struct *work)
2875 {
2876 struct delayed_work *dwork = to_delayed_work(work);
2877 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
2878 struct net_device *dev = ieee->dev;
2879
2880 rtl8180_hw_sleep_down(dev);
2881 }
2882
2883 static void MgntLinkKeepAlive(struct r8180_priv *priv)
2884 {
2885 if (priv->keepAliveLevel == 0)
2886 return;
2887
2888 if (priv->ieee80211->state == IEEE80211_LINKED) {
2889 /*
2890 * Keep-Alive.
2891 */
2892
2893 if ((priv->keepAliveLevel == 2) ||
2894 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
2895 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
2896 ) {
2897 priv->link_detect.IdleCount++;
2898
2899 /*
2900 * Send a Keep-Alive packet packet to AP if we had been idle for a while.
2901 */
2902 if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
2903 priv->link_detect.IdleCount = 0;
2904 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
2905 }
2906 } else {
2907 priv->link_detect.IdleCount = 0;
2908 }
2909 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
2910 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
2911 }
2912 }
2913
2914 void rtl8180_watch_dog(struct net_device *dev)
2915 {
2916 struct r8180_priv *priv = ieee80211_priv(dev);
2917 bool bEnterPS = false;
2918 bool bBusyTraffic = false;
2919 u32 TotalRxNum = 0;
2920 u16 SlotIndex = 0;
2921 u16 i = 0;
2922 if (priv->ieee80211->actscanning == false) {
2923 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
2924 (priv->ieee80211->state == IEEE80211_NOLINK) &&
2925 (priv->ieee80211->beinretry == false) &&
2926 (priv->eRFPowerState == eRfOn))
2927 IPSEnter(dev);
2928 }
2929 /* YJ,add,080828,for link state check */
2930 if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
2931 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
2932 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
2933 for (i = 0; i < priv->link_detect.SlotNum; i++)
2934 TotalRxNum += priv->link_detect.RxFrameNum[i];
2935
2936 if (TotalRxNum == 0) {
2937 priv->ieee80211->state = IEEE80211_ASSOCIATING;
2938 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
2939 }
2940 }
2941
2942 /* YJ,add,080828,for KeepAlive */
2943 MgntLinkKeepAlive(priv);
2944
2945 /* YJ,add,080828,for LPS */
2946 LeisurePSLeave(priv);
2947
2948 if (priv->ieee80211->state == IEEE80211_LINKED) {
2949 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
2950 if (priv->link_detect.NumRxOkInPeriod > 666 ||
2951 priv->link_detect.NumTxOkInPeriod > 666) {
2952 bBusyTraffic = true;
2953 }
2954 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
2955 || (priv->link_detect.NumRxOkInPeriod > 2)) {
2956 bEnterPS = false;
2957 } else
2958 bEnterPS = true;
2959
2960 if (bEnterPS)
2961 LeisurePSEnter(priv);
2962 else
2963 LeisurePSLeave(priv);
2964 } else
2965 LeisurePSLeave(priv);
2966 priv->link_detect.bBusyTraffic = bBusyTraffic;
2967 priv->link_detect.NumRxOkInPeriod = 0;
2968 priv->link_detect.NumTxOkInPeriod = 0;
2969 priv->ieee80211->NumRxDataInPeriod = 0;
2970 priv->ieee80211->NumRxBcnInPeriod = 0;
2971 }
2972
2973 static int _rtl8180_up(struct net_device *dev)
2974 {
2975 struct r8180_priv *priv = ieee80211_priv(dev);
2976
2977 priv->up = 1;
2978
2979 DMESG("Bringing up iface");
2980 rtl8185b_adapter_start(dev);
2981 rtl8185b_rx_enable(dev);
2982 rtl8185b_tx_enable(dev);
2983 if (priv->bInactivePs) {
2984 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2985 IPSLeave(dev);
2986 }
2987 timer_rate_adaptive((unsigned long)dev);
2988 watch_dog_adaptive((unsigned long)dev);
2989 if (priv->bSwAntennaDiverity)
2990 SwAntennaDiversityTimerCallback(dev);
2991 ieee80211_softmac_start_protocol(priv->ieee80211);
2992 return 0;
2993 }
2994
2995 static int rtl8180_open(struct net_device *dev)
2996 {
2997 struct r8180_priv *priv = ieee80211_priv(dev);
2998 int ret;
2999
3000 down(&priv->wx_sem);
3001 ret = rtl8180_up(dev);
3002 up(&priv->wx_sem);
3003 return ret;
3004 }
3005
3006 int rtl8180_up(struct net_device *dev)
3007 {
3008 struct r8180_priv *priv = ieee80211_priv(dev);
3009
3010 if (priv->up == 1)
3011 return -1;
3012
3013 return _rtl8180_up(dev);
3014 }
3015
3016 static int rtl8180_close(struct net_device *dev)
3017 {
3018 struct r8180_priv *priv = ieee80211_priv(dev);
3019 int ret;
3020
3021 down(&priv->wx_sem);
3022 ret = rtl8180_down(dev);
3023 up(&priv->wx_sem);
3024
3025 return ret;
3026 }
3027
3028 int rtl8180_down(struct net_device *dev)
3029 {
3030 struct r8180_priv *priv = ieee80211_priv(dev);
3031
3032 if (priv->up == 0)
3033 return -1;
3034
3035 priv->up = 0;
3036
3037 ieee80211_softmac_stop_protocol(priv->ieee80211);
3038 /* FIXME */
3039 if (!netif_queue_stopped(dev))
3040 netif_stop_queue(dev);
3041 rtl8180_rtx_disable(dev);
3042 rtl8180_irq_disable(dev);
3043 del_timer_sync(&priv->watch_dog_timer);
3044 del_timer_sync(&priv->rateadapter_timer);
3045 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3046 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3047 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3048 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3049 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3050 del_timer_sync(&priv->SwAntennaDiversityTimer);
3051 SetZebraRFPowerState8185(dev, eRfOff);
3052 memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3053 priv->ieee80211->state = IEEE80211_NOLINK;
3054 return 0;
3055 }
3056
3057 void rtl8180_restart_wq(struct work_struct *work)
3058 {
3059 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3060 struct net_device *dev = priv->dev;
3061
3062 down(&priv->wx_sem);
3063
3064 rtl8180_commit(dev);
3065
3066 up(&priv->wx_sem);
3067 }
3068
3069 static void rtl8180_restart(struct net_device *dev)
3070 {
3071 struct r8180_priv *priv = ieee80211_priv(dev);
3072
3073 schedule_work(&priv->reset_wq);
3074 }
3075
3076 void rtl8180_commit(struct net_device *dev)
3077 {
3078 struct r8180_priv *priv = ieee80211_priv(dev);
3079
3080 if (priv->up == 0)
3081 return ;
3082
3083 del_timer_sync(&priv->watch_dog_timer);
3084 del_timer_sync(&priv->rateadapter_timer);
3085 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3086 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3087 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3088 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3089 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3090 del_timer_sync(&priv->SwAntennaDiversityTimer);
3091 ieee80211_softmac_stop_protocol(priv->ieee80211);
3092 rtl8180_irq_disable(dev);
3093 rtl8180_rtx_disable(dev);
3094 _rtl8180_up(dev);
3095 }
3096
3097 static void r8180_set_multicast(struct net_device *dev)
3098 {
3099 struct r8180_priv *priv = ieee80211_priv(dev);
3100 short promisc;
3101
3102 promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3103
3104 if (promisc != priv->promisc)
3105 rtl8180_restart(dev);
3106
3107 priv->promisc = promisc;
3108 }
3109
3110 static int r8180_set_mac_adr(struct net_device *dev, void *mac)
3111 {
3112 struct r8180_priv *priv = ieee80211_priv(dev);
3113 struct sockaddr *addr = mac;
3114
3115 down(&priv->wx_sem);
3116
3117 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3118
3119 if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3120 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3121
3122 if (priv->up) {
3123 rtl8180_down(dev);
3124 rtl8180_up(dev);
3125 }
3126
3127 up(&priv->wx_sem);
3128
3129 return 0;
3130 }
3131
3132 /* based on ipw2200 driver */
3133 static int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3134 {
3135 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3136 struct iwreq *wrq = (struct iwreq *) rq;
3137 int ret = -1;
3138
3139 switch (cmd) {
3140 case RTL_IOCTL_WPA_SUPPLICANT:
3141 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3142 return ret;
3143 default:
3144 return -EOPNOTSUPP;
3145 }
3146
3147 return -EOPNOTSUPP;
3148 }
3149
3150 static const struct net_device_ops rtl8180_netdev_ops = {
3151 .ndo_open = rtl8180_open,
3152 .ndo_stop = rtl8180_close,
3153 .ndo_get_stats = rtl8180_stats,
3154 .ndo_tx_timeout = rtl8180_restart,
3155 .ndo_do_ioctl = rtl8180_ioctl,
3156 .ndo_set_rx_mode = r8180_set_multicast,
3157 .ndo_set_mac_address = r8180_set_mac_adr,
3158 .ndo_validate_addr = eth_validate_addr,
3159 .ndo_change_mtu = eth_change_mtu,
3160 .ndo_start_xmit = ieee80211_rtl_xmit,
3161 };
3162
3163 static int rtl8180_pci_probe(struct pci_dev *pdev,
3164 const struct pci_device_id *id)
3165 {
3166 unsigned long ioaddr = 0;
3167 struct net_device *dev = NULL;
3168 struct r8180_priv *priv = NULL;
3169 u8 unit = 0;
3170 int ret = -ENODEV;
3171
3172 unsigned long pmem_start, pmem_len, pmem_flags;
3173
3174 DMESG("Configuring chip resources");
3175
3176 if (pci_enable_device(pdev)) {
3177 DMESG("Failed to enable PCI device");
3178 return -EIO;
3179 }
3180
3181 pci_set_master(pdev);
3182 pci_set_dma_mask(pdev, 0xffffff00ULL);
3183 pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3184 dev = alloc_ieee80211(sizeof(struct r8180_priv));
3185 if (!dev) {
3186 ret = -ENOMEM;
3187 goto fail_free;
3188 }
3189 priv = ieee80211_priv(dev);
3190 priv->ieee80211 = netdev_priv(dev);
3191
3192 pci_set_drvdata(pdev, dev);
3193 SET_NETDEV_DEV(dev, &pdev->dev);
3194
3195 priv = ieee80211_priv(dev);
3196 priv->pdev = pdev;
3197
3198 pmem_start = pci_resource_start(pdev, 1);
3199 pmem_len = pci_resource_len(pdev, 1);
3200 pmem_flags = pci_resource_flags(pdev, 1);
3201
3202 if (!(pmem_flags & IORESOURCE_MEM)) {
3203 DMESG("region #1 not a MMIO resource, aborting");
3204 goto fail;
3205 }
3206
3207 if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3208 DMESG("request_mem_region failed!");
3209 goto fail;
3210 }
3211
3212 ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3213 if (ioaddr == (unsigned long)NULL) {
3214 DMESG("ioremap failed!");
3215 goto fail1;
3216 }
3217
3218 dev->mem_start = ioaddr; /* shared mem start */
3219 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3220
3221 pci_read_config_byte(pdev, 0x05, &unit);
3222 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3223
3224 dev->irq = pdev->irq;
3225 priv->irq = 0;
3226
3227 dev->netdev_ops = &rtl8180_netdev_ops;
3228 dev->wireless_handlers = &r8180_wx_handlers_def;
3229
3230 dev->type = ARPHRD_ETHER;
3231 dev->watchdog_timeo = HZ*3;
3232
3233 if (dev_alloc_name(dev, ifname) < 0) {
3234 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3235 strcpy(ifname, "wlan%d");
3236 dev_alloc_name(dev, ifname);
3237 }
3238
3239 if (rtl8180_init(dev) != 0) {
3240 DMESG("Initialization failed");
3241 goto fail1;
3242 }
3243
3244 netif_carrier_off(dev);
3245
3246 if (register_netdev(dev))
3247 goto fail1;
3248
3249 rtl8180_proc_init_one(dev);
3250
3251 DMESG("Driver probe completed\n");
3252 return 0;
3253 fail1:
3254 if (dev->mem_start != (unsigned long)NULL) {
3255 iounmap((void __iomem *)dev->mem_start);
3256 release_mem_region(pci_resource_start(pdev, 1),
3257 pci_resource_len(pdev, 1));
3258 }
3259 fail:
3260 if (dev) {
3261 if (priv->irq) {
3262 free_irq(dev->irq, dev);
3263 dev->irq = 0;
3264 }
3265 free_ieee80211(dev);
3266 }
3267
3268 fail_free:
3269 pci_disable_device(pdev);
3270
3271 DMESG("wlan driver load failed\n");
3272 return ret;
3273 }
3274
3275 static void rtl8180_pci_remove(struct pci_dev *pdev)
3276 {
3277 struct r8180_priv *priv;
3278 struct net_device *dev = pci_get_drvdata(pdev);
3279
3280 if (dev) {
3281 unregister_netdev(dev);
3282
3283 priv = ieee80211_priv(dev);
3284
3285 rtl8180_proc_remove_one(dev);
3286 rtl8180_down(dev);
3287 priv->rf_close(dev);
3288 rtl8180_reset(dev);
3289 mdelay(10);
3290
3291 if (priv->irq) {
3292 DMESG("Freeing irq %d", dev->irq);
3293 free_irq(dev->irq, dev);
3294 priv->irq = 0;
3295 }
3296
3297 free_rx_desc_ring(dev);
3298 free_tx_desc_rings(dev);
3299
3300 if (dev->mem_start != (unsigned long)NULL) {
3301 iounmap((void __iomem *)dev->mem_start);
3302 release_mem_region(pci_resource_start(pdev, 1),
3303 pci_resource_len(pdev, 1));
3304 }
3305
3306 free_ieee80211(dev);
3307 }
3308 pci_disable_device(pdev);
3309
3310 DMESG("wlan driver removed\n");
3311 }
3312
3313 /* fun with the built-in ieee80211 stack... */
3314 extern int ieee80211_crypto_init(void);
3315 extern void ieee80211_crypto_deinit(void);
3316 extern int ieee80211_crypto_tkip_init(void);
3317 extern void ieee80211_crypto_tkip_exit(void);
3318 extern int ieee80211_crypto_ccmp_init(void);
3319 extern void ieee80211_crypto_ccmp_exit(void);
3320 extern int ieee80211_crypto_wep_init(void);
3321 extern void ieee80211_crypto_wep_exit(void);
3322
3323 static int __init rtl8180_pci_module_init(void)
3324 {
3325 int ret;
3326
3327 ret = ieee80211_crypto_init();
3328 if (ret) {
3329 pr_err("ieee80211_crypto_init() failed %d\n", ret);
3330 return ret;
3331 }
3332 ret = ieee80211_crypto_tkip_init();
3333 if (ret) {
3334 pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
3335 return ret;
3336 }
3337 ret = ieee80211_crypto_ccmp_init();
3338 if (ret) {
3339 pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
3340 return ret;
3341 }
3342 ret = ieee80211_crypto_wep_init();
3343 if (ret) {
3344 pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
3345 return ret;
3346 }
3347
3348 pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3349 pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
3350 DMESG("Initializing module");
3351 DMESG("Wireless extensions version %d", WIRELESS_EXT);
3352 rtl8180_proc_module_init();
3353
3354 if (pci_register_driver(&rtl8180_pci_driver)) {
3355 DMESG("No device found");
3356 return -ENODEV;
3357 }
3358 return 0;
3359 }
3360
3361 static void __exit rtl8180_pci_module_exit(void)
3362 {
3363 pci_unregister_driver(&rtl8180_pci_driver);
3364 rtl8180_proc_module_remove();
3365 ieee80211_crypto_tkip_exit();
3366 ieee80211_crypto_ccmp_exit();
3367 ieee80211_crypto_wep_exit();
3368 ieee80211_crypto_deinit();
3369 DMESG("Exiting");
3370 }
3371
3372 static void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3373 {
3374 unsigned long flags;
3375 short enough_desc;
3376 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3377
3378 spin_lock_irqsave(&priv->tx_lock, flags);
3379 enough_desc = check_nic_enought_desc(dev, pri);
3380 spin_unlock_irqrestore(&priv->tx_lock, flags);
3381
3382 if (enough_desc)
3383 ieee80211_rtl_wake_queue(priv->ieee80211);
3384 }
3385
3386 static void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3387 {
3388 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3389 u32 *tail; /* tail virtual addr */
3390 u32 *head; /* head virtual addr */
3391 u32 *begin; /* start of ring virtual addr */
3392 u32 *nicv; /* nic pointer virtual addr */
3393 u32 nic; /* nic pointer physical addr */
3394 u32 nicbegin; /* start of ring physical addr */
3395 unsigned long flag;
3396 /* physical addr are ok on 32 bits since we set DMA mask */
3397 int offs;
3398 int j, i;
3399 int hd;
3400 if (error)
3401 priv->stats.txretry++; /* tony 20060601 */
3402 spin_lock_irqsave(&priv->tx_lock, flag);
3403 switch (pri) {
3404 case MANAGE_PRIORITY:
3405 tail = priv->txmapringtail;
3406 begin = priv->txmapring;
3407 head = priv->txmapringhead;
3408 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3409 nicbegin = priv->txmapringdma;
3410 break;
3411 case BK_PRIORITY:
3412 tail = priv->txbkpringtail;
3413 begin = priv->txbkpring;
3414 head = priv->txbkpringhead;
3415 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3416 nicbegin = priv->txbkpringdma;
3417 break;
3418 case BE_PRIORITY:
3419 tail = priv->txbepringtail;
3420 begin = priv->txbepring;
3421 head = priv->txbepringhead;
3422 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3423 nicbegin = priv->txbepringdma;
3424 break;
3425 case VI_PRIORITY:
3426 tail = priv->txvipringtail;
3427 begin = priv->txvipring;
3428 head = priv->txvipringhead;
3429 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3430 nicbegin = priv->txvipringdma;
3431 break;
3432 case VO_PRIORITY:
3433 tail = priv->txvopringtail;
3434 begin = priv->txvopring;
3435 head = priv->txvopringhead;
3436 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3437 nicbegin = priv->txvopringdma;
3438 break;
3439 case HI_PRIORITY:
3440 tail = priv->txhpringtail;
3441 begin = priv->txhpring;
3442 head = priv->txhpringhead;
3443 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3444 nicbegin = priv->txhpringdma;
3445 break;
3446
3447 default:
3448 spin_unlock_irqrestore(&priv->tx_lock, flag);
3449 return ;
3450 }
3451
3452 nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
3453 if ((head <= tail && (nicv > tail || nicv < head)) ||
3454 (head > tail && (nicv > tail && nicv < head))) {
3455 DMESGW("nic has lost pointer");
3456 spin_unlock_irqrestore(&priv->tx_lock, flag);
3457 rtl8180_restart(dev);
3458 return;
3459 }
3460
3461 /*
3462 * We check all the descriptors between the head and the nic,
3463 * but not the currently pointed by the nic (the next to be txed)
3464 * and the previous of the pointed (might be in process ??)
3465 */
3466 offs = (nic - nicbegin);
3467 offs = offs / 8 / 4;
3468 hd = (head - begin) / 8;
3469
3470 if (offs >= hd)
3471 j = offs - hd;
3472 else
3473 j = offs + (priv->txringcount-1-hd);
3474
3475 j -= 2;
3476 if (j < 0)
3477 j = 0;
3478
3479 for (i = 0; i < j; i++) {
3480 if ((*head) & (1<<31))
3481 break;
3482 if (((*head)&(0x10000000)) != 0) {
3483 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3484 if (!error)
3485 priv->NumTxOkTotal++;
3486 }
3487
3488 if (!error)
3489 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3490
3491 *head = *head & ~(1<<31);
3492
3493 if ((head - begin)/8 == priv->txringcount-1)
3494 head = begin;
3495 else
3496 head += 8;
3497 }
3498
3499 /*
3500 * The head has been moved to the last certainly TXed
3501 * (or at least processed by the nic) packet.
3502 * The driver take forcefully owning of all these packets
3503 * If the packet previous of the nic pointer has been
3504 * processed this doesn't matter: it will be checked
3505 * here at the next round. Anyway if no more packet are
3506 * TXed no memory leak occur at all.
3507 */
3508
3509 switch (pri) {
3510 case MANAGE_PRIORITY:
3511 priv->txmapringhead = head;
3512
3513 if (priv->ack_tx_to_ieee) {
3514 if (rtl8180_is_tx_queue_empty(dev)) {
3515 priv->ack_tx_to_ieee = 0;
3516 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3517 }
3518 }
3519 break;
3520 case BK_PRIORITY:
3521 priv->txbkpringhead = head;
3522 break;
3523 case BE_PRIORITY:
3524 priv->txbepringhead = head;
3525 break;
3526 case VI_PRIORITY:
3527 priv->txvipringhead = head;
3528 break;
3529 case VO_PRIORITY:
3530 priv->txvopringhead = head;
3531 break;
3532 case HI_PRIORITY:
3533 priv->txhpringhead = head;
3534 break;
3535 }
3536
3537 spin_unlock_irqrestore(&priv->tx_lock, flag);
3538 }
3539
3540 irqreturn_t rtl8180_interrupt(int irq, void *netdev)
3541 {
3542 struct net_device *dev = (struct net_device *) netdev;
3543 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3544 unsigned long flags;
3545 u32 inta;
3546
3547 /* We should return IRQ_NONE, but for now let me keep this */
3548 if (priv->irq_enabled == 0)
3549 return IRQ_HANDLED;
3550
3551 spin_lock_irqsave(&priv->irq_th_lock, flags);
3552
3553 /* ISR: 4bytes */
3554 inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3555 write_nic_dword(dev, ISR, inta); /* reset int situation */
3556
3557 priv->stats.shints++;
3558
3559 if (!inta) {
3560 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3561 return IRQ_HANDLED;
3562 /*
3563 * most probably we can safely return IRQ_NONE,
3564 * but for now is better to avoid problems
3565 */
3566 }
3567
3568 if (inta == 0xffff) {
3569 /* HW disappeared */
3570 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3571 return IRQ_HANDLED;
3572 }
3573
3574 priv->stats.ints++;
3575
3576 if (!netif_running(dev)) {
3577 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3578 return IRQ_HANDLED;
3579 }
3580
3581 if (inta & ISR_TimeOut)
3582 write_nic_dword(dev, TimerInt, 0);
3583
3584 if (inta & ISR_TBDOK)
3585 priv->stats.txbeacon++;
3586
3587 if (inta & ISR_TBDER)
3588 priv->stats.txbeaconerr++;
3589
3590 if (inta & IMR_TMGDOK)
3591 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3592
3593 if (inta & ISR_THPDER) {
3594 priv->stats.txhperr++;
3595 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3596 priv->ieee80211->stats.tx_errors++;
3597 }
3598
3599 if (inta & ISR_THPDOK) { /* High priority tx ok */
3600 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3601 priv->stats.txhpokint++;
3602 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3603 }
3604
3605 if (inta & ISR_RER)
3606 priv->stats.rxerr++;
3607
3608 if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3609 priv->stats.txbkperr++;
3610 priv->ieee80211->stats.tx_errors++;
3611 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3612 rtl8180_try_wake_queue(dev, BK_PRIORITY);
3613 }
3614
3615 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
3616 priv->stats.txbeperr++;
3617 priv->ieee80211->stats.tx_errors++;
3618 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3619 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3620 }
3621 if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
3622 priv->stats.txnperr++;
3623 priv->ieee80211->stats.tx_errors++;
3624 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
3625 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3626 }
3627
3628 if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
3629 priv->stats.txlperr++;
3630 priv->ieee80211->stats.tx_errors++;
3631 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
3632 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3633 }
3634
3635 if (inta & ISR_ROK) {
3636 priv->stats.rxint++;
3637 tasklet_schedule(&priv->irq_rx_tasklet);
3638 }
3639
3640 if (inta & ISR_RQoSOK) {
3641 priv->stats.rxint++;
3642 tasklet_schedule(&priv->irq_rx_tasklet);
3643 }
3644
3645 if (inta & ISR_BcnInt)
3646 rtl8180_prepare_beacon(dev);
3647
3648 if (inta & ISR_RDU) {
3649 DMESGW("No RX descriptor available");
3650 priv->stats.rxrdu++;
3651 tasklet_schedule(&priv->irq_rx_tasklet);
3652 }
3653
3654 if (inta & ISR_RXFOVW) {
3655 priv->stats.rxoverflow++;
3656 tasklet_schedule(&priv->irq_rx_tasklet);
3657 }
3658
3659 if (inta & ISR_TXFOVW)
3660 priv->stats.txoverflow++;
3661
3662 if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
3663 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3664 priv->stats.txnpokint++;
3665 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3666 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3667 }
3668
3669 if (inta & ISR_TLPDOK) { /* Low priority tx ok */
3670 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3671 priv->stats.txlpokint++;
3672 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
3673 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3674 }
3675
3676 if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
3677 priv->stats.txbkpokint++;
3678 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3679 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
3680 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3681 }
3682
3683 if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
3684 priv->stats.txbeperr++;
3685 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3686 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
3687 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3688 }
3689 force_pci_posting(dev);
3690 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3691
3692 return IRQ_HANDLED;
3693 }
3694
3695 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
3696 {
3697 rtl8180_rx(priv->dev);
3698 }
3699
3700 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
3701 {
3702 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
3703 struct net_device *dev = ieee->dev;
3704 struct r8180_priv *priv = ieee80211_priv(dev);
3705 u8 btPSR;
3706 u8 btConfig0;
3707 RT_RF_POWER_STATE eRfPowerStateToSet;
3708 bool bActuallySet = false;
3709
3710 char *argv[3];
3711 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3712 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3713 static int readf_count;
3714
3715 readf_count = (readf_count+1)%0xffff;
3716 /* We should turn off LED before polling FF51[4]. */
3717
3718 /* Turn off LED. */
3719 btPSR = read_nic_byte(dev, PSR);
3720 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
3721
3722 /* It need to delay 4us suggested by Jong, 2008-01-16 */
3723 udelay(4);
3724
3725 /* HW radio On/Off according to the value of FF51[4](config0) */
3726 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
3727
3728 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
3729
3730 /* Turn LED back on when radio enabled */
3731 if (eRfPowerStateToSet == eRfOn)
3732 write_nic_byte(dev, PSR, btPSR | BIT3);
3733
3734 if ((priv->ieee80211->bHwRadioOff == true) &&
3735 (eRfPowerStateToSet == eRfOn)) {
3736 priv->ieee80211->bHwRadioOff = false;
3737 bActuallySet = true;
3738 } else if ((priv->ieee80211->bHwRadioOff == false) &&
3739 (eRfPowerStateToSet == eRfOff)) {
3740 priv->ieee80211->bHwRadioOff = true;
3741 bActuallySet = true;
3742 }
3743
3744 if (bActuallySet) {
3745 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
3746
3747 /* To update the UI status for Power status changed */
3748 if (priv->ieee80211->bHwRadioOff == true)
3749 argv[1] = "RFOFF";
3750 else
3751 argv[1] = "RFON";
3752 argv[0] = RadioPowerPath;
3753 argv[2] = NULL;
3754
3755 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
3756 }
3757 }
3758
3759 module_init(rtl8180_pci_module_init);
3760 module_exit(rtl8180_pci_module_exit);
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