drivers/staging/rtl8188eu/include/Hal8188ERateAdaptive.h

   1 #ifndef __INC_RA_H
   2 #define __INC_RA_H
   3 /*++
   4 Copyright (c) Realtek Semiconductor Corp. All rights reserved.
   5
   6 Module Name:
   7         RateAdaptive.h
   8
   9 Abstract:
  10         Prototype of RA and related data structure.
  11
  12 Major Change History:
  13         When       Who               What
  14         ---------- ---------------   -------------------------------
  15         2011-08-12 Page            Create.
  16 --*/
  17
  18 /*  Rate adaptive define */
  19 #define PERENTRY        23
  20 #define RETRYSIZE       5
  21 #define RATESIZE        28
  22 #define TX_RPT2_ITEM_SIZE       8
  23
  24 /*  */
  25 /*  TX report 2 format in Rx desc */
  26 /*  */
  27 #define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc)           \
  28         LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 9)
  29 #define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc)     \
  30         LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 32)
  31 #define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc)     \
  32         LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
  33
  34 #define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr)                    \
  35         LE_BITS_TO_4BYTE(__pAddr, 0, 16)
  36 #define GET_TX_REPORT_TYPE1_RERTY_1(__pAddr)                    \
  37         LE_BITS_TO_1BYTE(__pAddr+2, 0, 8)
  38 #define GET_TX_REPORT_TYPE1_RERTY_2(__pAddr)                    \
  39         LE_BITS_TO_1BYTE(__pAddr+3, 0, 8)
  40 #define GET_TX_REPORT_TYPE1_RERTY_3(__pAddr)                    \
  41         LE_BITS_TO_1BYTE(__pAddr+4, 0, 8)
  42 #define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr)                    \
  43         LE_BITS_TO_1BYTE(__pAddr+4+1, 0, 8)
  44 #define GET_TX_REPORT_TYPE1_DROP_0(__pAddr)                     \
  45         LE_BITS_TO_1BYTE(__pAddr+4+2, 0, 8)
  46 #define GET_TX_REPORT_TYPE1_DROP_1(__pAddr)                     \
  47         LE_BITS_TO_1BYTE(__pAddr+4+3, 0, 8)
  48
  49 /*  End rate adaptive define */
  50
  51 void ODM_RASupport_Init(struct odm_dm_struct *dm_odm);
  52
  53 int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
  54
  55 int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID);
  56
  57 u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
  58
  59 u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
  60
  61 u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
  62 void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 MacID,
  63                                  u8 RateID, u32 RateMask,
  64                                  u8 SGIEnable);
  65
  66 void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid,
  67                           u8 rssi);
  68
  69 void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm,
  70                                u8 *txrpt_buf, u16 txrpt_len,
  71                                u32 validentry0, u32 validentry1);
  72
  73 void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime);
  74
  75 #endif