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1 /******************************************************************************
3 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * Modifications for inclusion into the Linux staging tree are
19 * Copyright(c) 2010 Larry Finger. All rights reserved.
21 * Contact information:
22 * WLAN FAE <wlanfae@realtek.com>
23 * Larry Finger <Larry.Finger@lwfinger.net>
25 ******************************************************************************/
26 #ifndef __RTL8712_GP_BITDEF_H__
27 #define __RTL8712_GP_BITDEF_H__
30 #define _GPIO_MOD_MSK 0xFF000000
31 #define _GPIO_MOD_SHT 24
32 #define _GPIO_IO_SEL_MSK 0x00FF0000
33 #define _GPIO_IO_SEL_SHT 16
34 #define _GPIO_OUT_MSK 0x0000FF00
35 #define _GPIO_OUT_SHT 8
36 #define _GPIO_IN_MSK 0x000000FF
37 #define _GPIO_IN_SHT 0
40 #define _GPIOSEL_MSK 0x0003
41 #define _GPIOSEL_SHT 0
44 #define _LED1SV BIT(7)
45 #define _LED1CM_MSK 0x0070
47 #define _LED0SV BIT(3)
48 #define _LED0CM_MSK 0x0007
52 #define _HST_RDRDY_SHT 0
53 #define _HST_RDRDY_MSK 0xFF
54 #define _HST_RDRDY BIT(_HST_RDRDY_SHT)
55 #define _CPU_WTBUSY_SHT 1
56 #define _CPU_WTBUSY_MSK 0xFF
57 #define _CPU_WTBUSY BIT(_CPU_WTBUSY_SHT)
59 /* 11. General Purpose Registers (Offset: 0x02E0 - 0x02FF)*/
61 /* 8192S GPIO Config Setting (offset 0x2F1, 1 byte)*/
63 /*----------------------------------------------------------------------------*/
65 #define GPIOMUX_EN BIT(3) /* When this bit is set to "1",
66 * GPIO PINs will switch to MAC
68 #define GPIOSEL_GPIO 0 /* UART or JTAG or pure GPIO*/
69 #define GPIOSEL_PHYDBG 1 /* PHYDBG*/
70 #define GPIOSEL_BT 2 /* BT_coex*/
71 #define GPIOSEL_WLANDBG 3 /* WLANDBG*/
72 #define GPIOSEL_GPIO_MASK (~(BIT(0)|BIT(1)))
73 /* HW Radio OFF switch (GPIO BIT) */
74 #define HAL_8192S_HW_GPIO_OFF_BIT BIT(3)
75 #define HAL_8192S_HW_GPIO_OFF_MASK 0xF7
76 #define HAL_8192S_HW_GPIO_WPS_BIT BIT(4)
78 #endif /*__RTL8712_GP_BITDEF_H__*/