drivers/staging/rtl8723bs/include/rtl8723b_xmit.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  ******************************************************************************/
  15 #ifndef __RTL8723B_XMIT_H__
  16 #define __RTL8723B_XMIT_H__
  17
  18 /*  */
  19 /*  Queue Select Value in TxDesc */
  20 /*  */
  21 #define QSLT_BK                                                 0x2/* 0x01 */
  22 #define QSLT_BE                                                 0x0
  23 #define QSLT_VI                                                 0x5/* 0x4 */
  24 #define QSLT_VO                                                 0x7/* 0x6 */
  25 #define QSLT_BEACON                                             0x10
  26 #define QSLT_HIGH                                               0x11
  27 #define QSLT_MGNT                                               0x12
  28 #define QSLT_CMD                                                0x13
  29
  30 #define MAX_TID (15)
  31
  32 /* OFFSET 0 */
  33 #define OFFSET_SZ       0
  34 #define OFFSET_SHT      16
  35 #define BMC             BIT(24)
  36 #define LSG             BIT(26)
  37 #define FSG             BIT(27)
  38 #define OWN             BIT(31)
  39
  40
  41 /* OFFSET 4 */
  42 #define PKT_OFFSET_SZ   0
  43 #define BK              BIT(6)
  44 #define QSEL_SHT        8
  45 #define Rate_ID_SHT     16
  46 #define NAVUSEHDR       BIT(20)
  47 #define PKT_OFFSET_SHT  26
  48 #define HWPC            BIT(31)
  49
  50 /* OFFSET 8 */
  51 #define AGG_EN          BIT(29)
  52
  53 /* OFFSET 12 */
  54 #define SEQ_SHT         16
  55
  56 /* OFFSET 16 */
  57 #define QoS             BIT(6)
  58 #define HW_SEQ_EN       BIT(7)
  59 #define USERATE         BIT(8)
  60 #define DISDATAFB       BIT(10)
  61 #define DATA_SHORT      BIT(24)
  62 #define DATA_BW         BIT(25)
  63
  64 /* OFFSET 20 */
  65 #define SGI             BIT(6)
  66
  67 /*  */
  68 /* defined for TX DESC Operation */
  69 /*  */
  70 typedef struct txdesc_8723b
  71 {
  72         /*  Offset 0 */
  73         u32 pktlen:16;
  74         u32 offset:8;
  75         u32 bmc:1;
  76         u32 htc:1;
  77         u32 rsvd0026:1;
  78         u32 rsvd0027:1;
  79         u32 linip:1;
  80         u32 noacm:1;
  81         u32 gf:1;
  82         u32 rsvd0031:1;
  83
  84         /*  Offset 4 */
  85         u32 macid:7;
  86         u32 rsvd0407:1;
  87         u32 qsel:5;
  88         u32 rdg_nav_ext:1;
  89         u32 lsig_txop_en:1;
  90         u32 pifs:1;
  91         u32 rate_id:5;
  92         u32 en_desc_id:1;
  93         u32 sectype:2;
  94         u32 pkt_offset:5; /*  unit: 8 bytes */
  95         u32 moredata:1;
  96         u32 txop_ps_cap:1;
  97         u32 txop_ps_mode:1;
  98
  99         /*  Offset 8 */
 100         u32 p_aid:9;
 101         u32 rsvd0809:1;
 102         u32 cca_rts:2;
 103         u32 agg_en:1;
 104         u32 rdg_en:1;
 105         u32 null_0:1;
 106         u32 null_1:1;
 107         u32 bk:1;
 108         u32 morefrag:1;
 109         u32 raw:1;
 110         u32 spe_rpt:1;
 111         u32 ampdu_density:3;
 112         u32 bt_null:1;
 113         u32 g_id:6;
 114         u32 rsvd0830:2;
 115
 116         /*  Offset 12 */
 117         u32 wheader_len:4;
 118         u32 chk_en:1;
 119         u32 early_rate:1;
 120         u32 hw_ssn_sel:2;
 121         u32 userate:1;
 122         u32 disrtsfb:1;
 123         u32 disdatafb:1;
 124         u32 cts2self:1;
 125         u32 rtsen:1;
 126         u32 hw_rts_en:1;
 127         u32 port_id:1;
 128         u32 navusehdr:1;
 129         u32 use_max_len:1;
 130         u32 max_agg_num:5;
 131         u32 ndpa:2;
 132         u32 ampdu_max_time:8;
 133
 134         /*  Offset 16 */
 135         u32 datarate:7;
 136         u32 try_rate:1;
 137         u32 data_ratefb_lmt:5;
 138         u32 rts_ratefb_lmt:4;
 139         u32 rty_lmt_en:1;
 140         u32 data_rt_lmt:6;
 141         u32 rtsrate:5;
 142         u32 pcts_en:1;
 143         u32 pcts_mask_idx:2;
 144
 145         /*  Offset 20 */
 146         u32 data_sc:4;
 147         u32 data_short:1;
 148         u32 data_bw:2;
 149         u32 data_ldpc:1;
 150         u32 data_stbc:2;
 151         u32 vcs_stbc:2;
 152         u32 rts_short:1;
 153         u32 rts_sc:4;
 154         u32 rsvd2016:7;
 155         u32 tx_ant:4;
 156         u32 txpwr_offset:3;
 157         u32 rsvd2031:1;
 158
 159         /*  Offset 24 */
 160         u32 sw_define:12;
 161         u32 mbssid:4;
 162         u32 antsel_A:3;
 163         u32 antsel_B:3;
 164         u32 antsel_C:3;
 165         u32 antsel_D:3;
 166         u32 rsvd2428:4;
 167
 168         /*  Offset 28 */
 169         u32 checksum:16;
 170         u32 rsvd2816:8;
 171         u32 usb_txagg_num:8;
 172
 173         /*  Offset 32 */
 174         u32 rts_rc:6;
 175         u32 bar_rty_th:2;
 176         u32 data_rc:6;
 177         u32 rsvd3214:1;
 178         u32 en_hwseq:1;
 179         u32 nextneadpage:8;
 180         u32 tailpage:8;
 181
 182         /*  Offset 36 */
 183         u32 padding_len:11;
 184         u32 txbf_path:1;
 185         u32 seq:12;
 186         u32 final_data_rate:8;
 187 }TXDESC_8723B, *PTXDESC_8723B;
 188
 189 #ifndef __INC_HAL8723BDESC_H
 190 #define __INC_HAL8723BDESC_H
 191
 192 #define RX_STATUS_DESC_SIZE_8723B               24
 193 #define RX_DRV_INFO_SIZE_UNIT_8723B 8
 194
 195
 196 /* DWORD 0 */
 197 #define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value)              SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
 198 #define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value)          SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
 199 #define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value)          SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
 200
 201 #define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc)                       LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
 202 #define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc)                 LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
 203 #define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc)                           LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
 204 #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc)          LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
 205 #define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc)                      LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
 206 #define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc)                           LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
 207 #define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc)                 LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
 208 #define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc)                    LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
 209 #define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc)                 LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
 210 #define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc)                      LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1)
 211 #define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc)             LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1)
 212 #define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc)                           LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
 213 #define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc)                           LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
 214
 215 /* DWORD 1 */
 216 #define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc)                                       LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7)
 217 #define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc)                                         LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4)
 218 #define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc)                                       LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1)
 219 #define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc)          LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1)
 220 #define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc)                               LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1)
 221 #define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc)                              LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4)
 222 #define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc)                              LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1)
 223 #define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc)                       LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1)
 224 #define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc)          LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1)
 225 #define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc)     LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1)
 226 #define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc)                         LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1)
 227 #define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc)                         LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1)
 228 #define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc)                   LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1)
 229 #define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc)                   LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1)
 230 #define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc)                        LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2)
 231 #define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc)                          LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1)
 232 #define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc)                          LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1)
 233
 234 /* DWORD 2 */
 235 #define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc)                                   LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
 236 #define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc)                          LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
 237 #define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc)             LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
 238 #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc)         LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
 239 #define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc)                       LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
 240
 241 /* DWORD 3 */
 242 #define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc)                               LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
 243 #define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc)                                   LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
 244 #define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc)                                  LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
 245 #define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc)             LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
 246 #define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc)                       LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1)
 247 #define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc)                       LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
 248 #define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc)                 LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
 249
 250 /* DWORD 6 */
 251 #define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc)                       LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1)
 252 #define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc)                        LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1)
 253 #define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc)                        LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1)
 254 #define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc)                  LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2)
 255
 256 /* DWORD 5 */
 257 #define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc)                          LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
 258
 259 #define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc)           LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32)
 260 #define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc)                 LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32)
 261
 262 #define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value)  SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value)
 263
 264
 265 /*  Dword 0 */
 266 #define GET_TX_DESC_OWN_8723B(__pTxDesc)                                LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
 267
 268 #define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
 269 #define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
 270 #define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
 271 #define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
 272 #define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value)
 273 #define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
 274 #define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value)
 275 #define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
 276 #define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
 277 #define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
 278
 279 /*  Dword 1 */
 280 #define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
 281 #define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
 282 #define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
 283 #define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
 284 #define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
 285 #define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
 286 #define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
 287 #define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
 288 #define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value)                SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
 289
 290
 291 /*  Dword 2 */
 292 #define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0,  9, __Value)
 293 #define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
 294 #define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value)                SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
 295 #define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value)                SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
 296 #define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value)                                 SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
 297 #define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
 298 #define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
 299 #define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
 300 #define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
 301 #define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value)                    SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
 302 #define SET_TX_DESC_GID_8723B(__pTxDesc, __Value)                       SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value)
 303
 304
 305 /*  Dword 3 */
 306 #define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value)
 307 #define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value)
 308 #define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value)
 309 #define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
 310 #define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
 311 #define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
 312 #define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
 313 #define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
 314 #define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
 315 #define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
 316 #define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value)
 317 #define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
 318 #define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
 319 #define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value)              SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value)
 320 #define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value)            SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
 321
 322 /*  Dword 4 */
 323 #define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
 324 #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
 325 #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
 326 #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
 327 #define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
 328 #define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
 329
 330
 331 /*  Dword 5 */
 332 #define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
 333 #define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value)        SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
 334 #define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
 335 #define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value)
 336 #define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
 337 #define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
 338 #define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
 339 #define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
 340
 341
 342 /*  Dword 6 */
 343 #define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
 344 #define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
 345 #define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value)
 346 #define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value)
 347 #define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value)
 348
 349 /*  Dword 7 */
 350 #define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
 351 #define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
 352 #define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value)                        SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
 353
 354 /*  Dword 8 */
 355 #define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value)                  SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
 356
 357 /*  Dword 9 */
 358 #define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value)                                       SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
 359
 360 /*  Dword 10 */
 361 #define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value)         SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value)
 362 #define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc)  LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32)
 363
 364 /*  Dword 11 */
 365 #define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value)         SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value)
 366
 367
 368 #define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value)                                    SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
 369 #define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value)                                      SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
 370 #define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value)                                    SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
 371 #define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value)                                    SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
 372 #define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value)                                      SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15,  __Value)
 373 #define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value)                                      SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
 374
 375 #endif
 376 /*  */
 377 /*  */
 378 /*      Rate */
 379 /*  */
 380 /*  */
 381 /*  CCK Rates, TxHT = 0 */
 382 #define DESC8723B_RATE1M                                0x00
 383 #define DESC8723B_RATE2M                                0x01
 384 #define DESC8723B_RATE5_5M                              0x02
 385 #define DESC8723B_RATE11M                               0x03
 386
 387 /*  OFDM Rates, TxHT = 0 */
 388 #define DESC8723B_RATE6M                                0x04
 389 #define DESC8723B_RATE9M                                0x05
 390 #define DESC8723B_RATE12M                               0x06
 391 #define DESC8723B_RATE18M                               0x07
 392 #define DESC8723B_RATE24M                               0x08
 393 #define DESC8723B_RATE36M                               0x09
 394 #define DESC8723B_RATE48M                               0x0a
 395 #define DESC8723B_RATE54M                               0x0b
 396
 397 /*  MCS Rates, TxHT = 1 */
 398 #define DESC8723B_RATEMCS0                              0x0c
 399 #define DESC8723B_RATEMCS1                              0x0d
 400 #define DESC8723B_RATEMCS2                              0x0e
 401 #define DESC8723B_RATEMCS3                              0x0f
 402 #define DESC8723B_RATEMCS4                              0x10
 403 #define DESC8723B_RATEMCS5                              0x11
 404 #define DESC8723B_RATEMCS6                              0x12
 405 #define DESC8723B_RATEMCS7                              0x13
 406 #define DESC8723B_RATEMCS8                              0x14
 407 #define DESC8723B_RATEMCS9                              0x15
 408 #define DESC8723B_RATEMCS10             0x16
 409 #define DESC8723B_RATEMCS11             0x17
 410 #define DESC8723B_RATEMCS12             0x18
 411 #define DESC8723B_RATEMCS13             0x19
 412 #define DESC8723B_RATEMCS14             0x1a
 413 #define DESC8723B_RATEMCS15             0x1b
 414 #define DESC8723B_RATEVHTSS1MCS0                0x2c
 415 #define DESC8723B_RATEVHTSS1MCS1                0x2d
 416 #define DESC8723B_RATEVHTSS1MCS2                0x2e
 417 #define DESC8723B_RATEVHTSS1MCS3                0x2f
 418 #define DESC8723B_RATEVHTSS1MCS4                0x30
 419 #define DESC8723B_RATEVHTSS1MCS5                0x31
 420 #define DESC8723B_RATEVHTSS1MCS6                0x32
 421 #define DESC8723B_RATEVHTSS1MCS7                0x33
 422 #define DESC8723B_RATEVHTSS1MCS8                0x34
 423 #define DESC8723B_RATEVHTSS1MCS9                0x35
 424 #define DESC8723B_RATEVHTSS2MCS0                0x36
 425 #define DESC8723B_RATEVHTSS2MCS1                0x37
 426 #define DESC8723B_RATEVHTSS2MCS2                0x38
 427 #define DESC8723B_RATEVHTSS2MCS3                0x39
 428 #define DESC8723B_RATEVHTSS2MCS4                0x3a
 429 #define DESC8723B_RATEVHTSS2MCS5                0x3b
 430 #define DESC8723B_RATEVHTSS2MCS6                0x3c
 431 #define DESC8723B_RATEVHTSS2MCS7                0x3d
 432 #define DESC8723B_RATEVHTSS2MCS8                0x3e
 433 #define DESC8723B_RATEVHTSS2MCS9                0x3f
 434
 435
 436 #define         RX_HAL_IS_CCK_RATE_8723B(pDesc)\
 437                         (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\
 438                         GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M ||\
 439                         GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M ||\
 440                         GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M)
 441
 442
 443 void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem);
 444 void rtl8723b_fill_fake_txdesc(struct adapter *padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
 445
 446 s32 rtl8723bs_init_xmit_priv(struct adapter *padapter);
 447 void rtl8723bs_free_xmit_priv(struct adapter *padapter);
 448 s32 rtl8723bs_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
 449 s32 rtl8723bs_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe);
 450 s32     rtl8723bs_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe);
 451 s32 rtl8723bs_xmit_buf_handler(struct adapter *padapter);
 452 int rtl8723bs_xmit_thread(void *context);
 453 #define hal_xmit_handler rtl8723bs_xmit_buf_handler
 454
 455 u8 BWMapping_8723B(struct adapter * Adapter, struct pkt_attrib *pattrib);
 456 u8 SCMapping_8723B(struct adapter * Adapter, struct pkt_attrib  *pattrib);
 457
 458 #endif