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1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define KLUDGE_FOR_4GB_BOUNDARY 1
59 #define DEBUG_MICROCODE 1
60 #define DBG 1
61 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
62 #define SLIC_OFFLOAD_IP_CHECKSUM 1
63 #define STATS_TIMER_INTERVAL 2
64 #define PING_TIMER_INTERVAL 1
65
66 #include <linux/kernel.h>
67 #include <linux/string.h>
68 #include <linux/errno.h>
69 #include <linux/ioport.h>
70 #include <linux/slab.h>
71 #include <linux/interrupt.h>
72 #include <linux/timer.h>
73 #include <linux/pci.h>
74 #include <linux/spinlock.h>
75 #include <linux/init.h>
76 #include <linux/bitops.h>
77 #include <linux/io.h>
78 #include <linux/netdevice.h>
79 #include <linux/etherdevice.h>
80 #include <linux/skbuff.h>
81 #include <linux/delay.h>
82 #include <linux/debugfs.h>
83 #include <linux/seq_file.h>
84 #include <linux/kthread.h>
85 #include <linux/module.h>
86 #include <linux/moduleparam.h>
87
88 #include <linux/firmware.h>
89 #include <linux/types.h>
90 #include <linux/dma-mapping.h>
91 #include <linux/mii.h>
92 #include <linux/if_vlan.h>
93 #include <asm/unaligned.h>
94
95 #include <linux/ethtool.h>
96 #include <linux/uaccess.h>
97 #include "slichw.h"
98 #include "slic.h"
99
100 static struct net_device_stats *slic_get_stats(struct net_device *dev);
101 static int slic_entry_open(struct net_device *dev);
102 static int slic_entry_halt(struct net_device *dev);
103 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
104 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
105 static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb,
106 void *cmd, u32 skbtype, u32 status);
107 static void slic_config_pci(struct pci_dev *pcidev);
108 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter);
109 static int slic_mac_set_address(struct net_device *dev, void *ptr);
110 static void slic_link_event_handler(struct adapter *adapter);
111 static void slic_upr_request_complete(struct adapter *adapter, u32 isr);
112 static int slic_rspqueue_init(struct adapter *adapter);
113 static void slic_rspqueue_free(struct adapter *adapter);
114 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter);
115 static int slic_cmdq_init(struct adapter *adapter);
116 static void slic_cmdq_free(struct adapter *adapter);
117 static void slic_cmdq_reset(struct adapter *adapter);
118 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page);
119 static void slic_cmdq_getdone(struct adapter *adapter);
120 static void slic_cmdq_putdone_irq(struct adapter *adapter,
121 struct slic_hostcmd *cmd);
122 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter);
123 static int slic_rcvqueue_init(struct adapter *adapter);
124 static int slic_rcvqueue_fill(struct adapter *adapter);
125 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb);
126 static void slic_rcvqueue_free(struct adapter *adapter);
127 static void slic_adapter_set_hwaddr(struct adapter *adapter);
128 static int slic_card_init(struct sliccard *card, struct adapter *adapter);
129 static void slic_intagg_set(struct adapter *adapter, u32 value);
130 static int slic_card_download(struct adapter *adapter);
131 static u32 slic_card_locate(struct adapter *adapter);
132 static int slic_if_init(struct adapter *adapter);
133 static int slic_adapter_allocresources(struct adapter *adapter);
134 static void slic_adapter_freeresources(struct adapter *adapter);
135 static void slic_link_config(struct adapter *adapter, u32 linkspeed,
136 u32 linkduplex);
137 static void slic_unmap_mmio_space(struct adapter *adapter);
138 static void slic_card_cleanup(struct sliccard *card);
139 static void slic_soft_reset(struct adapter *adapter);
140 static bool slic_mac_filter(struct adapter *adapter,
141 struct ether_header *ether_frame);
142 static void slic_mac_address_config(struct adapter *adapter);
143 static void slic_mac_config(struct adapter *adapter);
144 static void slic_mcast_set_mask(struct adapter *adapter);
145 static void slic_config_set(struct adapter *adapter, bool linkchange);
146 static void slic_config_clear(struct adapter *adapter);
147 static void slic_config_get(struct adapter *adapter, u32 config,
148 u32 configh);
149 static void slic_timer_load_check(ulong context);
150 static void slic_assert_fail(void);
151 static ushort slic_eeprom_cksum(char *m, int len);
152 static void slic_upr_start(struct adapter *adapter);
153 static void slic_link_upr_complete(struct adapter *adapter, u32 Isr);
154 static int slic_upr_request(struct adapter *adapter, u32 upr_request,
155 u32 upr_data, u32 upr_data_h, u32 upr_buffer,
156 u32 upr_buffer_h);
157 static void slic_mcast_set_list(struct net_device *dev);
158
159
160 static uint slic_first_init = 1;
161 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
162 "and Storage Accelerator (Non-Accelerated)";
163
164 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
165 static char *slic_product_name = "SLIC Technology(tm) Server "\
166 "and Storage Accelerator (Non-Accelerated)";
167 static char *slic_vendor = "Alacritech, Inc.";
168
169 static int slic_debug = 1;
170 static int debug = -1;
171 static struct net_device *head_netdevice;
172
173 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
174 static int intagg_delay = 100;
175 static u32 dynamic_intagg;
176 static unsigned int rcv_count;
177 static struct dentry *slic_debugfs;
178
179 #define DRV_NAME "slicoss"
180 #define DRV_VERSION "2.0.1"
181 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
182 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
183 "Non-Accelerated Driver"
184 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
185 "All rights reserved."
186 #define PFX DRV_NAME " "
187
188 MODULE_AUTHOR(DRV_AUTHOR);
189 MODULE_DESCRIPTION(DRV_DESCRIPTION);
190 MODULE_LICENSE("Dual BSD/GPL");
191
192 module_param(dynamic_intagg, int, 0);
193 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
194 module_param(intagg_delay, int, 0);
195 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
196
197 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
198 {PCI_VENDOR_ID_ALACRITECH,
199 SLIC_1GB_DEVICE_ID,
200 PCI_ANY_ID, PCI_ANY_ID,},
201 {PCI_VENDOR_ID_ALACRITECH,
202 SLIC_2GB_DEVICE_ID,
203 PCI_ANY_ID, PCI_ANY_ID,},
204 {0,}
205 };
206
207 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
208
209 #ifdef ASSERT
210 #undef ASSERT
211 #endif
212
213 #ifndef ASSERT
214 #define ASSERT(a) do { \
215 if (!(a)) { \
216 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
217 "line %d\n", __func__, __LINE__); \
218 slic_assert_fail(); \
219 } \
220 } while (0)
221 #endif
222
223
224 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
225 { \
226 spin_lock_irqsave(&_adapter->handle_lock.lock, \
227 _adapter->handle_lock.flags); \
228 _pslic_handle = _adapter->pfree_slic_handles; \
229 if (_pslic_handle) { \
230 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
231 _adapter->pfree_slic_handles = _pslic_handle->next; \
232 } \
233 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
234 _adapter->handle_lock.flags); \
235 }
236
237 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
238 { \
239 _pslic_handle->type = SLIC_HANDLE_FREE; \
240 spin_lock_irqsave(&_adapter->handle_lock.lock, \
241 _adapter->handle_lock.flags); \
242 _pslic_handle->next = _adapter->pfree_slic_handles; \
243 _adapter->pfree_slic_handles = _pslic_handle; \
244 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
245 _adapter->handle_lock.flags); \
246 }
247
248 static void slic_debug_init(void);
249 static void slic_debug_cleanup(void);
250 static void slic_debug_adapter_create(struct adapter *adapter);
251 static void slic_debug_adapter_destroy(struct adapter *adapter);
252 static void slic_debug_card_create(struct sliccard *card);
253 static void slic_debug_card_destroy(struct sliccard *card);
254
255 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
256 {
257 writel(value, reg);
258 if (flush)
259 mb();
260 }
261
262 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
263 u32 value, void __iomem *regh, u32 paddrh,
264 bool flush)
265 {
266 spin_lock_irqsave(&adapter->bit64reglock.lock,
267 adapter->bit64reglock.flags);
268 if (paddrh != adapter->curaddrupper) {
269 adapter->curaddrupper = paddrh;
270 writel(paddrh, regh);
271 }
272 writel(value, reg);
273 if (flush)
274 mb();
275 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
276 adapter->bit64reglock.flags);
277 }
278
279 static void slic_init_driver(void)
280 {
281 if (slic_first_init) {
282 slic_first_init = 0;
283 spin_lock_init(&slic_global.driver_lock.lock);
284 slic_debug_init();
285 }
286 }
287
288 static void slic_init_adapter(struct net_device *netdev,
289 struct pci_dev *pcidev,
290 const struct pci_device_id *pci_tbl_entry,
291 void __iomem *memaddr, int chip_idx)
292 {
293 ushort index;
294 struct slic_handle *pslic_handle;
295 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
296
297 /* adapter->pcidev = pcidev;*/
298 adapter->vendid = pci_tbl_entry->vendor;
299 adapter->devid = pci_tbl_entry->device;
300 adapter->subsysid = pci_tbl_entry->subdevice;
301 adapter->busnumber = pcidev->bus->number;
302 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
303 adapter->functionnumber = (pcidev->devfn & 0x7);
304 adapter->memorylength = pci_resource_len(pcidev, 0);
305 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
306 adapter->irq = pcidev->irq;
307 /* adapter->netdev = netdev;*/
308 adapter->next_netdevice = head_netdevice;
309 head_netdevice = netdev;
310 adapter->chipid = chip_idx;
311 adapter->port = 0; /*adapter->functionnumber;*/
312 adapter->cardindex = adapter->port;
313 adapter->memorybase = memaddr;
314 spin_lock_init(&adapter->upr_lock.lock);
315 spin_lock_init(&adapter->bit64reglock.lock);
316 spin_lock_init(&adapter->adapter_lock.lock);
317 spin_lock_init(&adapter->reset_lock.lock);
318 spin_lock_init(&adapter->handle_lock.lock);
319
320 adapter->card_size = 1;
321 /*
322 Initialize slic_handle array
323 */
324 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
325 /*
326 Start with 1. 0 is an invalid host handle.
327 */
328 for (index = 1, pslic_handle = &adapter->slic_handles[1];
329 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
330
331 pslic_handle->token.handle_index = index;
332 pslic_handle->type = SLIC_HANDLE_FREE;
333 pslic_handle->next = adapter->pfree_slic_handles;
334 adapter->pfree_slic_handles = pslic_handle;
335 }
336 adapter->pshmem = (struct slic_shmem *)
337 pci_alloc_consistent(adapter->pcidev,
338 sizeof(struct slic_shmem),
339 &adapter->
340 phys_shmem);
341 ASSERT(adapter->pshmem);
342
343 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
344
345 return;
346 }
347
348 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
349 const struct pci_device_id *pci_tbl_entry)
350 {
351 static int cards_found;
352 static int did_version;
353 int err = -ENODEV;
354 struct net_device *netdev;
355 struct adapter *adapter;
356 void __iomem *memmapped_ioaddr = NULL;
357 u32 status = 0;
358 ulong mmio_start = 0;
359 ulong mmio_len = 0;
360 struct sliccard *card = NULL;
361
362 slic_global.dynamic_intagg = dynamic_intagg;
363
364 err = pci_enable_device(pcidev);
365
366 if (err)
367 return err;
368
369 if (slic_debug > 0 && did_version++ == 0) {
370 printk(KERN_DEBUG "%s\n", slic_banner);
371 printk(KERN_DEBUG "%s\n", slic_proc_version);
372 }
373
374 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
375 if (err) {
376 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
377 if (err)
378 goto err_out_disable_pci;
379 }
380
381 err = pci_request_regions(pcidev, DRV_NAME);
382 if (err)
383 goto err_out_disable_pci;
384
385 pci_set_master(pcidev);
386
387 netdev = alloc_etherdev(sizeof(struct adapter));
388 if (!netdev) {
389 err = -ENOMEM;
390 goto err_out_exit_slic_probe;
391 }
392
393 SET_NETDEV_DEV(netdev, &pcidev->dev);
394
395 pci_set_drvdata(pcidev, netdev);
396 adapter = netdev_priv(netdev);
397 adapter->netdev = netdev;
398 adapter->pcidev = pcidev;
399
400 mmio_start = pci_resource_start(pcidev, 0);
401 mmio_len = pci_resource_len(pcidev, 0);
402
403
404 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
405 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
406 if (!memmapped_ioaddr) {
407 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
408 mmio_len, mmio_start);
409 goto err_out_free_netdev;
410 }
411
412 slic_config_pci(pcidev);
413
414 slic_init_driver();
415
416 slic_init_adapter(netdev,
417 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
418
419 status = slic_card_locate(adapter);
420 if (status) {
421 dev_err(&pcidev->dev, "cannot locate card\n");
422 goto err_out_free_mmio_region;
423 }
424
425 card = adapter->card;
426
427 if (!adapter->allocated) {
428 card->adapters_allocated++;
429 adapter->allocated = 1;
430 }
431
432 status = slic_card_init(card, adapter);
433
434 if (status != STATUS_SUCCESS) {
435 card->state = CARD_FAIL;
436 adapter->state = ADAPT_FAIL;
437 adapter->linkstate = LINK_DOWN;
438 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
439 } else {
440 slic_adapter_set_hwaddr(adapter);
441 }
442
443 netdev->base_addr = (unsigned long)adapter->memorybase;
444 netdev->irq = adapter->irq;
445 netdev->open = slic_entry_open;
446 netdev->stop = slic_entry_halt;
447 netdev->hard_start_xmit = slic_xmit_start;
448 netdev->do_ioctl = slic_ioctl;
449 netdev->set_mac_address = slic_mac_set_address;
450 netdev->get_stats = slic_get_stats;
451 netdev->set_multicast_list = slic_mcast_set_list;
452
453 slic_debug_adapter_create(adapter);
454
455 strcpy(netdev->name, "eth%d");
456 err = register_netdev(netdev);
457 if (err) {
458 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
459 goto err_out_unmap;
460 }
461
462 cards_found++;
463
464 return status;
465
466 err_out_unmap:
467 iounmap(memmapped_ioaddr);
468 err_out_free_mmio_region:
469 release_mem_region(mmio_start, mmio_len);
470 err_out_free_netdev:
471 free_netdev(netdev);
472 err_out_exit_slic_probe:
473 pci_release_regions(pcidev);
474 err_out_disable_pci:
475 pci_disable_device(pcidev);
476 return err;
477 }
478
479 static int slic_entry_open(struct net_device *dev)
480 {
481 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
482 struct sliccard *card = adapter->card;
483 u32 locked = 0;
484 int status;
485
486 ASSERT(adapter);
487 ASSERT(card);
488
489 netif_stop_queue(adapter->netdev);
490
491 spin_lock_irqsave(&slic_global.driver_lock.lock,
492 slic_global.driver_lock.flags);
493 locked = 1;
494 if (!adapter->activated) {
495 card->adapters_activated++;
496 slic_global.num_slic_ports_active++;
497 adapter->activated = 1;
498 }
499 status = slic_if_init(adapter);
500
501 if (status != STATUS_SUCCESS) {
502 if (adapter->activated) {
503 card->adapters_activated--;
504 slic_global.num_slic_ports_active--;
505 adapter->activated = 0;
506 }
507 if (locked) {
508 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
509 slic_global.driver_lock.flags);
510 locked = 0;
511 }
512 return status;
513 }
514 if (!card->master)
515 card->master = adapter;
516
517 if (locked) {
518 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
519 slic_global.driver_lock.flags);
520 locked = 0;
521 }
522
523 return STATUS_SUCCESS;
524 }
525
526 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
527 {
528 struct net_device *dev = pci_get_drvdata(pcidev);
529 u32 mmio_start = 0;
530 uint mmio_len = 0;
531 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
532 struct sliccard *card;
533 struct mcast_address *mcaddr, *mlist;
534
535 ASSERT(adapter);
536 slic_adapter_freeresources(adapter);
537 slic_unmap_mmio_space(adapter);
538 unregister_netdev(dev);
539
540 mmio_start = pci_resource_start(pcidev, 0);
541 mmio_len = pci_resource_len(pcidev, 0);
542
543 release_mem_region(mmio_start, mmio_len);
544
545 iounmap((void __iomem *)dev->base_addr);
546 /* free multicast addresses */
547 mlist = adapter->mcastaddrs;
548 while (mlist) {
549 mcaddr = mlist;
550 mlist = mlist->next;
551 kfree(mcaddr);
552 }
553 ASSERT(adapter->card);
554 card = adapter->card;
555 ASSERT(card->adapters_allocated);
556 card->adapters_allocated--;
557 adapter->allocated = 0;
558 if (!card->adapters_allocated) {
559 struct sliccard *curr_card = slic_global.slic_card;
560 if (curr_card == card) {
561 slic_global.slic_card = card->next;
562 } else {
563 while (curr_card->next != card)
564 curr_card = curr_card->next;
565 ASSERT(curr_card);
566 curr_card->next = card->next;
567 }
568 ASSERT(slic_global.num_slic_cards);
569 slic_global.num_slic_cards--;
570 slic_card_cleanup(card);
571 }
572 kfree(dev);
573 pci_release_regions(pcidev);
574 }
575
576 static int slic_entry_halt(struct net_device *dev)
577 {
578 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
579 struct sliccard *card = adapter->card;
580 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
581
582 spin_lock_irqsave(&slic_global.driver_lock.lock,
583 slic_global.driver_lock.flags);
584 ASSERT(card);
585 netif_stop_queue(adapter->netdev);
586 adapter->state = ADAPT_DOWN;
587 adapter->linkstate = LINK_DOWN;
588 adapter->upr_list = NULL;
589 adapter->upr_busy = 0;
590 adapter->devflags_prev = 0;
591 ASSERT(card->adapter[adapter->cardindex] == adapter);
592 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
593 adapter->all_reg_writes++;
594 adapter->icr_reg_writes++;
595 slic_config_clear(adapter);
596 if (adapter->activated) {
597 card->adapters_activated--;
598 slic_global.num_slic_ports_active--;
599 adapter->activated = 0;
600 }
601 #ifdef AUTOMATIC_RESET
602 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
603 #endif
604 /*
605 * Reset the adapter's cmd queues
606 */
607 slic_cmdq_reset(adapter);
608
609 #ifdef AUTOMATIC_RESET
610 if (!card->adapters_activated)
611 slic_card_init(card, adapter);
612 #endif
613
614 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
615 slic_global.driver_lock.flags);
616 return STATUS_SUCCESS;
617 }
618
619 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
620 {
621 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
622 struct ethtool_cmd edata;
623 struct ethtool_cmd ecmd;
624 u32 data[7];
625 u32 intagg;
626
627 ASSERT(rq);
628 switch (cmd) {
629 case SIOCSLICSETINTAGG:
630 if (copy_from_user(data, rq->ifr_data, 28))
631 return -EFAULT;
632 intagg = data[0];
633 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
634 __func__, intagg);
635 slic_intagg_set(adapter, intagg);
636 return 0;
637
638 #ifdef SLIC_TRACE_DUMP_ENABLED
639 case SIOCSLICTRACEDUMP:
640 {
641 u32 value;
642 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
643
644 if (copy_from_user(data, rq->ifr_data, 28)) {
645 PRINT_ERROR
646 ("slic: copy_from_user FAILED getting \
647 initial simba param\n");
648 return -EFAULT;
649 }
650
651 value = data[0];
652 if (tracemon_request == SLIC_DUMP_DONE) {
653 PRINT_ERROR
654 ("ATK Diagnostic Trace Dump Requested\n");
655 tracemon_request = SLIC_DUMP_REQUESTED;
656 tracemon_request_type = value;
657 tracemon_timestamp = jiffies;
658 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
659 (tracemon_request ==
660 SLIC_DUMP_IN_PROGRESS)) {
661 PRINT_ERROR
662 ("ATK Diagnostic Trace Dump Requested but \
663 already in progress... ignore\n");
664 } else {
665 PRINT_ERROR
666 ("ATK Diagnostic Trace Dump Requested\n");
667 tracemon_request = SLIC_DUMP_REQUESTED;
668 tracemon_request_type = value;
669 tracemon_timestamp = jiffies;
670 }
671 return 0;
672 }
673 #endif
674 case SIOCETHTOOL:
675 ASSERT(adapter);
676 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
677 return -EFAULT;
678
679 if (ecmd.cmd == ETHTOOL_GSET) {
680 edata.supported = (SUPPORTED_10baseT_Half |
681 SUPPORTED_10baseT_Full |
682 SUPPORTED_100baseT_Half |
683 SUPPORTED_100baseT_Full |
684 SUPPORTED_Autoneg | SUPPORTED_MII);
685 edata.port = PORT_MII;
686 edata.transceiver = XCVR_INTERNAL;
687 edata.phy_address = 0;
688 if (adapter->linkspeed == LINK_100MB)
689 edata.speed = SPEED_100;
690 else if (adapter->linkspeed == LINK_10MB)
691 edata.speed = SPEED_10;
692 else
693 edata.speed = 0;
694
695 if (adapter->linkduplex == LINK_FULLD)
696 edata.duplex = DUPLEX_FULL;
697 else
698 edata.duplex = DUPLEX_HALF;
699
700 edata.autoneg = AUTONEG_ENABLE;
701 edata.maxtxpkt = 1;
702 edata.maxrxpkt = 1;
703 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
704 return -EFAULT;
705
706 } else if (ecmd.cmd == ETHTOOL_SSET) {
707 if (!capable(CAP_NET_ADMIN))
708 return -EPERM;
709
710 if (adapter->linkspeed == LINK_100MB)
711 edata.speed = SPEED_100;
712 else if (adapter->linkspeed == LINK_10MB)
713 edata.speed = SPEED_10;
714 else
715 edata.speed = 0;
716
717 if (adapter->linkduplex == LINK_FULLD)
718 edata.duplex = DUPLEX_FULL;
719 else
720 edata.duplex = DUPLEX_HALF;
721
722 edata.autoneg = AUTONEG_ENABLE;
723 edata.maxtxpkt = 1;
724 edata.maxrxpkt = 1;
725 if ((ecmd.speed != edata.speed) ||
726 (ecmd.duplex != edata.duplex)) {
727 u32 speed;
728 u32 duplex;
729
730 if (ecmd.speed == SPEED_10)
731 speed = 0;
732 else
733 speed = PCR_SPEED_100;
734 if (ecmd.duplex == DUPLEX_FULL)
735 duplex = PCR_DUPLEX_FULL;
736 else
737 duplex = 0;
738 slic_link_config(adapter, speed, duplex);
739 slic_link_event_handler(adapter);
740 }
741 }
742 return 0;
743 default:
744 return -EOPNOTSUPP;
745 }
746 }
747
748 #define XMIT_FAIL_LINK_STATE 1
749 #define XMIT_FAIL_ZERO_LENGTH 2
750 #define XMIT_FAIL_HOSTCMD_FAIL 3
751
752 static void slic_xmit_build_request(struct adapter *adapter,
753 struct slic_hostcmd *hcmd, struct sk_buff *skb)
754 {
755 struct slic_host64_cmd *ihcmd;
756 ulong phys_addr;
757
758 ihcmd = &hcmd->cmd64;
759
760 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
761 ihcmd->command = IHCMD_XMT_REQ;
762 ihcmd->u.slic_buffers.totlen = skb->len;
763 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
764 PCI_DMA_TODEVICE);
765 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
766 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
767 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
768 #if defined(CONFIG_X86_64)
769 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
770 (u64) hcmd) + 31) >> 5);
771 #elif defined(CONFIG_X86)
772 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
773 (u32) hcmd) + 31) >> 5);
774 #else
775 Stop Compilation;
776 #endif
777 }
778
779 #define NORMAL_ETHFRAME 0
780
781 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
782 {
783 struct sliccard *card;
784 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
785 struct slic_hostcmd *hcmd = NULL;
786 u32 status = 0;
787 u32 skbtype = NORMAL_ETHFRAME;
788 void *offloadcmd = NULL;
789
790 card = adapter->card;
791 ASSERT(card);
792 if ((adapter->linkstate != LINK_UP) ||
793 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
794 status = XMIT_FAIL_LINK_STATE;
795 goto xmit_fail;
796
797 } else if (skb->len == 0) {
798 status = XMIT_FAIL_ZERO_LENGTH;
799 goto xmit_fail;
800 }
801
802 if (skbtype == NORMAL_ETHFRAME) {
803 hcmd = slic_cmdq_getfree(adapter);
804 if (!hcmd) {
805 adapter->xmitq_full = 1;
806 status = XMIT_FAIL_HOSTCMD_FAIL;
807 goto xmit_fail;
808 }
809 ASSERT(hcmd->pslic_handle);
810 ASSERT(hcmd->cmd64.hosthandle ==
811 hcmd->pslic_handle->token.handle_token);
812 hcmd->skb = skb;
813 hcmd->busy = 1;
814 hcmd->type = SLIC_CMD_DUMB;
815 if (skbtype == NORMAL_ETHFRAME)
816 slic_xmit_build_request(adapter, hcmd, skb);
817 }
818 adapter->stats.tx_packets++;
819 adapter->stats.tx_bytes += skb->len;
820
821 #ifdef DEBUG_DUMP
822 if (adapter->kill_card) {
823 struct slic_host64_cmd ihcmd;
824
825 ihcmd = &hcmd->cmd64;
826
827 ihcmd->flags |= 0x40;
828 adapter->kill_card = 0; /* only do this once */
829 }
830 #endif
831 if (hcmd->paddrh == 0) {
832 slic_reg32_write(&adapter->slic_regs->slic_cbar,
833 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
834 } else {
835 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
836 (hcmd->paddrl | hcmd->cmdsize),
837 &adapter->slic_regs->slic_addr_upper,
838 hcmd->paddrh, DONT_FLUSH);
839 }
840 xmit_done:
841 return 0;
842 xmit_fail:
843 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
844 goto xmit_done;
845 }
846
847 static void slic_xmit_fail(struct adapter *adapter,
848 struct sk_buff *skb,
849 void *cmd, u32 skbtype, u32 status)
850 {
851 if (adapter->xmitq_full)
852 netif_stop_queue(adapter->netdev);
853 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
854 switch (status) {
855 case XMIT_FAIL_LINK_STATE:
856 dev_err(&adapter->netdev->dev,
857 "reject xmit skb[%p: %x] linkstate[%s] "
858 "adapter[%s:%d] card[%s:%d]\n",
859 skb, skb->pkt_type,
860 SLIC_LINKSTATE(adapter->linkstate),
861 SLIC_ADAPTER_STATE(adapter->state),
862 adapter->state,
863 SLIC_CARD_STATE(adapter->card->state),
864 adapter->card->state);
865 break;
866 case XMIT_FAIL_ZERO_LENGTH:
867 dev_err(&adapter->netdev->dev,
868 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
869 skb, skb->pkt_type);
870 break;
871 case XMIT_FAIL_HOSTCMD_FAIL:
872 dev_err(&adapter->netdev->dev,
873 "xmit_start skb[%p] type[%x] No host commands "
874 "available\n", skb, skb->pkt_type);
875 break;
876 default:
877 ASSERT(0);
878 }
879 }
880 dev_kfree_skb(skb);
881 adapter->stats.tx_dropped++;
882 }
883
884 static void slic_rcv_handle_error(struct adapter *adapter,
885 struct slic_rcvbuf *rcvbuf)
886 {
887 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
888
889 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
890 if (hdr->frame_status14 & VRHSTAT_802OE)
891 adapter->if_events.oflow802++;
892 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
893 adapter->if_events.Tprtoflow++;
894 if (hdr->frame_status_b14 & VRHSTATB_802UE)
895 adapter->if_events.uflow802++;
896 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
897 adapter->if_events.rcvearly++;
898 adapter->stats.rx_fifo_errors++;
899 }
900 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
901 adapter->if_events.Bufov++;
902 adapter->stats.rx_over_errors++;
903 }
904 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
905 adapter->if_events.Carre++;
906 adapter->stats.tx_carrier_errors++;
907 }
908 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
909 adapter->if_events.Longe++;
910 if (hdr->frame_status_b14 & VRHSTATB_PREA)
911 adapter->if_events.Invp++;
912 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
913 adapter->if_events.Crc++;
914 adapter->stats.rx_crc_errors++;
915 }
916 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
917 adapter->if_events.Drbl++;
918 if (hdr->frame_status_b14 & VRHSTATB_CODE)
919 adapter->if_events.Code++;
920 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
921 adapter->if_events.TpCsum++;
922 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
923 adapter->if_events.TpHlen++;
924 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
925 adapter->if_events.IpCsum++;
926 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
927 adapter->if_events.IpLen++;
928 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
929 adapter->if_events.IpHlen++;
930 } else {
931 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
932 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
933
934 if (xerr == VGBSTAT_XCSERR)
935 adapter->if_events.TpCsum++;
936 if (xerr == VGBSTAT_XUFLOW)
937 adapter->if_events.Tprtoflow++;
938 if (xerr == VGBSTAT_XHLEN)
939 adapter->if_events.TpHlen++;
940 }
941 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
942 u32 nerr =
943 (hdr->
944 frame_statusGB >> VGBSTAT_NERRSHFT) &
945 VGBSTAT_NERRMSK;
946 if (nerr == VGBSTAT_NCSERR)
947 adapter->if_events.IpCsum++;
948 if (nerr == VGBSTAT_NUFLOW)
949 adapter->if_events.IpLen++;
950 if (nerr == VGBSTAT_NHLEN)
951 adapter->if_events.IpHlen++;
952 }
953 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
954 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
955
956 if (lerr == VGBSTAT_LDEARLY)
957 adapter->if_events.rcvearly++;
958 if (lerr == VGBSTAT_LBOFLO)
959 adapter->if_events.Bufov++;
960 if (lerr == VGBSTAT_LCODERR)
961 adapter->if_events.Code++;
962 if (lerr == VGBSTAT_LDBLNBL)
963 adapter->if_events.Drbl++;
964 if (lerr == VGBSTAT_LCRCERR)
965 adapter->if_events.Crc++;
966 if (lerr == VGBSTAT_LOFLO)
967 adapter->if_events.oflow802++;
968 if (lerr == VGBSTAT_LUFLO)
969 adapter->if_events.uflow802++;
970 }
971 }
972 return;
973 }
974
975 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
976 #define M_FAST_PATH 0x0040
977
978 static void slic_rcv_handler(struct adapter *adapter)
979 {
980 struct sk_buff *skb;
981 struct slic_rcvbuf *rcvbuf;
982 u32 frames = 0;
983
984 while ((skb = slic_rcvqueue_getnext(adapter))) {
985 u32 rx_bytes;
986
987 ASSERT(skb->head);
988 rcvbuf = (struct slic_rcvbuf *)skb->head;
989 adapter->card->events++;
990 if (rcvbuf->status & IRHDDR_ERR) {
991 adapter->rx_errors++;
992 slic_rcv_handle_error(adapter, rcvbuf);
993 slic_rcvqueue_reinsert(adapter, skb);
994 continue;
995 }
996
997 if (!slic_mac_filter(adapter, (struct ether_header *)
998 rcvbuf->data)) {
999 slic_rcvqueue_reinsert(adapter, skb);
1000 continue;
1001 }
1002 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1003 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1004 skb_put(skb, rx_bytes);
1005 adapter->stats.rx_packets++;
1006 adapter->stats.rx_bytes += rx_bytes;
1007 #if SLIC_OFFLOAD_IP_CHECKSUM
1008 skb->ip_summed = CHECKSUM_UNNECESSARY;
1009 #endif
1010
1011 skb->dev = adapter->netdev;
1012 skb->protocol = eth_type_trans(skb, skb->dev);
1013 netif_rx(skb);
1014
1015 ++frames;
1016 #if SLIC_INTERRUPT_PROCESS_LIMIT
1017 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1018 adapter->rcv_interrupt_yields++;
1019 break;
1020 }
1021 #endif
1022 }
1023 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1024 }
1025
1026 static void slic_xmit_complete(struct adapter *adapter)
1027 {
1028 struct slic_hostcmd *hcmd;
1029 struct slic_rspbuf *rspbuf;
1030 u32 frames = 0;
1031 struct slic_handle_word slic_handle_word;
1032
1033 do {
1034 rspbuf = slic_rspqueue_getnext(adapter);
1035 if (!rspbuf)
1036 break;
1037 adapter->xmit_completes++;
1038 adapter->card->events++;
1039 /*
1040 Get the complete host command buffer
1041 */
1042 slic_handle_word.handle_token = rspbuf->hosthandle;
1043 ASSERT(slic_handle_word.handle_index);
1044 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1045 hcmd =
1046 (struct slic_hostcmd *)
1047 adapter->slic_handles[slic_handle_word.handle_index].
1048 address;
1049 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1050 ASSERT(hcmd);
1051 ASSERT(hcmd->pslic_handle ==
1052 &adapter->slic_handles[slic_handle_word.handle_index]);
1053 if (hcmd->type == SLIC_CMD_DUMB) {
1054 if (hcmd->skb)
1055 dev_kfree_skb_irq(hcmd->skb);
1056 slic_cmdq_putdone_irq(adapter, hcmd);
1057 }
1058 rspbuf->status = 0;
1059 rspbuf->hosthandle = 0;
1060 frames++;
1061 } while (1);
1062 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1063 }
1064
1065 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1066 {
1067 struct net_device *dev = (struct net_device *)dev_id;
1068 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1069 u32 isr;
1070
1071 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1072 slic_reg32_write(&adapter->slic_regs->slic_icr,
1073 ICR_INT_MASK, FLUSH);
1074 isr = adapter->isrcopy = adapter->pshmem->isr;
1075 adapter->pshmem->isr = 0;
1076 adapter->num_isrs++;
1077 switch (adapter->card->state) {
1078 case CARD_UP:
1079 if (isr & ~ISR_IO) {
1080 if (isr & ISR_ERR) {
1081 adapter->error_interrupts++;
1082 if (isr & ISR_RMISS) {
1083 int count;
1084 int pre_count;
1085 int errors;
1086
1087 struct slic_rcvqueue *rcvq =
1088 &adapter->rcvqueue;
1089
1090 adapter->
1091 error_rmiss_interrupts++;
1092 if (!rcvq->errors)
1093 rcv_count = rcvq->count;
1094 pre_count = rcvq->count;
1095 errors = rcvq->errors;
1096
1097 while (rcvq->count <
1098 SLIC_RCVQ_FILLTHRESH) {
1099 count =
1100 slic_rcvqueue_fill
1101 (adapter);
1102 if (!count)
1103 break;
1104 }
1105 } else if (isr & ISR_XDROP) {
1106 dev_err(&dev->dev,
1107 "isr & ISR_ERR [%x] "
1108 "ISR_XDROP \n", isr);
1109 } else {
1110 dev_err(&dev->dev,
1111 "isr & ISR_ERR [%x]\n",
1112 isr);
1113 }
1114 }
1115
1116 if (isr & ISR_LEVENT) {
1117 adapter->linkevent_interrupts++;
1118 slic_link_event_handler(adapter);
1119 }
1120
1121 if ((isr & ISR_UPC) ||
1122 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1123 adapter->upr_interrupts++;
1124 slic_upr_request_complete(adapter, isr);
1125 }
1126 }
1127
1128 if (isr & ISR_RCV) {
1129 adapter->rcv_interrupts++;
1130 slic_rcv_handler(adapter);
1131 }
1132
1133 if (isr & ISR_CMD) {
1134 adapter->xmit_interrupts++;
1135 slic_xmit_complete(adapter);
1136 }
1137 break;
1138
1139 case CARD_DOWN:
1140 if ((isr & ISR_UPC) ||
1141 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1142 adapter->upr_interrupts++;
1143 slic_upr_request_complete(adapter, isr);
1144 }
1145 break;
1146
1147 default:
1148 break;
1149 }
1150
1151 adapter->isrcopy = 0;
1152 adapter->all_reg_writes += 2;
1153 adapter->isr_reg_writes++;
1154 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
1155 } else {
1156 adapter->false_interrupts++;
1157 }
1158 return IRQ_HANDLED;
1159 }
1160
1161 /*
1162 * slic_link_event_handler -
1163 *
1164 * Initiate a link configuration sequence. The link configuration begins
1165 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1166 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1167 * routine will follow it up witha UP configuration write command, which
1168 * will also complete asynchronously.
1169 *
1170 */
1171 static void slic_link_event_handler(struct adapter *adapter)
1172 {
1173 int status;
1174 struct slic_shmem *pshmem;
1175
1176 if (adapter->state != ADAPT_UP) {
1177 /* Adapter is not operational. Ignore. */
1178 return;
1179 }
1180
1181 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1182
1183 #if defined(CONFIG_X86_64)
1184 status = slic_upr_request(adapter,
1185 SLIC_UPR_RLSR,
1186 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1187 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1188 0, 0);
1189 #elif defined(CONFIG_X86)
1190 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1191 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1192 0, 0, 0);
1193 #else
1194 Stop compilation;
1195 #endif
1196 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1197 }
1198
1199 static void slic_init_cleanup(struct adapter *adapter)
1200 {
1201 if (adapter->intrregistered) {
1202 adapter->intrregistered = 0;
1203 free_irq(adapter->netdev->irq, adapter->netdev);
1204
1205 }
1206 if (adapter->pshmem) {
1207 pci_free_consistent(adapter->pcidev,
1208 sizeof(struct slic_shmem),
1209 adapter->pshmem, adapter->phys_shmem);
1210 adapter->pshmem = NULL;
1211 adapter->phys_shmem = (dma_addr_t) NULL;
1212 }
1213
1214 if (adapter->pingtimerset) {
1215 adapter->pingtimerset = 0;
1216 del_timer(&adapter->pingtimer);
1217 }
1218
1219 slic_rspqueue_free(adapter);
1220 slic_cmdq_free(adapter);
1221 slic_rcvqueue_free(adapter);
1222 }
1223
1224 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1225 {
1226 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1227 struct net_device_stats *stats;
1228
1229 ASSERT(adapter);
1230 stats = &adapter->stats;
1231 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1232 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1233 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1234 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1235 stats->tx_heartbeat_errors = 0;
1236 stats->tx_aborted_errors = 0;
1237 stats->tx_window_errors = 0;
1238 stats->tx_fifo_errors = 0;
1239 stats->rx_frame_errors = 0;
1240 stats->rx_length_errors = 0;
1241 return &adapter->stats;
1242 }
1243
1244 /*
1245 * Allocate a mcast_address structure to hold the multicast address.
1246 * Link it in.
1247 */
1248 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1249 {
1250 struct mcast_address *mcaddr, *mlist;
1251 bool equaladdr;
1252
1253 /* Check to see if it already exists */
1254 mlist = adapter->mcastaddrs;
1255 while (mlist) {
1256 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1257 if (equaladdr)
1258 return STATUS_SUCCESS;
1259 mlist = mlist->next;
1260 }
1261
1262 /* Doesn't already exist. Allocate a structure to hold it */
1263 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_KERNEL);
1264 if (mcaddr == NULL)
1265 return 1;
1266
1267 memcpy(mcaddr->address, address, 6);
1268
1269 mcaddr->next = adapter->mcastaddrs;
1270 adapter->mcastaddrs = mcaddr;
1271
1272 return STATUS_SUCCESS;
1273 }
1274
1275 /*
1276 * Functions to obtain the CRC corresponding to the destination mac address.
1277 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1278 * the polynomial:
1279 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1280 * x^4 + x^2 + x^1.
1281 *
1282 * After the CRC for the 6 bytes is generated (but before the value is
1283 * complemented),
1284 * we must then transpose the value and return bits 30-23.
1285 *
1286 */
1287 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1288 static u32 slic_crc_init; /* Is table initialized */
1289
1290 /*
1291 * Contruct the CRC32 table
1292 */
1293 static void slic_mcast_init_crc32(void)
1294 {
1295 u32 c; /* CRC shit reg */
1296 u32 e = 0; /* Poly X-or pattern */
1297 int i; /* counter */
1298 int k; /* byte being shifted into crc */
1299
1300 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1301
1302 for (i = 0; i < sizeof(p) / sizeof(int); i++)
1303 e |= 1L << (31 - p[i]);
1304
1305 for (i = 1; i < 256; i++) {
1306 c = i;
1307 for (k = 8; k; k--)
1308 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1309 slic_crc_table[i] = c;
1310 }
1311 }
1312
1313 /*
1314 * Return the MAC hast as described above.
1315 */
1316 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1317 {
1318 u32 crc;
1319 char *p;
1320 int i;
1321 unsigned char machash = 0;
1322
1323 if (!slic_crc_init) {
1324 slic_mcast_init_crc32();
1325 slic_crc_init = 1;
1326 }
1327
1328 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1329 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1330 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1331
1332 /* Return bits 1-8, transposed */
1333 for (i = 1; i < 9; i++)
1334 machash |= (((crc >> i) & 1) << (8 - i));
1335
1336 return machash;
1337 }
1338
1339 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1340 {
1341 unsigned char crcpoly;
1342
1343 /* Get the CRC polynomial for the mac address */
1344 crcpoly = slic_mcast_get_mac_hash(address);
1345
1346 /* We only have space on the SLIC for 64 entries. Lop
1347 * off the top two bits. (2^6 = 64)
1348 */
1349 crcpoly &= 0x3F;
1350
1351 /* OR in the new bit into our 64 bit mask. */
1352 adapter->mcastmask |= (u64) 1 << crcpoly;
1353 }
1354
1355 static void slic_mcast_set_list(struct net_device *dev)
1356 {
1357 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1358 int status = STATUS_SUCCESS;
1359 int i;
1360 char *addresses;
1361 struct dev_mc_list *mc_list = dev->mc_list;
1362 int mc_count = dev->mc_count;
1363
1364 ASSERT(adapter);
1365
1366 for (i = 1; i <= mc_count; i++) {
1367 addresses = (char *) &mc_list->dmi_addr;
1368 if (mc_list->dmi_addrlen == 6) {
1369 status = slic_mcast_add_list(adapter, addresses);
1370 if (status != STATUS_SUCCESS)
1371 break;
1372 } else {
1373 status = -EINVAL;
1374 break;
1375 }
1376 slic_mcast_set_bit(adapter, addresses);
1377 mc_list = mc_list->next;
1378 }
1379
1380 if (adapter->devflags_prev != dev->flags) {
1381 adapter->macopts = MAC_DIRECTED;
1382 if (dev->flags) {
1383 if (dev->flags & IFF_BROADCAST)
1384 adapter->macopts |= MAC_BCAST;
1385 if (dev->flags & IFF_PROMISC)
1386 adapter->macopts |= MAC_PROMISC;
1387 if (dev->flags & IFF_ALLMULTI)
1388 adapter->macopts |= MAC_ALLMCAST;
1389 if (dev->flags & IFF_MULTICAST)
1390 adapter->macopts |= MAC_MCAST;
1391 }
1392 adapter->devflags_prev = dev->flags;
1393 slic_config_set(adapter, true);
1394 } else {
1395 if (status == STATUS_SUCCESS)
1396 slic_mcast_set_mask(adapter);
1397 }
1398 return;
1399 }
1400
1401 static void slic_mcast_set_mask(struct adapter *adapter)
1402 {
1403 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1404
1405 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1406 /* Turn on all multicast addresses. We have to do this for
1407 * promiscuous mode as well as ALLMCAST mode. It saves the
1408 * Microcode from having to keep state about the MAC
1409 * configuration.
1410 */
1411 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1412 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
1413 FLUSH);
1414 } else {
1415 /* Commit our multicast mast to the SLIC by writing to the
1416 * multicast address mask registers
1417 */
1418 slic_reg32_write(&slic_regs->slic_mcastlow,
1419 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1420 slic_reg32_write(&slic_regs->slic_mcasthigh,
1421 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
1422 }
1423 }
1424
1425 static void slic_timer_ping(ulong dev)
1426 {
1427 struct adapter *adapter;
1428 struct sliccard *card;
1429
1430 ASSERT(dev);
1431 adapter = netdev_priv((struct net_device *)dev);
1432 ASSERT(adapter);
1433 card = adapter->card;
1434 ASSERT(card);
1435
1436 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
1437 add_timer(&adapter->pingtimer);
1438 }
1439
1440 /*
1441 * slic_if_init
1442 *
1443 * Perform initialization of our slic interface.
1444 *
1445 */
1446 static int slic_if_init(struct adapter *adapter)
1447 {
1448 struct sliccard *card = adapter->card;
1449 struct net_device *dev = adapter->netdev;
1450 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1451 struct slic_shmem *pshmem;
1452 int status = 0;
1453
1454 ASSERT(card);
1455
1456 /* adapter should be down at this point */
1457 if (adapter->state != ADAPT_DOWN) {
1458 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
1459 __func__);
1460 return -EIO;
1461 }
1462 ASSERT(adapter->linkstate == LINK_DOWN);
1463
1464 adapter->devflags_prev = dev->flags;
1465 adapter->macopts = MAC_DIRECTED;
1466 if (dev->flags) {
1467 if (dev->flags & IFF_BROADCAST)
1468 adapter->macopts |= MAC_BCAST;
1469 if (dev->flags & IFF_PROMISC)
1470 adapter->macopts |= MAC_PROMISC;
1471 if (dev->flags & IFF_ALLMULTI)
1472 adapter->macopts |= MAC_ALLMCAST;
1473 if (dev->flags & IFF_MULTICAST)
1474 adapter->macopts |= MAC_MCAST;
1475 }
1476 status = slic_adapter_allocresources(adapter);
1477 if (status != STATUS_SUCCESS) {
1478 dev_err(&dev->dev,
1479 "%s: slic_adapter_allocresources FAILED %x\n",
1480 __func__, status);
1481 slic_adapter_freeresources(adapter);
1482 return status;
1483 }
1484
1485 if (!adapter->queues_initialized) {
1486 if (slic_rspqueue_init(adapter))
1487 return -ENOMEM;
1488 if (slic_cmdq_init(adapter))
1489 return -ENOMEM;
1490 if (slic_rcvqueue_init(adapter))
1491 return -ENOMEM;
1492 adapter->queues_initialized = 1;
1493 }
1494
1495 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1496 mdelay(1);
1497
1498 if (!adapter->isp_initialized) {
1499 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1500
1501 spin_lock_irqsave(&adapter->bit64reglock.lock,
1502 adapter->bit64reglock.flags);
1503
1504 #if defined(CONFIG_X86_64)
1505 slic_reg32_write(&slic_regs->slic_addr_upper,
1506 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1507 slic_reg32_write(&slic_regs->slic_isp,
1508 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1509 #elif defined(CONFIG_X86)
1510 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1511 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
1512 #else
1513 Stop Compilations
1514 #endif
1515 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1516 adapter->bit64reglock.flags);
1517 adapter->isp_initialized = 1;
1518 }
1519
1520 adapter->state = ADAPT_UP;
1521 if (!card->loadtimerset) {
1522 init_timer(&card->loadtimer);
1523 card->loadtimer.expires =
1524 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
1525 card->loadtimer.data = (ulong) card;
1526 card->loadtimer.function = &slic_timer_load_check;
1527 add_timer(&card->loadtimer);
1528
1529 card->loadtimerset = 1;
1530 }
1531
1532 if (!adapter->pingtimerset) {
1533 init_timer(&adapter->pingtimer);
1534 adapter->pingtimer.expires =
1535 jiffies + (PING_TIMER_INTERVAL * HZ);
1536 adapter->pingtimer.data = (ulong) dev;
1537 adapter->pingtimer.function = &slic_timer_ping;
1538 add_timer(&adapter->pingtimer);
1539 adapter->pingtimerset = 1;
1540 adapter->card->pingstatus = ISR_PINGMASK;
1541 }
1542
1543 /*
1544 * clear any pending events, then enable interrupts
1545 */
1546 adapter->isrcopy = 0;
1547 adapter->pshmem->isr = 0;
1548 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
1549 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1550
1551 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1552 slic_link_event_handler(adapter);
1553
1554 return STATUS_SUCCESS;
1555 }
1556
1557 static void slic_unmap_mmio_space(struct adapter *adapter)
1558 {
1559 if (adapter->slic_regs)
1560 iounmap(adapter->slic_regs);
1561 adapter->slic_regs = NULL;
1562 }
1563
1564 static int slic_adapter_allocresources(struct adapter *adapter)
1565 {
1566 if (!adapter->intrregistered) {
1567 int retval;
1568
1569 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1570 slic_global.driver_lock.flags);
1571
1572 retval = request_irq(adapter->netdev->irq,
1573 &slic_interrupt,
1574 IRQF_SHARED,
1575 adapter->netdev->name, adapter->netdev);
1576
1577 spin_lock_irqsave(&slic_global.driver_lock.lock,
1578 slic_global.driver_lock.flags);
1579
1580 if (retval) {
1581 dev_err(&adapter->netdev->dev,
1582 "request_irq (%s) FAILED [%x]\n",
1583 adapter->netdev->name, retval);
1584 return retval;
1585 }
1586 adapter->intrregistered = 1;
1587 }
1588 return STATUS_SUCCESS;
1589 }
1590
1591 static void slic_config_pci(struct pci_dev *pcidev)
1592 {
1593 u16 pci_command;
1594 u16 new_command;
1595
1596 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1597
1598 new_command = pci_command | PCI_COMMAND_MASTER
1599 | PCI_COMMAND_MEMORY
1600 | PCI_COMMAND_INVALIDATE
1601 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1602 if (pci_command != new_command)
1603 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1604 }
1605
1606 static void slic_adapter_freeresources(struct adapter *adapter)
1607 {
1608 slic_init_cleanup(adapter);
1609 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1610 adapter->error_interrupts = 0;
1611 adapter->rcv_interrupts = 0;
1612 adapter->xmit_interrupts = 0;
1613 adapter->linkevent_interrupts = 0;
1614 adapter->upr_interrupts = 0;
1615 adapter->num_isrs = 0;
1616 adapter->xmit_completes = 0;
1617 adapter->rcv_broadcasts = 0;
1618 adapter->rcv_multicasts = 0;
1619 adapter->rcv_unicasts = 0;
1620 }
1621
1622 /*
1623 * slic_link_config
1624 *
1625 * Write phy control to configure link duplex/speed
1626 *
1627 */
1628 static void slic_link_config(struct adapter *adapter,
1629 u32 linkspeed, u32 linkduplex)
1630 {
1631 u32 __iomem *wphy;
1632 u32 speed;
1633 u32 duplex;
1634 u32 phy_config;
1635 u32 phy_advreg;
1636 u32 phy_gctlreg;
1637
1638 if (adapter->state != ADAPT_UP)
1639 return;
1640
1641 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1642 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1643
1644 if (linkspeed > LINK_1000MB)
1645 linkspeed = LINK_AUTOSPEED;
1646 if (linkduplex > LINK_AUTOD)
1647 linkduplex = LINK_AUTOD;
1648
1649 wphy = &adapter->slic_regs->slic_wphy;
1650
1651 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
1652 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
1653 /* We've got a fiber gigabit interface, and register
1654 * 4 is different in fiber mode than in copper mode
1655 */
1656
1657 /* advertise FD only @1000 Mb */
1658 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
1659 /* enable PAUSE frames */
1660 phy_advreg |= PAR_ASYMPAUSE_FIBER;
1661 slic_reg32_write(wphy, phy_advreg, FLUSH);
1662
1663 if (linkspeed == LINK_AUTOSPEED) {
1664 /* reset phy, enable auto-neg */
1665 phy_config =
1666 (MIICR_REG_PCR |
1667 (PCR_RESET | PCR_AUTONEG |
1668 PCR_AUTONEG_RST));
1669 slic_reg32_write(wphy, phy_config, FLUSH);
1670 } else { /* forced 1000 Mb FD*/
1671 /* power down phy to break link
1672 this may not work) */
1673 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
1674 slic_reg32_write(wphy, phy_config, FLUSH);
1675 /* wait, Marvell says 1 sec,
1676 try to get away with 10 ms */
1677 mdelay(10);
1678
1679 /* disable auto-neg, set speed/duplex,
1680 soft reset phy, powerup */
1681 phy_config =
1682 (MIICR_REG_PCR |
1683 (PCR_RESET | PCR_SPEED_1000 |
1684 PCR_DUPLEX_FULL));
1685 slic_reg32_write(wphy, phy_config, FLUSH);
1686 }
1687 } else { /* copper gigabit */
1688
1689 /* Auto-Negotiate or 1000 Mb must be auto negotiated
1690 * We've got a copper gigabit interface, and
1691 * register 4 is different in copper mode than
1692 * in fiber mode
1693 */
1694 if (linkspeed == LINK_AUTOSPEED) {
1695 /* advertise 10/100 Mb modes */
1696 phy_advreg =
1697 (MIICR_REG_4 |
1698 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
1699 | PAR_ADV10HD));
1700 } else {
1701 /* linkspeed == LINK_1000MB -
1702 don't advertise 10/100 Mb modes */
1703 phy_advreg = MIICR_REG_4;
1704 }
1705 /* enable PAUSE frames */
1706 phy_advreg |= PAR_ASYMPAUSE;
1707 /* required by the Cicada PHY */
1708 phy_advreg |= PAR_802_3;
1709 slic_reg32_write(wphy, phy_advreg, FLUSH);
1710 /* advertise FD only @1000 Mb */
1711 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
1712 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
1713
1714 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1715 /* if a Marvell PHY
1716 enable auto crossover */
1717 phy_config =
1718 (MIICR_REG_16 | (MRV_REG16_XOVERON));
1719 slic_reg32_write(wphy, phy_config, FLUSH);
1720
1721 /* reset phy, enable auto-neg */
1722 phy_config =
1723 (MIICR_REG_PCR |
1724 (PCR_RESET | PCR_AUTONEG |
1725 PCR_AUTONEG_RST));
1726 slic_reg32_write(wphy, phy_config, FLUSH);
1727 } else { /* it's a Cicada PHY */
1728 /* enable and restart auto-neg (don't reset) */
1729 phy_config =
1730 (MIICR_REG_PCR |
1731 (PCR_AUTONEG | PCR_AUTONEG_RST));
1732 slic_reg32_write(wphy, phy_config, FLUSH);
1733 }
1734 }
1735 } else {
1736 /* Forced 10/100 */
1737 if (linkspeed == LINK_10MB)
1738 speed = 0;
1739 else
1740 speed = PCR_SPEED_100;
1741 if (linkduplex == LINK_HALFD)
1742 duplex = 0;
1743 else
1744 duplex = PCR_DUPLEX_FULL;
1745
1746 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1747 /* if a Marvell PHY
1748 disable auto crossover */
1749 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
1750 slic_reg32_write(wphy, phy_config, FLUSH);
1751 }
1752
1753 /* power down phy to break link (this may not work) */
1754 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
1755 slic_reg32_write(wphy, phy_config, FLUSH);
1756
1757 /* wait, Marvell says 1 sec, try to get away with 10 ms */
1758 mdelay(10);
1759
1760 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1761 /* if a Marvell PHY
1762 disable auto-neg, set speed,
1763 soft reset phy, powerup */
1764 phy_config =
1765 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
1766 slic_reg32_write(wphy, phy_config, FLUSH);
1767 } else { /* it's a Cicada PHY */
1768 /* disable auto-neg, set speed, powerup */
1769 phy_config = (MIICR_REG_PCR | (speed | duplex));
1770 slic_reg32_write(wphy, phy_config, FLUSH);
1771 }
1772 }
1773 }
1774
1775 static void slic_card_cleanup(struct sliccard *card)
1776 {
1777 if (card->loadtimerset) {
1778 card->loadtimerset = 0;
1779 del_timer(&card->loadtimer);
1780 }
1781
1782 slic_debug_card_destroy(card);
1783
1784 kfree(card);
1785 }
1786
1787 static int slic_card_download_gbrcv(struct adapter *adapter)
1788 {
1789 const struct firmware *fw;
1790 const char *file = "";
1791 int ret;
1792 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1793 u32 codeaddr;
1794 u32 instruction;
1795 int index = 0;
1796 u32 rcvucodelen = 0;
1797
1798 switch (adapter->devid) {
1799 case SLIC_2GB_DEVICE_ID:
1800 file = "slicoss/oasisrcvucode.sys";
1801 break;
1802 case SLIC_1GB_DEVICE_ID:
1803 file = "slicoss/gbrcvucode.sys";
1804 break;
1805 default:
1806 ASSERT(0);
1807 break;
1808 }
1809
1810 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1811 if (ret) {
1812 dev_err(&adapter->pcidev->dev,
1813 "SLICOSS: Failed to load firmware %s\n", file);
1814 return ret;
1815 }
1816
1817 rcvucodelen = *(u32 *)(fw->data + index);
1818 index += 4;
1819 switch (adapter->devid) {
1820 case SLIC_2GB_DEVICE_ID:
1821 if (rcvucodelen != OasisRcvUCodeLen)
1822 return -EINVAL;
1823 break;
1824 case SLIC_1GB_DEVICE_ID:
1825 if (rcvucodelen != GBRcvUCodeLen)
1826 return -EINVAL;
1827 break;
1828 default:
1829 ASSERT(0);
1830 break;
1831 }
1832 /* start download */
1833 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
1834 /* download the rcv sequencer ucode */
1835 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
1836 /* write out instruction address */
1837 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
1838
1839 instruction = *(u32 *)(fw->data + index);
1840 index += 4;
1841 /* write out the instruction data low addr */
1842 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
1843
1844 instruction = *(u8 *)(fw->data + index);
1845 index++;
1846 /* write out the instruction data high addr */
1847 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
1848 FLUSH);
1849 }
1850
1851 /* download finished */
1852 release_firmware(fw);
1853 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
1854 return 0;
1855 }
1856
1857 static int slic_card_download(struct adapter *adapter)
1858 {
1859 const struct firmware *fw;
1860 const char *file = "";
1861 int ret;
1862 u32 section;
1863 int thissectionsize;
1864 int codeaddr;
1865 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1866 u32 instruction;
1867 u32 baseaddress;
1868 u32 failure;
1869 u32 i;
1870 u32 numsects = 0;
1871 u32 sectsize[3];
1872 u32 sectstart[3];
1873 int ucode_start, index = 0;
1874
1875 switch (adapter->devid) {
1876 case SLIC_2GB_DEVICE_ID:
1877 file = "slicoss/oasisdownload.sys";
1878 break;
1879 case SLIC_1GB_DEVICE_ID:
1880 file = "slicoss/gbdownload.sys";
1881 break;
1882 default:
1883 ASSERT(0);
1884 break;
1885 }
1886 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1887 if (ret) {
1888 dev_err(&adapter->pcidev->dev,
1889 "SLICOSS: Failed to load firmware %s\n", file);
1890 return ret;
1891 }
1892 numsects = *(u32 *)(fw->data + index);
1893 index += 4;
1894 ASSERT(numsects <= 3);
1895 for (i = 0; i < numsects; i++) {
1896 sectsize[i] = *(u32 *)(fw->data + index);
1897 index += 4;
1898 }
1899 for (i = 0; i < numsects; i++) {
1900 sectstart[i] = *(u32 *)(fw->data + index);
1901 index += 4;
1902 }
1903 ucode_start = index;
1904 instruction = *(u32 *)(fw->data + index);
1905 index += 4;
1906 for (section = 0; section < numsects; section++) {
1907 baseaddress = sectstart[section];
1908 thissectionsize = sectsize[section] >> 3;
1909
1910 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1911 /* Write out instruction address */
1912 slic_reg32_write(&slic_regs->slic_wcs,
1913 baseaddress + codeaddr, FLUSH);
1914 /* Write out instruction to low addr */
1915 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
1916 instruction = *(u32 *)(fw->data + index);
1917 index += 4;
1918
1919 /* Write out instruction to high addr */
1920 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
1921 instruction = *(u32 *)(fw->data + index);
1922 index += 4;
1923 }
1924 }
1925 index = ucode_start;
1926 for (section = 0; section < numsects; section++) {
1927 instruction = *(u32 *)(fw->data + index);
1928 baseaddress = sectstart[section];
1929 if (baseaddress < 0x8000)
1930 continue;
1931 thissectionsize = sectsize[section] >> 3;
1932
1933 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1934 /* Write out instruction address */
1935 slic_reg32_write(&slic_regs->slic_wcs,
1936 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
1937 FLUSH);
1938 /* Write out instruction to low addr */
1939 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1940 FLUSH);
1941 instruction = *(u32 *)(fw->data + index);
1942 index += 4;
1943 /* Write out instruction to high addr */
1944 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1945 FLUSH);
1946 instruction = *(u32 *)(fw->data + index);
1947 index += 4;
1948
1949 /* Check SRAM location zero. If it is non-zero. Abort.*/
1950 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
1951 if (failure) {
1952 release_firmware(fw);
1953 return -EIO;
1954 }*/
1955 }
1956 }
1957 release_firmware(fw);
1958 /* Everything OK, kick off the card */
1959 mdelay(10);
1960 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
1961
1962 /* stall for 20 ms, long enough for ucode to init card
1963 and reach mainloop */
1964 mdelay(20);
1965
1966 return STATUS_SUCCESS;
1967 }
1968
1969 static void slic_adapter_set_hwaddr(struct adapter *adapter)
1970 {
1971 struct sliccard *card = adapter->card;
1972
1973 if ((adapter->card) && (card->config_set)) {
1974 memcpy(adapter->macaddr,
1975 card->config.MacInfo[adapter->functionnumber].macaddrA,
1976 sizeof(struct slic_config_mac));
1977 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
1978 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
1979 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
1980 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
1981 }
1982 if (adapter->netdev) {
1983 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
1984 6);
1985 }
1986 }
1987 }
1988
1989 static void slic_intagg_set(struct adapter *adapter, u32 value)
1990 {
1991 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
1992 adapter->card->loadlevel_current = value;
1993 }
1994
1995 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
1996 {
1997 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1998 struct slic_eeprom *peeprom;
1999 struct oslic_eeprom *pOeeprom;
2000 dma_addr_t phys_config;
2001 u32 phys_configh;
2002 u32 phys_configl;
2003 u32 i = 0;
2004 struct slic_shmem *pshmem;
2005 int status;
2006 uint macaddrs = card->card_size;
2007 ushort eecodesize;
2008 ushort dramsize;
2009 ushort ee_chksum;
2010 ushort calc_chksum;
2011 struct slic_config_mac *pmac;
2012 unsigned char fruformat;
2013 unsigned char oemfruformat;
2014 struct atk_fru *patkfru;
2015 union oemfru *poemfru;
2016
2017 /* Reset everything except PCI configuration space */
2018 slic_soft_reset(adapter);
2019
2020 /* Download the microcode */
2021 status = slic_card_download(adapter);
2022
2023 if (status != STATUS_SUCCESS) {
2024 dev_err(&adapter->pcidev->dev,
2025 "download failed bus %d slot %d\n",
2026 adapter->busnumber, adapter->slotnumber);
2027 return status;
2028 }
2029
2030 if (!card->config_set) {
2031 peeprom = pci_alloc_consistent(adapter->pcidev,
2032 sizeof(struct slic_eeprom),
2033 &phys_config);
2034
2035 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2036 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2037
2038 if (!peeprom) {
2039 dev_err(&adapter->pcidev->dev,
2040 "eeprom read failed to get memory "
2041 "bus %d slot %d\n", adapter->busnumber,
2042 adapter->slotnumber);
2043 return -ENOMEM;
2044 } else {
2045 memset(peeprom, 0, sizeof(struct slic_eeprom));
2046 }
2047 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2048 mdelay(1);
2049 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2050
2051 spin_lock_irqsave(&adapter->bit64reglock.lock,
2052 adapter->bit64reglock.flags);
2053 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2054 slic_reg32_write(&slic_regs->slic_isp,
2055 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2056 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2057 adapter->bit64reglock.flags);
2058
2059 slic_config_get(adapter, phys_configl, phys_configh);
2060
2061 for (;;) {
2062 if (adapter->pshmem->isr) {
2063 if (adapter->pshmem->isr & ISR_UPC) {
2064 adapter->pshmem->isr = 0;
2065 slic_reg64_write(adapter,
2066 &slic_regs->slic_isp, 0,
2067 &slic_regs->slic_addr_upper,
2068 0, FLUSH);
2069 slic_reg32_write(&slic_regs->slic_isr,
2070 0, FLUSH);
2071
2072 slic_upr_request_complete(adapter, 0);
2073 break;
2074 } else {
2075 adapter->pshmem->isr = 0;
2076 slic_reg32_write(&slic_regs->slic_isr,
2077 0, FLUSH);
2078 }
2079 } else {
2080 mdelay(1);
2081 i++;
2082 if (i > 5000) {
2083 dev_err(&adapter->pcidev->dev,
2084 "%d config data fetch timed out!\n",
2085 adapter->port);
2086 slic_reg64_write(adapter,
2087 &slic_regs->slic_isp, 0,
2088 &slic_regs->slic_addr_upper,
2089 0, FLUSH);
2090 return -EINVAL;
2091 }
2092 }
2093 }
2094
2095 switch (adapter->devid) {
2096 /* Oasis card */
2097 case SLIC_2GB_DEVICE_ID:
2098 /* extract EEPROM data and pointers to EEPROM data */
2099 pOeeprom = (struct oslic_eeprom *) peeprom;
2100 eecodesize = pOeeprom->EecodeSize;
2101 dramsize = pOeeprom->DramSize;
2102 pmac = pOeeprom->MacInfo;
2103 fruformat = pOeeprom->FruFormat;
2104 patkfru = &pOeeprom->AtkFru;
2105 oemfruformat = pOeeprom->OemFruFormat;
2106 poemfru = &pOeeprom->OemFru;
2107 macaddrs = 2;
2108 /* Minor kludge for Oasis card
2109 get 2 MAC addresses from the
2110 EEPROM to ensure that function 1
2111 gets the Port 1 MAC address */
2112 break;
2113 default:
2114 /* extract EEPROM data and pointers to EEPROM data */
2115 eecodesize = peeprom->EecodeSize;
2116 dramsize = peeprom->DramSize;
2117 pmac = peeprom->u2.mac.MacInfo;
2118 fruformat = peeprom->FruFormat;
2119 patkfru = &peeprom->AtkFru;
2120 oemfruformat = peeprom->OemFruFormat;
2121 poemfru = &peeprom->OemFru;
2122 break;
2123 }
2124
2125 card->config.EepromValid = false;
2126
2127 /* see if the EEPROM is valid by checking it's checksum */
2128 if ((eecodesize <= MAX_EECODE_SIZE) &&
2129 (eecodesize >= MIN_EECODE_SIZE)) {
2130
2131 ee_chksum =
2132 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2133 /*
2134 calculate the EEPROM checksum
2135 */
2136 calc_chksum =
2137 ~slic_eeprom_cksum((char *) peeprom,
2138 (eecodesize - 2));
2139 /*
2140 if the ucdoe chksum flag bit worked,
2141 we wouldn't need this shit
2142 */
2143 if (ee_chksum == calc_chksum)
2144 card->config.EepromValid = true;
2145 }
2146 /* copy in the DRAM size */
2147 card->config.DramSize = dramsize;
2148
2149 /* copy in the MAC address(es) */
2150 for (i = 0; i < macaddrs; i++) {
2151 memcpy(&card->config.MacInfo[i],
2152 &pmac[i], sizeof(struct slic_config_mac));
2153 }
2154
2155 /* copy the Alacritech FRU information */
2156 card->config.FruFormat = fruformat;
2157 memcpy(&card->config.AtkFru, patkfru,
2158 sizeof(struct atk_fru));
2159
2160 pci_free_consistent(adapter->pcidev,
2161 sizeof(struct slic_eeprom),
2162 peeprom, phys_config);
2163
2164 if ((!card->config.EepromValid) &&
2165 (adapter->reg_params.fail_on_bad_eeprom)) {
2166 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2167 &slic_regs->slic_addr_upper,
2168 0, FLUSH);
2169 dev_err(&adapter->pcidev->dev,
2170 "unsupported CONFIGURATION EEPROM invalid\n");
2171 return -EINVAL;
2172 }
2173
2174 card->config_set = 1;
2175 }
2176
2177 if (slic_card_download_gbrcv(adapter)) {
2178 dev_err(&adapter->pcidev->dev,
2179 "unable to download GB receive microcode\n");
2180 return -EINVAL;
2181 }
2182
2183 if (slic_global.dynamic_intagg)
2184 slic_intagg_set(adapter, 0);
2185 else
2186 slic_intagg_set(adapter, intagg_delay);
2187
2188 /*
2189 * Initialize ping status to "ok"
2190 */
2191 card->pingstatus = ISR_PINGMASK;
2192
2193 /*
2194 * Lastly, mark our card state as up and return success
2195 */
2196 card->state = CARD_UP;
2197 card->reset_in_progress = 0;
2198
2199 return STATUS_SUCCESS;
2200 }
2201
2202 static u32 slic_card_locate(struct adapter *adapter)
2203 {
2204 struct sliccard *card = slic_global.slic_card;
2205 struct physcard *physcard = slic_global.phys_card;
2206 ushort card_hostid;
2207 u16 __iomem *hostid_reg;
2208 uint i;
2209 uint rdhostid_offset = 0;
2210
2211 switch (adapter->devid) {
2212 case SLIC_2GB_DEVICE_ID:
2213 rdhostid_offset = SLIC_RDHOSTID_2GB;
2214 break;
2215 case SLIC_1GB_DEVICE_ID:
2216 rdhostid_offset = SLIC_RDHOSTID_1GB;
2217 break;
2218 default:
2219 ASSERT(0);
2220 break;
2221 }
2222
2223 hostid_reg =
2224 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2225 rdhostid_offset);
2226
2227 /* read the 16 bit hostid from SRAM */
2228 card_hostid = (ushort) readw(hostid_reg);
2229
2230 /* Initialize a new card structure if need be */
2231 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2232 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2233 if (card == NULL)
2234 return -ENOMEM;
2235
2236 card->next = slic_global.slic_card;
2237 slic_global.slic_card = card;
2238 card->busnumber = adapter->busnumber;
2239 card->slotnumber = adapter->slotnumber;
2240
2241 /* Find an available cardnum */
2242 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2243 if (slic_global.cardnuminuse[i] == 0) {
2244 slic_global.cardnuminuse[i] = 1;
2245 card->cardnum = i;
2246 break;
2247 }
2248 }
2249 slic_global.num_slic_cards++;
2250
2251 slic_debug_card_create(card);
2252 } else {
2253 /* Card exists, find the card this adapter belongs to */
2254 while (card) {
2255 if (card->cardnum == card_hostid)
2256 break;
2257 card = card->next;
2258 }
2259 }
2260
2261 ASSERT(card);
2262 if (!card)
2263 return STATUS_FAILURE;
2264 /* Put the adapter in the card's adapter list */
2265 ASSERT(card->adapter[adapter->port] == NULL);
2266 if (!card->adapter[adapter->port]) {
2267 card->adapter[adapter->port] = adapter;
2268 adapter->card = card;
2269 }
2270
2271 card->card_size = 1; /* one port per *logical* card */
2272
2273 while (physcard) {
2274 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2275 if (!physcard->adapter[i])
2276 continue;
2277 else
2278 break;
2279 }
2280 ASSERT(i != SLIC_MAX_PORTS);
2281 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2282 break;
2283 physcard = physcard->next;
2284 }
2285 if (!physcard) {
2286 /* no structure allocated for this physical card yet */
2287 physcard = kzalloc(sizeof(struct physcard), GFP_KERNEL);
2288 ASSERT(physcard);
2289
2290 physcard->next = slic_global.phys_card;
2291 slic_global.phys_card = physcard;
2292 physcard->adapters_allocd = 1;
2293 } else {
2294 physcard->adapters_allocd++;
2295 }
2296 /* Note - this is ZERO relative */
2297 adapter->physport = physcard->adapters_allocd - 1;
2298
2299 ASSERT(physcard->adapter[adapter->physport] == NULL);
2300 physcard->adapter[adapter->physport] = adapter;
2301 adapter->physcard = physcard;
2302
2303 return 0;
2304 }
2305
2306 static void slic_soft_reset(struct adapter *adapter)
2307 {
2308 if (adapter->card->state == CARD_UP) {
2309 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
2310 mdelay(1);
2311 }
2312
2313 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
2314 FLUSH);
2315 mdelay(1);
2316 }
2317
2318 static void slic_config_set(struct adapter *adapter, bool linkchange)
2319 {
2320 u32 value;
2321 u32 RcrReset;
2322 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2323
2324 if (linkchange) {
2325 /* Setup MAC */
2326 slic_mac_config(adapter);
2327 RcrReset = GRCR_RESET;
2328 } else {
2329 slic_mac_address_config(adapter);
2330 RcrReset = 0;
2331 }
2332
2333 if (adapter->linkduplex == LINK_FULLD) {
2334 /* setup xmtcfg */
2335 value = (GXCR_RESET | /* Always reset */
2336 GXCR_XMTEN | /* Enable transmit */
2337 GXCR_PAUSEEN); /* Enable pause */
2338
2339 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2340
2341 /* Setup rcvcfg last */
2342 value = (RcrReset | /* Reset, if linkchange */
2343 GRCR_CTLEN | /* Enable CTL frames */
2344 GRCR_ADDRAEN | /* Address A enable */
2345 GRCR_RCVBAD | /* Rcv bad frames */
2346 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2347 } else {
2348 /* setup xmtcfg */
2349 value = (GXCR_RESET | /* Always reset */
2350 GXCR_XMTEN); /* Enable transmit */
2351
2352 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2353
2354 /* Setup rcvcfg last */
2355 value = (RcrReset | /* Reset, if linkchange */
2356 GRCR_ADDRAEN | /* Address A enable */
2357 GRCR_RCVBAD | /* Rcv bad frames */
2358 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2359 }
2360
2361 if (adapter->state != ADAPT_DOWN) {
2362 /* Only enable receive if we are restarting or running */
2363 value |= GRCR_RCVEN;
2364 }
2365
2366 if (adapter->macopts & MAC_PROMISC)
2367 value |= GRCR_RCVALL;
2368
2369 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
2370 }
2371
2372 /*
2373 * Turn off RCV and XMT, power down PHY
2374 */
2375 static void slic_config_clear(struct adapter *adapter)
2376 {
2377 u32 value;
2378 u32 phy_config;
2379 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2380
2381 /* Setup xmtcfg */
2382 value = (GXCR_RESET | /* Always reset */
2383 GXCR_PAUSEEN); /* Enable pause */
2384
2385 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2386
2387 value = (GRCR_RESET | /* Always reset */
2388 GRCR_CTLEN | /* Enable CTL frames */
2389 GRCR_ADDRAEN | /* Address A enable */
2390 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2391
2392 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
2393
2394 /* power down phy */
2395 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2396 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
2397 }
2398
2399 static void slic_config_get(struct adapter *adapter, u32 config,
2400 u32 config_h)
2401 {
2402 int status;
2403
2404 status = slic_upr_request(adapter,
2405 SLIC_UPR_RCONFIG,
2406 (u32) config, (u32) config_h, 0, 0);
2407 ASSERT(status == 0);
2408 }
2409
2410 static void slic_mac_address_config(struct adapter *adapter)
2411 {
2412 u32 value;
2413 u32 value2;
2414 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2415
2416 value = *(u32 *) &adapter->currmacaddr[2];
2417 value = ntohl(value);
2418 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
2419 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
2420
2421 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
2422 adapter->currmacaddr[1]) & 0xFFFF);
2423
2424 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
2425 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
2426
2427 /* Write our multicast mask out to the card. This is done */
2428 /* here in addition to the slic_mcast_addr_set routine */
2429 /* because ALL_MCAST may have been enabled or disabled */
2430 slic_mcast_set_mask(adapter);
2431 }
2432
2433 static void slic_mac_config(struct adapter *adapter)
2434 {
2435 u32 value;
2436 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2437
2438 /* Setup GMAC gaps */
2439 if (adapter->linkspeed == LINK_1000MB) {
2440 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
2441 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
2442 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
2443 } else {
2444 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
2445 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
2446 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
2447 }
2448
2449 /* enable GMII */
2450 if (adapter->linkspeed == LINK_1000MB)
2451 value |= GMCR_GBIT;
2452
2453 /* enable fullduplex */
2454 if ((adapter->linkduplex == LINK_FULLD)
2455 || (adapter->macopts & MAC_LOOPBACK)) {
2456 value |= GMCR_FULLD;
2457 }
2458
2459 /* write mac config */
2460 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
2461
2462 /* setup mac addresses */
2463 slic_mac_address_config(adapter);
2464 }
2465
2466 static bool slic_mac_filter(struct adapter *adapter,
2467 struct ether_header *ether_frame)
2468 {
2469 u32 opts = adapter->macopts;
2470 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
2471 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
2472 bool equaladdr;
2473
2474 if (opts & MAC_PROMISC)
2475 return true;
2476
2477 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
2478 if (opts & MAC_BCAST) {
2479 adapter->rcv_broadcasts++;
2480 return true;
2481 } else {
2482 return false;
2483 }
2484 }
2485
2486 if (ether_frame->ether_dhost[0] & 0x01) {
2487 if (opts & MAC_ALLMCAST) {
2488 adapter->rcv_multicasts++;
2489 adapter->stats.multicast++;
2490 return true;
2491 }
2492 if (opts & MAC_MCAST) {
2493 struct mcast_address *mcaddr = adapter->mcastaddrs;
2494
2495 while (mcaddr) {
2496 ETHER_EQ_ADDR(mcaddr->address,
2497 ether_frame->ether_dhost,
2498 equaladdr);
2499 if (equaladdr) {
2500 adapter->rcv_multicasts++;
2501 adapter->stats.multicast++;
2502 return true;
2503 }
2504 mcaddr = mcaddr->next;
2505 }
2506 return false;
2507 } else {
2508 return false;
2509 }
2510 }
2511 if (opts & MAC_DIRECTED) {
2512 adapter->rcv_unicasts++;
2513 return true;
2514 }
2515 return false;
2516
2517 }
2518
2519 static int slic_mac_set_address(struct net_device *dev, void *ptr)
2520 {
2521 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
2522 struct sockaddr *addr = ptr;
2523
2524 if (netif_running(dev))
2525 return -EBUSY;
2526 if (!adapter)
2527 return -EBUSY;
2528
2529 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2530 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
2531
2532 slic_config_set(adapter, true);
2533 return 0;
2534 }
2535
2536 static void slic_timer_load_check(ulong cardaddr)
2537 {
2538 struct sliccard *card = (struct sliccard *)cardaddr;
2539 struct adapter *adapter = card->master;
2540 u32 __iomem *intagg;
2541 u32 load = card->events;
2542 u32 level = 0;
2543
2544 intagg = &adapter->slic_regs->slic_intagg;
2545
2546 if ((adapter) && (adapter->state == ADAPT_UP) &&
2547 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
2548 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
2549 if (adapter->linkspeed == LINK_1000MB)
2550 level = 100;
2551 else {
2552 if (load > SLIC_LOAD_5)
2553 level = SLIC_INTAGG_5;
2554 else if (load > SLIC_LOAD_4)
2555 level = SLIC_INTAGG_4;
2556 else if (load > SLIC_LOAD_3)
2557 level = SLIC_INTAGG_3;
2558 else if (load > SLIC_LOAD_2)
2559 level = SLIC_INTAGG_2;
2560 else if (load > SLIC_LOAD_1)
2561 level = SLIC_INTAGG_1;
2562 else
2563 level = SLIC_INTAGG_0;
2564 }
2565 if (card->loadlevel_current != level) {
2566 card->loadlevel_current = level;
2567 slic_reg32_write(intagg, level, FLUSH);
2568 }
2569 } else {
2570 if (load > SLIC_LOAD_5)
2571 level = SLIC_INTAGG_5;
2572 else if (load > SLIC_LOAD_4)
2573 level = SLIC_INTAGG_4;
2574 else if (load > SLIC_LOAD_3)
2575 level = SLIC_INTAGG_3;
2576 else if (load > SLIC_LOAD_2)
2577 level = SLIC_INTAGG_2;
2578 else if (load > SLIC_LOAD_1)
2579 level = SLIC_INTAGG_1;
2580 else
2581 level = SLIC_INTAGG_0;
2582 if (card->loadlevel_current != level) {
2583 card->loadlevel_current = level;
2584 slic_reg32_write(intagg, level, FLUSH);
2585 }
2586 }
2587 }
2588 card->events = 0;
2589 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2590 add_timer(&card->loadtimer);
2591 }
2592
2593 static void slic_assert_fail(void)
2594 {
2595 u32 cpuid;
2596 u32 curr_pid;
2597 cpuid = smp_processor_id();
2598 curr_pid = current->pid;
2599
2600 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
2601 __func__, cpuid, curr_pid);
2602 }
2603
2604 static int slic_upr_queue_request(struct adapter *adapter,
2605 u32 upr_request,
2606 u32 upr_data,
2607 u32 upr_data_h,
2608 u32 upr_buffer, u32 upr_buffer_h)
2609 {
2610 struct slic_upr *upr;
2611 struct slic_upr *uprqueue;
2612
2613 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
2614 if (!upr)
2615 return -ENOMEM;
2616
2617 upr->adapter = adapter->port;
2618 upr->upr_request = upr_request;
2619 upr->upr_data = upr_data;
2620 upr->upr_buffer = upr_buffer;
2621 upr->upr_data_h = upr_data_h;
2622 upr->upr_buffer_h = upr_buffer_h;
2623 upr->next = NULL;
2624 if (adapter->upr_list) {
2625 uprqueue = adapter->upr_list;
2626
2627 while (uprqueue->next)
2628 uprqueue = uprqueue->next;
2629 uprqueue->next = upr;
2630 } else {
2631 adapter->upr_list = upr;
2632 }
2633 return STATUS_SUCCESS;
2634 }
2635
2636 static int slic_upr_request(struct adapter *adapter,
2637 u32 upr_request,
2638 u32 upr_data,
2639 u32 upr_data_h,
2640 u32 upr_buffer, u32 upr_buffer_h)
2641 {
2642 int status;
2643
2644 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
2645 status = slic_upr_queue_request(adapter,
2646 upr_request,
2647 upr_data,
2648 upr_data_h, upr_buffer, upr_buffer_h);
2649 if (status != STATUS_SUCCESS) {
2650 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2651 adapter->upr_lock.flags);
2652 return status;
2653 }
2654 slic_upr_start(adapter);
2655 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2656 adapter->upr_lock.flags);
2657 return STATUS_PENDING;
2658 }
2659
2660 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
2661 {
2662 struct sliccard *card = adapter->card;
2663 struct slic_upr *upr;
2664
2665 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
2666 upr = adapter->upr_list;
2667 if (!upr) {
2668 ASSERT(0);
2669 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2670 adapter->upr_lock.flags);
2671 return;
2672 }
2673 adapter->upr_list = upr->next;
2674 upr->next = NULL;
2675 adapter->upr_busy = 0;
2676 ASSERT(adapter->port == upr->adapter);
2677 switch (upr->upr_request) {
2678 case SLIC_UPR_STATS:
2679 {
2680 struct slic_stats *slicstats =
2681 (struct slic_stats *) &adapter->pshmem->inicstats;
2682 struct slic_stats *newstats = slicstats;
2683 struct slic_stats *old = &adapter->inicstats_prev;
2684 struct slicnet_stats *stst = &adapter->slic_stats;
2685
2686 if (isr & ISR_UPCERR) {
2687 dev_err(&adapter->netdev->dev,
2688 "SLIC_UPR_STATS command failed isr[%x]\n",
2689 isr);
2690
2691 break;
2692 }
2693 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
2694 newstats->xmit_tcp_segs_gb,
2695 old->xmit_tcp_segs_gb);
2696
2697 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
2698 newstats->xmit_tcp_bytes_gb,
2699 old->xmit_tcp_bytes_gb);
2700
2701 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
2702 newstats->rcv_tcp_segs_gb,
2703 old->rcv_tcp_segs_gb);
2704
2705 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
2706 newstats->rcv_tcp_bytes_gb,
2707 old->rcv_tcp_bytes_gb);
2708
2709 UPDATE_STATS_GB(stst->iface.xmt_bytes,
2710 newstats->xmit_bytes_gb,
2711 old->xmit_bytes_gb);
2712
2713 UPDATE_STATS_GB(stst->iface.xmt_ucast,
2714 newstats->xmit_unicasts_gb,
2715 old->xmit_unicasts_gb);
2716
2717 UPDATE_STATS_GB(stst->iface.rcv_bytes,
2718 newstats->rcv_bytes_gb,
2719 old->rcv_bytes_gb);
2720
2721 UPDATE_STATS_GB(stst->iface.rcv_ucast,
2722 newstats->rcv_unicasts_gb,
2723 old->rcv_unicasts_gb);
2724
2725 UPDATE_STATS_GB(stst->iface.xmt_errors,
2726 newstats->xmit_collisions_gb,
2727 old->xmit_collisions_gb);
2728
2729 UPDATE_STATS_GB(stst->iface.xmt_errors,
2730 newstats->xmit_excess_collisions_gb,
2731 old->xmit_excess_collisions_gb);
2732
2733 UPDATE_STATS_GB(stst->iface.xmt_errors,
2734 newstats->xmit_other_error_gb,
2735 old->xmit_other_error_gb);
2736
2737 UPDATE_STATS_GB(stst->iface.rcv_errors,
2738 newstats->rcv_other_error_gb,
2739 old->rcv_other_error_gb);
2740
2741 UPDATE_STATS_GB(stst->iface.rcv_discards,
2742 newstats->rcv_drops_gb,
2743 old->rcv_drops_gb);
2744
2745 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
2746 adapter->rcv_drops +=
2747 (newstats->rcv_drops_gb -
2748 old->rcv_drops_gb);
2749 }
2750 memcpy(old, newstats, sizeof(struct slic_stats));
2751 break;
2752 }
2753 case SLIC_UPR_RLSR:
2754 slic_link_upr_complete(adapter, isr);
2755 break;
2756 case SLIC_UPR_RCONFIG:
2757 break;
2758 case SLIC_UPR_RPHY:
2759 ASSERT(0);
2760 break;
2761 case SLIC_UPR_ENLB:
2762 ASSERT(0);
2763 break;
2764 case SLIC_UPR_ENCT:
2765 ASSERT(0);
2766 break;
2767 case SLIC_UPR_PDWN:
2768 ASSERT(0);
2769 break;
2770 case SLIC_UPR_PING:
2771 card->pingstatus |= (isr & ISR_PINGDSMASK);
2772 break;
2773 default:
2774 ASSERT(0);
2775 }
2776 kfree(upr);
2777 slic_upr_start(adapter);
2778 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2779 adapter->upr_lock.flags);
2780 }
2781
2782 static void slic_upr_start(struct adapter *adapter)
2783 {
2784 struct slic_upr *upr;
2785 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2786 /*
2787 char * ptr1;
2788 char * ptr2;
2789 uint cmdoffset;
2790 */
2791 upr = adapter->upr_list;
2792 if (!upr)
2793 return;
2794 if (adapter->upr_busy)
2795 return;
2796 adapter->upr_busy = 1;
2797
2798 switch (upr->upr_request) {
2799 case SLIC_UPR_STATS:
2800 if (upr->upr_data_h == 0) {
2801 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
2802 FLUSH);
2803 } else {
2804 slic_reg64_write(adapter, &slic_regs->slic_stats64,
2805 upr->upr_data,
2806 &slic_regs->slic_addr_upper,
2807 upr->upr_data_h, FLUSH);
2808 }
2809 break;
2810
2811 case SLIC_UPR_RLSR:
2812 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
2813 &slic_regs->slic_addr_upper, upr->upr_data_h,
2814 FLUSH);
2815 break;
2816
2817 case SLIC_UPR_RCONFIG:
2818 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
2819 upr->upr_data, &slic_regs->slic_addr_upper,
2820 upr->upr_data_h, FLUSH);
2821 break;
2822 case SLIC_UPR_PING:
2823 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
2824 break;
2825 default:
2826 ASSERT(0);
2827 }
2828 }
2829
2830 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
2831 {
2832 u32 linkstatus = adapter->pshmem->linkstatus;
2833 uint linkup;
2834 unsigned char linkspeed;
2835 unsigned char linkduplex;
2836
2837 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2838 struct slic_shmem *pshmem;
2839
2840 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2841 #if defined(CONFIG_X86_64)
2842 slic_upr_queue_request(adapter,
2843 SLIC_UPR_RLSR,
2844 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2845 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2846 0, 0);
2847 #elif defined(CONFIG_X86)
2848 slic_upr_queue_request(adapter,
2849 SLIC_UPR_RLSR,
2850 (u32) &pshmem->linkstatus,
2851 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
2852 #else
2853 Stop Compilation;
2854 #endif
2855 return;
2856 }
2857 if (adapter->state != ADAPT_UP)
2858 return;
2859
2860 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2861 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2862
2863 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
2864 if (linkstatus & GIG_SPEED_1000)
2865 linkspeed = LINK_1000MB;
2866 else if (linkstatus & GIG_SPEED_100)
2867 linkspeed = LINK_100MB;
2868 else
2869 linkspeed = LINK_10MB;
2870
2871 if (linkstatus & GIG_FULLDUPLEX)
2872 linkduplex = LINK_FULLD;
2873 else
2874 linkduplex = LINK_HALFD;
2875
2876 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
2877 return;
2878
2879 /* link up event, but nothing has changed */
2880 if ((adapter->linkstate == LINK_UP) &&
2881 (linkup == LINK_UP) &&
2882 (adapter->linkspeed == linkspeed) &&
2883 (adapter->linkduplex == linkduplex))
2884 return;
2885
2886 /* link has changed at this point */
2887
2888 /* link has gone from up to down */
2889 if (linkup == LINK_DOWN) {
2890 adapter->linkstate = LINK_DOWN;
2891 return;
2892 }
2893
2894 /* link has gone from down to up */
2895 adapter->linkspeed = linkspeed;
2896 adapter->linkduplex = linkduplex;
2897
2898 if (adapter->linkstate != LINK_UP) {
2899 /* setup the mac */
2900 slic_config_set(adapter, true);
2901 adapter->linkstate = LINK_UP;
2902 netif_start_queue(adapter->netdev);
2903 }
2904 }
2905
2906 /*
2907 * this is here to checksum the eeprom, there is some ucode bug
2908 * which prevens us from using the ucode result.
2909 * remove this once ucode is fixed.
2910 */
2911 static ushort slic_eeprom_cksum(char *m, int len)
2912 {
2913 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
2914 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
2915 }
2916
2917 u16 *w;
2918 u32 sum = 0;
2919 u32 byte_swapped = 0;
2920 u32 w_int;
2921
2922 union {
2923 char c[2];
2924 ushort s;
2925 } s_util;
2926
2927 union {
2928 ushort s[2];
2929 int l;
2930 } l_util;
2931
2932 l_util.l = 0;
2933 s_util.s = 0;
2934
2935 w = (u16 *)m;
2936 #ifdef CONFIG_X86_64
2937 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
2938 #else
2939 w_int = (u32) (w);
2940 #endif
2941 if ((1 & w_int) && (len > 0)) {
2942 REDUCE;
2943 sum <<= 8;
2944 s_util.c[0] = *(unsigned char *)w;
2945 w = (u16 *)((char *)w + 1);
2946 len--;
2947 byte_swapped = 1;
2948 }
2949
2950 /* Unroll the loop to make overhead from branches &c small. */
2951 while ((len -= 32) >= 0) {
2952 sum += w[0];
2953 sum += w[1];
2954 sum += w[2];
2955 sum += w[3];
2956 sum += w[4];
2957 sum += w[5];
2958 sum += w[6];
2959 sum += w[7];
2960 sum += w[8];
2961 sum += w[9];
2962 sum += w[10];
2963 sum += w[11];
2964 sum += w[12];
2965 sum += w[13];
2966 sum += w[14];
2967 sum += w[15];
2968 w = (u16 *)((ulong) w + 16); /* verify */
2969 }
2970 len += 32;
2971 while ((len -= 8) >= 0) {
2972 sum += w[0];
2973 sum += w[1];
2974 sum += w[2];
2975 sum += w[3];
2976 w = (u16 *)((ulong) w + 4); /* verify */
2977 }
2978 len += 8;
2979 if (len != 0 || byte_swapped != 0) {
2980 REDUCE;
2981 while ((len -= 2) >= 0)
2982 sum += *w++; /* verify */
2983 if (byte_swapped) {
2984 REDUCE;
2985 sum <<= 8;
2986 byte_swapped = 0;
2987 if (len == -1) {
2988 s_util.c[1] = *(char *) w;
2989 sum += s_util.s;
2990 len = 0;
2991 } else {
2992 len = -1;
2993 }
2994
2995 } else if (len == -1) {
2996 s_util.c[0] = *(char *) w;
2997 }
2998
2999 if (len == -1) {
3000 s_util.c[1] = 0;
3001 sum += s_util.s;
3002 }
3003 }
3004 REDUCE;
3005 return (ushort) sum;
3006 }
3007
3008 static int slic_rspqueue_init(struct adapter *adapter)
3009 {
3010 int i;
3011 struct slic_rspqueue *rspq = &adapter->rspqueue;
3012 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3013 u32 paddrh = 0;
3014
3015 ASSERT(adapter->state == ADAPT_DOWN);
3016 memset(rspq, 0, sizeof(struct slic_rspqueue));
3017
3018 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3019
3020 for (i = 0; i < rspq->num_pages; i++) {
3021 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
3022 PAGE_SIZE,
3023 &rspq->paddr[i]);
3024 if (!rspq->vaddr[i]) {
3025 dev_err(&adapter->pcidev->dev,
3026 "pci_alloc_consistent failed\n");
3027 slic_rspqueue_free(adapter);
3028 return STATUS_FAILURE;
3029 }
3030 #ifndef CONFIG_X86_64
3031 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3032 (u32) rspq->vaddr[i]);
3033 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3034 (u32) rspq->paddr[i]);
3035 #endif
3036 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3037
3038 if (paddrh == 0) {
3039 slic_reg32_write(&slic_regs->slic_rbar,
3040 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3041 DONT_FLUSH);
3042 } else {
3043 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
3044 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3045 &slic_regs->slic_addr_upper,
3046 paddrh, DONT_FLUSH);
3047 }
3048 }
3049 rspq->offset = 0;
3050 rspq->pageindex = 0;
3051 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3052 return STATUS_SUCCESS;
3053 }
3054
3055 static void slic_rspqueue_free(struct adapter *adapter)
3056 {
3057 int i;
3058 struct slic_rspqueue *rspq = &adapter->rspqueue;
3059
3060 for (i = 0; i < rspq->num_pages; i++) {
3061 if (rspq->vaddr[i]) {
3062 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3063 rspq->vaddr[i], rspq->paddr[i]);
3064 }
3065 rspq->vaddr[i] = NULL;
3066 rspq->paddr[i] = 0;
3067 }
3068 rspq->offset = 0;
3069 rspq->pageindex = 0;
3070 rspq->rspbuf = NULL;
3071 }
3072
3073 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3074 {
3075 struct slic_rspqueue *rspq = &adapter->rspqueue;
3076 struct slic_rspbuf *buf;
3077
3078 if (!(rspq->rspbuf->status))
3079 return NULL;
3080
3081 buf = rspq->rspbuf;
3082 #ifndef CONFIG_X86_64
3083 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3084 #endif
3085 ASSERT(buf->hosthandle);
3086 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3087 rspq->rspbuf++;
3088 #ifndef CONFIG_X86_64
3089 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3090 (u32) rspq->rspbuf);
3091 #endif
3092 } else {
3093 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3094 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
3095 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3096 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3097 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3098 rspq->offset = 0;
3099 rspq->rspbuf = (struct slic_rspbuf *)
3100 rspq->vaddr[rspq->pageindex];
3101 #ifndef CONFIG_X86_64
3102 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3103 (u32) rspq->rspbuf);
3104 #endif
3105 }
3106 #ifndef CONFIG_X86_64
3107 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3108 #endif
3109 return buf;
3110 }
3111
3112 static void slic_cmdqmem_init(struct adapter *adapter)
3113 {
3114 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3115
3116 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3117 }
3118
3119 static void slic_cmdqmem_free(struct adapter *adapter)
3120 {
3121 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3122 int i;
3123
3124 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3125 if (cmdqmem->pages[i]) {
3126 pci_free_consistent(adapter->pcidev,
3127 PAGE_SIZE,
3128 (void *) cmdqmem->pages[i],
3129 cmdqmem->dma_pages[i]);
3130 }
3131 }
3132 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3133 }
3134
3135 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3136 {
3137 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3138 u32 *pageaddr;
3139
3140 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3141 return NULL;
3142 pageaddr = pci_alloc_consistent(adapter->pcidev,
3143 PAGE_SIZE,
3144 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3145 if (!pageaddr)
3146 return NULL;
3147 #ifndef CONFIG_X86_64
3148 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3149 #endif
3150 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3151 cmdqmem->pagecnt++;
3152 return pageaddr;
3153 }
3154
3155 static int slic_cmdq_init(struct adapter *adapter)
3156 {
3157 int i;
3158 u32 *pageaddr;
3159
3160 ASSERT(adapter->state == ADAPT_DOWN);
3161 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3162 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3163 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3164 spin_lock_init(&adapter->cmdq_all.lock.lock);
3165 spin_lock_init(&adapter->cmdq_free.lock.lock);
3166 spin_lock_init(&adapter->cmdq_done.lock.lock);
3167 slic_cmdqmem_init(adapter);
3168 adapter->slic_handle_ix = 1;
3169 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3170 pageaddr = slic_cmdqmem_addpage(adapter);
3171 #ifndef CONFIG_X86_64
3172 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3173 #endif
3174 if (!pageaddr) {
3175 slic_cmdq_free(adapter);
3176 return STATUS_FAILURE;
3177 }
3178 slic_cmdq_addcmdpage(adapter, pageaddr);
3179 }
3180 adapter->slic_handle_ix = 1;
3181
3182 return STATUS_SUCCESS;
3183 }
3184
3185 static void slic_cmdq_free(struct adapter *adapter)
3186 {
3187 struct slic_hostcmd *cmd;
3188
3189 cmd = adapter->cmdq_all.head;
3190 while (cmd) {
3191 if (cmd->busy) {
3192 struct sk_buff *tempskb;
3193
3194 tempskb = cmd->skb;
3195 if (tempskb) {
3196 cmd->skb = NULL;
3197 dev_kfree_skb_irq(tempskb);
3198 }
3199 }
3200 cmd = cmd->next_all;
3201 }
3202 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3203 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3204 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3205 slic_cmdqmem_free(adapter);
3206 }
3207
3208 static void slic_cmdq_reset(struct adapter *adapter)
3209 {
3210 struct slic_hostcmd *hcmd;
3211 struct sk_buff *skb;
3212 u32 outstanding;
3213
3214 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
3215 adapter->cmdq_free.lock.flags);
3216 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
3217 adapter->cmdq_done.lock.flags);
3218 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
3219 outstanding -= adapter->cmdq_free.count;
3220 hcmd = adapter->cmdq_all.head;
3221 while (hcmd) {
3222 if (hcmd->busy) {
3223 skb = hcmd->skb;
3224 ASSERT(skb);
3225 hcmd->busy = 0;
3226 hcmd->skb = NULL;
3227 dev_kfree_skb_irq(skb);
3228 }
3229 hcmd = hcmd->next_all;
3230 }
3231 adapter->cmdq_free.count = 0;
3232 adapter->cmdq_free.head = NULL;
3233 adapter->cmdq_free.tail = NULL;
3234 adapter->cmdq_done.count = 0;
3235 adapter->cmdq_done.head = NULL;
3236 adapter->cmdq_done.tail = NULL;
3237 adapter->cmdq_free.head = adapter->cmdq_all.head;
3238 hcmd = adapter->cmdq_all.head;
3239 while (hcmd) {
3240 adapter->cmdq_free.count++;
3241 hcmd->next = hcmd->next_all;
3242 hcmd = hcmd->next_all;
3243 }
3244 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
3245 dev_err(&adapter->netdev->dev,
3246 "free_count %d != all count %d\n",
3247 adapter->cmdq_free.count, adapter->cmdq_all.count);
3248 }
3249 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
3250 adapter->cmdq_done.lock.flags);
3251 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
3252 adapter->cmdq_free.lock.flags);
3253 }
3254
3255 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
3256 {
3257 struct slic_hostcmd *cmd;
3258 struct slic_hostcmd *prev;
3259 struct slic_hostcmd *tail;
3260 struct slic_cmdqueue *cmdq;
3261 int cmdcnt;
3262 void *cmdaddr;
3263 ulong phys_addr;
3264 u32 phys_addrl;
3265 u32 phys_addrh;
3266 struct slic_handle *pslic_handle;
3267
3268 cmdaddr = page;
3269 cmd = (struct slic_hostcmd *)cmdaddr;
3270 cmdcnt = 0;
3271
3272 phys_addr = virt_to_bus((void *)page);
3273 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
3274 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
3275
3276 prev = NULL;
3277 tail = cmd;
3278 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
3279 (adapter->slic_handle_ix < 256)) {
3280 /* Allocate and initialize a SLIC_HANDLE for this command */
3281 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
3282 if (pslic_handle == NULL)
3283 ASSERT(0);
3284 ASSERT(pslic_handle ==
3285 &adapter->slic_handles[pslic_handle->token.
3286 handle_index]);
3287 pslic_handle->type = SLIC_HANDLE_CMD;
3288 pslic_handle->address = (void *) cmd;
3289 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
3290 pslic_handle->other_handle = NULL;
3291 pslic_handle->next = NULL;
3292
3293 cmd->pslic_handle = pslic_handle;
3294 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
3295 cmd->busy = false;
3296 cmd->paddrl = phys_addrl;
3297 cmd->paddrh = phys_addrh;
3298 cmd->next_all = prev;
3299 cmd->next = prev;
3300 prev = cmd;
3301 phys_addrl += SLIC_HOSTCMD_SIZE;
3302 cmdaddr += SLIC_HOSTCMD_SIZE;
3303
3304 cmd = (struct slic_hostcmd *)cmdaddr;
3305 cmdcnt++;
3306 }
3307
3308 cmdq = &adapter->cmdq_all;
3309 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3310 tail->next_all = cmdq->head;
3311 cmdq->head = prev;
3312 cmdq = &adapter->cmdq_free;
3313 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
3314 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3315 tail->next = cmdq->head;
3316 cmdq->head = prev;
3317 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
3318 }
3319
3320 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
3321 {
3322 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
3323 struct slic_hostcmd *cmd = NULL;
3324
3325 lock_and_retry:
3326 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
3327 retry:
3328 cmd = cmdq->head;
3329 if (cmd) {
3330 cmdq->head = cmd->next;
3331 cmdq->count--;
3332 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
3333 } else {
3334 slic_cmdq_getdone(adapter);
3335 cmd = cmdq->head;
3336 if (cmd) {
3337 goto retry;
3338 } else {
3339 u32 *pageaddr;
3340
3341 spin_unlock_irqrestore(&cmdq->lock.lock,
3342 cmdq->lock.flags);
3343 pageaddr = slic_cmdqmem_addpage(adapter);
3344 if (pageaddr) {
3345 slic_cmdq_addcmdpage(adapter, pageaddr);
3346 goto lock_and_retry;
3347 }
3348 }
3349 }
3350 return cmd;
3351 }
3352
3353 static void slic_cmdq_getdone(struct adapter *adapter)
3354 {
3355 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
3356 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
3357
3358 ASSERT(free_cmdq->head == NULL);
3359 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
3360
3361 free_cmdq->head = done_cmdq->head;
3362 free_cmdq->count = done_cmdq->count;
3363 done_cmdq->head = NULL;
3364 done_cmdq->tail = NULL;
3365 done_cmdq->count = 0;
3366 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
3367 }
3368
3369 static void slic_cmdq_putdone_irq(struct adapter *adapter,
3370 struct slic_hostcmd *cmd)
3371 {
3372 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
3373
3374 spin_lock(&cmdq->lock.lock);
3375 cmd->busy = 0;
3376 cmd->next = cmdq->head;
3377 cmdq->head = cmd;
3378 cmdq->count++;
3379 if ((adapter->xmitq_full) && (cmdq->count > 10))
3380 netif_wake_queue(adapter->netdev);
3381 spin_unlock(&cmdq->lock.lock);
3382 }
3383
3384 static int slic_rcvqueue_init(struct adapter *adapter)
3385 {
3386 int i, count;
3387 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3388
3389 ASSERT(adapter->state == ADAPT_DOWN);
3390 rcvq->tail = NULL;
3391 rcvq->head = NULL;
3392 rcvq->size = SLIC_RCVQ_ENTRIES;
3393 rcvq->errors = 0;
3394 rcvq->count = 0;
3395 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
3396 count = 0;
3397 while (i) {
3398 count += slic_rcvqueue_fill(adapter);
3399 i--;
3400 }
3401 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
3402 slic_rcvqueue_free(adapter);
3403 return STATUS_FAILURE;
3404 }
3405 return STATUS_SUCCESS;
3406 }
3407
3408 static void slic_rcvqueue_free(struct adapter *adapter)
3409 {
3410 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3411 struct sk_buff *skb;
3412
3413 while (rcvq->head) {
3414 skb = rcvq->head;
3415 rcvq->head = rcvq->head->next;
3416 dev_kfree_skb(skb);
3417 }
3418 rcvq->tail = NULL;
3419 rcvq->head = NULL;
3420 rcvq->count = 0;
3421 }
3422
3423 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
3424 {
3425 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3426 struct sk_buff *skb;
3427 struct slic_rcvbuf *rcvbuf;
3428 int count;
3429
3430 if (rcvq->count) {
3431 skb = rcvq->head;
3432 rcvbuf = (struct slic_rcvbuf *)skb->head;
3433 ASSERT(rcvbuf);
3434
3435 if (rcvbuf->status & IRHDDR_SVALID) {
3436 rcvq->head = rcvq->head->next;
3437 skb->next = NULL;
3438 rcvq->count--;
3439 } else {
3440 skb = NULL;
3441 }
3442 } else {
3443 dev_err(&adapter->netdev->dev,
3444 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
3445 skb = NULL;
3446 }
3447 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
3448 count = slic_rcvqueue_fill(adapter);
3449 if (!count)
3450 break;
3451 }
3452 if (skb)
3453 rcvq->errors = 0;
3454 return skb;
3455 }
3456
3457 static int slic_rcvqueue_fill(struct adapter *adapter)
3458 {
3459 void *paddr;
3460 u32 paddrl;
3461 u32 paddrh;
3462 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3463 int i = 0;
3464 struct device *dev = &adapter->netdev->dev;
3465
3466 while (i < SLIC_RCVQ_FILLENTRIES) {
3467 struct slic_rcvbuf *rcvbuf;
3468 struct sk_buff *skb;
3469 #ifdef KLUDGE_FOR_4GB_BOUNDARY
3470 retry_rcvqfill:
3471 #endif
3472 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
3473 if (skb) {
3474 paddr = (void *)pci_map_single(adapter->pcidev,
3475 skb->data,
3476 SLIC_RCVQ_RCVBUFSIZE,
3477 PCI_DMA_FROMDEVICE);
3478 paddrl = SLIC_GET_ADDR_LOW(paddr);
3479 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3480
3481 skb->len = SLIC_RCVBUF_HEADSIZE;
3482 rcvbuf = (struct slic_rcvbuf *)skb->head;
3483 rcvbuf->status = 0;
3484 skb->next = NULL;
3485 #ifdef KLUDGE_FOR_4GB_BOUNDARY
3486 if (paddrl == 0) {
3487 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3488 __func__);
3489 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3490 dev_err(dev, " skbdata[%p]\n", skb->data);
3491 dev_err(dev, " skblen[%x]\n", skb->len);
3492 dev_err(dev, " paddr[%p]\n", paddr);
3493 dev_err(dev, " paddrl[%x]\n", paddrl);
3494 dev_err(dev, " paddrh[%x]\n", paddrh);
3495 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3496 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3497 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3498 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
3499 goto retry_rcvqfill;
3500 }
3501 #else
3502 if (paddrl == 0) {
3503 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3504 __func__);
3505 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3506 dev_err(dev, " skbdata[%p]\n", skb->data);
3507 dev_err(dev, " skblen[%x]\n", skb->len);
3508 dev_err(dev, " paddr[%p]\n", paddr);
3509 dev_err(dev, " paddrl[%x]\n", paddrl);
3510 dev_err(dev, " paddrh[%x]\n", paddrh);
3511 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3512 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3513 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3514 dev_err(dev, "GIVE TO CARD ANYWAY\n");
3515 }
3516 #endif
3517 if (paddrh == 0) {
3518 slic_reg32_write(&adapter->slic_regs->slic_hbar,
3519 (u32)paddrl, DONT_FLUSH);
3520 } else {
3521 slic_reg64_write(adapter,
3522 &adapter->slic_regs->slic_hbar64,
3523 paddrl,
3524 &adapter->slic_regs->slic_addr_upper,
3525 paddrh, DONT_FLUSH);
3526 }
3527 if (rcvq->head)
3528 rcvq->tail->next = skb;
3529 else
3530 rcvq->head = skb;
3531 rcvq->tail = skb;
3532 rcvq->count++;
3533 i++;
3534 } else {
3535 dev_err(&adapter->netdev->dev,
3536 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
3537 i);
3538 break;
3539 }
3540 }
3541 return i;
3542 }
3543
3544 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
3545 {
3546 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3547 void *paddr;
3548 u32 paddrl;
3549 u32 paddrh;
3550 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
3551 struct device *dev;
3552
3553 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
3554
3555 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
3556 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
3557 rcvbuf->status = 0;
3558 skb->next = NULL;
3559
3560 paddrl = SLIC_GET_ADDR_LOW(paddr);
3561 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3562
3563 if (paddrl == 0) {
3564 dev = &adapter->netdev->dev;
3565 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3566 __func__);
3567 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3568 dev_err(dev, " skbdata[%p]\n", skb->data);
3569 dev_err(dev, " skblen[%x]\n", skb->len);
3570 dev_err(dev, " paddr[%p]\n", paddr);
3571 dev_err(dev, " paddrl[%x]\n", paddrl);
3572 dev_err(dev, " paddrh[%x]\n", paddrh);
3573 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3574 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3575 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3576 }
3577 if (paddrh == 0) {
3578 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
3579 DONT_FLUSH);
3580 } else {
3581 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
3582 paddrl, &adapter->slic_regs->slic_addr_upper,
3583 paddrh, DONT_FLUSH);
3584 }
3585 if (rcvq->head)
3586 rcvq->tail->next = skb;
3587 else
3588 rcvq->head = skb;
3589 rcvq->tail = skb;
3590 rcvq->count++;
3591 return rcvq->count;
3592 }
3593
3594 static int slic_debug_card_show(struct seq_file *seq, void *v)
3595 {
3596 #ifdef MOOKTODO
3597 int i;
3598 struct sliccard *card = seq->private;
3599 struct slic_config *config = &card->config;
3600 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
3601 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
3602 #endif
3603
3604 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
3605 seq_printf(seq, "Microcode versions: \n");
3606 seq_printf(seq, " Gigabit (gb) : %s %s\n",
3607 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
3608 seq_printf(seq, " Gigabit Receiver : %s %s\n",
3609 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
3610 seq_printf(seq, "Vendor : %s\n", slic_vendor);
3611 seq_printf(seq, "Product Name : %s\n", slic_product_name);
3612 #ifdef MOOKTODO
3613 seq_printf(seq, "VendorId : %4.4X\n",
3614 config->VendorId);
3615 seq_printf(seq, "DeviceId : %4.4X\n",
3616 config->DeviceId);
3617 seq_printf(seq, "RevisionId : %2.2x\n",
3618 config->RevisionId);
3619 seq_printf(seq, "Bus # : %d\n", card->busnumber);
3620 seq_printf(seq, "Device # : %d\n", card->slotnumber);
3621 seq_printf(seq, "Interfaces : %d\n", card->card_size);
3622 seq_printf(seq, " Initialized : %d\n",
3623 card->adapters_activated);
3624 seq_printf(seq, " Allocated : %d\n",
3625 card->adapters_allocated);
3626 ASSERT(card->card_size <= SLIC_NBR_MACS);
3627 for (i = 0; i < card->card_size; i++) {
3628 seq_printf(seq,
3629 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
3630 i, config->macinfo[i].macaddrA[0],
3631 config->macinfo[i].macaddrA[1],
3632 config->macinfo[i].macaddrA[2],
3633 config->macinfo[i].macaddrA[3],
3634 config->macinfo[i].macaddrA[4],
3635 config->macinfo[i].macaddrA[5]);
3636 }
3637 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
3638 seq_printf(seq, " -------------------------------\n");
3639 for (i = 0; i < card->adapters_allocated; i++) {
3640 struct adapter *adapter;
3641
3642 adapter = card->adapter[i];
3643 if (adapter) {
3644 seq_printf(seq,
3645 " %d %d %s %s %s 0x%X\n",
3646 adapter->physport, adapter->state,
3647 SLIC_LINKSTATE(adapter->linkstate),
3648 SLIC_DUPLEX(adapter->linkduplex),
3649 SLIC_SPEED(adapter->linkspeed),
3650 (uint) adapter->irq);
3651 }
3652 }
3653 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
3654 seq_printf(seq, "RcvQ max entries : %4.4X\n",
3655 SLIC_RCVQ_ENTRIES);
3656 seq_printf(seq, "Ping Status : %8.8X\n",
3657 card->pingstatus);
3658 seq_printf(seq, "Minimum grant : %2.2x\n",
3659 config->MinGrant);
3660 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
3661 seq_printf(seq, "PciStatus : %4.4x\n",
3662 config->Pcistatus);
3663 seq_printf(seq, "Debug Device Id : %4.4x\n",
3664 config->DbgDevId);
3665 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
3666 config->DramRomFn);
3667 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
3668 config->NetIntPin1);
3669 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
3670 config->NetIntPin1);
3671 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
3672 config->NetIntPin1);
3673 seq_printf(seq, "PM capabilities : %4.4X\n",
3674 config->PMECapab);
3675 seq_printf(seq, "Network Clock Controls : %4.4X\n",
3676 config->NwClkCtrls);
3677
3678 switch (config->FruFormat) {
3679 case ATK_FRU_FORMAT:
3680 {
3681 seq_printf(seq,
3682 "Vendor : Alacritech, Inc.\n");
3683 seq_printf(seq,
3684 "Assembly # : %c%c%c%c%c%c\n",
3685 fru[0], fru[1], fru[2], fru[3], fru[4],
3686 fru[5]);
3687 seq_printf(seq,
3688 "Revision # : %c%c\n",
3689 fru[6], fru[7]);
3690
3691 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
3692 seq_printf(seq,
3693 "Serial # : "
3694 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
3695 fru[8], fru[9], fru[10],
3696 fru[11], fru[12], fru[13],
3697 fru[16], fru[17], fru[18],
3698 fru[19], fru[20], fru[21]);
3699 } else {
3700 seq_printf(seq,
3701 "Serial # : "
3702 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
3703 fru[8], fru[9], fru[10],
3704 fru[11], fru[12], fru[13],
3705 fru[14], fru[15], fru[16],
3706 fru[17], fru[18], fru[19],
3707 fru[20], fru[21]);
3708 }
3709 break;
3710 }
3711
3712 default:
3713 {
3714 seq_printf(seq,
3715 "Vendor : Alacritech, Inc.\n");
3716 seq_printf(seq,
3717 "Serial # : Empty FRU\n");
3718 break;
3719 }
3720 }
3721
3722 switch (config->OEMFruFormat) {
3723 case VENDOR1_FRU_FORMAT:
3724 {
3725 seq_printf(seq, "FRU Information:\n");
3726 seq_printf(seq, " Commodity # : %c\n",
3727 oemfru[0]);
3728 seq_printf(seq,
3729 " Assembly # : %c%c%c%c\n",
3730 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
3731 seq_printf(seq,
3732 " Revision # : %c%c\n",
3733 oemfru[5], oemfru[6]);
3734 seq_printf(seq,
3735 " Supplier # : %c%c\n",
3736 oemfru[7], oemfru[8]);
3737 seq_printf(seq,
3738 " Date : %c%c\n",
3739 oemfru[9], oemfru[10]);
3740 seq_sprintf(seq,
3741 " Sequence # : %c%c%c\n",
3742 oemfru[11], oemfru[12], oemfru[13]);
3743 break;
3744 }
3745
3746 case VENDOR2_FRU_FORMAT:
3747 {
3748 seq_printf(seq, "FRU Information:\n");
3749 seq_printf(seq,
3750 " Part # : "
3751 "%c%c%c%c%c%c%c%c\n",
3752 oemfru[0], oemfru[1], oemfru[2],
3753 oemfru[3], oemfru[4], oemfru[5],
3754 oemfru[6], oemfru[7]);
3755 seq_printf(seq,
3756 " Supplier # : %c%c%c%c%c\n",
3757 oemfru[8], oemfru[9], oemfru[10],
3758 oemfru[11], oemfru[12]);
3759 seq_printf(seq,
3760 " Date : %c%c%c\n",
3761 oemfru[13], oemfru[14], oemfru[15]);
3762 seq_sprintf(seq,
3763 " Sequence # : %c%c%c%c\n",
3764 oemfru[16], oemfru[17], oemfru[18],
3765 oemfru[19]);
3766 break;
3767 }
3768
3769 case VENDOR3_FRU_FORMAT:
3770 {
3771 seq_printf(seq, "FRU Information:\n");
3772 }
3773
3774 case VENDOR4_FRU_FORMAT:
3775 {
3776 seq_printf(seq, "FRU Information:\n");
3777 seq_printf(seq,
3778 " FRU Number : "
3779 "%c%c%c%c%c%c%c%c\n",
3780 oemfru[0], oemfru[1], oemfru[2],
3781 oemfru[3], oemfru[4], oemfru[5],
3782 oemfru[6], oemfru[7]);
3783 seq_sprintf(seq,
3784 " Part Number : "
3785 "%c%c%c%c%c%c%c%c\n",
3786 oemfru[8], oemfru[9], oemfru[10],
3787 oemfru[11], oemfru[12], oemfru[13],
3788 oemfru[14], oemfru[15]);
3789 seq_printf(seq,
3790 " EC Level : "
3791 "%c%c%c%c%c%c%c%c\n",
3792 oemfru[16], oemfru[17], oemfru[18],
3793 oemfru[19], oemfru[20], oemfru[21],
3794 oemfru[22], oemfru[23]);
3795 break;
3796 }
3797
3798 default:
3799 break;
3800 }
3801 #endif
3802
3803 return 0;
3804 }
3805
3806 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
3807 {
3808 struct adapter *adapter = seq->private;
3809
3810 if ((adapter->netdev) && (adapter->netdev->name)) {
3811 seq_printf(seq, "info: interface : %s\n",
3812 adapter->netdev->name);
3813 }
3814 seq_printf(seq, "info: status : %s\n",
3815 SLIC_LINKSTATE(adapter->linkstate));
3816 seq_printf(seq, "info: port : %d\n",
3817 adapter->physport);
3818 seq_printf(seq, "info: speed : %s\n",
3819 SLIC_SPEED(adapter->linkspeed));
3820 seq_printf(seq, "info: duplex : %s\n",
3821 SLIC_DUPLEX(adapter->linkduplex));
3822 seq_printf(seq, "info: irq : 0x%X\n",
3823 (uint) adapter->irq);
3824 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
3825 adapter->card->loadlevel_current);
3826 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
3827 SLIC_RCVQ_ENTRIES);
3828 seq_printf(seq, "info: RcvQ current : %4.4X\n",
3829 adapter->rcvqueue.count);
3830 seq_printf(seq, "rx stats: packets : %8.8lX\n",
3831 adapter->stats.rx_packets);
3832 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
3833 adapter->stats.rx_bytes);
3834 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
3835 adapter->rcv_broadcasts);
3836 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
3837 adapter->rcv_multicasts);
3838 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
3839 adapter->rcv_unicasts);
3840 seq_printf(seq, "rx stats: errors : %8.8X\n",
3841 (u32) adapter->slic_stats.iface.rcv_errors);
3842 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
3843 (u32) adapter->slic_stats.iface.rcv_discards);
3844 seq_printf(seq, "rx stats: drops : %8.8X\n",
3845 (u32) adapter->rcv_drops);
3846 seq_printf(seq, "tx stats: packets : %8.8lX\n",
3847 adapter->stats.tx_packets);
3848 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
3849 adapter->stats.tx_bytes);
3850 seq_printf(seq, "tx stats: errors : %8.8X\n",
3851 (u32) adapter->slic_stats.iface.xmt_errors);
3852 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
3853 adapter->stats.multicast);
3854 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
3855 (u32) adapter->slic_stats.iface.xmit_collisions);
3856 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
3857 adapter->max_isr_rcvs);
3858 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
3859 adapter->rcv_interrupt_yields);
3860 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
3861 adapter->max_isr_xmits);
3862 seq_printf(seq, "perf: error interrupts : %8.8X\n",
3863 adapter->error_interrupts);
3864 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
3865 adapter->error_rmiss_interrupts);
3866 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
3867 adapter->rcv_interrupts);
3868 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
3869 adapter->xmit_interrupts);
3870 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
3871 adapter->linkevent_interrupts);
3872 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
3873 adapter->upr_interrupts);
3874 seq_printf(seq, "perf: interrupt count : %8.8X\n",
3875 adapter->num_isrs);
3876 seq_printf(seq, "perf: false interrupts : %8.8X\n",
3877 adapter->false_interrupts);
3878 seq_printf(seq, "perf: All register writes : %8.8X\n",
3879 adapter->all_reg_writes);
3880 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
3881 adapter->icr_reg_writes);
3882 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
3883 adapter->isr_reg_writes);
3884 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
3885 adapter->if_events.oflow802);
3886 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
3887 adapter->if_events.Tprtoflow);
3888 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
3889 adapter->if_events.uflow802);
3890 seq_printf(seq, "ifevents: receive early : %8.8X\n",
3891 adapter->if_events.rcvearly);
3892 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
3893 adapter->if_events.Bufov);
3894 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
3895 adapter->if_events.Carre);
3896 seq_printf(seq, "ifevents: Long : %8.8X\n",
3897 adapter->if_events.Longe);
3898 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
3899 adapter->if_events.Invp);
3900 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
3901 adapter->if_events.Crc);
3902 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
3903 adapter->if_events.Drbl);
3904 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
3905 adapter->if_events.Code);
3906 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
3907 adapter->if_events.TpCsum);
3908 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
3909 adapter->if_events.TpHlen);
3910 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
3911 adapter->if_events.IpCsum);
3912 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
3913 adapter->if_events.IpLen);
3914 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
3915 adapter->if_events.IpHlen);
3916
3917 return 0;
3918 }
3919 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
3920 {
3921 return single_open(file, slic_debug_adapter_show, inode->i_private);
3922 }
3923
3924 static int slic_debug_card_open(struct inode *inode, struct file *file)
3925 {
3926 return single_open(file, slic_debug_card_show, inode->i_private);
3927 }
3928
3929 static const struct file_operations slic_debug_adapter_fops = {
3930 .owner = THIS_MODULE,
3931 .open = slic_debug_adapter_open,
3932 .read = seq_read,
3933 .llseek = seq_lseek,
3934 .release = single_release,
3935 };
3936
3937 static const struct file_operations slic_debug_card_fops = {
3938 .owner = THIS_MODULE,
3939 .open = slic_debug_card_open,
3940 .read = seq_read,
3941 .llseek = seq_lseek,
3942 .release = single_release,
3943 };
3944
3945 static void slic_debug_adapter_create(struct adapter *adapter)
3946 {
3947 struct dentry *d;
3948 char name[7];
3949 struct sliccard *card = adapter->card;
3950
3951 if (!card->debugfs_dir)
3952 return;
3953
3954 sprintf(name, "port%d", adapter->port);
3955 d = debugfs_create_file(name, S_IRUGO,
3956 card->debugfs_dir, adapter,
3957 &slic_debug_adapter_fops);
3958 if (!d || IS_ERR(d))
3959 pr_info(PFX "%s: debugfs create failed\n", name);
3960 else
3961 adapter->debugfs_entry = d;
3962 }
3963
3964 static void slic_debug_adapter_destroy(struct adapter *adapter)
3965 {
3966 if (adapter->debugfs_entry) {
3967 debugfs_remove(adapter->debugfs_entry);
3968 adapter->debugfs_entry = NULL;
3969 }
3970 }
3971
3972 static void slic_debug_card_create(struct sliccard *card)
3973 {
3974 struct dentry *d;
3975 char name[IFNAMSIZ];
3976
3977 snprintf(name, sizeof(name), "slic%d", card->cardnum);
3978 d = debugfs_create_dir(name, slic_debugfs);
3979 if (!d || IS_ERR(d))
3980 pr_info(PFX "%s: debugfs create dir failed\n",
3981 name);
3982 else {
3983 card->debugfs_dir = d;
3984 d = debugfs_create_file("cardinfo", S_IRUGO,
3985 slic_debugfs, card,
3986 &slic_debug_card_fops);
3987 if (!d || IS_ERR(d))
3988 pr_info(PFX "%s: debugfs create failed\n",
3989 name);
3990 else
3991 card->debugfs_cardinfo = d;
3992 }
3993 }
3994
3995 static void slic_debug_card_destroy(struct sliccard *card)
3996 {
3997 int i;
3998
3999 for (i = 0; i < card->card_size; i++) {
4000 struct adapter *adapter;
4001
4002 adapter = card->adapter[i];
4003 if (adapter)
4004 slic_debug_adapter_destroy(adapter);
4005 }
4006 if (card->debugfs_cardinfo) {
4007 debugfs_remove(card->debugfs_cardinfo);
4008 card->debugfs_cardinfo = NULL;
4009 }
4010 if (card->debugfs_dir) {
4011 debugfs_remove(card->debugfs_dir);
4012 card->debugfs_dir = NULL;
4013 }
4014 }
4015
4016 static void slic_debug_init(void)
4017 {
4018 struct dentry *ent;
4019
4020 ent = debugfs_create_dir("slic", NULL);
4021 if (!ent || IS_ERR(ent)) {
4022 pr_info(PFX "debugfs create directory failed\n");
4023 return;
4024 }
4025
4026 slic_debugfs = ent;
4027 }
4028
4029 static void slic_debug_cleanup(void)
4030 {
4031 if (slic_debugfs) {
4032 debugfs_remove(slic_debugfs);
4033 slic_debugfs = NULL;
4034 }
4035 }
4036
4037 /******************************************************************************/
4038 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
4039 /******************************************************************************/
4040
4041 static struct pci_driver slic_driver = {
4042 .name = DRV_NAME,
4043 .id_table = slic_pci_tbl,
4044 .probe = slic_entry_probe,
4045 .remove = slic_entry_remove,
4046 };
4047
4048 static int __init slic_module_init(void)
4049 {
4050 slic_init_driver();
4051
4052 if (debug >= 0 && slic_debug != debug)
4053 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
4054 debug);
4055 if (debug >= 0)
4056 slic_debug = debug;
4057
4058 return pci_register_driver(&slic_driver);
4059 }
4060
4061 static void __exit slic_module_cleanup(void)
4062 {
4063 pci_unregister_driver(&slic_driver);
4064 slic_debug_cleanup();
4065 }
4066
4067 module_init(slic_module_init);
4068 module_exit(slic_module_cleanup);