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1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define KLUDGE_FOR_4GB_BOUNDARY 1
59 #define DEBUG_MICROCODE 1
60 #define DBG 1
61 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
62 #define SLIC_OFFLOAD_IP_CHECKSUM 1
63 #define STATS_TIMER_INTERVAL 2
64 #define PING_TIMER_INTERVAL 1
65
66 #include <linux/kernel.h>
67 #include <linux/string.h>
68 #include <linux/errno.h>
69 #include <linux/ioport.h>
70 #include <linux/slab.h>
71 #include <linux/interrupt.h>
72 #include <linux/timer.h>
73 #include <linux/pci.h>
74 #include <linux/spinlock.h>
75 #include <linux/init.h>
76 #include <linux/bitops.h>
77 #include <linux/io.h>
78 #include <linux/netdevice.h>
79 #include <linux/etherdevice.h>
80 #include <linux/skbuff.h>
81 #include <linux/delay.h>
82 #include <linux/debugfs.h>
83 #include <linux/seq_file.h>
84 #include <linux/kthread.h>
85 #include <linux/module.h>
86 #include <linux/moduleparam.h>
87
88 #include <linux/firmware.h>
89 #include <linux/types.h>
90 #include <linux/dma-mapping.h>
91 #include <linux/mii.h>
92 #include <linux/if_vlan.h>
93 #include <asm/unaligned.h>
94
95 #include <linux/ethtool.h>
96 #include <linux/uaccess.h>
97 #include "slichw.h"
98 #include "slic.h"
99
100 static struct net_device_stats *slic_get_stats(struct net_device *dev);
101 static int slic_entry_open(struct net_device *dev);
102 static int slic_entry_halt(struct net_device *dev);
103 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
104 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
105 static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb,
106 void *cmd, u32 skbtype, u32 status);
107 static void slic_config_pci(struct pci_dev *pcidev);
108 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter);
109 static int slic_mac_set_address(struct net_device *dev, void *ptr);
110 static void slic_link_event_handler(struct adapter *adapter);
111 static void slic_upr_request_complete(struct adapter *adapter, u32 isr);
112 static int slic_rspqueue_init(struct adapter *adapter);
113 static void slic_rspqueue_free(struct adapter *adapter);
114 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter);
115 static int slic_cmdq_init(struct adapter *adapter);
116 static void slic_cmdq_free(struct adapter *adapter);
117 static void slic_cmdq_reset(struct adapter *adapter);
118 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page);
119 static void slic_cmdq_getdone(struct adapter *adapter);
120 static void slic_cmdq_putdone_irq(struct adapter *adapter,
121 struct slic_hostcmd *cmd);
122 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter);
123 static int slic_rcvqueue_init(struct adapter *adapter);
124 static int slic_rcvqueue_fill(struct adapter *adapter);
125 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb);
126 static void slic_rcvqueue_free(struct adapter *adapter);
127 static void slic_adapter_set_hwaddr(struct adapter *adapter);
128 static int slic_card_init(struct sliccard *card, struct adapter *adapter);
129 static void slic_intagg_set(struct adapter *adapter, u32 value);
130 static int slic_card_download(struct adapter *adapter);
131 static u32 slic_card_locate(struct adapter *adapter);
132 static int slic_if_init(struct adapter *adapter);
133 static int slic_adapter_allocresources(struct adapter *adapter);
134 static void slic_adapter_freeresources(struct adapter *adapter);
135 static void slic_link_config(struct adapter *adapter, u32 linkspeed,
136 u32 linkduplex);
137 static void slic_unmap_mmio_space(struct adapter *adapter);
138 static void slic_card_cleanup(struct sliccard *card);
139 static void slic_soft_reset(struct adapter *adapter);
140 static bool slic_mac_filter(struct adapter *adapter,
141 struct ether_header *ether_frame);
142 static void slic_mac_address_config(struct adapter *adapter);
143 static void slic_mac_config(struct adapter *adapter);
144 static void slic_mcast_set_mask(struct adapter *adapter);
145 static void slic_config_set(struct adapter *adapter, bool linkchange);
146 static void slic_config_clear(struct adapter *adapter);
147 static void slic_config_get(struct adapter *adapter, u32 config,
148 u32 configh);
149 static void slic_timer_load_check(ulong context);
150 static void slic_assert_fail(void);
151 static ushort slic_eeprom_cksum(char *m, int len);
152 static void slic_upr_start(struct adapter *adapter);
153 static void slic_link_upr_complete(struct adapter *adapter, u32 Isr);
154 static int slic_upr_request(struct adapter *adapter, u32 upr_request,
155 u32 upr_data, u32 upr_data_h, u32 upr_buffer,
156 u32 upr_buffer_h);
157 static void slic_mcast_set_list(struct net_device *dev);
158
159
160 static uint slic_first_init = 1;
161 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
162 "and Storage Accelerator (Non-Accelerated)";
163
164 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
165 static char *slic_product_name = "SLIC Technology(tm) Server "\
166 "and Storage Accelerator (Non-Accelerated)";
167 static char *slic_vendor = "Alacritech, Inc.";
168
169 static int slic_debug = 1;
170 static int debug = -1;
171 static struct net_device *head_netdevice;
172
173 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
174 static int intagg_delay = 100;
175 static u32 dynamic_intagg;
176 static unsigned int rcv_count;
177 static struct dentry *slic_debugfs;
178
179 #define DRV_NAME "slicoss"
180 #define DRV_VERSION "2.0.1"
181 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
182 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
183 "Non-Accelerated Driver"
184 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
185 "All rights reserved."
186 #define PFX DRV_NAME " "
187
188 MODULE_AUTHOR(DRV_AUTHOR);
189 MODULE_DESCRIPTION(DRV_DESCRIPTION);
190 MODULE_LICENSE("Dual BSD/GPL");
191
192 module_param(dynamic_intagg, int, 0);
193 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
194 module_param(intagg_delay, int, 0);
195 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
196
197 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
198 {PCI_VENDOR_ID_ALACRITECH,
199 SLIC_1GB_DEVICE_ID,
200 PCI_ANY_ID, PCI_ANY_ID,},
201 {PCI_VENDOR_ID_ALACRITECH,
202 SLIC_2GB_DEVICE_ID,
203 PCI_ANY_ID, PCI_ANY_ID,},
204 {0,}
205 };
206
207 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
208
209 #ifdef ASSERT
210 #undef ASSERT
211 #endif
212
213 #ifndef ASSERT
214 #define ASSERT(a) do { \
215 if (!(a)) { \
216 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
217 "line %d\n", __func__, __LINE__); \
218 slic_assert_fail(); \
219 } \
220 } while (0)
221 #endif
222
223
224 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
225 { \
226 spin_lock_irqsave(&_adapter->handle_lock.lock, \
227 _adapter->handle_lock.flags); \
228 _pslic_handle = _adapter->pfree_slic_handles; \
229 if (_pslic_handle) { \
230 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
231 _adapter->pfree_slic_handles = _pslic_handle->next; \
232 } \
233 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
234 _adapter->handle_lock.flags); \
235 }
236
237 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
238 { \
239 _pslic_handle->type = SLIC_HANDLE_FREE; \
240 spin_lock_irqsave(&_adapter->handle_lock.lock, \
241 _adapter->handle_lock.flags); \
242 _pslic_handle->next = _adapter->pfree_slic_handles; \
243 _adapter->pfree_slic_handles = _pslic_handle; \
244 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
245 _adapter->handle_lock.flags); \
246 }
247
248 static void slic_debug_init(void);
249 static void slic_debug_cleanup(void);
250 static void slic_debug_adapter_create(struct adapter *adapter);
251 static void slic_debug_adapter_destroy(struct adapter *adapter);
252 static void slic_debug_card_create(struct sliccard *card);
253 static void slic_debug_card_destroy(struct sliccard *card);
254
255 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
256 {
257 writel(value, reg);
258 if (flush)
259 mb();
260 }
261
262 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
263 u32 value, void __iomem *regh, u32 paddrh,
264 bool flush)
265 {
266 spin_lock_irqsave(&adapter->bit64reglock.lock,
267 adapter->bit64reglock.flags);
268 if (paddrh != adapter->curaddrupper) {
269 adapter->curaddrupper = paddrh;
270 writel(paddrh, regh);
271 }
272 writel(value, reg);
273 if (flush)
274 mb();
275 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
276 adapter->bit64reglock.flags);
277 }
278
279 static void slic_init_driver(void)
280 {
281 if (slic_first_init) {
282 slic_first_init = 0;
283 spin_lock_init(&slic_global.driver_lock.lock);
284 slic_debug_init();
285 }
286 }
287
288 static void slic_init_adapter(struct net_device *netdev,
289 struct pci_dev *pcidev,
290 const struct pci_device_id *pci_tbl_entry,
291 void __iomem *memaddr, int chip_idx)
292 {
293 ushort index;
294 struct slic_handle *pslic_handle;
295 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
296
297 /* adapter->pcidev = pcidev;*/
298 adapter->vendid = pci_tbl_entry->vendor;
299 adapter->devid = pci_tbl_entry->device;
300 adapter->subsysid = pci_tbl_entry->subdevice;
301 adapter->busnumber = pcidev->bus->number;
302 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
303 adapter->functionnumber = (pcidev->devfn & 0x7);
304 adapter->memorylength = pci_resource_len(pcidev, 0);
305 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
306 adapter->irq = pcidev->irq;
307 /* adapter->netdev = netdev;*/
308 adapter->next_netdevice = head_netdevice;
309 head_netdevice = netdev;
310 adapter->chipid = chip_idx;
311 adapter->port = 0; /*adapter->functionnumber;*/
312 adapter->cardindex = adapter->port;
313 adapter->memorybase = memaddr;
314 spin_lock_init(&adapter->upr_lock.lock);
315 spin_lock_init(&adapter->bit64reglock.lock);
316 spin_lock_init(&adapter->adapter_lock.lock);
317 spin_lock_init(&adapter->reset_lock.lock);
318 spin_lock_init(&adapter->handle_lock.lock);
319
320 adapter->card_size = 1;
321 /*
322 Initialize slic_handle array
323 */
324 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
325 /*
326 Start with 1. 0 is an invalid host handle.
327 */
328 for (index = 1, pslic_handle = &adapter->slic_handles[1];
329 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
330
331 pslic_handle->token.handle_index = index;
332 pslic_handle->type = SLIC_HANDLE_FREE;
333 pslic_handle->next = adapter->pfree_slic_handles;
334 adapter->pfree_slic_handles = pslic_handle;
335 }
336 adapter->pshmem = (struct slic_shmem *)
337 pci_alloc_consistent(adapter->pcidev,
338 sizeof(struct slic_shmem),
339 &adapter->
340 phys_shmem);
341 ASSERT(adapter->pshmem);
342
343 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
344
345 return;
346 }
347
348 static const struct net_device_ops slic_netdev_ops = {
349 .ndo_open = slic_entry_open,
350 .ndo_stop = slic_entry_halt,
351 .ndo_start_xmit = slic_xmit_start,
352 .ndo_do_ioctl = slic_ioctl,
353 .ndo_set_mac_address = slic_mac_set_address,
354 .ndo_get_stats = slic_get_stats,
355 .ndo_set_multicast_list = slic_mcast_set_list,
356 .ndo_validate_addr = eth_validate_addr,
357 .ndo_change_mtu = eth_change_mtu,
358 };
359
360 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
361 const struct pci_device_id *pci_tbl_entry)
362 {
363 static int cards_found;
364 static int did_version;
365 int err = -ENODEV;
366 struct net_device *netdev;
367 struct adapter *adapter;
368 void __iomem *memmapped_ioaddr = NULL;
369 u32 status = 0;
370 ulong mmio_start = 0;
371 ulong mmio_len = 0;
372 struct sliccard *card = NULL;
373
374 slic_global.dynamic_intagg = dynamic_intagg;
375
376 err = pci_enable_device(pcidev);
377
378 if (err)
379 return err;
380
381 if (slic_debug > 0 && did_version++ == 0) {
382 printk(KERN_DEBUG "%s\n", slic_banner);
383 printk(KERN_DEBUG "%s\n", slic_proc_version);
384 }
385
386 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
387 if (err) {
388 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
389 if (err)
390 goto err_out_disable_pci;
391 }
392
393 err = pci_request_regions(pcidev, DRV_NAME);
394 if (err)
395 goto err_out_disable_pci;
396
397 pci_set_master(pcidev);
398
399 netdev = alloc_etherdev(sizeof(struct adapter));
400 if (!netdev) {
401 err = -ENOMEM;
402 goto err_out_exit_slic_probe;
403 }
404
405 SET_NETDEV_DEV(netdev, &pcidev->dev);
406
407 pci_set_drvdata(pcidev, netdev);
408 adapter = netdev_priv(netdev);
409 adapter->netdev = netdev;
410 adapter->pcidev = pcidev;
411
412 mmio_start = pci_resource_start(pcidev, 0);
413 mmio_len = pci_resource_len(pcidev, 0);
414
415
416 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
417 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
418 if (!memmapped_ioaddr) {
419 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
420 mmio_len, mmio_start);
421 goto err_out_free_netdev;
422 }
423
424 slic_config_pci(pcidev);
425
426 slic_init_driver();
427
428 slic_init_adapter(netdev,
429 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
430
431 status = slic_card_locate(adapter);
432 if (status) {
433 dev_err(&pcidev->dev, "cannot locate card\n");
434 goto err_out_free_mmio_region;
435 }
436
437 card = adapter->card;
438
439 if (!adapter->allocated) {
440 card->adapters_allocated++;
441 adapter->allocated = 1;
442 }
443
444 status = slic_card_init(card, adapter);
445
446 if (status != STATUS_SUCCESS) {
447 card->state = CARD_FAIL;
448 adapter->state = ADAPT_FAIL;
449 adapter->linkstate = LINK_DOWN;
450 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
451 } else {
452 slic_adapter_set_hwaddr(adapter);
453 }
454
455 netdev->base_addr = (unsigned long)adapter->memorybase;
456 netdev->irq = adapter->irq;
457 netdev->netdev_ops = &slic_netdev_ops;
458
459 slic_debug_adapter_create(adapter);
460
461 strcpy(netdev->name, "eth%d");
462 err = register_netdev(netdev);
463 if (err) {
464 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
465 goto err_out_unmap;
466 }
467
468 cards_found++;
469
470 return status;
471
472 err_out_unmap:
473 iounmap(memmapped_ioaddr);
474 err_out_free_mmio_region:
475 release_mem_region(mmio_start, mmio_len);
476 err_out_free_netdev:
477 free_netdev(netdev);
478 err_out_exit_slic_probe:
479 pci_release_regions(pcidev);
480 err_out_disable_pci:
481 pci_disable_device(pcidev);
482 return err;
483 }
484
485 static int slic_entry_open(struct net_device *dev)
486 {
487 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
488 struct sliccard *card = adapter->card;
489 u32 locked = 0;
490 int status;
491
492 ASSERT(adapter);
493 ASSERT(card);
494
495 netif_stop_queue(adapter->netdev);
496
497 spin_lock_irqsave(&slic_global.driver_lock.lock,
498 slic_global.driver_lock.flags);
499 locked = 1;
500 if (!adapter->activated) {
501 card->adapters_activated++;
502 slic_global.num_slic_ports_active++;
503 adapter->activated = 1;
504 }
505 status = slic_if_init(adapter);
506
507 if (status != STATUS_SUCCESS) {
508 if (adapter->activated) {
509 card->adapters_activated--;
510 slic_global.num_slic_ports_active--;
511 adapter->activated = 0;
512 }
513 if (locked) {
514 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
515 slic_global.driver_lock.flags);
516 locked = 0;
517 }
518 return status;
519 }
520 if (!card->master)
521 card->master = adapter;
522
523 if (locked) {
524 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
525 slic_global.driver_lock.flags);
526 locked = 0;
527 }
528
529 return STATUS_SUCCESS;
530 }
531
532 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
533 {
534 struct net_device *dev = pci_get_drvdata(pcidev);
535 u32 mmio_start = 0;
536 uint mmio_len = 0;
537 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
538 struct sliccard *card;
539 struct mcast_address *mcaddr, *mlist;
540
541 ASSERT(adapter);
542 slic_adapter_freeresources(adapter);
543 slic_unmap_mmio_space(adapter);
544 unregister_netdev(dev);
545
546 mmio_start = pci_resource_start(pcidev, 0);
547 mmio_len = pci_resource_len(pcidev, 0);
548
549 release_mem_region(mmio_start, mmio_len);
550
551 iounmap((void __iomem *)dev->base_addr);
552 /* free multicast addresses */
553 mlist = adapter->mcastaddrs;
554 while (mlist) {
555 mcaddr = mlist;
556 mlist = mlist->next;
557 kfree(mcaddr);
558 }
559 ASSERT(adapter->card);
560 card = adapter->card;
561 ASSERT(card->adapters_allocated);
562 card->adapters_allocated--;
563 adapter->allocated = 0;
564 if (!card->adapters_allocated) {
565 struct sliccard *curr_card = slic_global.slic_card;
566 if (curr_card == card) {
567 slic_global.slic_card = card->next;
568 } else {
569 while (curr_card->next != card)
570 curr_card = curr_card->next;
571 ASSERT(curr_card);
572 curr_card->next = card->next;
573 }
574 ASSERT(slic_global.num_slic_cards);
575 slic_global.num_slic_cards--;
576 slic_card_cleanup(card);
577 }
578 kfree(dev);
579 pci_release_regions(pcidev);
580 }
581
582 static int slic_entry_halt(struct net_device *dev)
583 {
584 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
585 struct sliccard *card = adapter->card;
586 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
587
588 spin_lock_irqsave(&slic_global.driver_lock.lock,
589 slic_global.driver_lock.flags);
590 ASSERT(card);
591 netif_stop_queue(adapter->netdev);
592 adapter->state = ADAPT_DOWN;
593 adapter->linkstate = LINK_DOWN;
594 adapter->upr_list = NULL;
595 adapter->upr_busy = 0;
596 adapter->devflags_prev = 0;
597 ASSERT(card->adapter[adapter->cardindex] == adapter);
598 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
599 adapter->all_reg_writes++;
600 adapter->icr_reg_writes++;
601 slic_config_clear(adapter);
602 if (adapter->activated) {
603 card->adapters_activated--;
604 slic_global.num_slic_ports_active--;
605 adapter->activated = 0;
606 }
607 #ifdef AUTOMATIC_RESET
608 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
609 #endif
610 /*
611 * Reset the adapter's cmd queues
612 */
613 slic_cmdq_reset(adapter);
614
615 #ifdef AUTOMATIC_RESET
616 if (!card->adapters_activated)
617 slic_card_init(card, adapter);
618 #endif
619
620 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
621 slic_global.driver_lock.flags);
622 return STATUS_SUCCESS;
623 }
624
625 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
626 {
627 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
628 struct ethtool_cmd edata;
629 struct ethtool_cmd ecmd;
630 u32 data[7];
631 u32 intagg;
632
633 ASSERT(rq);
634 switch (cmd) {
635 case SIOCSLICSETINTAGG:
636 if (copy_from_user(data, rq->ifr_data, 28))
637 return -EFAULT;
638 intagg = data[0];
639 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
640 __func__, intagg);
641 slic_intagg_set(adapter, intagg);
642 return 0;
643
644 #ifdef SLIC_TRACE_DUMP_ENABLED
645 case SIOCSLICTRACEDUMP:
646 {
647 u32 value;
648 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
649
650 if (copy_from_user(data, rq->ifr_data, 28)) {
651 PRINT_ERROR
652 ("slic: copy_from_user FAILED getting \
653 initial simba param\n");
654 return -EFAULT;
655 }
656
657 value = data[0];
658 if (tracemon_request == SLIC_DUMP_DONE) {
659 PRINT_ERROR
660 ("ATK Diagnostic Trace Dump Requested\n");
661 tracemon_request = SLIC_DUMP_REQUESTED;
662 tracemon_request_type = value;
663 tracemon_timestamp = jiffies;
664 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
665 (tracemon_request ==
666 SLIC_DUMP_IN_PROGRESS)) {
667 PRINT_ERROR
668 ("ATK Diagnostic Trace Dump Requested but \
669 already in progress... ignore\n");
670 } else {
671 PRINT_ERROR
672 ("ATK Diagnostic Trace Dump Requested\n");
673 tracemon_request = SLIC_DUMP_REQUESTED;
674 tracemon_request_type = value;
675 tracemon_timestamp = jiffies;
676 }
677 return 0;
678 }
679 #endif
680 case SIOCETHTOOL:
681 ASSERT(adapter);
682 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
683 return -EFAULT;
684
685 if (ecmd.cmd == ETHTOOL_GSET) {
686 edata.supported = (SUPPORTED_10baseT_Half |
687 SUPPORTED_10baseT_Full |
688 SUPPORTED_100baseT_Half |
689 SUPPORTED_100baseT_Full |
690 SUPPORTED_Autoneg | SUPPORTED_MII);
691 edata.port = PORT_MII;
692 edata.transceiver = XCVR_INTERNAL;
693 edata.phy_address = 0;
694 if (adapter->linkspeed == LINK_100MB)
695 edata.speed = SPEED_100;
696 else if (adapter->linkspeed == LINK_10MB)
697 edata.speed = SPEED_10;
698 else
699 edata.speed = 0;
700
701 if (adapter->linkduplex == LINK_FULLD)
702 edata.duplex = DUPLEX_FULL;
703 else
704 edata.duplex = DUPLEX_HALF;
705
706 edata.autoneg = AUTONEG_ENABLE;
707 edata.maxtxpkt = 1;
708 edata.maxrxpkt = 1;
709 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
710 return -EFAULT;
711
712 } else if (ecmd.cmd == ETHTOOL_SSET) {
713 if (!capable(CAP_NET_ADMIN))
714 return -EPERM;
715
716 if (adapter->linkspeed == LINK_100MB)
717 edata.speed = SPEED_100;
718 else if (adapter->linkspeed == LINK_10MB)
719 edata.speed = SPEED_10;
720 else
721 edata.speed = 0;
722
723 if (adapter->linkduplex == LINK_FULLD)
724 edata.duplex = DUPLEX_FULL;
725 else
726 edata.duplex = DUPLEX_HALF;
727
728 edata.autoneg = AUTONEG_ENABLE;
729 edata.maxtxpkt = 1;
730 edata.maxrxpkt = 1;
731 if ((ecmd.speed != edata.speed) ||
732 (ecmd.duplex != edata.duplex)) {
733 u32 speed;
734 u32 duplex;
735
736 if (ecmd.speed == SPEED_10)
737 speed = 0;
738 else
739 speed = PCR_SPEED_100;
740 if (ecmd.duplex == DUPLEX_FULL)
741 duplex = PCR_DUPLEX_FULL;
742 else
743 duplex = 0;
744 slic_link_config(adapter, speed, duplex);
745 slic_link_event_handler(adapter);
746 }
747 }
748 return 0;
749 default:
750 return -EOPNOTSUPP;
751 }
752 }
753
754 #define XMIT_FAIL_LINK_STATE 1
755 #define XMIT_FAIL_ZERO_LENGTH 2
756 #define XMIT_FAIL_HOSTCMD_FAIL 3
757
758 static void slic_xmit_build_request(struct adapter *adapter,
759 struct slic_hostcmd *hcmd, struct sk_buff *skb)
760 {
761 struct slic_host64_cmd *ihcmd;
762 ulong phys_addr;
763
764 ihcmd = &hcmd->cmd64;
765
766 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
767 ihcmd->command = IHCMD_XMT_REQ;
768 ihcmd->u.slic_buffers.totlen = skb->len;
769 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
770 PCI_DMA_TODEVICE);
771 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
772 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
773 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
774 #if defined(CONFIG_X86_64)
775 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
776 (u64) hcmd) + 31) >> 5);
777 #elif defined(CONFIG_X86)
778 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
779 (u32) hcmd) + 31) >> 5);
780 #else
781 Stop Compilation;
782 #endif
783 }
784
785 #define NORMAL_ETHFRAME 0
786
787 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
788 {
789 struct sliccard *card;
790 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
791 struct slic_hostcmd *hcmd = NULL;
792 u32 status = 0;
793 u32 skbtype = NORMAL_ETHFRAME;
794 void *offloadcmd = NULL;
795
796 card = adapter->card;
797 ASSERT(card);
798 if ((adapter->linkstate != LINK_UP) ||
799 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
800 status = XMIT_FAIL_LINK_STATE;
801 goto xmit_fail;
802
803 } else if (skb->len == 0) {
804 status = XMIT_FAIL_ZERO_LENGTH;
805 goto xmit_fail;
806 }
807
808 if (skbtype == NORMAL_ETHFRAME) {
809 hcmd = slic_cmdq_getfree(adapter);
810 if (!hcmd) {
811 adapter->xmitq_full = 1;
812 status = XMIT_FAIL_HOSTCMD_FAIL;
813 goto xmit_fail;
814 }
815 ASSERT(hcmd->pslic_handle);
816 ASSERT(hcmd->cmd64.hosthandle ==
817 hcmd->pslic_handle->token.handle_token);
818 hcmd->skb = skb;
819 hcmd->busy = 1;
820 hcmd->type = SLIC_CMD_DUMB;
821 if (skbtype == NORMAL_ETHFRAME)
822 slic_xmit_build_request(adapter, hcmd, skb);
823 }
824 adapter->stats.tx_packets++;
825 adapter->stats.tx_bytes += skb->len;
826
827 #ifdef DEBUG_DUMP
828 if (adapter->kill_card) {
829 struct slic_host64_cmd ihcmd;
830
831 ihcmd = &hcmd->cmd64;
832
833 ihcmd->flags |= 0x40;
834 adapter->kill_card = 0; /* only do this once */
835 }
836 #endif
837 if (hcmd->paddrh == 0) {
838 slic_reg32_write(&adapter->slic_regs->slic_cbar,
839 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
840 } else {
841 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
842 (hcmd->paddrl | hcmd->cmdsize),
843 &adapter->slic_regs->slic_addr_upper,
844 hcmd->paddrh, DONT_FLUSH);
845 }
846 xmit_done:
847 return NETDEV_TX_OK;
848 xmit_fail:
849 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
850 goto xmit_done;
851 }
852
853 static void slic_xmit_fail(struct adapter *adapter,
854 struct sk_buff *skb,
855 void *cmd, u32 skbtype, u32 status)
856 {
857 if (adapter->xmitq_full)
858 netif_stop_queue(adapter->netdev);
859 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
860 switch (status) {
861 case XMIT_FAIL_LINK_STATE:
862 dev_err(&adapter->netdev->dev,
863 "reject xmit skb[%p: %x] linkstate[%s] "
864 "adapter[%s:%d] card[%s:%d]\n",
865 skb, skb->pkt_type,
866 SLIC_LINKSTATE(adapter->linkstate),
867 SLIC_ADAPTER_STATE(adapter->state),
868 adapter->state,
869 SLIC_CARD_STATE(adapter->card->state),
870 adapter->card->state);
871 break;
872 case XMIT_FAIL_ZERO_LENGTH:
873 dev_err(&adapter->netdev->dev,
874 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
875 skb, skb->pkt_type);
876 break;
877 case XMIT_FAIL_HOSTCMD_FAIL:
878 dev_err(&adapter->netdev->dev,
879 "xmit_start skb[%p] type[%x] No host commands "
880 "available\n", skb, skb->pkt_type);
881 break;
882 default:
883 ASSERT(0);
884 }
885 }
886 dev_kfree_skb(skb);
887 adapter->stats.tx_dropped++;
888 }
889
890 static void slic_rcv_handle_error(struct adapter *adapter,
891 struct slic_rcvbuf *rcvbuf)
892 {
893 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
894
895 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
896 if (hdr->frame_status14 & VRHSTAT_802OE)
897 adapter->if_events.oflow802++;
898 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
899 adapter->if_events.Tprtoflow++;
900 if (hdr->frame_status_b14 & VRHSTATB_802UE)
901 adapter->if_events.uflow802++;
902 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
903 adapter->if_events.rcvearly++;
904 adapter->stats.rx_fifo_errors++;
905 }
906 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
907 adapter->if_events.Bufov++;
908 adapter->stats.rx_over_errors++;
909 }
910 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
911 adapter->if_events.Carre++;
912 adapter->stats.tx_carrier_errors++;
913 }
914 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
915 adapter->if_events.Longe++;
916 if (hdr->frame_status_b14 & VRHSTATB_PREA)
917 adapter->if_events.Invp++;
918 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
919 adapter->if_events.Crc++;
920 adapter->stats.rx_crc_errors++;
921 }
922 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
923 adapter->if_events.Drbl++;
924 if (hdr->frame_status_b14 & VRHSTATB_CODE)
925 adapter->if_events.Code++;
926 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
927 adapter->if_events.TpCsum++;
928 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
929 adapter->if_events.TpHlen++;
930 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
931 adapter->if_events.IpCsum++;
932 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
933 adapter->if_events.IpLen++;
934 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
935 adapter->if_events.IpHlen++;
936 } else {
937 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
938 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
939
940 if (xerr == VGBSTAT_XCSERR)
941 adapter->if_events.TpCsum++;
942 if (xerr == VGBSTAT_XUFLOW)
943 adapter->if_events.Tprtoflow++;
944 if (xerr == VGBSTAT_XHLEN)
945 adapter->if_events.TpHlen++;
946 }
947 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
948 u32 nerr =
949 (hdr->
950 frame_statusGB >> VGBSTAT_NERRSHFT) &
951 VGBSTAT_NERRMSK;
952 if (nerr == VGBSTAT_NCSERR)
953 adapter->if_events.IpCsum++;
954 if (nerr == VGBSTAT_NUFLOW)
955 adapter->if_events.IpLen++;
956 if (nerr == VGBSTAT_NHLEN)
957 adapter->if_events.IpHlen++;
958 }
959 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
960 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
961
962 if (lerr == VGBSTAT_LDEARLY)
963 adapter->if_events.rcvearly++;
964 if (lerr == VGBSTAT_LBOFLO)
965 adapter->if_events.Bufov++;
966 if (lerr == VGBSTAT_LCODERR)
967 adapter->if_events.Code++;
968 if (lerr == VGBSTAT_LDBLNBL)
969 adapter->if_events.Drbl++;
970 if (lerr == VGBSTAT_LCRCERR)
971 adapter->if_events.Crc++;
972 if (lerr == VGBSTAT_LOFLO)
973 adapter->if_events.oflow802++;
974 if (lerr == VGBSTAT_LUFLO)
975 adapter->if_events.uflow802++;
976 }
977 }
978 return;
979 }
980
981 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
982 #define M_FAST_PATH 0x0040
983
984 static void slic_rcv_handler(struct adapter *adapter)
985 {
986 struct sk_buff *skb;
987 struct slic_rcvbuf *rcvbuf;
988 u32 frames = 0;
989
990 while ((skb = slic_rcvqueue_getnext(adapter))) {
991 u32 rx_bytes;
992
993 ASSERT(skb->head);
994 rcvbuf = (struct slic_rcvbuf *)skb->head;
995 adapter->card->events++;
996 if (rcvbuf->status & IRHDDR_ERR) {
997 adapter->rx_errors++;
998 slic_rcv_handle_error(adapter, rcvbuf);
999 slic_rcvqueue_reinsert(adapter, skb);
1000 continue;
1001 }
1002
1003 if (!slic_mac_filter(adapter, (struct ether_header *)
1004 rcvbuf->data)) {
1005 slic_rcvqueue_reinsert(adapter, skb);
1006 continue;
1007 }
1008 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1009 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1010 skb_put(skb, rx_bytes);
1011 adapter->stats.rx_packets++;
1012 adapter->stats.rx_bytes += rx_bytes;
1013 #if SLIC_OFFLOAD_IP_CHECKSUM
1014 skb->ip_summed = CHECKSUM_UNNECESSARY;
1015 #endif
1016
1017 skb->dev = adapter->netdev;
1018 skb->protocol = eth_type_trans(skb, skb->dev);
1019 netif_rx(skb);
1020
1021 ++frames;
1022 #if SLIC_INTERRUPT_PROCESS_LIMIT
1023 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1024 adapter->rcv_interrupt_yields++;
1025 break;
1026 }
1027 #endif
1028 }
1029 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1030 }
1031
1032 static void slic_xmit_complete(struct adapter *adapter)
1033 {
1034 struct slic_hostcmd *hcmd;
1035 struct slic_rspbuf *rspbuf;
1036 u32 frames = 0;
1037 struct slic_handle_word slic_handle_word;
1038
1039 do {
1040 rspbuf = slic_rspqueue_getnext(adapter);
1041 if (!rspbuf)
1042 break;
1043 adapter->xmit_completes++;
1044 adapter->card->events++;
1045 /*
1046 Get the complete host command buffer
1047 */
1048 slic_handle_word.handle_token = rspbuf->hosthandle;
1049 ASSERT(slic_handle_word.handle_index);
1050 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1051 hcmd =
1052 (struct slic_hostcmd *)
1053 adapter->slic_handles[slic_handle_word.handle_index].
1054 address;
1055 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1056 ASSERT(hcmd);
1057 ASSERT(hcmd->pslic_handle ==
1058 &adapter->slic_handles[slic_handle_word.handle_index]);
1059 if (hcmd->type == SLIC_CMD_DUMB) {
1060 if (hcmd->skb)
1061 dev_kfree_skb_irq(hcmd->skb);
1062 slic_cmdq_putdone_irq(adapter, hcmd);
1063 }
1064 rspbuf->status = 0;
1065 rspbuf->hosthandle = 0;
1066 frames++;
1067 } while (1);
1068 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1069 }
1070
1071 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1072 {
1073 struct net_device *dev = (struct net_device *)dev_id;
1074 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1075 u32 isr;
1076
1077 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1078 slic_reg32_write(&adapter->slic_regs->slic_icr,
1079 ICR_INT_MASK, FLUSH);
1080 isr = adapter->isrcopy = adapter->pshmem->isr;
1081 adapter->pshmem->isr = 0;
1082 adapter->num_isrs++;
1083 switch (adapter->card->state) {
1084 case CARD_UP:
1085 if (isr & ~ISR_IO) {
1086 if (isr & ISR_ERR) {
1087 adapter->error_interrupts++;
1088 if (isr & ISR_RMISS) {
1089 int count;
1090 int pre_count;
1091 int errors;
1092
1093 struct slic_rcvqueue *rcvq =
1094 &adapter->rcvqueue;
1095
1096 adapter->
1097 error_rmiss_interrupts++;
1098 if (!rcvq->errors)
1099 rcv_count = rcvq->count;
1100 pre_count = rcvq->count;
1101 errors = rcvq->errors;
1102
1103 while (rcvq->count <
1104 SLIC_RCVQ_FILLTHRESH) {
1105 count =
1106 slic_rcvqueue_fill
1107 (adapter);
1108 if (!count)
1109 break;
1110 }
1111 } else if (isr & ISR_XDROP) {
1112 dev_err(&dev->dev,
1113 "isr & ISR_ERR [%x] "
1114 "ISR_XDROP \n", isr);
1115 } else {
1116 dev_err(&dev->dev,
1117 "isr & ISR_ERR [%x]\n",
1118 isr);
1119 }
1120 }
1121
1122 if (isr & ISR_LEVENT) {
1123 adapter->linkevent_interrupts++;
1124 slic_link_event_handler(adapter);
1125 }
1126
1127 if ((isr & ISR_UPC) ||
1128 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1129 adapter->upr_interrupts++;
1130 slic_upr_request_complete(adapter, isr);
1131 }
1132 }
1133
1134 if (isr & ISR_RCV) {
1135 adapter->rcv_interrupts++;
1136 slic_rcv_handler(adapter);
1137 }
1138
1139 if (isr & ISR_CMD) {
1140 adapter->xmit_interrupts++;
1141 slic_xmit_complete(adapter);
1142 }
1143 break;
1144
1145 case CARD_DOWN:
1146 if ((isr & ISR_UPC) ||
1147 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1148 adapter->upr_interrupts++;
1149 slic_upr_request_complete(adapter, isr);
1150 }
1151 break;
1152
1153 default:
1154 break;
1155 }
1156
1157 adapter->isrcopy = 0;
1158 adapter->all_reg_writes += 2;
1159 adapter->isr_reg_writes++;
1160 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
1161 } else {
1162 adapter->false_interrupts++;
1163 }
1164 return IRQ_HANDLED;
1165 }
1166
1167 /*
1168 * slic_link_event_handler -
1169 *
1170 * Initiate a link configuration sequence. The link configuration begins
1171 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1172 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1173 * routine will follow it up witha UP configuration write command, which
1174 * will also complete asynchronously.
1175 *
1176 */
1177 static void slic_link_event_handler(struct adapter *adapter)
1178 {
1179 int status;
1180 struct slic_shmem *pshmem;
1181
1182 if (adapter->state != ADAPT_UP) {
1183 /* Adapter is not operational. Ignore. */
1184 return;
1185 }
1186
1187 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1188
1189 #if defined(CONFIG_X86_64)
1190 status = slic_upr_request(adapter,
1191 SLIC_UPR_RLSR,
1192 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1193 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1194 0, 0);
1195 #elif defined(CONFIG_X86)
1196 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1197 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1198 0, 0, 0);
1199 #else
1200 Stop compilation;
1201 #endif
1202 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1203 }
1204
1205 static void slic_init_cleanup(struct adapter *adapter)
1206 {
1207 if (adapter->intrregistered) {
1208 adapter->intrregistered = 0;
1209 free_irq(adapter->netdev->irq, adapter->netdev);
1210
1211 }
1212 if (adapter->pshmem) {
1213 pci_free_consistent(adapter->pcidev,
1214 sizeof(struct slic_shmem),
1215 adapter->pshmem, adapter->phys_shmem);
1216 adapter->pshmem = NULL;
1217 adapter->phys_shmem = (dma_addr_t) NULL;
1218 }
1219
1220 if (adapter->pingtimerset) {
1221 adapter->pingtimerset = 0;
1222 del_timer(&adapter->pingtimer);
1223 }
1224
1225 slic_rspqueue_free(adapter);
1226 slic_cmdq_free(adapter);
1227 slic_rcvqueue_free(adapter);
1228 }
1229
1230 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1231 {
1232 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1233 struct net_device_stats *stats;
1234
1235 ASSERT(adapter);
1236 stats = &adapter->stats;
1237 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1238 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1239 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1240 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1241 stats->tx_heartbeat_errors = 0;
1242 stats->tx_aborted_errors = 0;
1243 stats->tx_window_errors = 0;
1244 stats->tx_fifo_errors = 0;
1245 stats->rx_frame_errors = 0;
1246 stats->rx_length_errors = 0;
1247 return &adapter->stats;
1248 }
1249
1250 /*
1251 * Allocate a mcast_address structure to hold the multicast address.
1252 * Link it in.
1253 */
1254 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1255 {
1256 struct mcast_address *mcaddr, *mlist;
1257 bool equaladdr;
1258
1259 /* Check to see if it already exists */
1260 mlist = adapter->mcastaddrs;
1261 while (mlist) {
1262 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1263 if (equaladdr)
1264 return STATUS_SUCCESS;
1265 mlist = mlist->next;
1266 }
1267
1268 /* Doesn't already exist. Allocate a structure to hold it */
1269 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1270 if (mcaddr == NULL)
1271 return 1;
1272
1273 memcpy(mcaddr->address, address, 6);
1274
1275 mcaddr->next = adapter->mcastaddrs;
1276 adapter->mcastaddrs = mcaddr;
1277
1278 return STATUS_SUCCESS;
1279 }
1280
1281 /*
1282 * Functions to obtain the CRC corresponding to the destination mac address.
1283 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1284 * the polynomial:
1285 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1286 * x^4 + x^2 + x^1.
1287 *
1288 * After the CRC for the 6 bytes is generated (but before the value is
1289 * complemented),
1290 * we must then transpose the value and return bits 30-23.
1291 *
1292 */
1293 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1294 static u32 slic_crc_init; /* Is table initialized */
1295
1296 /*
1297 * Contruct the CRC32 table
1298 */
1299 static void slic_mcast_init_crc32(void)
1300 {
1301 u32 c; /* CRC shit reg */
1302 u32 e = 0; /* Poly X-or pattern */
1303 int i; /* counter */
1304 int k; /* byte being shifted into crc */
1305
1306 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1307
1308 for (i = 0; i < ARRAY_SIZE(p); i++)
1309 e |= 1L << (31 - p[i]);
1310
1311 for (i = 1; i < 256; i++) {
1312 c = i;
1313 for (k = 8; k; k--)
1314 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1315 slic_crc_table[i] = c;
1316 }
1317 }
1318
1319 /*
1320 * Return the MAC hast as described above.
1321 */
1322 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1323 {
1324 u32 crc;
1325 char *p;
1326 int i;
1327 unsigned char machash = 0;
1328
1329 if (!slic_crc_init) {
1330 slic_mcast_init_crc32();
1331 slic_crc_init = 1;
1332 }
1333
1334 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1335 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1336 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1337
1338 /* Return bits 1-8, transposed */
1339 for (i = 1; i < 9; i++)
1340 machash |= (((crc >> i) & 1) << (8 - i));
1341
1342 return machash;
1343 }
1344
1345 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1346 {
1347 unsigned char crcpoly;
1348
1349 /* Get the CRC polynomial for the mac address */
1350 crcpoly = slic_mcast_get_mac_hash(address);
1351
1352 /* We only have space on the SLIC for 64 entries. Lop
1353 * off the top two bits. (2^6 = 64)
1354 */
1355 crcpoly &= 0x3F;
1356
1357 /* OR in the new bit into our 64 bit mask. */
1358 adapter->mcastmask |= (u64) 1 << crcpoly;
1359 }
1360
1361 static void slic_mcast_set_list(struct net_device *dev)
1362 {
1363 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1364 int status = STATUS_SUCCESS;
1365 char *addresses;
1366 struct dev_mc_list *mc_list;
1367
1368 ASSERT(adapter);
1369
1370 netdev_for_each_mc_addr(mc_list, dev) {
1371 addresses = (char *) &mc_list->dmi_addr;
1372 status = slic_mcast_add_list(adapter, addresses);
1373 if (status != STATUS_SUCCESS)
1374 break;
1375 slic_mcast_set_bit(adapter, addresses);
1376 }
1377
1378 if (adapter->devflags_prev != dev->flags) {
1379 adapter->macopts = MAC_DIRECTED;
1380 if (dev->flags) {
1381 if (dev->flags & IFF_BROADCAST)
1382 adapter->macopts |= MAC_BCAST;
1383 if (dev->flags & IFF_PROMISC)
1384 adapter->macopts |= MAC_PROMISC;
1385 if (dev->flags & IFF_ALLMULTI)
1386 adapter->macopts |= MAC_ALLMCAST;
1387 if (dev->flags & IFF_MULTICAST)
1388 adapter->macopts |= MAC_MCAST;
1389 }
1390 adapter->devflags_prev = dev->flags;
1391 slic_config_set(adapter, true);
1392 } else {
1393 if (status == STATUS_SUCCESS)
1394 slic_mcast_set_mask(adapter);
1395 }
1396 return;
1397 }
1398
1399 static void slic_mcast_set_mask(struct adapter *adapter)
1400 {
1401 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1402
1403 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1404 /* Turn on all multicast addresses. We have to do this for
1405 * promiscuous mode as well as ALLMCAST mode. It saves the
1406 * Microcode from having to keep state about the MAC
1407 * configuration.
1408 */
1409 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1410 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
1411 FLUSH);
1412 } else {
1413 /* Commit our multicast mast to the SLIC by writing to the
1414 * multicast address mask registers
1415 */
1416 slic_reg32_write(&slic_regs->slic_mcastlow,
1417 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1418 slic_reg32_write(&slic_regs->slic_mcasthigh,
1419 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
1420 }
1421 }
1422
1423 static void slic_timer_ping(ulong dev)
1424 {
1425 struct adapter *adapter;
1426 struct sliccard *card;
1427
1428 ASSERT(dev);
1429 adapter = netdev_priv((struct net_device *)dev);
1430 ASSERT(adapter);
1431 card = adapter->card;
1432 ASSERT(card);
1433
1434 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
1435 add_timer(&adapter->pingtimer);
1436 }
1437
1438 /*
1439 * slic_if_init
1440 *
1441 * Perform initialization of our slic interface.
1442 *
1443 */
1444 static int slic_if_init(struct adapter *adapter)
1445 {
1446 struct sliccard *card = adapter->card;
1447 struct net_device *dev = adapter->netdev;
1448 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1449 struct slic_shmem *pshmem;
1450 int status = 0;
1451
1452 ASSERT(card);
1453
1454 /* adapter should be down at this point */
1455 if (adapter->state != ADAPT_DOWN) {
1456 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
1457 __func__);
1458 return -EIO;
1459 }
1460 ASSERT(adapter->linkstate == LINK_DOWN);
1461
1462 adapter->devflags_prev = dev->flags;
1463 adapter->macopts = MAC_DIRECTED;
1464 if (dev->flags) {
1465 if (dev->flags & IFF_BROADCAST)
1466 adapter->macopts |= MAC_BCAST;
1467 if (dev->flags & IFF_PROMISC)
1468 adapter->macopts |= MAC_PROMISC;
1469 if (dev->flags & IFF_ALLMULTI)
1470 adapter->macopts |= MAC_ALLMCAST;
1471 if (dev->flags & IFF_MULTICAST)
1472 adapter->macopts |= MAC_MCAST;
1473 }
1474 status = slic_adapter_allocresources(adapter);
1475 if (status != STATUS_SUCCESS) {
1476 dev_err(&dev->dev,
1477 "%s: slic_adapter_allocresources FAILED %x\n",
1478 __func__, status);
1479 slic_adapter_freeresources(adapter);
1480 return status;
1481 }
1482
1483 if (!adapter->queues_initialized) {
1484 if (slic_rspqueue_init(adapter))
1485 return -ENOMEM;
1486 if (slic_cmdq_init(adapter))
1487 return -ENOMEM;
1488 if (slic_rcvqueue_init(adapter))
1489 return -ENOMEM;
1490 adapter->queues_initialized = 1;
1491 }
1492
1493 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1494 mdelay(1);
1495
1496 if (!adapter->isp_initialized) {
1497 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1498
1499 spin_lock_irqsave(&adapter->bit64reglock.lock,
1500 adapter->bit64reglock.flags);
1501
1502 #if defined(CONFIG_X86_64)
1503 slic_reg32_write(&slic_regs->slic_addr_upper,
1504 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1505 slic_reg32_write(&slic_regs->slic_isp,
1506 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1507 #elif defined(CONFIG_X86)
1508 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1509 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
1510 #else
1511 Stop Compilations
1512 #endif
1513 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1514 adapter->bit64reglock.flags);
1515 adapter->isp_initialized = 1;
1516 }
1517
1518 adapter->state = ADAPT_UP;
1519 if (!card->loadtimerset) {
1520 init_timer(&card->loadtimer);
1521 card->loadtimer.expires =
1522 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
1523 card->loadtimer.data = (ulong) card;
1524 card->loadtimer.function = &slic_timer_load_check;
1525 add_timer(&card->loadtimer);
1526
1527 card->loadtimerset = 1;
1528 }
1529
1530 if (!adapter->pingtimerset) {
1531 init_timer(&adapter->pingtimer);
1532 adapter->pingtimer.expires =
1533 jiffies + (PING_TIMER_INTERVAL * HZ);
1534 adapter->pingtimer.data = (ulong) dev;
1535 adapter->pingtimer.function = &slic_timer_ping;
1536 add_timer(&adapter->pingtimer);
1537 adapter->pingtimerset = 1;
1538 adapter->card->pingstatus = ISR_PINGMASK;
1539 }
1540
1541 /*
1542 * clear any pending events, then enable interrupts
1543 */
1544 adapter->isrcopy = 0;
1545 adapter->pshmem->isr = 0;
1546 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
1547 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1548
1549 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1550 slic_link_event_handler(adapter);
1551
1552 return STATUS_SUCCESS;
1553 }
1554
1555 static void slic_unmap_mmio_space(struct adapter *adapter)
1556 {
1557 if (adapter->slic_regs)
1558 iounmap(adapter->slic_regs);
1559 adapter->slic_regs = NULL;
1560 }
1561
1562 static int slic_adapter_allocresources(struct adapter *adapter)
1563 {
1564 if (!adapter->intrregistered) {
1565 int retval;
1566
1567 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1568 slic_global.driver_lock.flags);
1569
1570 retval = request_irq(adapter->netdev->irq,
1571 &slic_interrupt,
1572 IRQF_SHARED,
1573 adapter->netdev->name, adapter->netdev);
1574
1575 spin_lock_irqsave(&slic_global.driver_lock.lock,
1576 slic_global.driver_lock.flags);
1577
1578 if (retval) {
1579 dev_err(&adapter->netdev->dev,
1580 "request_irq (%s) FAILED [%x]\n",
1581 adapter->netdev->name, retval);
1582 return retval;
1583 }
1584 adapter->intrregistered = 1;
1585 }
1586 return STATUS_SUCCESS;
1587 }
1588
1589 static void slic_config_pci(struct pci_dev *pcidev)
1590 {
1591 u16 pci_command;
1592 u16 new_command;
1593
1594 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1595
1596 new_command = pci_command | PCI_COMMAND_MASTER
1597 | PCI_COMMAND_MEMORY
1598 | PCI_COMMAND_INVALIDATE
1599 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1600 if (pci_command != new_command)
1601 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1602 }
1603
1604 static void slic_adapter_freeresources(struct adapter *adapter)
1605 {
1606 slic_init_cleanup(adapter);
1607 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1608 adapter->error_interrupts = 0;
1609 adapter->rcv_interrupts = 0;
1610 adapter->xmit_interrupts = 0;
1611 adapter->linkevent_interrupts = 0;
1612 adapter->upr_interrupts = 0;
1613 adapter->num_isrs = 0;
1614 adapter->xmit_completes = 0;
1615 adapter->rcv_broadcasts = 0;
1616 adapter->rcv_multicasts = 0;
1617 adapter->rcv_unicasts = 0;
1618 }
1619
1620 /*
1621 * slic_link_config
1622 *
1623 * Write phy control to configure link duplex/speed
1624 *
1625 */
1626 static void slic_link_config(struct adapter *adapter,
1627 u32 linkspeed, u32 linkduplex)
1628 {
1629 u32 __iomem *wphy;
1630 u32 speed;
1631 u32 duplex;
1632 u32 phy_config;
1633 u32 phy_advreg;
1634 u32 phy_gctlreg;
1635
1636 if (adapter->state != ADAPT_UP)
1637 return;
1638
1639 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1640 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1641
1642 if (linkspeed > LINK_1000MB)
1643 linkspeed = LINK_AUTOSPEED;
1644 if (linkduplex > LINK_AUTOD)
1645 linkduplex = LINK_AUTOD;
1646
1647 wphy = &adapter->slic_regs->slic_wphy;
1648
1649 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
1650 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
1651 /* We've got a fiber gigabit interface, and register
1652 * 4 is different in fiber mode than in copper mode
1653 */
1654
1655 /* advertise FD only @1000 Mb */
1656 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
1657 /* enable PAUSE frames */
1658 phy_advreg |= PAR_ASYMPAUSE_FIBER;
1659 slic_reg32_write(wphy, phy_advreg, FLUSH);
1660
1661 if (linkspeed == LINK_AUTOSPEED) {
1662 /* reset phy, enable auto-neg */
1663 phy_config =
1664 (MIICR_REG_PCR |
1665 (PCR_RESET | PCR_AUTONEG |
1666 PCR_AUTONEG_RST));
1667 slic_reg32_write(wphy, phy_config, FLUSH);
1668 } else { /* forced 1000 Mb FD*/
1669 /* power down phy to break link
1670 this may not work) */
1671 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
1672 slic_reg32_write(wphy, phy_config, FLUSH);
1673 /* wait, Marvell says 1 sec,
1674 try to get away with 10 ms */
1675 mdelay(10);
1676
1677 /* disable auto-neg, set speed/duplex,
1678 soft reset phy, powerup */
1679 phy_config =
1680 (MIICR_REG_PCR |
1681 (PCR_RESET | PCR_SPEED_1000 |
1682 PCR_DUPLEX_FULL));
1683 slic_reg32_write(wphy, phy_config, FLUSH);
1684 }
1685 } else { /* copper gigabit */
1686
1687 /* Auto-Negotiate or 1000 Mb must be auto negotiated
1688 * We've got a copper gigabit interface, and
1689 * register 4 is different in copper mode than
1690 * in fiber mode
1691 */
1692 if (linkspeed == LINK_AUTOSPEED) {
1693 /* advertise 10/100 Mb modes */
1694 phy_advreg =
1695 (MIICR_REG_4 |
1696 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
1697 | PAR_ADV10HD));
1698 } else {
1699 /* linkspeed == LINK_1000MB -
1700 don't advertise 10/100 Mb modes */
1701 phy_advreg = MIICR_REG_4;
1702 }
1703 /* enable PAUSE frames */
1704 phy_advreg |= PAR_ASYMPAUSE;
1705 /* required by the Cicada PHY */
1706 phy_advreg |= PAR_802_3;
1707 slic_reg32_write(wphy, phy_advreg, FLUSH);
1708 /* advertise FD only @1000 Mb */
1709 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
1710 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
1711
1712 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1713 /* if a Marvell PHY
1714 enable auto crossover */
1715 phy_config =
1716 (MIICR_REG_16 | (MRV_REG16_XOVERON));
1717 slic_reg32_write(wphy, phy_config, FLUSH);
1718
1719 /* reset phy, enable auto-neg */
1720 phy_config =
1721 (MIICR_REG_PCR |
1722 (PCR_RESET | PCR_AUTONEG |
1723 PCR_AUTONEG_RST));
1724 slic_reg32_write(wphy, phy_config, FLUSH);
1725 } else { /* it's a Cicada PHY */
1726 /* enable and restart auto-neg (don't reset) */
1727 phy_config =
1728 (MIICR_REG_PCR |
1729 (PCR_AUTONEG | PCR_AUTONEG_RST));
1730 slic_reg32_write(wphy, phy_config, FLUSH);
1731 }
1732 }
1733 } else {
1734 /* Forced 10/100 */
1735 if (linkspeed == LINK_10MB)
1736 speed = 0;
1737 else
1738 speed = PCR_SPEED_100;
1739 if (linkduplex == LINK_HALFD)
1740 duplex = 0;
1741 else
1742 duplex = PCR_DUPLEX_FULL;
1743
1744 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1745 /* if a Marvell PHY
1746 disable auto crossover */
1747 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
1748 slic_reg32_write(wphy, phy_config, FLUSH);
1749 }
1750
1751 /* power down phy to break link (this may not work) */
1752 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
1753 slic_reg32_write(wphy, phy_config, FLUSH);
1754
1755 /* wait, Marvell says 1 sec, try to get away with 10 ms */
1756 mdelay(10);
1757
1758 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1759 /* if a Marvell PHY
1760 disable auto-neg, set speed,
1761 soft reset phy, powerup */
1762 phy_config =
1763 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
1764 slic_reg32_write(wphy, phy_config, FLUSH);
1765 } else { /* it's a Cicada PHY */
1766 /* disable auto-neg, set speed, powerup */
1767 phy_config = (MIICR_REG_PCR | (speed | duplex));
1768 slic_reg32_write(wphy, phy_config, FLUSH);
1769 }
1770 }
1771 }
1772
1773 static void slic_card_cleanup(struct sliccard *card)
1774 {
1775 if (card->loadtimerset) {
1776 card->loadtimerset = 0;
1777 del_timer(&card->loadtimer);
1778 }
1779
1780 slic_debug_card_destroy(card);
1781
1782 kfree(card);
1783 }
1784
1785 static int slic_card_download_gbrcv(struct adapter *adapter)
1786 {
1787 const struct firmware *fw;
1788 const char *file = "";
1789 int ret;
1790 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1791 u32 codeaddr;
1792 u32 instruction;
1793 int index = 0;
1794 u32 rcvucodelen = 0;
1795
1796 switch (adapter->devid) {
1797 case SLIC_2GB_DEVICE_ID:
1798 file = "slicoss/oasisrcvucode.sys";
1799 break;
1800 case SLIC_1GB_DEVICE_ID:
1801 file = "slicoss/gbrcvucode.sys";
1802 break;
1803 default:
1804 ASSERT(0);
1805 break;
1806 }
1807
1808 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1809 if (ret) {
1810 dev_err(&adapter->pcidev->dev,
1811 "SLICOSS: Failed to load firmware %s\n", file);
1812 return ret;
1813 }
1814
1815 rcvucodelen = *(u32 *)(fw->data + index);
1816 index += 4;
1817 switch (adapter->devid) {
1818 case SLIC_2GB_DEVICE_ID:
1819 if (rcvucodelen != OasisRcvUCodeLen)
1820 return -EINVAL;
1821 break;
1822 case SLIC_1GB_DEVICE_ID:
1823 if (rcvucodelen != GBRcvUCodeLen)
1824 return -EINVAL;
1825 break;
1826 default:
1827 ASSERT(0);
1828 break;
1829 }
1830 /* start download */
1831 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
1832 /* download the rcv sequencer ucode */
1833 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
1834 /* write out instruction address */
1835 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
1836
1837 instruction = *(u32 *)(fw->data + index);
1838 index += 4;
1839 /* write out the instruction data low addr */
1840 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
1841
1842 instruction = *(u8 *)(fw->data + index);
1843 index++;
1844 /* write out the instruction data high addr */
1845 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
1846 FLUSH);
1847 }
1848
1849 /* download finished */
1850 release_firmware(fw);
1851 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
1852 return 0;
1853 }
1854
1855 static int slic_card_download(struct adapter *adapter)
1856 {
1857 const struct firmware *fw;
1858 const char *file = "";
1859 int ret;
1860 u32 section;
1861 int thissectionsize;
1862 int codeaddr;
1863 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1864 u32 instruction;
1865 u32 baseaddress;
1866 u32 i;
1867 u32 numsects = 0;
1868 u32 sectsize[3];
1869 u32 sectstart[3];
1870 int ucode_start, index = 0;
1871
1872 switch (adapter->devid) {
1873 case SLIC_2GB_DEVICE_ID:
1874 file = "slicoss/oasisdownload.sys";
1875 break;
1876 case SLIC_1GB_DEVICE_ID:
1877 file = "slicoss/gbdownload.sys";
1878 break;
1879 default:
1880 ASSERT(0);
1881 break;
1882 }
1883 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1884 if (ret) {
1885 dev_err(&adapter->pcidev->dev,
1886 "SLICOSS: Failed to load firmware %s\n", file);
1887 return ret;
1888 }
1889 numsects = *(u32 *)(fw->data + index);
1890 index += 4;
1891 ASSERT(numsects <= 3);
1892 for (i = 0; i < numsects; i++) {
1893 sectsize[i] = *(u32 *)(fw->data + index);
1894 index += 4;
1895 }
1896 for (i = 0; i < numsects; i++) {
1897 sectstart[i] = *(u32 *)(fw->data + index);
1898 index += 4;
1899 }
1900 ucode_start = index;
1901 instruction = *(u32 *)(fw->data + index);
1902 index += 4;
1903 for (section = 0; section < numsects; section++) {
1904 baseaddress = sectstart[section];
1905 thissectionsize = sectsize[section] >> 3;
1906
1907 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1908 /* Write out instruction address */
1909 slic_reg32_write(&slic_regs->slic_wcs,
1910 baseaddress + codeaddr, FLUSH);
1911 /* Write out instruction to low addr */
1912 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
1913 instruction = *(u32 *)(fw->data + index);
1914 index += 4;
1915
1916 /* Write out instruction to high addr */
1917 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
1918 instruction = *(u32 *)(fw->data + index);
1919 index += 4;
1920 }
1921 }
1922 index = ucode_start;
1923 for (section = 0; section < numsects; section++) {
1924 instruction = *(u32 *)(fw->data + index);
1925 baseaddress = sectstart[section];
1926 if (baseaddress < 0x8000)
1927 continue;
1928 thissectionsize = sectsize[section] >> 3;
1929
1930 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1931 /* Write out instruction address */
1932 slic_reg32_write(&slic_regs->slic_wcs,
1933 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
1934 FLUSH);
1935 /* Write out instruction to low addr */
1936 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1937 FLUSH);
1938 instruction = *(u32 *)(fw->data + index);
1939 index += 4;
1940 /* Write out instruction to high addr */
1941 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1942 FLUSH);
1943 instruction = *(u32 *)(fw->data + index);
1944 index += 4;
1945
1946 /* Check SRAM location zero. If it is non-zero. Abort.*/
1947 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
1948 if (failure) {
1949 release_firmware(fw);
1950 return -EIO;
1951 }*/
1952 }
1953 }
1954 release_firmware(fw);
1955 /* Everything OK, kick off the card */
1956 mdelay(10);
1957 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
1958
1959 /* stall for 20 ms, long enough for ucode to init card
1960 and reach mainloop */
1961 mdelay(20);
1962
1963 return STATUS_SUCCESS;
1964 }
1965
1966 static void slic_adapter_set_hwaddr(struct adapter *adapter)
1967 {
1968 struct sliccard *card = adapter->card;
1969
1970 if ((adapter->card) && (card->config_set)) {
1971 memcpy(adapter->macaddr,
1972 card->config.MacInfo[adapter->functionnumber].macaddrA,
1973 sizeof(struct slic_config_mac));
1974 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
1975 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
1976 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
1977 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
1978 }
1979 if (adapter->netdev) {
1980 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
1981 6);
1982 }
1983 }
1984 }
1985
1986 static void slic_intagg_set(struct adapter *adapter, u32 value)
1987 {
1988 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
1989 adapter->card->loadlevel_current = value;
1990 }
1991
1992 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
1993 {
1994 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1995 struct slic_eeprom *peeprom;
1996 struct oslic_eeprom *pOeeprom;
1997 dma_addr_t phys_config;
1998 u32 phys_configh;
1999 u32 phys_configl;
2000 u32 i = 0;
2001 struct slic_shmem *pshmem;
2002 int status;
2003 uint macaddrs = card->card_size;
2004 ushort eecodesize;
2005 ushort dramsize;
2006 ushort ee_chksum;
2007 ushort calc_chksum;
2008 struct slic_config_mac *pmac;
2009 unsigned char fruformat;
2010 unsigned char oemfruformat;
2011 struct atk_fru *patkfru;
2012 union oemfru *poemfru;
2013
2014 /* Reset everything except PCI configuration space */
2015 slic_soft_reset(adapter);
2016
2017 /* Download the microcode */
2018 status = slic_card_download(adapter);
2019
2020 if (status != STATUS_SUCCESS) {
2021 dev_err(&adapter->pcidev->dev,
2022 "download failed bus %d slot %d\n",
2023 adapter->busnumber, adapter->slotnumber);
2024 return status;
2025 }
2026
2027 if (!card->config_set) {
2028 peeprom = pci_alloc_consistent(adapter->pcidev,
2029 sizeof(struct slic_eeprom),
2030 &phys_config);
2031
2032 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2033 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2034
2035 if (!peeprom) {
2036 dev_err(&adapter->pcidev->dev,
2037 "eeprom read failed to get memory "
2038 "bus %d slot %d\n", adapter->busnumber,
2039 adapter->slotnumber);
2040 return -ENOMEM;
2041 } else {
2042 memset(peeprom, 0, sizeof(struct slic_eeprom));
2043 }
2044 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2045 mdelay(1);
2046 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2047
2048 spin_lock_irqsave(&adapter->bit64reglock.lock,
2049 adapter->bit64reglock.flags);
2050 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2051 slic_reg32_write(&slic_regs->slic_isp,
2052 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2053 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2054 adapter->bit64reglock.flags);
2055
2056 slic_config_get(adapter, phys_configl, phys_configh);
2057
2058 for (;;) {
2059 if (adapter->pshmem->isr) {
2060 if (adapter->pshmem->isr & ISR_UPC) {
2061 adapter->pshmem->isr = 0;
2062 slic_reg64_write(adapter,
2063 &slic_regs->slic_isp, 0,
2064 &slic_regs->slic_addr_upper,
2065 0, FLUSH);
2066 slic_reg32_write(&slic_regs->slic_isr,
2067 0, FLUSH);
2068
2069 slic_upr_request_complete(adapter, 0);
2070 break;
2071 } else {
2072 adapter->pshmem->isr = 0;
2073 slic_reg32_write(&slic_regs->slic_isr,
2074 0, FLUSH);
2075 }
2076 } else {
2077 mdelay(1);
2078 i++;
2079 if (i > 5000) {
2080 dev_err(&adapter->pcidev->dev,
2081 "%d config data fetch timed out!\n",
2082 adapter->port);
2083 slic_reg64_write(adapter,
2084 &slic_regs->slic_isp, 0,
2085 &slic_regs->slic_addr_upper,
2086 0, FLUSH);
2087 return -EINVAL;
2088 }
2089 }
2090 }
2091
2092 switch (adapter->devid) {
2093 /* Oasis card */
2094 case SLIC_2GB_DEVICE_ID:
2095 /* extract EEPROM data and pointers to EEPROM data */
2096 pOeeprom = (struct oslic_eeprom *) peeprom;
2097 eecodesize = pOeeprom->EecodeSize;
2098 dramsize = pOeeprom->DramSize;
2099 pmac = pOeeprom->MacInfo;
2100 fruformat = pOeeprom->FruFormat;
2101 patkfru = &pOeeprom->AtkFru;
2102 oemfruformat = pOeeprom->OemFruFormat;
2103 poemfru = &pOeeprom->OemFru;
2104 macaddrs = 2;
2105 /* Minor kludge for Oasis card
2106 get 2 MAC addresses from the
2107 EEPROM to ensure that function 1
2108 gets the Port 1 MAC address */
2109 break;
2110 default:
2111 /* extract EEPROM data and pointers to EEPROM data */
2112 eecodesize = peeprom->EecodeSize;
2113 dramsize = peeprom->DramSize;
2114 pmac = peeprom->u2.mac.MacInfo;
2115 fruformat = peeprom->FruFormat;
2116 patkfru = &peeprom->AtkFru;
2117 oemfruformat = peeprom->OemFruFormat;
2118 poemfru = &peeprom->OemFru;
2119 break;
2120 }
2121
2122 card->config.EepromValid = false;
2123
2124 /* see if the EEPROM is valid by checking it's checksum */
2125 if ((eecodesize <= MAX_EECODE_SIZE) &&
2126 (eecodesize >= MIN_EECODE_SIZE)) {
2127
2128 ee_chksum =
2129 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2130 /*
2131 calculate the EEPROM checksum
2132 */
2133 calc_chksum =
2134 ~slic_eeprom_cksum((char *) peeprom,
2135 (eecodesize - 2));
2136 /*
2137 if the ucdoe chksum flag bit worked,
2138 we wouldn't need this shit
2139 */
2140 if (ee_chksum == calc_chksum)
2141 card->config.EepromValid = true;
2142 }
2143 /* copy in the DRAM size */
2144 card->config.DramSize = dramsize;
2145
2146 /* copy in the MAC address(es) */
2147 for (i = 0; i < macaddrs; i++) {
2148 memcpy(&card->config.MacInfo[i],
2149 &pmac[i], sizeof(struct slic_config_mac));
2150 }
2151
2152 /* copy the Alacritech FRU information */
2153 card->config.FruFormat = fruformat;
2154 memcpy(&card->config.AtkFru, patkfru,
2155 sizeof(struct atk_fru));
2156
2157 pci_free_consistent(adapter->pcidev,
2158 sizeof(struct slic_eeprom),
2159 peeprom, phys_config);
2160
2161 if ((!card->config.EepromValid) &&
2162 (adapter->reg_params.fail_on_bad_eeprom)) {
2163 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2164 &slic_regs->slic_addr_upper,
2165 0, FLUSH);
2166 dev_err(&adapter->pcidev->dev,
2167 "unsupported CONFIGURATION EEPROM invalid\n");
2168 return -EINVAL;
2169 }
2170
2171 card->config_set = 1;
2172 }
2173
2174 if (slic_card_download_gbrcv(adapter)) {
2175 dev_err(&adapter->pcidev->dev,
2176 "unable to download GB receive microcode\n");
2177 return -EINVAL;
2178 }
2179
2180 if (slic_global.dynamic_intagg)
2181 slic_intagg_set(adapter, 0);
2182 else
2183 slic_intagg_set(adapter, intagg_delay);
2184
2185 /*
2186 * Initialize ping status to "ok"
2187 */
2188 card->pingstatus = ISR_PINGMASK;
2189
2190 /*
2191 * Lastly, mark our card state as up and return success
2192 */
2193 card->state = CARD_UP;
2194 card->reset_in_progress = 0;
2195
2196 return STATUS_SUCCESS;
2197 }
2198
2199 static u32 slic_card_locate(struct adapter *adapter)
2200 {
2201 struct sliccard *card = slic_global.slic_card;
2202 struct physcard *physcard = slic_global.phys_card;
2203 ushort card_hostid;
2204 u16 __iomem *hostid_reg;
2205 uint i;
2206 uint rdhostid_offset = 0;
2207
2208 switch (adapter->devid) {
2209 case SLIC_2GB_DEVICE_ID:
2210 rdhostid_offset = SLIC_RDHOSTID_2GB;
2211 break;
2212 case SLIC_1GB_DEVICE_ID:
2213 rdhostid_offset = SLIC_RDHOSTID_1GB;
2214 break;
2215 default:
2216 ASSERT(0);
2217 break;
2218 }
2219
2220 hostid_reg =
2221 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2222 rdhostid_offset);
2223
2224 /* read the 16 bit hostid from SRAM */
2225 card_hostid = (ushort) readw(hostid_reg);
2226
2227 /* Initialize a new card structure if need be */
2228 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2229 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2230 if (card == NULL)
2231 return -ENOMEM;
2232
2233 card->next = slic_global.slic_card;
2234 slic_global.slic_card = card;
2235 card->busnumber = adapter->busnumber;
2236 card->slotnumber = adapter->slotnumber;
2237
2238 /* Find an available cardnum */
2239 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2240 if (slic_global.cardnuminuse[i] == 0) {
2241 slic_global.cardnuminuse[i] = 1;
2242 card->cardnum = i;
2243 break;
2244 }
2245 }
2246 slic_global.num_slic_cards++;
2247
2248 slic_debug_card_create(card);
2249 } else {
2250 /* Card exists, find the card this adapter belongs to */
2251 while (card) {
2252 if (card->cardnum == card_hostid)
2253 break;
2254 card = card->next;
2255 }
2256 }
2257
2258 ASSERT(card);
2259 if (!card)
2260 return STATUS_FAILURE;
2261 /* Put the adapter in the card's adapter list */
2262 ASSERT(card->adapter[adapter->port] == NULL);
2263 if (!card->adapter[adapter->port]) {
2264 card->adapter[adapter->port] = adapter;
2265 adapter->card = card;
2266 }
2267
2268 card->card_size = 1; /* one port per *logical* card */
2269
2270 while (physcard) {
2271 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2272 if (!physcard->adapter[i])
2273 continue;
2274 else
2275 break;
2276 }
2277 ASSERT(i != SLIC_MAX_PORTS);
2278 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2279 break;
2280 physcard = physcard->next;
2281 }
2282 if (!physcard) {
2283 /* no structure allocated for this physical card yet */
2284 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
2285 ASSERT(physcard);
2286
2287 physcard->next = slic_global.phys_card;
2288 slic_global.phys_card = physcard;
2289 physcard->adapters_allocd = 1;
2290 } else {
2291 physcard->adapters_allocd++;
2292 }
2293 /* Note - this is ZERO relative */
2294 adapter->physport = physcard->adapters_allocd - 1;
2295
2296 ASSERT(physcard->adapter[adapter->physport] == NULL);
2297 physcard->adapter[adapter->physport] = adapter;
2298 adapter->physcard = physcard;
2299
2300 return 0;
2301 }
2302
2303 static void slic_soft_reset(struct adapter *adapter)
2304 {
2305 if (adapter->card->state == CARD_UP) {
2306 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
2307 mdelay(1);
2308 }
2309
2310 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
2311 FLUSH);
2312 mdelay(1);
2313 }
2314
2315 static void slic_config_set(struct adapter *adapter, bool linkchange)
2316 {
2317 u32 value;
2318 u32 RcrReset;
2319 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2320
2321 if (linkchange) {
2322 /* Setup MAC */
2323 slic_mac_config(adapter);
2324 RcrReset = GRCR_RESET;
2325 } else {
2326 slic_mac_address_config(adapter);
2327 RcrReset = 0;
2328 }
2329
2330 if (adapter->linkduplex == LINK_FULLD) {
2331 /* setup xmtcfg */
2332 value = (GXCR_RESET | /* Always reset */
2333 GXCR_XMTEN | /* Enable transmit */
2334 GXCR_PAUSEEN); /* Enable pause */
2335
2336 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2337
2338 /* Setup rcvcfg last */
2339 value = (RcrReset | /* Reset, if linkchange */
2340 GRCR_CTLEN | /* Enable CTL frames */
2341 GRCR_ADDRAEN | /* Address A enable */
2342 GRCR_RCVBAD | /* Rcv bad frames */
2343 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2344 } else {
2345 /* setup xmtcfg */
2346 value = (GXCR_RESET | /* Always reset */
2347 GXCR_XMTEN); /* Enable transmit */
2348
2349 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2350
2351 /* Setup rcvcfg last */
2352 value = (RcrReset | /* Reset, if linkchange */
2353 GRCR_ADDRAEN | /* Address A enable */
2354 GRCR_RCVBAD | /* Rcv bad frames */
2355 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2356 }
2357
2358 if (adapter->state != ADAPT_DOWN) {
2359 /* Only enable receive if we are restarting or running */
2360 value |= GRCR_RCVEN;
2361 }
2362
2363 if (adapter->macopts & MAC_PROMISC)
2364 value |= GRCR_RCVALL;
2365
2366 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
2367 }
2368
2369 /*
2370 * Turn off RCV and XMT, power down PHY
2371 */
2372 static void slic_config_clear(struct adapter *adapter)
2373 {
2374 u32 value;
2375 u32 phy_config;
2376 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2377
2378 /* Setup xmtcfg */
2379 value = (GXCR_RESET | /* Always reset */
2380 GXCR_PAUSEEN); /* Enable pause */
2381
2382 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2383
2384 value = (GRCR_RESET | /* Always reset */
2385 GRCR_CTLEN | /* Enable CTL frames */
2386 GRCR_ADDRAEN | /* Address A enable */
2387 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2388
2389 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
2390
2391 /* power down phy */
2392 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2393 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
2394 }
2395
2396 static void slic_config_get(struct adapter *adapter, u32 config,
2397 u32 config_h)
2398 {
2399 int status;
2400
2401 status = slic_upr_request(adapter,
2402 SLIC_UPR_RCONFIG,
2403 (u32) config, (u32) config_h, 0, 0);
2404 ASSERT(status == 0);
2405 }
2406
2407 static void slic_mac_address_config(struct adapter *adapter)
2408 {
2409 u32 value;
2410 u32 value2;
2411 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2412
2413 value = *(u32 *) &adapter->currmacaddr[2];
2414 value = ntohl(value);
2415 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
2416 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
2417
2418 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
2419 adapter->currmacaddr[1]) & 0xFFFF);
2420
2421 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
2422 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
2423
2424 /* Write our multicast mask out to the card. This is done */
2425 /* here in addition to the slic_mcast_addr_set routine */
2426 /* because ALL_MCAST may have been enabled or disabled */
2427 slic_mcast_set_mask(adapter);
2428 }
2429
2430 static void slic_mac_config(struct adapter *adapter)
2431 {
2432 u32 value;
2433 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2434
2435 /* Setup GMAC gaps */
2436 if (adapter->linkspeed == LINK_1000MB) {
2437 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
2438 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
2439 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
2440 } else {
2441 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
2442 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
2443 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
2444 }
2445
2446 /* enable GMII */
2447 if (adapter->linkspeed == LINK_1000MB)
2448 value |= GMCR_GBIT;
2449
2450 /* enable fullduplex */
2451 if ((adapter->linkduplex == LINK_FULLD)
2452 || (adapter->macopts & MAC_LOOPBACK)) {
2453 value |= GMCR_FULLD;
2454 }
2455
2456 /* write mac config */
2457 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
2458
2459 /* setup mac addresses */
2460 slic_mac_address_config(adapter);
2461 }
2462
2463 static bool slic_mac_filter(struct adapter *adapter,
2464 struct ether_header *ether_frame)
2465 {
2466 u32 opts = adapter->macopts;
2467 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
2468 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
2469 bool equaladdr;
2470
2471 if (opts & MAC_PROMISC)
2472 return true;
2473
2474 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
2475 if (opts & MAC_BCAST) {
2476 adapter->rcv_broadcasts++;
2477 return true;
2478 } else {
2479 return false;
2480 }
2481 }
2482
2483 if (ether_frame->ether_dhost[0] & 0x01) {
2484 if (opts & MAC_ALLMCAST) {
2485 adapter->rcv_multicasts++;
2486 adapter->stats.multicast++;
2487 return true;
2488 }
2489 if (opts & MAC_MCAST) {
2490 struct mcast_address *mcaddr = adapter->mcastaddrs;
2491
2492 while (mcaddr) {
2493 ETHER_EQ_ADDR(mcaddr->address,
2494 ether_frame->ether_dhost,
2495 equaladdr);
2496 if (equaladdr) {
2497 adapter->rcv_multicasts++;
2498 adapter->stats.multicast++;
2499 return true;
2500 }
2501 mcaddr = mcaddr->next;
2502 }
2503 return false;
2504 } else {
2505 return false;
2506 }
2507 }
2508 if (opts & MAC_DIRECTED) {
2509 adapter->rcv_unicasts++;
2510 return true;
2511 }
2512 return false;
2513
2514 }
2515
2516 static int slic_mac_set_address(struct net_device *dev, void *ptr)
2517 {
2518 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
2519 struct sockaddr *addr = ptr;
2520
2521 if (netif_running(dev))
2522 return -EBUSY;
2523 if (!adapter)
2524 return -EBUSY;
2525
2526 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2527 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
2528
2529 slic_config_set(adapter, true);
2530 return 0;
2531 }
2532
2533 static void slic_timer_load_check(ulong cardaddr)
2534 {
2535 struct sliccard *card = (struct sliccard *)cardaddr;
2536 struct adapter *adapter = card->master;
2537 u32 __iomem *intagg;
2538 u32 load = card->events;
2539 u32 level = 0;
2540
2541 intagg = &adapter->slic_regs->slic_intagg;
2542
2543 if ((adapter) && (adapter->state == ADAPT_UP) &&
2544 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
2545 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
2546 if (adapter->linkspeed == LINK_1000MB)
2547 level = 100;
2548 else {
2549 if (load > SLIC_LOAD_5)
2550 level = SLIC_INTAGG_5;
2551 else if (load > SLIC_LOAD_4)
2552 level = SLIC_INTAGG_4;
2553 else if (load > SLIC_LOAD_3)
2554 level = SLIC_INTAGG_3;
2555 else if (load > SLIC_LOAD_2)
2556 level = SLIC_INTAGG_2;
2557 else if (load > SLIC_LOAD_1)
2558 level = SLIC_INTAGG_1;
2559 else
2560 level = SLIC_INTAGG_0;
2561 }
2562 if (card->loadlevel_current != level) {
2563 card->loadlevel_current = level;
2564 slic_reg32_write(intagg, level, FLUSH);
2565 }
2566 } else {
2567 if (load > SLIC_LOAD_5)
2568 level = SLIC_INTAGG_5;
2569 else if (load > SLIC_LOAD_4)
2570 level = SLIC_INTAGG_4;
2571 else if (load > SLIC_LOAD_3)
2572 level = SLIC_INTAGG_3;
2573 else if (load > SLIC_LOAD_2)
2574 level = SLIC_INTAGG_2;
2575 else if (load > SLIC_LOAD_1)
2576 level = SLIC_INTAGG_1;
2577 else
2578 level = SLIC_INTAGG_0;
2579 if (card->loadlevel_current != level) {
2580 card->loadlevel_current = level;
2581 slic_reg32_write(intagg, level, FLUSH);
2582 }
2583 }
2584 }
2585 card->events = 0;
2586 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2587 add_timer(&card->loadtimer);
2588 }
2589
2590 static void slic_assert_fail(void)
2591 {
2592 u32 cpuid;
2593 u32 curr_pid;
2594 cpuid = smp_processor_id();
2595 curr_pid = current->pid;
2596
2597 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
2598 __func__, cpuid, curr_pid);
2599 }
2600
2601 static int slic_upr_queue_request(struct adapter *adapter,
2602 u32 upr_request,
2603 u32 upr_data,
2604 u32 upr_data_h,
2605 u32 upr_buffer, u32 upr_buffer_h)
2606 {
2607 struct slic_upr *upr;
2608 struct slic_upr *uprqueue;
2609
2610 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
2611 if (!upr)
2612 return -ENOMEM;
2613
2614 upr->adapter = adapter->port;
2615 upr->upr_request = upr_request;
2616 upr->upr_data = upr_data;
2617 upr->upr_buffer = upr_buffer;
2618 upr->upr_data_h = upr_data_h;
2619 upr->upr_buffer_h = upr_buffer_h;
2620 upr->next = NULL;
2621 if (adapter->upr_list) {
2622 uprqueue = adapter->upr_list;
2623
2624 while (uprqueue->next)
2625 uprqueue = uprqueue->next;
2626 uprqueue->next = upr;
2627 } else {
2628 adapter->upr_list = upr;
2629 }
2630 return STATUS_SUCCESS;
2631 }
2632
2633 static int slic_upr_request(struct adapter *adapter,
2634 u32 upr_request,
2635 u32 upr_data,
2636 u32 upr_data_h,
2637 u32 upr_buffer, u32 upr_buffer_h)
2638 {
2639 int status;
2640
2641 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
2642 status = slic_upr_queue_request(adapter,
2643 upr_request,
2644 upr_data,
2645 upr_data_h, upr_buffer, upr_buffer_h);
2646 if (status != STATUS_SUCCESS) {
2647 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2648 adapter->upr_lock.flags);
2649 return status;
2650 }
2651 slic_upr_start(adapter);
2652 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2653 adapter->upr_lock.flags);
2654 return STATUS_PENDING;
2655 }
2656
2657 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
2658 {
2659 struct sliccard *card = adapter->card;
2660 struct slic_upr *upr;
2661
2662 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
2663 upr = adapter->upr_list;
2664 if (!upr) {
2665 ASSERT(0);
2666 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2667 adapter->upr_lock.flags);
2668 return;
2669 }
2670 adapter->upr_list = upr->next;
2671 upr->next = NULL;
2672 adapter->upr_busy = 0;
2673 ASSERT(adapter->port == upr->adapter);
2674 switch (upr->upr_request) {
2675 case SLIC_UPR_STATS:
2676 {
2677 struct slic_stats *slicstats =
2678 (struct slic_stats *) &adapter->pshmem->inicstats;
2679 struct slic_stats *newstats = slicstats;
2680 struct slic_stats *old = &adapter->inicstats_prev;
2681 struct slicnet_stats *stst = &adapter->slic_stats;
2682
2683 if (isr & ISR_UPCERR) {
2684 dev_err(&adapter->netdev->dev,
2685 "SLIC_UPR_STATS command failed isr[%x]\n",
2686 isr);
2687
2688 break;
2689 }
2690 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
2691 newstats->xmit_tcp_segs_gb,
2692 old->xmit_tcp_segs_gb);
2693
2694 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
2695 newstats->xmit_tcp_bytes_gb,
2696 old->xmit_tcp_bytes_gb);
2697
2698 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
2699 newstats->rcv_tcp_segs_gb,
2700 old->rcv_tcp_segs_gb);
2701
2702 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
2703 newstats->rcv_tcp_bytes_gb,
2704 old->rcv_tcp_bytes_gb);
2705
2706 UPDATE_STATS_GB(stst->iface.xmt_bytes,
2707 newstats->xmit_bytes_gb,
2708 old->xmit_bytes_gb);
2709
2710 UPDATE_STATS_GB(stst->iface.xmt_ucast,
2711 newstats->xmit_unicasts_gb,
2712 old->xmit_unicasts_gb);
2713
2714 UPDATE_STATS_GB(stst->iface.rcv_bytes,
2715 newstats->rcv_bytes_gb,
2716 old->rcv_bytes_gb);
2717
2718 UPDATE_STATS_GB(stst->iface.rcv_ucast,
2719 newstats->rcv_unicasts_gb,
2720 old->rcv_unicasts_gb);
2721
2722 UPDATE_STATS_GB(stst->iface.xmt_errors,
2723 newstats->xmit_collisions_gb,
2724 old->xmit_collisions_gb);
2725
2726 UPDATE_STATS_GB(stst->iface.xmt_errors,
2727 newstats->xmit_excess_collisions_gb,
2728 old->xmit_excess_collisions_gb);
2729
2730 UPDATE_STATS_GB(stst->iface.xmt_errors,
2731 newstats->xmit_other_error_gb,
2732 old->xmit_other_error_gb);
2733
2734 UPDATE_STATS_GB(stst->iface.rcv_errors,
2735 newstats->rcv_other_error_gb,
2736 old->rcv_other_error_gb);
2737
2738 UPDATE_STATS_GB(stst->iface.rcv_discards,
2739 newstats->rcv_drops_gb,
2740 old->rcv_drops_gb);
2741
2742 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
2743 adapter->rcv_drops +=
2744 (newstats->rcv_drops_gb -
2745 old->rcv_drops_gb);
2746 }
2747 memcpy(old, newstats, sizeof(struct slic_stats));
2748 break;
2749 }
2750 case SLIC_UPR_RLSR:
2751 slic_link_upr_complete(adapter, isr);
2752 break;
2753 case SLIC_UPR_RCONFIG:
2754 break;
2755 case SLIC_UPR_RPHY:
2756 ASSERT(0);
2757 break;
2758 case SLIC_UPR_ENLB:
2759 ASSERT(0);
2760 break;
2761 case SLIC_UPR_ENCT:
2762 ASSERT(0);
2763 break;
2764 case SLIC_UPR_PDWN:
2765 ASSERT(0);
2766 break;
2767 case SLIC_UPR_PING:
2768 card->pingstatus |= (isr & ISR_PINGDSMASK);
2769 break;
2770 default:
2771 ASSERT(0);
2772 }
2773 kfree(upr);
2774 slic_upr_start(adapter);
2775 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2776 adapter->upr_lock.flags);
2777 }
2778
2779 static void slic_upr_start(struct adapter *adapter)
2780 {
2781 struct slic_upr *upr;
2782 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2783 /*
2784 char * ptr1;
2785 char * ptr2;
2786 uint cmdoffset;
2787 */
2788 upr = adapter->upr_list;
2789 if (!upr)
2790 return;
2791 if (adapter->upr_busy)
2792 return;
2793 adapter->upr_busy = 1;
2794
2795 switch (upr->upr_request) {
2796 case SLIC_UPR_STATS:
2797 if (upr->upr_data_h == 0) {
2798 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
2799 FLUSH);
2800 } else {
2801 slic_reg64_write(adapter, &slic_regs->slic_stats64,
2802 upr->upr_data,
2803 &slic_regs->slic_addr_upper,
2804 upr->upr_data_h, FLUSH);
2805 }
2806 break;
2807
2808 case SLIC_UPR_RLSR:
2809 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
2810 &slic_regs->slic_addr_upper, upr->upr_data_h,
2811 FLUSH);
2812 break;
2813
2814 case SLIC_UPR_RCONFIG:
2815 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
2816 upr->upr_data, &slic_regs->slic_addr_upper,
2817 upr->upr_data_h, FLUSH);
2818 break;
2819 case SLIC_UPR_PING:
2820 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
2821 break;
2822 default:
2823 ASSERT(0);
2824 }
2825 }
2826
2827 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
2828 {
2829 u32 linkstatus = adapter->pshmem->linkstatus;
2830 uint linkup;
2831 unsigned char linkspeed;
2832 unsigned char linkduplex;
2833
2834 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2835 struct slic_shmem *pshmem;
2836
2837 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2838 #if defined(CONFIG_X86_64)
2839 slic_upr_queue_request(adapter,
2840 SLIC_UPR_RLSR,
2841 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2842 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2843 0, 0);
2844 #elif defined(CONFIG_X86)
2845 slic_upr_queue_request(adapter,
2846 SLIC_UPR_RLSR,
2847 (u32) &pshmem->linkstatus,
2848 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
2849 #else
2850 Stop Compilation;
2851 #endif
2852 return;
2853 }
2854 if (adapter->state != ADAPT_UP)
2855 return;
2856
2857 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2858 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2859
2860 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
2861 if (linkstatus & GIG_SPEED_1000)
2862 linkspeed = LINK_1000MB;
2863 else if (linkstatus & GIG_SPEED_100)
2864 linkspeed = LINK_100MB;
2865 else
2866 linkspeed = LINK_10MB;
2867
2868 if (linkstatus & GIG_FULLDUPLEX)
2869 linkduplex = LINK_FULLD;
2870 else
2871 linkduplex = LINK_HALFD;
2872
2873 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
2874 return;
2875
2876 /* link up event, but nothing has changed */
2877 if ((adapter->linkstate == LINK_UP) &&
2878 (linkup == LINK_UP) &&
2879 (adapter->linkspeed == linkspeed) &&
2880 (adapter->linkduplex == linkduplex))
2881 return;
2882
2883 /* link has changed at this point */
2884
2885 /* link has gone from up to down */
2886 if (linkup == LINK_DOWN) {
2887 adapter->linkstate = LINK_DOWN;
2888 return;
2889 }
2890
2891 /* link has gone from down to up */
2892 adapter->linkspeed = linkspeed;
2893 adapter->linkduplex = linkduplex;
2894
2895 if (adapter->linkstate != LINK_UP) {
2896 /* setup the mac */
2897 slic_config_set(adapter, true);
2898 adapter->linkstate = LINK_UP;
2899 netif_start_queue(adapter->netdev);
2900 }
2901 }
2902
2903 /*
2904 * this is here to checksum the eeprom, there is some ucode bug
2905 * which prevens us from using the ucode result.
2906 * remove this once ucode is fixed.
2907 */
2908 static ushort slic_eeprom_cksum(char *m, int len)
2909 {
2910 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
2911 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
2912 }
2913
2914 u16 *w;
2915 u32 sum = 0;
2916 u32 byte_swapped = 0;
2917 u32 w_int;
2918
2919 union {
2920 char c[2];
2921 ushort s;
2922 } s_util;
2923
2924 union {
2925 ushort s[2];
2926 int l;
2927 } l_util;
2928
2929 l_util.l = 0;
2930 s_util.s = 0;
2931
2932 w = (u16 *)m;
2933 #ifdef CONFIG_X86_64
2934 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
2935 #else
2936 w_int = (u32) (w);
2937 #endif
2938 if ((1 & w_int) && (len > 0)) {
2939 REDUCE;
2940 sum <<= 8;
2941 s_util.c[0] = *(unsigned char *)w;
2942 w = (u16 *)((char *)w + 1);
2943 len--;
2944 byte_swapped = 1;
2945 }
2946
2947 /* Unroll the loop to make overhead from branches &c small. */
2948 while ((len -= 32) >= 0) {
2949 sum += w[0];
2950 sum += w[1];
2951 sum += w[2];
2952 sum += w[3];
2953 sum += w[4];
2954 sum += w[5];
2955 sum += w[6];
2956 sum += w[7];
2957 sum += w[8];
2958 sum += w[9];
2959 sum += w[10];
2960 sum += w[11];
2961 sum += w[12];
2962 sum += w[13];
2963 sum += w[14];
2964 sum += w[15];
2965 w = (u16 *)((ulong) w + 16); /* verify */
2966 }
2967 len += 32;
2968 while ((len -= 8) >= 0) {
2969 sum += w[0];
2970 sum += w[1];
2971 sum += w[2];
2972 sum += w[3];
2973 w = (u16 *)((ulong) w + 4); /* verify */
2974 }
2975 len += 8;
2976 if (len != 0 || byte_swapped != 0) {
2977 REDUCE;
2978 while ((len -= 2) >= 0)
2979 sum += *w++; /* verify */
2980 if (byte_swapped) {
2981 REDUCE;
2982 sum <<= 8;
2983 byte_swapped = 0;
2984 if (len == -1) {
2985 s_util.c[1] = *(char *) w;
2986 sum += s_util.s;
2987 len = 0;
2988 } else {
2989 len = -1;
2990 }
2991
2992 } else if (len == -1) {
2993 s_util.c[0] = *(char *) w;
2994 }
2995
2996 if (len == -1) {
2997 s_util.c[1] = 0;
2998 sum += s_util.s;
2999 }
3000 }
3001 REDUCE;
3002 return (ushort) sum;
3003 }
3004
3005 static int slic_rspqueue_init(struct adapter *adapter)
3006 {
3007 int i;
3008 struct slic_rspqueue *rspq = &adapter->rspqueue;
3009 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3010 u32 paddrh = 0;
3011
3012 ASSERT(adapter->state == ADAPT_DOWN);
3013 memset(rspq, 0, sizeof(struct slic_rspqueue));
3014
3015 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3016
3017 for (i = 0; i < rspq->num_pages; i++) {
3018 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
3019 PAGE_SIZE,
3020 &rspq->paddr[i]);
3021 if (!rspq->vaddr[i]) {
3022 dev_err(&adapter->pcidev->dev,
3023 "pci_alloc_consistent failed\n");
3024 slic_rspqueue_free(adapter);
3025 return STATUS_FAILURE;
3026 }
3027 #ifndef CONFIG_X86_64
3028 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3029 (u32) rspq->vaddr[i]);
3030 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3031 (u32) rspq->paddr[i]);
3032 #endif
3033 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3034
3035 if (paddrh == 0) {
3036 slic_reg32_write(&slic_regs->slic_rbar,
3037 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3038 DONT_FLUSH);
3039 } else {
3040 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
3041 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3042 &slic_regs->slic_addr_upper,
3043 paddrh, DONT_FLUSH);
3044 }
3045 }
3046 rspq->offset = 0;
3047 rspq->pageindex = 0;
3048 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3049 return STATUS_SUCCESS;
3050 }
3051
3052 static void slic_rspqueue_free(struct adapter *adapter)
3053 {
3054 int i;
3055 struct slic_rspqueue *rspq = &adapter->rspqueue;
3056
3057 for (i = 0; i < rspq->num_pages; i++) {
3058 if (rspq->vaddr[i]) {
3059 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3060 rspq->vaddr[i], rspq->paddr[i]);
3061 }
3062 rspq->vaddr[i] = NULL;
3063 rspq->paddr[i] = 0;
3064 }
3065 rspq->offset = 0;
3066 rspq->pageindex = 0;
3067 rspq->rspbuf = NULL;
3068 }
3069
3070 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3071 {
3072 struct slic_rspqueue *rspq = &adapter->rspqueue;
3073 struct slic_rspbuf *buf;
3074
3075 if (!(rspq->rspbuf->status))
3076 return NULL;
3077
3078 buf = rspq->rspbuf;
3079 #ifndef CONFIG_X86_64
3080 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3081 #endif
3082 ASSERT(buf->hosthandle);
3083 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3084 rspq->rspbuf++;
3085 #ifndef CONFIG_X86_64
3086 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3087 (u32) rspq->rspbuf);
3088 #endif
3089 } else {
3090 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3091 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
3092 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3093 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3094 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3095 rspq->offset = 0;
3096 rspq->rspbuf = (struct slic_rspbuf *)
3097 rspq->vaddr[rspq->pageindex];
3098 #ifndef CONFIG_X86_64
3099 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3100 (u32) rspq->rspbuf);
3101 #endif
3102 }
3103 #ifndef CONFIG_X86_64
3104 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3105 #endif
3106 return buf;
3107 }
3108
3109 static void slic_cmdqmem_init(struct adapter *adapter)
3110 {
3111 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3112
3113 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3114 }
3115
3116 static void slic_cmdqmem_free(struct adapter *adapter)
3117 {
3118 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3119 int i;
3120
3121 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3122 if (cmdqmem->pages[i]) {
3123 pci_free_consistent(adapter->pcidev,
3124 PAGE_SIZE,
3125 (void *) cmdqmem->pages[i],
3126 cmdqmem->dma_pages[i]);
3127 }
3128 }
3129 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3130 }
3131
3132 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3133 {
3134 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3135 u32 *pageaddr;
3136
3137 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3138 return NULL;
3139 pageaddr = pci_alloc_consistent(adapter->pcidev,
3140 PAGE_SIZE,
3141 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3142 if (!pageaddr)
3143 return NULL;
3144 #ifndef CONFIG_X86_64
3145 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3146 #endif
3147 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3148 cmdqmem->pagecnt++;
3149 return pageaddr;
3150 }
3151
3152 static int slic_cmdq_init(struct adapter *adapter)
3153 {
3154 int i;
3155 u32 *pageaddr;
3156
3157 ASSERT(adapter->state == ADAPT_DOWN);
3158 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3159 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3160 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3161 spin_lock_init(&adapter->cmdq_all.lock.lock);
3162 spin_lock_init(&adapter->cmdq_free.lock.lock);
3163 spin_lock_init(&adapter->cmdq_done.lock.lock);
3164 slic_cmdqmem_init(adapter);
3165 adapter->slic_handle_ix = 1;
3166 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3167 pageaddr = slic_cmdqmem_addpage(adapter);
3168 #ifndef CONFIG_X86_64
3169 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3170 #endif
3171 if (!pageaddr) {
3172 slic_cmdq_free(adapter);
3173 return STATUS_FAILURE;
3174 }
3175 slic_cmdq_addcmdpage(adapter, pageaddr);
3176 }
3177 adapter->slic_handle_ix = 1;
3178
3179 return STATUS_SUCCESS;
3180 }
3181
3182 static void slic_cmdq_free(struct adapter *adapter)
3183 {
3184 struct slic_hostcmd *cmd;
3185
3186 cmd = adapter->cmdq_all.head;
3187 while (cmd) {
3188 if (cmd->busy) {
3189 struct sk_buff *tempskb;
3190
3191 tempskb = cmd->skb;
3192 if (tempskb) {
3193 cmd->skb = NULL;
3194 dev_kfree_skb_irq(tempskb);
3195 }
3196 }
3197 cmd = cmd->next_all;
3198 }
3199 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3200 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3201 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3202 slic_cmdqmem_free(adapter);
3203 }
3204
3205 static void slic_cmdq_reset(struct adapter *adapter)
3206 {
3207 struct slic_hostcmd *hcmd;
3208 struct sk_buff *skb;
3209 u32 outstanding;
3210
3211 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
3212 adapter->cmdq_free.lock.flags);
3213 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
3214 adapter->cmdq_done.lock.flags);
3215 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
3216 outstanding -= adapter->cmdq_free.count;
3217 hcmd = adapter->cmdq_all.head;
3218 while (hcmd) {
3219 if (hcmd->busy) {
3220 skb = hcmd->skb;
3221 ASSERT(skb);
3222 hcmd->busy = 0;
3223 hcmd->skb = NULL;
3224 dev_kfree_skb_irq(skb);
3225 }
3226 hcmd = hcmd->next_all;
3227 }
3228 adapter->cmdq_free.count = 0;
3229 adapter->cmdq_free.head = NULL;
3230 adapter->cmdq_free.tail = NULL;
3231 adapter->cmdq_done.count = 0;
3232 adapter->cmdq_done.head = NULL;
3233 adapter->cmdq_done.tail = NULL;
3234 adapter->cmdq_free.head = adapter->cmdq_all.head;
3235 hcmd = adapter->cmdq_all.head;
3236 while (hcmd) {
3237 adapter->cmdq_free.count++;
3238 hcmd->next = hcmd->next_all;
3239 hcmd = hcmd->next_all;
3240 }
3241 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
3242 dev_err(&adapter->netdev->dev,
3243 "free_count %d != all count %d\n",
3244 adapter->cmdq_free.count, adapter->cmdq_all.count);
3245 }
3246 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
3247 adapter->cmdq_done.lock.flags);
3248 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
3249 adapter->cmdq_free.lock.flags);
3250 }
3251
3252 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
3253 {
3254 struct slic_hostcmd *cmd;
3255 struct slic_hostcmd *prev;
3256 struct slic_hostcmd *tail;
3257 struct slic_cmdqueue *cmdq;
3258 int cmdcnt;
3259 void *cmdaddr;
3260 ulong phys_addr;
3261 u32 phys_addrl;
3262 u32 phys_addrh;
3263 struct slic_handle *pslic_handle;
3264
3265 cmdaddr = page;
3266 cmd = (struct slic_hostcmd *)cmdaddr;
3267 cmdcnt = 0;
3268
3269 phys_addr = virt_to_bus((void *)page);
3270 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
3271 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
3272
3273 prev = NULL;
3274 tail = cmd;
3275 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
3276 (adapter->slic_handle_ix < 256)) {
3277 /* Allocate and initialize a SLIC_HANDLE for this command */
3278 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
3279 if (pslic_handle == NULL)
3280 ASSERT(0);
3281 ASSERT(pslic_handle ==
3282 &adapter->slic_handles[pslic_handle->token.
3283 handle_index]);
3284 pslic_handle->type = SLIC_HANDLE_CMD;
3285 pslic_handle->address = (void *) cmd;
3286 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
3287 pslic_handle->other_handle = NULL;
3288 pslic_handle->next = NULL;
3289
3290 cmd->pslic_handle = pslic_handle;
3291 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
3292 cmd->busy = false;
3293 cmd->paddrl = phys_addrl;
3294 cmd->paddrh = phys_addrh;
3295 cmd->next_all = prev;
3296 cmd->next = prev;
3297 prev = cmd;
3298 phys_addrl += SLIC_HOSTCMD_SIZE;
3299 cmdaddr += SLIC_HOSTCMD_SIZE;
3300
3301 cmd = (struct slic_hostcmd *)cmdaddr;
3302 cmdcnt++;
3303 }
3304
3305 cmdq = &adapter->cmdq_all;
3306 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3307 tail->next_all = cmdq->head;
3308 cmdq->head = prev;
3309 cmdq = &adapter->cmdq_free;
3310 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
3311 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3312 tail->next = cmdq->head;
3313 cmdq->head = prev;
3314 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
3315 }
3316
3317 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
3318 {
3319 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
3320 struct slic_hostcmd *cmd = NULL;
3321
3322 lock_and_retry:
3323 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
3324 retry:
3325 cmd = cmdq->head;
3326 if (cmd) {
3327 cmdq->head = cmd->next;
3328 cmdq->count--;
3329 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
3330 } else {
3331 slic_cmdq_getdone(adapter);
3332 cmd = cmdq->head;
3333 if (cmd) {
3334 goto retry;
3335 } else {
3336 u32 *pageaddr;
3337
3338 spin_unlock_irqrestore(&cmdq->lock.lock,
3339 cmdq->lock.flags);
3340 pageaddr = slic_cmdqmem_addpage(adapter);
3341 if (pageaddr) {
3342 slic_cmdq_addcmdpage(adapter, pageaddr);
3343 goto lock_and_retry;
3344 }
3345 }
3346 }
3347 return cmd;
3348 }
3349
3350 static void slic_cmdq_getdone(struct adapter *adapter)
3351 {
3352 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
3353 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
3354
3355 ASSERT(free_cmdq->head == NULL);
3356 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
3357
3358 free_cmdq->head = done_cmdq->head;
3359 free_cmdq->count = done_cmdq->count;
3360 done_cmdq->head = NULL;
3361 done_cmdq->tail = NULL;
3362 done_cmdq->count = 0;
3363 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
3364 }
3365
3366 static void slic_cmdq_putdone_irq(struct adapter *adapter,
3367 struct slic_hostcmd *cmd)
3368 {
3369 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
3370
3371 spin_lock(&cmdq->lock.lock);
3372 cmd->busy = 0;
3373 cmd->next = cmdq->head;
3374 cmdq->head = cmd;
3375 cmdq->count++;
3376 if ((adapter->xmitq_full) && (cmdq->count > 10))
3377 netif_wake_queue(adapter->netdev);
3378 spin_unlock(&cmdq->lock.lock);
3379 }
3380
3381 static int slic_rcvqueue_init(struct adapter *adapter)
3382 {
3383 int i, count;
3384 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3385
3386 ASSERT(adapter->state == ADAPT_DOWN);
3387 rcvq->tail = NULL;
3388 rcvq->head = NULL;
3389 rcvq->size = SLIC_RCVQ_ENTRIES;
3390 rcvq->errors = 0;
3391 rcvq->count = 0;
3392 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
3393 count = 0;
3394 while (i) {
3395 count += slic_rcvqueue_fill(adapter);
3396 i--;
3397 }
3398 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
3399 slic_rcvqueue_free(adapter);
3400 return STATUS_FAILURE;
3401 }
3402 return STATUS_SUCCESS;
3403 }
3404
3405 static void slic_rcvqueue_free(struct adapter *adapter)
3406 {
3407 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3408 struct sk_buff *skb;
3409
3410 while (rcvq->head) {
3411 skb = rcvq->head;
3412 rcvq->head = rcvq->head->next;
3413 dev_kfree_skb(skb);
3414 }
3415 rcvq->tail = NULL;
3416 rcvq->head = NULL;
3417 rcvq->count = 0;
3418 }
3419
3420 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
3421 {
3422 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3423 struct sk_buff *skb;
3424 struct slic_rcvbuf *rcvbuf;
3425 int count;
3426
3427 if (rcvq->count) {
3428 skb = rcvq->head;
3429 rcvbuf = (struct slic_rcvbuf *)skb->head;
3430 ASSERT(rcvbuf);
3431
3432 if (rcvbuf->status & IRHDDR_SVALID) {
3433 rcvq->head = rcvq->head->next;
3434 skb->next = NULL;
3435 rcvq->count--;
3436 } else {
3437 skb = NULL;
3438 }
3439 } else {
3440 dev_err(&adapter->netdev->dev,
3441 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
3442 skb = NULL;
3443 }
3444 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
3445 count = slic_rcvqueue_fill(adapter);
3446 if (!count)
3447 break;
3448 }
3449 if (skb)
3450 rcvq->errors = 0;
3451 return skb;
3452 }
3453
3454 static int slic_rcvqueue_fill(struct adapter *adapter)
3455 {
3456 void *paddr;
3457 u32 paddrl;
3458 u32 paddrh;
3459 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3460 int i = 0;
3461 struct device *dev = &adapter->netdev->dev;
3462
3463 while (i < SLIC_RCVQ_FILLENTRIES) {
3464 struct slic_rcvbuf *rcvbuf;
3465 struct sk_buff *skb;
3466 #ifdef KLUDGE_FOR_4GB_BOUNDARY
3467 retry_rcvqfill:
3468 #endif
3469 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
3470 if (skb) {
3471 paddr = (void *)pci_map_single(adapter->pcidev,
3472 skb->data,
3473 SLIC_RCVQ_RCVBUFSIZE,
3474 PCI_DMA_FROMDEVICE);
3475 paddrl = SLIC_GET_ADDR_LOW(paddr);
3476 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3477
3478 skb->len = SLIC_RCVBUF_HEADSIZE;
3479 rcvbuf = (struct slic_rcvbuf *)skb->head;
3480 rcvbuf->status = 0;
3481 skb->next = NULL;
3482 #ifdef KLUDGE_FOR_4GB_BOUNDARY
3483 if (paddrl == 0) {
3484 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3485 __func__);
3486 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3487 dev_err(dev, " skbdata[%p]\n", skb->data);
3488 dev_err(dev, " skblen[%x]\n", skb->len);
3489 dev_err(dev, " paddr[%p]\n", paddr);
3490 dev_err(dev, " paddrl[%x]\n", paddrl);
3491 dev_err(dev, " paddrh[%x]\n", paddrh);
3492 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3493 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3494 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3495 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
3496 goto retry_rcvqfill;
3497 }
3498 #else
3499 if (paddrl == 0) {
3500 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3501 __func__);
3502 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3503 dev_err(dev, " skbdata[%p]\n", skb->data);
3504 dev_err(dev, " skblen[%x]\n", skb->len);
3505 dev_err(dev, " paddr[%p]\n", paddr);
3506 dev_err(dev, " paddrl[%x]\n", paddrl);
3507 dev_err(dev, " paddrh[%x]\n", paddrh);
3508 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3509 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3510 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3511 dev_err(dev, "GIVE TO CARD ANYWAY\n");
3512 }
3513 #endif
3514 if (paddrh == 0) {
3515 slic_reg32_write(&adapter->slic_regs->slic_hbar,
3516 (u32)paddrl, DONT_FLUSH);
3517 } else {
3518 slic_reg64_write(adapter,
3519 &adapter->slic_regs->slic_hbar64,
3520 paddrl,
3521 &adapter->slic_regs->slic_addr_upper,
3522 paddrh, DONT_FLUSH);
3523 }
3524 if (rcvq->head)
3525 rcvq->tail->next = skb;
3526 else
3527 rcvq->head = skb;
3528 rcvq->tail = skb;
3529 rcvq->count++;
3530 i++;
3531 } else {
3532 dev_err(&adapter->netdev->dev,
3533 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
3534 i);
3535 break;
3536 }
3537 }
3538 return i;
3539 }
3540
3541 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
3542 {
3543 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3544 void *paddr;
3545 u32 paddrl;
3546 u32 paddrh;
3547 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
3548 struct device *dev;
3549
3550 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
3551
3552 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
3553 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
3554 rcvbuf->status = 0;
3555 skb->next = NULL;
3556
3557 paddrl = SLIC_GET_ADDR_LOW(paddr);
3558 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3559
3560 if (paddrl == 0) {
3561 dev = &adapter->netdev->dev;
3562 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3563 __func__);
3564 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3565 dev_err(dev, " skbdata[%p]\n", skb->data);
3566 dev_err(dev, " skblen[%x]\n", skb->len);
3567 dev_err(dev, " paddr[%p]\n", paddr);
3568 dev_err(dev, " paddrl[%x]\n", paddrl);
3569 dev_err(dev, " paddrh[%x]\n", paddrh);
3570 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3571 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3572 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3573 }
3574 if (paddrh == 0) {
3575 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
3576 DONT_FLUSH);
3577 } else {
3578 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
3579 paddrl, &adapter->slic_regs->slic_addr_upper,
3580 paddrh, DONT_FLUSH);
3581 }
3582 if (rcvq->head)
3583 rcvq->tail->next = skb;
3584 else
3585 rcvq->head = skb;
3586 rcvq->tail = skb;
3587 rcvq->count++;
3588 return rcvq->count;
3589 }
3590
3591 static int slic_debug_card_show(struct seq_file *seq, void *v)
3592 {
3593 #ifdef MOOKTODO
3594 int i;
3595 struct sliccard *card = seq->private;
3596 struct slic_config *config = &card->config;
3597 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
3598 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
3599 #endif
3600
3601 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
3602 seq_printf(seq, "Microcode versions: \n");
3603 seq_printf(seq, " Gigabit (gb) : %s %s\n",
3604 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
3605 seq_printf(seq, " Gigabit Receiver : %s %s\n",
3606 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
3607 seq_printf(seq, "Vendor : %s\n", slic_vendor);
3608 seq_printf(seq, "Product Name : %s\n", slic_product_name);
3609 #ifdef MOOKTODO
3610 seq_printf(seq, "VendorId : %4.4X\n",
3611 config->VendorId);
3612 seq_printf(seq, "DeviceId : %4.4X\n",
3613 config->DeviceId);
3614 seq_printf(seq, "RevisionId : %2.2x\n",
3615 config->RevisionId);
3616 seq_printf(seq, "Bus # : %d\n", card->busnumber);
3617 seq_printf(seq, "Device # : %d\n", card->slotnumber);
3618 seq_printf(seq, "Interfaces : %d\n", card->card_size);
3619 seq_printf(seq, " Initialized : %d\n",
3620 card->adapters_activated);
3621 seq_printf(seq, " Allocated : %d\n",
3622 card->adapters_allocated);
3623 ASSERT(card->card_size <= SLIC_NBR_MACS);
3624 for (i = 0; i < card->card_size; i++) {
3625 seq_printf(seq,
3626 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
3627 i, config->macinfo[i].macaddrA[0],
3628 config->macinfo[i].macaddrA[1],
3629 config->macinfo[i].macaddrA[2],
3630 config->macinfo[i].macaddrA[3],
3631 config->macinfo[i].macaddrA[4],
3632 config->macinfo[i].macaddrA[5]);
3633 }
3634 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
3635 seq_printf(seq, " -------------------------------\n");
3636 for (i = 0; i < card->adapters_allocated; i++) {
3637 struct adapter *adapter;
3638
3639 adapter = card->adapter[i];
3640 if (adapter) {
3641 seq_printf(seq,
3642 " %d %d %s %s %s 0x%X\n",
3643 adapter->physport, adapter->state,
3644 SLIC_LINKSTATE(adapter->linkstate),
3645 SLIC_DUPLEX(adapter->linkduplex),
3646 SLIC_SPEED(adapter->linkspeed),
3647 (uint) adapter->irq);
3648 }
3649 }
3650 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
3651 seq_printf(seq, "RcvQ max entries : %4.4X\n",
3652 SLIC_RCVQ_ENTRIES);
3653 seq_printf(seq, "Ping Status : %8.8X\n",
3654 card->pingstatus);
3655 seq_printf(seq, "Minimum grant : %2.2x\n",
3656 config->MinGrant);
3657 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
3658 seq_printf(seq, "PciStatus : %4.4x\n",
3659 config->Pcistatus);
3660 seq_printf(seq, "Debug Device Id : %4.4x\n",
3661 config->DbgDevId);
3662 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
3663 config->DramRomFn);
3664 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
3665 config->NetIntPin1);
3666 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
3667 config->NetIntPin1);
3668 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
3669 config->NetIntPin1);
3670 seq_printf(seq, "PM capabilities : %4.4X\n",
3671 config->PMECapab);
3672 seq_printf(seq, "Network Clock Controls : %4.4X\n",
3673 config->NwClkCtrls);
3674
3675 switch (config->FruFormat) {
3676 case ATK_FRU_FORMAT:
3677 {
3678 seq_printf(seq,
3679 "Vendor : Alacritech, Inc.\n");
3680 seq_printf(seq,
3681 "Assembly # : %c%c%c%c%c%c\n",
3682 fru[0], fru[1], fru[2], fru[3], fru[4],
3683 fru[5]);
3684 seq_printf(seq,
3685 "Revision # : %c%c\n",
3686 fru[6], fru[7]);
3687
3688 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
3689 seq_printf(seq,
3690 "Serial # : "
3691 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
3692 fru[8], fru[9], fru[10],
3693 fru[11], fru[12], fru[13],
3694 fru[16], fru[17], fru[18],
3695 fru[19], fru[20], fru[21]);
3696 } else {
3697 seq_printf(seq,
3698 "Serial # : "
3699 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
3700 fru[8], fru[9], fru[10],
3701 fru[11], fru[12], fru[13],
3702 fru[14], fru[15], fru[16],
3703 fru[17], fru[18], fru[19],
3704 fru[20], fru[21]);
3705 }
3706 break;
3707 }
3708
3709 default:
3710 {
3711 seq_printf(seq,
3712 "Vendor : Alacritech, Inc.\n");
3713 seq_printf(seq,
3714 "Serial # : Empty FRU\n");
3715 break;
3716 }
3717 }
3718
3719 switch (config->OEMFruFormat) {
3720 case VENDOR1_FRU_FORMAT:
3721 {
3722 seq_printf(seq, "FRU Information:\n");
3723 seq_printf(seq, " Commodity # : %c\n",
3724 oemfru[0]);
3725 seq_printf(seq,
3726 " Assembly # : %c%c%c%c\n",
3727 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
3728 seq_printf(seq,
3729 " Revision # : %c%c\n",
3730 oemfru[5], oemfru[6]);
3731 seq_printf(seq,
3732 " Supplier # : %c%c\n",
3733 oemfru[7], oemfru[8]);
3734 seq_printf(seq,
3735 " Date : %c%c\n",
3736 oemfru[9], oemfru[10]);
3737 seq_sprintf(seq,
3738 " Sequence # : %c%c%c\n",
3739 oemfru[11], oemfru[12], oemfru[13]);
3740 break;
3741 }
3742
3743 case VENDOR2_FRU_FORMAT:
3744 {
3745 seq_printf(seq, "FRU Information:\n");
3746 seq_printf(seq,
3747 " Part # : "
3748 "%c%c%c%c%c%c%c%c\n",
3749 oemfru[0], oemfru[1], oemfru[2],
3750 oemfru[3], oemfru[4], oemfru[5],
3751 oemfru[6], oemfru[7]);
3752 seq_printf(seq,
3753 " Supplier # : %c%c%c%c%c\n",
3754 oemfru[8], oemfru[9], oemfru[10],
3755 oemfru[11], oemfru[12]);
3756 seq_printf(seq,
3757 " Date : %c%c%c\n",
3758 oemfru[13], oemfru[14], oemfru[15]);
3759 seq_sprintf(seq,
3760 " Sequence # : %c%c%c%c\n",
3761 oemfru[16], oemfru[17], oemfru[18],
3762 oemfru[19]);
3763 break;
3764 }
3765
3766 case VENDOR3_FRU_FORMAT:
3767 {
3768 seq_printf(seq, "FRU Information:\n");
3769 }
3770
3771 case VENDOR4_FRU_FORMAT:
3772 {
3773 seq_printf(seq, "FRU Information:\n");
3774 seq_printf(seq,
3775 " FRU Number : "
3776 "%c%c%c%c%c%c%c%c\n",
3777 oemfru[0], oemfru[1], oemfru[2],
3778 oemfru[3], oemfru[4], oemfru[5],
3779 oemfru[6], oemfru[7]);
3780 seq_sprintf(seq,
3781 " Part Number : "
3782 "%c%c%c%c%c%c%c%c\n",
3783 oemfru[8], oemfru[9], oemfru[10],
3784 oemfru[11], oemfru[12], oemfru[13],
3785 oemfru[14], oemfru[15]);
3786 seq_printf(seq,
3787 " EC Level : "
3788 "%c%c%c%c%c%c%c%c\n",
3789 oemfru[16], oemfru[17], oemfru[18],
3790 oemfru[19], oemfru[20], oemfru[21],
3791 oemfru[22], oemfru[23]);
3792 break;
3793 }
3794
3795 default:
3796 break;
3797 }
3798 #endif
3799
3800 return 0;
3801 }
3802
3803 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
3804 {
3805 struct adapter *adapter = seq->private;
3806
3807 if ((adapter->netdev) && (adapter->netdev->name)) {
3808 seq_printf(seq, "info: interface : %s\n",
3809 adapter->netdev->name);
3810 }
3811 seq_printf(seq, "info: status : %s\n",
3812 SLIC_LINKSTATE(adapter->linkstate));
3813 seq_printf(seq, "info: port : %d\n",
3814 adapter->physport);
3815 seq_printf(seq, "info: speed : %s\n",
3816 SLIC_SPEED(adapter->linkspeed));
3817 seq_printf(seq, "info: duplex : %s\n",
3818 SLIC_DUPLEX(adapter->linkduplex));
3819 seq_printf(seq, "info: irq : 0x%X\n",
3820 (uint) adapter->irq);
3821 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
3822 adapter->card->loadlevel_current);
3823 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
3824 SLIC_RCVQ_ENTRIES);
3825 seq_printf(seq, "info: RcvQ current : %4.4X\n",
3826 adapter->rcvqueue.count);
3827 seq_printf(seq, "rx stats: packets : %8.8lX\n",
3828 adapter->stats.rx_packets);
3829 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
3830 adapter->stats.rx_bytes);
3831 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
3832 adapter->rcv_broadcasts);
3833 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
3834 adapter->rcv_multicasts);
3835 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
3836 adapter->rcv_unicasts);
3837 seq_printf(seq, "rx stats: errors : %8.8X\n",
3838 (u32) adapter->slic_stats.iface.rcv_errors);
3839 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
3840 (u32) adapter->slic_stats.iface.rcv_discards);
3841 seq_printf(seq, "rx stats: drops : %8.8X\n",
3842 (u32) adapter->rcv_drops);
3843 seq_printf(seq, "tx stats: packets : %8.8lX\n",
3844 adapter->stats.tx_packets);
3845 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
3846 adapter->stats.tx_bytes);
3847 seq_printf(seq, "tx stats: errors : %8.8X\n",
3848 (u32) adapter->slic_stats.iface.xmt_errors);
3849 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
3850 adapter->stats.multicast);
3851 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
3852 (u32) adapter->slic_stats.iface.xmit_collisions);
3853 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
3854 adapter->max_isr_rcvs);
3855 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
3856 adapter->rcv_interrupt_yields);
3857 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
3858 adapter->max_isr_xmits);
3859 seq_printf(seq, "perf: error interrupts : %8.8X\n",
3860 adapter->error_interrupts);
3861 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
3862 adapter->error_rmiss_interrupts);
3863 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
3864 adapter->rcv_interrupts);
3865 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
3866 adapter->xmit_interrupts);
3867 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
3868 adapter->linkevent_interrupts);
3869 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
3870 adapter->upr_interrupts);
3871 seq_printf(seq, "perf: interrupt count : %8.8X\n",
3872 adapter->num_isrs);
3873 seq_printf(seq, "perf: false interrupts : %8.8X\n",
3874 adapter->false_interrupts);
3875 seq_printf(seq, "perf: All register writes : %8.8X\n",
3876 adapter->all_reg_writes);
3877 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
3878 adapter->icr_reg_writes);
3879 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
3880 adapter->isr_reg_writes);
3881 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
3882 adapter->if_events.oflow802);
3883 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
3884 adapter->if_events.Tprtoflow);
3885 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
3886 adapter->if_events.uflow802);
3887 seq_printf(seq, "ifevents: receive early : %8.8X\n",
3888 adapter->if_events.rcvearly);
3889 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
3890 adapter->if_events.Bufov);
3891 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
3892 adapter->if_events.Carre);
3893 seq_printf(seq, "ifevents: Long : %8.8X\n",
3894 adapter->if_events.Longe);
3895 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
3896 adapter->if_events.Invp);
3897 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
3898 adapter->if_events.Crc);
3899 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
3900 adapter->if_events.Drbl);
3901 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
3902 adapter->if_events.Code);
3903 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
3904 adapter->if_events.TpCsum);
3905 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
3906 adapter->if_events.TpHlen);
3907 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
3908 adapter->if_events.IpCsum);
3909 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
3910 adapter->if_events.IpLen);
3911 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
3912 adapter->if_events.IpHlen);
3913
3914 return 0;
3915 }
3916 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
3917 {
3918 return single_open(file, slic_debug_adapter_show, inode->i_private);
3919 }
3920
3921 static int slic_debug_card_open(struct inode *inode, struct file *file)
3922 {
3923 return single_open(file, slic_debug_card_show, inode->i_private);
3924 }
3925
3926 static const struct file_operations slic_debug_adapter_fops = {
3927 .owner = THIS_MODULE,
3928 .open = slic_debug_adapter_open,
3929 .read = seq_read,
3930 .llseek = seq_lseek,
3931 .release = single_release,
3932 };
3933
3934 static const struct file_operations slic_debug_card_fops = {
3935 .owner = THIS_MODULE,
3936 .open = slic_debug_card_open,
3937 .read = seq_read,
3938 .llseek = seq_lseek,
3939 .release = single_release,
3940 };
3941
3942 static void slic_debug_adapter_create(struct adapter *adapter)
3943 {
3944 struct dentry *d;
3945 char name[7];
3946 struct sliccard *card = adapter->card;
3947
3948 if (!card->debugfs_dir)
3949 return;
3950
3951 sprintf(name, "port%d", adapter->port);
3952 d = debugfs_create_file(name, S_IRUGO,
3953 card->debugfs_dir, adapter,
3954 &slic_debug_adapter_fops);
3955 if (!d || IS_ERR(d))
3956 pr_info(PFX "%s: debugfs create failed\n", name);
3957 else
3958 adapter->debugfs_entry = d;
3959 }
3960
3961 static void slic_debug_adapter_destroy(struct adapter *adapter)
3962 {
3963 if (adapter->debugfs_entry) {
3964 debugfs_remove(adapter->debugfs_entry);
3965 adapter->debugfs_entry = NULL;
3966 }
3967 }
3968
3969 static void slic_debug_card_create(struct sliccard *card)
3970 {
3971 struct dentry *d;
3972 char name[IFNAMSIZ];
3973
3974 snprintf(name, sizeof(name), "slic%d", card->cardnum);
3975 d = debugfs_create_dir(name, slic_debugfs);
3976 if (!d || IS_ERR(d))
3977 pr_info(PFX "%s: debugfs create dir failed\n",
3978 name);
3979 else {
3980 card->debugfs_dir = d;
3981 d = debugfs_create_file("cardinfo", S_IRUGO,
3982 slic_debugfs, card,
3983 &slic_debug_card_fops);
3984 if (!d || IS_ERR(d))
3985 pr_info(PFX "%s: debugfs create failed\n",
3986 name);
3987 else
3988 card->debugfs_cardinfo = d;
3989 }
3990 }
3991
3992 static void slic_debug_card_destroy(struct sliccard *card)
3993 {
3994 int i;
3995
3996 for (i = 0; i < card->card_size; i++) {
3997 struct adapter *adapter;
3998
3999 adapter = card->adapter[i];
4000 if (adapter)
4001 slic_debug_adapter_destroy(adapter);
4002 }
4003 if (card->debugfs_cardinfo) {
4004 debugfs_remove(card->debugfs_cardinfo);
4005 card->debugfs_cardinfo = NULL;
4006 }
4007 if (card->debugfs_dir) {
4008 debugfs_remove(card->debugfs_dir);
4009 card->debugfs_dir = NULL;
4010 }
4011 }
4012
4013 static void slic_debug_init(void)
4014 {
4015 struct dentry *ent;
4016
4017 ent = debugfs_create_dir("slic", NULL);
4018 if (!ent || IS_ERR(ent)) {
4019 pr_info(PFX "debugfs create directory failed\n");
4020 return;
4021 }
4022
4023 slic_debugfs = ent;
4024 }
4025
4026 static void slic_debug_cleanup(void)
4027 {
4028 if (slic_debugfs) {
4029 debugfs_remove(slic_debugfs);
4030 slic_debugfs = NULL;
4031 }
4032 }
4033
4034 /******************************************************************************/
4035 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
4036 /******************************************************************************/
4037
4038 static struct pci_driver slic_driver = {
4039 .name = DRV_NAME,
4040 .id_table = slic_pci_tbl,
4041 .probe = slic_entry_probe,
4042 .remove = __devexit_p(slic_entry_remove),
4043 };
4044
4045 static int __init slic_module_init(void)
4046 {
4047 slic_init_driver();
4048
4049 if (debug >= 0 && slic_debug != debug)
4050 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
4051 debug);
4052 if (debug >= 0)
4053 slic_debug = debug;
4054
4055 return pci_register_driver(&slic_driver);
4056 }
4057
4058 static void __exit slic_module_cleanup(void)
4059 {
4060 pci_unregister_driver(&slic_driver);
4061 slic_debug_cleanup();
4062 }
4063
4064 module_init(slic_module_init);
4065 module_exit(slic_module_cleanup);
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