drivers/staging/sm750fb/ddk750_chip.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef DDK750_CHIP_H__
   3 #define DDK750_CHIP_H__
   4 #define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
   5 #ifndef SM750LE_REVISION_ID
   6 #define SM750LE_REVISION_ID ((unsigned char)0xfe)
   7 #endif
   8
   9 #include <linux/io.h>
  10 #include <linux/ioport.h>
  11 #include <linux/uaccess.h>
  12
  13 extern void __iomem *mmio750;
  14
  15 /* software control endianness */
  16 static inline u32 peek32(u32 addr)
  17 {
  18         return readl(addr + mmio750);
  19 }
  20
  21 static inline void poke32(u32 data, u32 addr)
  22 {
  23         writel(data, addr + mmio750);
  24 }
  25
  26 /* This is all the chips recognized by this library */
  27 typedef enum _logical_chip_type_t {
  28         SM_UNKNOWN,
  29         SM718,
  30         SM750,
  31         SM750LE,
  32 }
  33 logical_chip_type_t;
  34
  35 typedef enum _clock_type_t {
  36         MXCLK_PLL,
  37         PRIMARY_PLL,
  38         SECONDARY_PLL,
  39         VGA0_PLL,
  40         VGA1_PLL,
  41 }
  42 clock_type_t;
  43
  44 struct pll_value {
  45         clock_type_t clockType;
  46         unsigned long inputFreq; /* Input clock frequency to the PLL */
  47
  48         /* Use this when clockType = PANEL_PLL */
  49         unsigned long M;
  50         unsigned long N;
  51         unsigned long OD;
  52         unsigned long POD;
  53 };
  54
  55 /* input struct to initChipParam() function */
  56 struct initchip_param {
  57         /* Use power mode 0 or 1 */
  58         unsigned short powerMode;
  59
  60         /*
  61          * Speed of main chip clock in MHz unit
  62          * 0 = keep the current clock setting
  63          * Others = the new main chip clock
  64          */
  65         unsigned short chipClock;
  66
  67         /*
  68          * Speed of memory clock in MHz unit
  69          * 0 = keep the current clock setting
  70          * Others = the new memory clock
  71          */
  72         unsigned short memClock;
  73
  74         /*
  75          * Speed of master clock in MHz unit
  76          * 0 = keep the current clock setting
  77          * Others = the new master clock
  78          */
  79         unsigned short masterClock;
  80
  81         /*
  82          * 0 = leave all engine state untouched.
  83          * 1 = make sure they are off: 2D, Overlay,
  84          * video alpha, alpha, hardware cursors
  85          */
  86         unsigned short setAllEngOff;
  87
  88         /*
  89          * 0 = Do not reset the memory controller
  90          * 1 = Reset the memory controller
  91          */
  92         unsigned char resetMemory;
  93
  94         /* More initialization parameter can be added if needed */
  95 };
  96
  97 logical_chip_type_t sm750_get_chip_type(void);
  98 void sm750_set_chip_type(unsigned short devId, u8 revId);
  99 unsigned int sm750_calc_pll_value(unsigned int request, struct  pll_value *pll);
 100 unsigned int sm750_format_pll_reg(struct pll_value *pPLL);
 101 unsigned int ddk750_get_vm_size(void);
 102 int ddk750_init_hw(struct initchip_param *pinit_param);
 103
 104 #endif