drivers/staging/sm750fb/ddk750_chip.h

   1 #ifndef DDK750_CHIP_H__
   2 #define DDK750_CHIP_H__
   3 #define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
   4 #ifndef SM750LE_REVISION_ID
   5 #define SM750LE_REVISION_ID ((unsigned char)0xfe)
   6 #endif
   7
   8 #include <linux/io.h>
   9 #include <linux/ioport.h>
  10 #include <linux/uaccess.h>
  11
  12 /* software control endianness */
  13 #define PEEK32(addr) readl(addr + mmio750)
  14 #define POKE32(addr, data) writel(data, addr + mmio750)
  15
  16 extern void __iomem *mmio750;
  17
  18 /* This is all the chips recognized by this library */
  19 typedef enum _logical_chip_type_t {
  20         SM_UNKNOWN,
  21         SM718,
  22         SM750,
  23         SM750LE,
  24 }
  25 logical_chip_type_t;
  26
  27 typedef enum _clock_type_t {
  28         MXCLK_PLL,
  29         PRIMARY_PLL,
  30         SECONDARY_PLL,
  31         VGA0_PLL,
  32         VGA1_PLL,
  33 }
  34 clock_type_t;
  35
  36 struct pll_value {
  37         clock_type_t clockType;
  38         unsigned long inputFreq; /* Input clock frequency to the PLL */
  39
  40         /* Use this when clockType = PANEL_PLL */
  41         unsigned long M;
  42         unsigned long N;
  43         unsigned long OD;
  44         unsigned long POD;
  45 };
  46
  47 /* input struct to initChipParam() function */
  48 struct initchip_param {
  49         unsigned short powerMode;    /* Use power mode 0 or 1 */
  50         unsigned short chipClock;    /**
  51                                       * Speed of main chip clock in MHz unit
  52                                       * 0 = keep the current clock setting
  53                                       * Others = the new main chip clock
  54                                       */
  55         unsigned short memClock;     /**
  56                                       * Speed of memory clock in MHz unit
  57                                       * 0 = keep the current clock setting
  58                                       * Others = the new memory clock
  59                                       */
  60         unsigned short masterClock;  /**
  61                                       * Speed of master clock in MHz unit
  62                                       * 0 = keep the current clock setting
  63                                       * Others = the new master clock
  64                                       */
  65         unsigned short setAllEngOff; /**
  66                                       * 0 = leave all engine state untouched.
  67                                       * 1 = make sure they are off: 2D, Overlay,
  68                                       * video alpha, alpha, hardware cursors
  69                                       */
  70         unsigned char resetMemory;   /**
  71                                       * 0 = Do not reset the memory controller
  72                                       * 1 = Reset the memory controller
  73                                       */
  74
  75         /* More initialization parameter can be added if needed */
  76 };
  77
  78 logical_chip_type_t sm750_get_chip_type(void);
  79 void sm750_set_chip_type(unsigned short devId, char revId);
  80 unsigned int calc_pll_value(unsigned int request, struct  pll_value *pll);
  81 unsigned int format_pll_reg(struct pll_value *pPLL);
  82 unsigned int ddk750_get_vm_size(void);
  83 int ddk750_init_hw(struct initchip_param *);
  84
  85 #endif