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Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-eoan-kernel.git] / drivers / staging / vt6655 / device_main.c
1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: device_main.c
20 *
21 * Purpose: driver entry for initial, open, close, tx and rx.
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: Jan 8, 2003
26 *
27 * Functions:
28 *
29 * vt6655_probe - module initial (insmod) driver entry
30 * vt6655_remove - module remove entry
31 * vt6655_init_info - device structure resource allocation function
32 * device_free_info - device structure resource free function
33 * device_get_pci_info - get allocated pci io/mem resource
34 * device_print_info - print out resource
35 * device_rx_srv - rx service function
36 * device_alloc_rx_buf - rx buffer pre-allocated function
37 * device_free_tx_buf - free tx buffer function
38 * device_init_rd0_ring- initial rd dma0 ring
39 * device_init_rd1_ring- initial rd dma1 ring
40 * device_init_td0_ring- initial tx dma0 ring buffer
41 * device_init_td1_ring- initial tx dma1 ring buffer
42 * device_init_registers- initial MAC & BBP & RF internal registers.
43 * device_init_rings- initial tx/rx ring buffer
44 * device_free_rings- free all allocated ring buffer
45 * device_tx_srv- tx interrupt service function
46 *
47 * Revision History:
48 */
49 #undef __NO_VERSION__
50
51 #include <linux/file.h>
52 #include "device.h"
53 #include "card.h"
54 #include "channel.h"
55 #include "baseband.h"
56 #include "mac.h"
57 #include "power.h"
58 #include "rxtx.h"
59 #include "dpc.h"
60 #include "rf.h"
61 #include <linux/delay.h>
62 #include <linux/kthread.h>
63 #include <linux/slab.h>
64
65 /*--------------------- Static Definitions -------------------------*/
66 /*
67 * Define module options
68 */
69 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
70 MODULE_LICENSE("GPL");
71 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
72
73 #define DEVICE_PARAM(N, D)
74
75 #define RX_DESC_MIN0 16
76 #define RX_DESC_MAX0 128
77 #define RX_DESC_DEF0 32
78 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
79
80 #define RX_DESC_MIN1 16
81 #define RX_DESC_MAX1 128
82 #define RX_DESC_DEF1 32
83 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
84
85 #define TX_DESC_MIN0 16
86 #define TX_DESC_MAX0 128
87 #define TX_DESC_DEF0 32
88 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
89
90 #define TX_DESC_MIN1 16
91 #define TX_DESC_MAX1 128
92 #define TX_DESC_DEF1 64
93 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
94
95 #define INT_WORKS_DEF 20
96 #define INT_WORKS_MIN 10
97 #define INT_WORKS_MAX 64
98
99 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
100
101 #define RTS_THRESH_DEF 2347
102
103 #define FRAG_THRESH_DEF 2346
104
105 #define SHORT_RETRY_MIN 0
106 #define SHORT_RETRY_MAX 31
107 #define SHORT_RETRY_DEF 8
108
109 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
110
111 #define LONG_RETRY_MIN 0
112 #define LONG_RETRY_MAX 15
113 #define LONG_RETRY_DEF 4
114
115 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
116
117 /* BasebandType[] baseband type selected
118 0: indicate 802.11a type
119 1: indicate 802.11b type
120 2: indicate 802.11g type
121 */
122 #define BBP_TYPE_MIN 0
123 #define BBP_TYPE_MAX 2
124 #define BBP_TYPE_DEF 2
125
126 DEVICE_PARAM(BasebandType, "baseband type");
127
128 /*
129 * Static vars definitions
130 */
131 static CHIP_INFO chip_info_table[] = {
132 { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
133 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
134 {0, NULL}
135 };
136
137 static const struct pci_device_id vt6655_pci_id_table[] = {
138 { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table},
139 { 0, }
140 };
141
142 /*--------------------- Static Functions --------------------------*/
143
144 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
145 static void vt6655_init_info(struct pci_dev *pcid,
146 struct vnt_private **ppDevice, PCHIP_INFO);
147 static void device_free_info(struct vnt_private *pDevice);
148 static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid);
149 static void device_print_info(struct vnt_private *pDevice);
150
151 static void device_init_rd0_ring(struct vnt_private *pDevice);
152 static void device_init_rd1_ring(struct vnt_private *pDevice);
153 static void device_init_td0_ring(struct vnt_private *pDevice);
154 static void device_init_td1_ring(struct vnt_private *pDevice);
155
156 static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx);
157 static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx);
158 static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc);
159 static void device_init_registers(struct vnt_private *pDevice);
160 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
161 static void device_free_td0_ring(struct vnt_private *pDevice);
162 static void device_free_td1_ring(struct vnt_private *pDevice);
163 static void device_free_rd0_ring(struct vnt_private *pDevice);
164 static void device_free_rd1_ring(struct vnt_private *pDevice);
165 static void device_free_rings(struct vnt_private *pDevice);
166
167 /*--------------------- Export Variables --------------------------*/
168
169 /*--------------------- Export Functions --------------------------*/
170
171 static char *get_chip_name(int chip_id)
172 {
173 int i;
174
175 for (i = 0; chip_info_table[i].name != NULL; i++)
176 if (chip_info_table[i].chip_id == chip_id)
177 break;
178 return chip_info_table[i].name;
179 }
180
181 static void vt6655_remove(struct pci_dev *pcid)
182 {
183 struct vnt_private *pDevice = pci_get_drvdata(pcid);
184
185 if (pDevice == NULL)
186 return;
187 device_free_info(pDevice);
188 }
189
190 static void device_get_options(struct vnt_private *pDevice)
191 {
192 POPTIONS pOpts = &(pDevice->sOpts);
193
194 pOpts->nRxDescs0 = RX_DESC_DEF0;
195 pOpts->nRxDescs1 = RX_DESC_DEF1;
196 pOpts->nTxDescs[0] = TX_DESC_DEF0;
197 pOpts->nTxDescs[1] = TX_DESC_DEF1;
198 pOpts->int_works = INT_WORKS_DEF;
199
200 pOpts->short_retry = SHORT_RETRY_DEF;
201 pOpts->long_retry = LONG_RETRY_DEF;
202 pOpts->bbp_type = BBP_TYPE_DEF;
203 }
204
205 static void
206 device_set_options(struct vnt_private *pDevice)
207 {
208 pDevice->byShortRetryLimit = pDevice->sOpts.short_retry;
209 pDevice->byLongRetryLimit = pDevice->sOpts.long_retry;
210 pDevice->byBBType = pDevice->sOpts.bbp_type;
211 pDevice->byPacketType = pDevice->byBBType;
212 pDevice->byAutoFBCtrl = AUTO_FB_0;
213 pDevice->bUpdateBBVGA = true;
214 pDevice->byPreambleType = 0;
215
216 pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit);
217 pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit);
218 pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType);
219 pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble);
220 pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
221 }
222
223 /*
224 * Initialisation of MAC & BBP registers
225 */
226
227 static void device_init_registers(struct vnt_private *pDevice)
228 {
229 unsigned long flags;
230 unsigned int ii;
231 unsigned char byValue;
232 unsigned char byCCKPwrdBm = 0;
233 unsigned char byOFDMPwrdBm = 0;
234
235 MACbShutdown(pDevice->PortOffset);
236 BBvSoftwareReset(pDevice);
237
238 /* Do MACbSoftwareReset in MACvInitialize */
239 MACbSoftwareReset(pDevice->PortOffset);
240
241 pDevice->bAES = false;
242
243 /* Only used in 11g type, sync with ERP IE */
244 pDevice->bProtectMode = false;
245
246 pDevice->bNonERPPresent = false;
247 pDevice->bBarkerPreambleMd = false;
248 pDevice->wCurrentRate = RATE_1M;
249 pDevice->byTopOFDMBasicRate = RATE_24M;
250 pDevice->byTopCCKBasicRate = RATE_1M;
251
252 /* Target to IF pin while programming to RF chip. */
253 pDevice->byRevId = 0;
254
255 /* init MAC */
256 MACvInitialize(pDevice->PortOffset);
257
258 /* Get Local ID */
259 VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID);
260
261 spin_lock_irqsave(&pDevice->lock, flags);
262
263 SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM);
264
265 spin_unlock_irqrestore(&pDevice->lock, flags);
266
267 /* Get Channel range */
268 pDevice->byMinChannel = 1;
269 pDevice->byMaxChannel = CB_MAX_CHANNEL;
270
271 /* Get Antena */
272 byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
273 if (byValue & EEP_ANTINV)
274 pDevice->bTxRxAntInv = true;
275 else
276 pDevice->bTxRxAntInv = false;
277
278 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
279 /* if not set default is All */
280 if (byValue == 0)
281 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
282
283 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
284 pDevice->byAntennaCount = 2;
285 pDevice->byTxAntennaMode = ANT_B;
286 pDevice->dwTxAntennaSel = 1;
287 pDevice->dwRxAntennaSel = 1;
288
289 if (pDevice->bTxRxAntInv)
290 pDevice->byRxAntennaMode = ANT_A;
291 else
292 pDevice->byRxAntennaMode = ANT_B;
293 } else {
294 pDevice->byAntennaCount = 1;
295 pDevice->dwTxAntennaSel = 0;
296 pDevice->dwRxAntennaSel = 0;
297
298 if (byValue & EEP_ANTENNA_AUX) {
299 pDevice->byTxAntennaMode = ANT_A;
300
301 if (pDevice->bTxRxAntInv)
302 pDevice->byRxAntennaMode = ANT_B;
303 else
304 pDevice->byRxAntennaMode = ANT_A;
305 } else {
306 pDevice->byTxAntennaMode = ANT_B;
307
308 if (pDevice->bTxRxAntInv)
309 pDevice->byRxAntennaMode = ANT_A;
310 else
311 pDevice->byRxAntennaMode = ANT_B;
312 }
313 }
314
315 /* Set initial antenna mode */
316 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
317 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
318
319 /* zonetype initial */
320 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
321
322 if (!pDevice->bZoneRegExist)
323 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
324
325 pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType);
326
327 /* Init RF module */
328 RFbInit(pDevice);
329
330 /* Get Desire Power Value */
331 pDevice->byCurPwr = 0xFF;
332 pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK);
333 pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG);
334
335 /* Load power Table */
336 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
337 pDevice->abyCCKPwrTbl[ii + 1] =
338 SROMbyReadEmbedded(pDevice->PortOffset,
339 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
340 if (pDevice->abyCCKPwrTbl[ii + 1] == 0)
341 pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr;
342
343 pDevice->abyOFDMPwrTbl[ii + 1] =
344 SROMbyReadEmbedded(pDevice->PortOffset,
345 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
346 if (pDevice->abyOFDMPwrTbl[ii + 1] == 0)
347 pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG;
348
349 pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
350 pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
351 }
352
353 /* recover 12,13 ,14channel for EUROPE by 11 channel */
354 for (ii = 11; ii < 14; ii++) {
355 pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10];
356 pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10];
357 }
358
359 /* Load OFDM A Power Table */
360 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
361 pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
362 SROMbyReadEmbedded(pDevice->PortOffset,
363 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
364
365 pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
366 SROMbyReadEmbedded(pDevice->PortOffset,
367 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
368 }
369
370 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
371 MACvSelectPage1(pDevice->PortOffset);
372
373 VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1,
374 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
375
376 MACvSelectPage0(pDevice->PortOffset);
377 }
378
379 /* use relative tx timeout and 802.11i D4 */
380 MACvWordRegBitsOn(pDevice->PortOffset,
381 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
382
383 /* set performance parameter by registry */
384 MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit);
385 MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit);
386
387 /* reset TSF counter */
388 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
389 /* enable TSF counter */
390 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
391
392 /* initialize BBP registers */
393 BBbVT3253Init(pDevice);
394
395 if (pDevice->bUpdateBBVGA) {
396 pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
397 pDevice->byBBVGANew = pDevice->byBBVGACurrent;
398 BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]);
399 }
400
401 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
402 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
403
404 /* Set BB and packet type at the same time. */
405 /* Set Short Slot Time, xIFS, and RSPINF. */
406 pDevice->wCurrentRate = RATE_54M;
407
408 pDevice->bRadioOff = false;
409
410 pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset,
411 EEP_OFS_RADIOCTL);
412 pDevice->bHWRadioOff = false;
413
414 if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) {
415 /* Get GPIO */
416 MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO);
417
418 if (((pDevice->byGPIO & GPIO0_DATA) &&
419 !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) ||
420 (!(pDevice->byGPIO & GPIO0_DATA) &&
421 (pDevice->byRadioCtl & EEP_RADIOCTL_INV)))
422 pDevice->bHWRadioOff = true;
423 }
424
425 if (pDevice->bHWRadioOff || pDevice->bRadioControlOff)
426 CARDbRadioPowerOff(pDevice);
427
428 /* get Permanent network address */
429 SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
430 pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr);
431
432 /* reset Tx pointer */
433 CARDvSafeResetRx(pDevice);
434 /* reset Rx pointer */
435 CARDvSafeResetTx(pDevice);
436
437 if (pDevice->byLocalID <= REV_ID_VT3253_A1)
438 MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR);
439
440 /* Turn On Rx DMA */
441 MACvReceive0(pDevice->PortOffset);
442 MACvReceive1(pDevice->PortOffset);
443
444 /* start the adapter */
445 MACvStart(pDevice->PortOffset);
446 }
447
448 static void device_print_info(struct vnt_private *pDevice)
449 {
450 dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id));
451
452 dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
453 pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr,
454 (unsigned long)pDevice->PortOffset, pDevice->pcid->irq);
455 }
456
457 static void vt6655_init_info(struct pci_dev *pcid,
458 struct vnt_private **ppDevice,
459 PCHIP_INFO pChip_info)
460 {
461 memset(*ppDevice, 0, sizeof(**ppDevice));
462
463 (*ppDevice)->pcid = pcid;
464 (*ppDevice)->chip_id = pChip_info->chip_id;
465 (*ppDevice)->io_size = pChip_info->io_size;
466 (*ppDevice)->nTxQueues = pChip_info->nTxQueue;
467 (*ppDevice)->multicast_limit = 32;
468
469 spin_lock_init(&((*ppDevice)->lock));
470 }
471
472 static bool device_get_pci_info(struct vnt_private *pDevice,
473 struct pci_dev *pcid)
474 {
475 u16 pci_cmd;
476 u8 b;
477 unsigned int cis_addr;
478
479 pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId);
480 pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID);
481 pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID);
482 pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd));
483
484 pci_set_master(pcid);
485
486 pDevice->memaddr = pci_resource_start(pcid, 0);
487 pDevice->ioaddr = pci_resource_start(pcid, 1);
488
489 cis_addr = pci_resource_start(pcid, 2);
490
491 pDevice->pcid = pcid;
492
493 pci_read_config_byte(pcid, PCI_COMMAND, &b);
494 pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER));
495
496 return true;
497 }
498
499 static void device_free_info(struct vnt_private *pDevice)
500 {
501 if (!pDevice)
502 return;
503
504 if (pDevice->mac_hw)
505 ieee80211_unregister_hw(pDevice->hw);
506
507 if (pDevice->PortOffset)
508 iounmap(pDevice->PortOffset);
509
510 if (pDevice->pcid)
511 pci_release_regions(pDevice->pcid);
512
513 if (pDevice->hw)
514 ieee80211_free_hw(pDevice->hw);
515 }
516
517 static bool device_init_rings(struct vnt_private *pDevice)
518 {
519 void *vir_pool;
520
521 /*allocate all RD/TD rings a single pool*/
522 vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev,
523 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
524 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
525 pDevice->sOpts.nTxDescs[0] * sizeof(struct vnt_tx_desc) +
526 pDevice->sOpts.nTxDescs[1] * sizeof(struct vnt_tx_desc),
527 &pDevice->pool_dma, GFP_ATOMIC);
528 if (vir_pool == NULL) {
529 dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
530 return false;
531 }
532
533 pDevice->aRD0Ring = vir_pool;
534 pDevice->aRD1Ring = vir_pool +
535 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
536
537 pDevice->rd0_pool_dma = pDevice->pool_dma;
538 pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
539 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
540
541 pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev,
542 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
543 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
544 CB_BEACON_BUF_SIZE +
545 CB_MAX_BUF_SIZE,
546 &pDevice->tx_bufs_dma0,
547 GFP_ATOMIC);
548 if (pDevice->tx0_bufs == NULL) {
549 dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
550
551 dma_free_coherent(&pDevice->pcid->dev,
552 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
553 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
554 pDevice->sOpts.nTxDescs[0] * sizeof(struct vnt_tx_desc) +
555 pDevice->sOpts.nTxDescs[1] * sizeof(struct vnt_tx_desc),
556 vir_pool, pDevice->pool_dma
557 );
558 return false;
559 }
560
561 pDevice->td0_pool_dma = pDevice->rd1_pool_dma +
562 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
563
564 pDevice->td1_pool_dma = pDevice->td0_pool_dma +
565 pDevice->sOpts.nTxDescs[0] * sizeof(struct vnt_tx_desc);
566
567 /* vir_pool: pvoid type */
568 pDevice->apTD0Rings = vir_pool
569 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
570 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
571
572 pDevice->apTD1Rings = vir_pool
573 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
574 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc)
575 + pDevice->sOpts.nTxDescs[0] * sizeof(struct vnt_tx_desc);
576
577 pDevice->tx1_bufs = pDevice->tx0_bufs +
578 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
579
580 pDevice->tx_beacon_bufs = pDevice->tx1_bufs +
581 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
582
583 pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs +
584 CB_BEACON_BUF_SIZE;
585
586 pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 +
587 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
588
589 pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 +
590 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
591
592 return true;
593 }
594
595 static void device_free_rings(struct vnt_private *pDevice)
596 {
597 dma_free_coherent(&pDevice->pcid->dev,
598 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
599 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
600 pDevice->sOpts.nTxDescs[0] * sizeof(struct vnt_tx_desc) +
601 pDevice->sOpts.nTxDescs[1] * sizeof(struct vnt_tx_desc)
602 ,
603 pDevice->aRD0Ring, pDevice->pool_dma
604 );
605
606 if (pDevice->tx0_bufs)
607 dma_free_coherent(&pDevice->pcid->dev,
608 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
609 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
610 CB_BEACON_BUF_SIZE +
611 CB_MAX_BUF_SIZE,
612 pDevice->tx0_bufs, pDevice->tx_bufs_dma0
613 );
614 }
615
616 static void device_init_rd0_ring(struct vnt_private *pDevice)
617 {
618 int i;
619 dma_addr_t curr = pDevice->rd0_pool_dma;
620 PSRxDesc pDesc;
621
622 /* Init the RD0 ring entries */
623 for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) {
624 pDesc = &(pDevice->aRD0Ring[i]);
625 pDesc->pRDInfo = alloc_rd_info();
626
627 if (!device_alloc_rx_buf(pDevice, pDesc))
628 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
629
630 pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]);
631 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
632 }
633
634 if (i > 0)
635 pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma);
636 pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]);
637 }
638
639 static void device_init_rd1_ring(struct vnt_private *pDevice)
640 {
641 int i;
642 dma_addr_t curr = pDevice->rd1_pool_dma;
643 PSRxDesc pDesc;
644
645 /* Init the RD1 ring entries */
646 for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) {
647 pDesc = &(pDevice->aRD1Ring[i]);
648 pDesc->pRDInfo = alloc_rd_info();
649
650 if (!device_alloc_rx_buf(pDevice, pDesc))
651 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
652
653 pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]);
654 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
655 }
656
657 if (i > 0)
658 pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma);
659 pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]);
660 }
661
662 static void device_free_rd0_ring(struct vnt_private *pDevice)
663 {
664 int i;
665
666 for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) {
667 PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
668 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
669
670 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
671 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
672
673 dev_kfree_skb(pRDInfo->skb);
674
675 kfree(pDesc->pRDInfo);
676 }
677 }
678
679 static void device_free_rd1_ring(struct vnt_private *pDevice)
680 {
681 int i;
682
683 for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) {
684 PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
685 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
686
687 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
688 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
689
690 dev_kfree_skb(pRDInfo->skb);
691
692 kfree(pDesc->pRDInfo);
693 }
694 }
695
696 static void device_init_td0_ring(struct vnt_private *pDevice)
697 {
698 int i;
699 dma_addr_t curr;
700 struct vnt_tx_desc *pDesc;
701
702 curr = pDevice->td0_pool_dma;
703 for (i = 0; i < pDevice->sOpts.nTxDescs[0];
704 i++, curr += sizeof(struct vnt_tx_desc)) {
705 pDesc = &(pDevice->apTD0Rings[i]);
706 pDesc->td_info = alloc_td_info();
707
708 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
709 pDesc->td_info->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ;
710 pDesc->td_info->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ;
711 }
712 pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]);
713 pDesc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
714 }
715
716 if (i > 0)
717 pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma);
718 pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]);
719 }
720
721 static void device_init_td1_ring(struct vnt_private *pDevice)
722 {
723 int i;
724 dma_addr_t curr;
725 struct vnt_tx_desc *pDesc;
726
727 /* Init the TD ring entries */
728 curr = pDevice->td1_pool_dma;
729 for (i = 0; i < pDevice->sOpts.nTxDescs[1];
730 i++, curr += sizeof(struct vnt_tx_desc)) {
731 pDesc = &(pDevice->apTD1Rings[i]);
732 pDesc->td_info = alloc_td_info();
733
734 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
735 pDesc->td_info->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ;
736 pDesc->td_info->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ;
737 }
738 pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]);
739 pDesc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
740 }
741
742 if (i > 0)
743 pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma);
744 pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]);
745 }
746
747 static void device_free_td0_ring(struct vnt_private *pDevice)
748 {
749 int i;
750
751 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) {
752 struct vnt_tx_desc *pDesc = &pDevice->apTD0Rings[i];
753 struct vnt_td_info *pTDInfo = pDesc->td_info;
754
755 dev_kfree_skb(pTDInfo->skb);
756 kfree(pDesc->td_info);
757 }
758 }
759
760 static void device_free_td1_ring(struct vnt_private *pDevice)
761 {
762 int i;
763
764 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) {
765 struct vnt_tx_desc *pDesc = &pDevice->apTD1Rings[i];
766 struct vnt_td_info *pTDInfo = pDesc->td_info;
767
768 dev_kfree_skb(pTDInfo->skb);
769 kfree(pDesc->td_info);
770 }
771 }
772
773 /*-----------------------------------------------------------------*/
774
775 static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx)
776 {
777 PSRxDesc pRD;
778 int works = 0;
779
780 for (pRD = pDevice->pCurrRD[uIdx];
781 pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST;
782 pRD = pRD->next) {
783 if (works++ > 15)
784 break;
785
786 if (!pRD->pRDInfo->skb)
787 break;
788
789 if (vnt_receive_frame(pDevice, pRD)) {
790 if (!device_alloc_rx_buf(pDevice, pRD)) {
791 dev_err(&pDevice->pcid->dev,
792 "can not allocate rx buf\n");
793 break;
794 }
795 }
796 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
797 }
798
799 pDevice->pCurrRD[uIdx] = pRD;
800
801 return works;
802 }
803
804 static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD)
805 {
806 PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo;
807
808 pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
809 if (pRDInfo->skb == NULL)
810 return false;
811
812 pRDInfo->skb_dma =
813 dma_map_single(&pDevice->pcid->dev,
814 skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
815 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
816
817 *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
818
819 pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz);
820 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
821 pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz);
822 pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma);
823
824 return true;
825 }
826
827 static const u8 fallback_rate0[5][5] = {
828 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
829 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
830 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
831 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
832 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
833 };
834
835 static const u8 fallback_rate1[5][5] = {
836 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
837 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
838 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
839 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
840 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
841 };
842
843 static int vnt_int_report_rate(struct vnt_private *priv,
844 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
845 {
846 struct vnt_tx_fifo_head *fifo_head;
847 struct ieee80211_tx_info *info;
848 struct ieee80211_rate *rate;
849 u16 fb_option;
850 u8 tx_retry = (tsr0 & TSR0_NCR);
851 s8 idx;
852
853 if (!context)
854 return -ENOMEM;
855
856 if (!context->skb)
857 return -EINVAL;
858
859 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
860 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
861 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
862
863 info = IEEE80211_SKB_CB(context->skb);
864 idx = info->control.rates[0].idx;
865
866 if (fb_option && !(tsr1 & TSR1_TERR)) {
867 u8 tx_rate;
868 u8 retry = tx_retry;
869
870 rate = ieee80211_get_tx_rate(priv->hw, info);
871 tx_rate = rate->hw_value - RATE_18M;
872
873 if (retry > 4)
874 retry = 4;
875
876 if (fb_option & FIFOCTL_AUTO_FB_0)
877 tx_rate = fallback_rate0[tx_rate][retry];
878 else if (fb_option & FIFOCTL_AUTO_FB_1)
879 tx_rate = fallback_rate1[tx_rate][retry];
880
881 if (info->band == IEEE80211_BAND_5GHZ)
882 idx = tx_rate - RATE_6M;
883 else
884 idx = tx_rate;
885 }
886
887 ieee80211_tx_info_clear_status(info);
888
889 info->status.rates[0].count = tx_retry;
890
891 if (!(tsr1 & TSR1_TERR)) {
892 info->status.rates[0].idx = idx;
893
894 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
895 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
896 else
897 info->flags |= IEEE80211_TX_STAT_ACK;
898 }
899
900 return 0;
901 }
902
903 static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx)
904 {
905 struct vnt_tx_desc *pTD;
906 int works = 0;
907 unsigned char byTsr0;
908 unsigned char byTsr1;
909
910 for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) {
911 if (pTD->td0.owner == OWNED_BY_NIC)
912 break;
913 if (works++ > 15)
914 break;
915
916 byTsr0 = pTD->td0.tsr0;
917 byTsr1 = pTD->td0.tsr1;
918
919 /* Only the status of first TD in the chain is correct */
920 if (pTD->td1.tcr & TCR_STP) {
921 if ((pTD->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
922 if (!(byTsr1 & TSR1_TERR)) {
923 if (byTsr0 != 0) {
924 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
925 (int)uIdx, byTsr1,
926 byTsr0);
927 }
928 } else {
929 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
930 (int)uIdx, byTsr1, byTsr0);
931 }
932 }
933
934 if (byTsr1 & TSR1_TERR) {
935 if ((pTD->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
936 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
937 (int)uIdx, byTsr1, byTsr0);
938 }
939 }
940
941 vnt_int_report_rate(pDevice, pTD->td_info, byTsr0, byTsr1);
942
943 device_free_tx_buf(pDevice, pTD);
944 pDevice->iTDUsed[uIdx]--;
945 }
946 }
947
948 pDevice->apTailTD[uIdx] = pTD;
949
950 return works;
951 }
952
953 static void device_error(struct vnt_private *pDevice, unsigned short status)
954 {
955 if (status & ISR_FETALERR) {
956 dev_err(&pDevice->pcid->dev, "Hardware fatal error\n");
957
958 MACbShutdown(pDevice->PortOffset);
959 return;
960 }
961 }
962
963 static void device_free_tx_buf(struct vnt_private *pDevice,
964 struct vnt_tx_desc *pDesc)
965 {
966 struct vnt_td_info *pTDInfo = pDesc->td_info;
967 struct sk_buff *skb = pTDInfo->skb;
968
969 if (skb)
970 ieee80211_tx_status_irqsafe(pDevice->hw, skb);
971
972 pTDInfo->skb = NULL;
973 pTDInfo->flags = 0;
974 }
975
976 static void vnt_check_bb_vga(struct vnt_private *priv)
977 {
978 long dbm;
979 int i;
980
981 if (!priv->bUpdateBBVGA)
982 return;
983
984 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
985 return;
986
987 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
988 return;
989
990 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
991
992 for (i = 0; i < BB_VGA_LEVEL; i++) {
993 if (dbm < priv->ldBmThreshold[i]) {
994 priv->byBBVGANew = priv->abyBBVGA[i];
995 break;
996 }
997 }
998
999 if (priv->byBBVGANew == priv->byBBVGACurrent) {
1000 priv->uBBVGADiffCount = 1;
1001 return;
1002 }
1003
1004 priv->uBBVGADiffCount++;
1005
1006 if (priv->uBBVGADiffCount == 1) {
1007 /* first VGA diff gain */
1008 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1009
1010 dev_dbg(&priv->pcid->dev,
1011 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1012 (int)dbm, priv->byBBVGANew,
1013 priv->byBBVGACurrent,
1014 (int)priv->uBBVGADiffCount);
1015 }
1016
1017 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1018 dev_dbg(&priv->pcid->dev,
1019 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1020 (int)dbm, priv->byBBVGANew,
1021 priv->byBBVGACurrent,
1022 (int)priv->uBBVGADiffCount);
1023
1024 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1025 }
1026 }
1027
1028 static void vnt_interrupt_process(struct vnt_private *priv)
1029 {
1030 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
1031 int max_count = 0;
1032 u32 mib_counter;
1033 u32 isr;
1034 unsigned long flags;
1035
1036 MACvReadISR(priv->PortOffset, &isr);
1037
1038 if (isr == 0)
1039 return;
1040
1041 if (isr == 0xffffffff) {
1042 pr_debug("isr = 0xffff\n");
1043 return;
1044 }
1045
1046 MACvIntDisable(priv->PortOffset);
1047
1048 spin_lock_irqsave(&priv->lock, flags);
1049
1050 /* Read low level stats */
1051 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
1052
1053 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
1054 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
1055 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
1056 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
1057
1058 /*
1059 * TBD....
1060 * Must do this after doing rx/tx, cause ISR bit is slow
1061 * than RD/TD write back
1062 * update ISR counter
1063 */
1064 while (isr && priv->vif) {
1065 MACvWriteISR(priv->PortOffset, isr);
1066
1067 if (isr & ISR_FETALERR) {
1068 pr_debug(" ISR_FETALERR\n");
1069 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1070 VNSvOutPortW(priv->PortOffset +
1071 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1072 device_error(priv, isr);
1073 }
1074
1075 if (isr & ISR_TBTT) {
1076 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1077 vnt_check_bb_vga(priv);
1078
1079 priv->bBeaconSent = false;
1080 if (priv->bEnablePSMode)
1081 PSbIsNextTBTTWakeUp((void *)priv);
1082
1083 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1084 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1085 priv->vif->bss_conf.enable_beacon) {
1086 MACvOneShotTimer1MicroSec(priv->PortOffset,
1087 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1088 }
1089
1090 /* TODO: adhoc PS mode */
1091
1092 }
1093
1094 if (isr & ISR_BNTX) {
1095 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1096 priv->bIsBeaconBufReadySet = false;
1097 priv->cbBeaconBufReadySetCnt = 0;
1098 }
1099
1100 priv->bBeaconSent = true;
1101 }
1102
1103 if (isr & ISR_RXDMA0)
1104 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1105
1106 if (isr & ISR_RXDMA1)
1107 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1108
1109 if (isr & ISR_TXDMA0)
1110 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1111
1112 if (isr & ISR_AC0DMA)
1113 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1114
1115 if (isr & ISR_SOFTTIMER1) {
1116 if (priv->vif->bss_conf.enable_beacon)
1117 vnt_beacon_make(priv, priv->vif);
1118 }
1119
1120 /* If both buffers available wake the queue */
1121 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1122 AVAIL_TD(priv, TYPE_AC0DMA) &&
1123 ieee80211_queue_stopped(priv->hw, 0))
1124 ieee80211_wake_queues(priv->hw);
1125
1126 MACvReadISR(priv->PortOffset, &isr);
1127
1128 MACvReceive0(priv->PortOffset);
1129 MACvReceive1(priv->PortOffset);
1130
1131 if (max_count > priv->sOpts.int_works)
1132 break;
1133 }
1134
1135 spin_unlock_irqrestore(&priv->lock, flags);
1136
1137 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1138 }
1139
1140 static void vnt_interrupt_work(struct work_struct *work)
1141 {
1142 struct vnt_private *priv =
1143 container_of(work, struct vnt_private, interrupt_work);
1144
1145 if (priv->vif)
1146 vnt_interrupt_process(priv);
1147 }
1148
1149 static irqreturn_t vnt_interrupt(int irq, void *arg)
1150 {
1151 struct vnt_private *priv = arg;
1152
1153 if (priv->vif)
1154 schedule_work(&priv->interrupt_work);
1155
1156 return IRQ_HANDLED;
1157 }
1158
1159 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1160 {
1161 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1162 struct vnt_tx_desc *head_td;
1163 u32 dma_idx;
1164 unsigned long flags;
1165
1166 spin_lock_irqsave(&priv->lock, flags);
1167
1168 if (ieee80211_is_data(hdr->frame_control))
1169 dma_idx = TYPE_AC0DMA;
1170 else
1171 dma_idx = TYPE_TXDMA0;
1172
1173 if (AVAIL_TD(priv, dma_idx) < 1) {
1174 spin_unlock_irqrestore(&priv->lock, flags);
1175 return -ENOMEM;
1176 }
1177
1178 head_td = priv->apCurrTD[dma_idx];
1179
1180 head_td->td1.tcr = 0;
1181
1182 head_td->td_info->skb = skb;
1183
1184 if (dma_idx == TYPE_AC0DMA)
1185 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1186
1187 priv->apCurrTD[dma_idx] = head_td->next;
1188
1189 spin_unlock_irqrestore(&priv->lock, flags);
1190
1191 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1192
1193 spin_lock_irqsave(&priv->lock, flags);
1194
1195 priv->bPWBitOn = false;
1196
1197 /* Set TSR1 & ReqCount in TxDescHead */
1198 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1199 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1200
1201 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1202
1203 /* Poll Transmit the adapter */
1204 wmb();
1205 head_td->td0.owner = OWNED_BY_NIC;
1206 wmb(); /* second memory barrier */
1207
1208 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1209 MACvTransmitAC0(priv->PortOffset);
1210 else
1211 MACvTransmit0(priv->PortOffset);
1212
1213 priv->iTDUsed[dma_idx]++;
1214
1215 spin_unlock_irqrestore(&priv->lock, flags);
1216
1217 return 0;
1218 }
1219
1220 static void vnt_tx_80211(struct ieee80211_hw *hw,
1221 struct ieee80211_tx_control *control,
1222 struct sk_buff *skb)
1223 {
1224 struct vnt_private *priv = hw->priv;
1225
1226 ieee80211_stop_queues(hw);
1227
1228 if (vnt_tx_packet(priv, skb)) {
1229 ieee80211_free_txskb(hw, skb);
1230
1231 ieee80211_wake_queues(hw);
1232 }
1233 }
1234
1235 static int vnt_start(struct ieee80211_hw *hw)
1236 {
1237 struct vnt_private *priv = hw->priv;
1238 int ret;
1239
1240 priv->rx_buf_sz = PKT_BUF_SZ;
1241 if (!device_init_rings(priv))
1242 return -ENOMEM;
1243
1244 ret = request_irq(priv->pcid->irq, &vnt_interrupt,
1245 IRQF_SHARED, "vt6655", priv);
1246 if (ret) {
1247 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1248 return ret;
1249 }
1250
1251 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1252 device_init_rd0_ring(priv);
1253 device_init_rd1_ring(priv);
1254 device_init_td0_ring(priv);
1255 device_init_td1_ring(priv);
1256
1257 device_init_registers(priv);
1258
1259 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1260 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1261
1262 ieee80211_wake_queues(hw);
1263
1264 return 0;
1265 }
1266
1267 static void vnt_stop(struct ieee80211_hw *hw)
1268 {
1269 struct vnt_private *priv = hw->priv;
1270
1271 ieee80211_stop_queues(hw);
1272
1273 cancel_work_sync(&priv->interrupt_work);
1274
1275 MACbShutdown(priv->PortOffset);
1276 MACbSoftwareReset(priv->PortOffset);
1277 CARDbRadioPowerOff(priv);
1278
1279 device_free_td0_ring(priv);
1280 device_free_td1_ring(priv);
1281 device_free_rd0_ring(priv);
1282 device_free_rd1_ring(priv);
1283 device_free_rings(priv);
1284
1285 free_irq(priv->pcid->irq, priv);
1286 }
1287
1288 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1289 {
1290 struct vnt_private *priv = hw->priv;
1291
1292 priv->vif = vif;
1293
1294 switch (vif->type) {
1295 case NL80211_IFTYPE_STATION:
1296 break;
1297 case NL80211_IFTYPE_ADHOC:
1298 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1299
1300 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1301
1302 break;
1303 case NL80211_IFTYPE_AP:
1304 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1305
1306 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1307
1308 break;
1309 default:
1310 return -EOPNOTSUPP;
1311 }
1312
1313 priv->op_mode = vif->type;
1314
1315 return 0;
1316 }
1317
1318 static void vnt_remove_interface(struct ieee80211_hw *hw,
1319 struct ieee80211_vif *vif)
1320 {
1321 struct vnt_private *priv = hw->priv;
1322
1323 switch (vif->type) {
1324 case NL80211_IFTYPE_STATION:
1325 break;
1326 case NL80211_IFTYPE_ADHOC:
1327 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1328 MACvRegBitsOff(priv->PortOffset,
1329 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1330 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1331 break;
1332 case NL80211_IFTYPE_AP:
1333 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1334 MACvRegBitsOff(priv->PortOffset,
1335 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1336 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1337 break;
1338 default:
1339 break;
1340 }
1341
1342 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1343 }
1344
1345
1346 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1347 {
1348 struct vnt_private *priv = hw->priv;
1349 struct ieee80211_conf *conf = &hw->conf;
1350 u8 bb_type;
1351
1352 if (changed & IEEE80211_CONF_CHANGE_PS) {
1353 if (conf->flags & IEEE80211_CONF_PS)
1354 PSvEnablePowerSaving(priv, conf->listen_interval);
1355 else
1356 PSvDisablePowerSaving(priv);
1357 }
1358
1359 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1360 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1361 set_channel(priv, conf->chandef.chan);
1362
1363 if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ)
1364 bb_type = BB_TYPE_11A;
1365 else
1366 bb_type = BB_TYPE_11G;
1367
1368 if (priv->byBBType != bb_type) {
1369 priv->byBBType = bb_type;
1370
1371 CARDbSetPhyParameter(priv, priv->byBBType);
1372 }
1373 }
1374
1375 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1376 if (priv->byBBType == BB_TYPE_11B)
1377 priv->wCurrentRate = RATE_1M;
1378 else
1379 priv->wCurrentRate = RATE_54M;
1380
1381 RFbSetPower(priv, priv->wCurrentRate,
1382 conf->chandef.chan->hw_value);
1383 }
1384
1385 return 0;
1386 }
1387
1388 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1389 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1390 u32 changed)
1391 {
1392 struct vnt_private *priv = hw->priv;
1393
1394 priv->current_aid = conf->aid;
1395
1396 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1397 unsigned long flags;
1398
1399 spin_lock_irqsave(&priv->lock, flags);
1400
1401 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1402
1403 spin_unlock_irqrestore(&priv->lock, flags);
1404 }
1405
1406 if (changed & BSS_CHANGED_BASIC_RATES) {
1407 priv->basic_rates = conf->basic_rates;
1408
1409 CARDvUpdateBasicTopRate(priv);
1410
1411 dev_dbg(&priv->pcid->dev,
1412 "basic rates %x\n", conf->basic_rates);
1413 }
1414
1415 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1416 if (conf->use_short_preamble) {
1417 MACvEnableBarkerPreambleMd(priv->PortOffset);
1418 priv->byPreambleType = true;
1419 } else {
1420 MACvDisableBarkerPreambleMd(priv->PortOffset);
1421 priv->byPreambleType = false;
1422 }
1423 }
1424
1425 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1426 if (conf->use_cts_prot)
1427 MACvEnableProtectMD(priv->PortOffset);
1428 else
1429 MACvDisableProtectMD(priv->PortOffset);
1430 }
1431
1432 if (changed & BSS_CHANGED_ERP_SLOT) {
1433 if (conf->use_short_slot)
1434 priv->bShortSlotTime = true;
1435 else
1436 priv->bShortSlotTime = false;
1437
1438 CARDbSetPhyParameter(priv, priv->byBBType);
1439 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1440 }
1441
1442 if (changed & BSS_CHANGED_TXPOWER)
1443 RFbSetPower(priv, priv->wCurrentRate,
1444 conf->chandef.chan->hw_value);
1445
1446 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1447 dev_dbg(&priv->pcid->dev,
1448 "Beacon enable %d\n", conf->enable_beacon);
1449
1450 if (conf->enable_beacon) {
1451 vnt_beacon_enable(priv, vif, conf);
1452
1453 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1454 TCR_AUTOBCNTX);
1455 } else {
1456 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1457 TCR_AUTOBCNTX);
1458 }
1459 }
1460
1461 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1462 priv->op_mode != NL80211_IFTYPE_AP) {
1463 if (conf->assoc && conf->beacon_rate) {
1464 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1465 conf->sync_tsf);
1466
1467 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1468
1469 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1470 } else {
1471 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1472 TFTCTL_TSFCNTRST);
1473 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1474 TFTCTL_TSFCNTREN);
1475 }
1476 }
1477 }
1478
1479 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1480 struct netdev_hw_addr_list *mc_list)
1481 {
1482 struct vnt_private *priv = hw->priv;
1483 struct netdev_hw_addr *ha;
1484 u64 mc_filter = 0;
1485 u32 bit_nr = 0;
1486
1487 netdev_hw_addr_list_for_each(ha, mc_list) {
1488 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1489
1490 mc_filter |= 1ULL << (bit_nr & 0x3f);
1491 }
1492
1493 priv->mc_list_count = mc_list->count;
1494
1495 return mc_filter;
1496 }
1497
1498 static void vnt_configure(struct ieee80211_hw *hw,
1499 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1500 {
1501 struct vnt_private *priv = hw->priv;
1502 u8 rx_mode = 0;
1503
1504 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1505
1506 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1507
1508 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1509
1510 if (changed_flags & FIF_ALLMULTI) {
1511 if (*total_flags & FIF_ALLMULTI) {
1512 unsigned long flags;
1513
1514 spin_lock_irqsave(&priv->lock, flags);
1515
1516 if (priv->mc_list_count > 2) {
1517 MACvSelectPage1(priv->PortOffset);
1518
1519 VNSvOutPortD(priv->PortOffset +
1520 MAC_REG_MAR0, 0xffffffff);
1521 VNSvOutPortD(priv->PortOffset +
1522 MAC_REG_MAR0 + 4, 0xffffffff);
1523
1524 MACvSelectPage0(priv->PortOffset);
1525 } else {
1526 MACvSelectPage1(priv->PortOffset);
1527
1528 VNSvOutPortD(priv->PortOffset +
1529 MAC_REG_MAR0, (u32)multicast);
1530 VNSvOutPortD(priv->PortOffset +
1531 MAC_REG_MAR0 + 4,
1532 (u32)(multicast >> 32));
1533
1534 MACvSelectPage0(priv->PortOffset);
1535 }
1536
1537 spin_unlock_irqrestore(&priv->lock, flags);
1538
1539 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1540 } else {
1541 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1542 }
1543 }
1544
1545 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1546 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1547
1548 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1549 rx_mode &= ~RCR_BSSID;
1550 else
1551 rx_mode |= RCR_BSSID;
1552 }
1553
1554 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1555
1556 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1557 }
1558
1559 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1560 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1561 struct ieee80211_key_conf *key)
1562 {
1563 struct vnt_private *priv = hw->priv;
1564
1565 switch (cmd) {
1566 case SET_KEY:
1567 if (vnt_set_keys(hw, sta, vif, key))
1568 return -EOPNOTSUPP;
1569 break;
1570 case DISABLE_KEY:
1571 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1572 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1573 default:
1574 break;
1575 }
1576
1577 return 0;
1578 }
1579
1580 static int vnt_get_stats(struct ieee80211_hw *hw,
1581 struct ieee80211_low_level_stats *stats)
1582 {
1583 struct vnt_private *priv = hw->priv;
1584
1585 memcpy(stats, &priv->low_stats, sizeof(*stats));
1586
1587 return 0;
1588 }
1589
1590 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1591 {
1592 struct vnt_private *priv = hw->priv;
1593 u64 tsf;
1594
1595 CARDbGetCurrentTSF(priv, &tsf);
1596
1597 return tsf;
1598 }
1599
1600 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1601 u64 tsf)
1602 {
1603 struct vnt_private *priv = hw->priv;
1604
1605 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1606 }
1607
1608 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1609 {
1610 struct vnt_private *priv = hw->priv;
1611
1612 /* reset TSF counter */
1613 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1614 }
1615
1616 static const struct ieee80211_ops vnt_mac_ops = {
1617 .tx = vnt_tx_80211,
1618 .start = vnt_start,
1619 .stop = vnt_stop,
1620 .add_interface = vnt_add_interface,
1621 .remove_interface = vnt_remove_interface,
1622 .config = vnt_config,
1623 .bss_info_changed = vnt_bss_info_changed,
1624 .prepare_multicast = vnt_prepare_multicast,
1625 .configure_filter = vnt_configure,
1626 .set_key = vnt_set_key,
1627 .get_stats = vnt_get_stats,
1628 .get_tsf = vnt_get_tsf,
1629 .set_tsf = vnt_set_tsf,
1630 .reset_tsf = vnt_reset_tsf,
1631 };
1632
1633 static int vnt_init(struct vnt_private *priv)
1634 {
1635 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1636
1637 vnt_init_bands(priv);
1638
1639 if (ieee80211_register_hw(priv->hw))
1640 return -ENODEV;
1641
1642 priv->mac_hw = true;
1643
1644 CARDbRadioPowerOff(priv);
1645
1646 return 0;
1647 }
1648
1649 static int
1650 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1651 {
1652 PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data;
1653 struct vnt_private *priv;
1654 struct ieee80211_hw *hw;
1655 struct wiphy *wiphy;
1656 int rc;
1657
1658 dev_notice(&pcid->dev,
1659 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1660
1661 dev_notice(&pcid->dev,
1662 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1663
1664 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1665 if (!hw) {
1666 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1667 return -ENOMEM;
1668 }
1669
1670 priv = hw->priv;
1671
1672 vt6655_init_info(pcid, &priv, pChip_info);
1673
1674 priv->hw = hw;
1675
1676 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1677
1678 if (pci_enable_device(pcid)) {
1679 device_free_info(priv);
1680 return -ENODEV;
1681 }
1682
1683 dev_dbg(&pcid->dev,
1684 "Before get pci_info memaddr is %x\n", priv->memaddr);
1685
1686 if (!device_get_pci_info(priv, pcid)) {
1687 dev_err(&pcid->dev, ": Failed to find PCI device.\n");
1688 device_free_info(priv);
1689 return -ENODEV;
1690 }
1691
1692 #ifdef DEBUG
1693 dev_dbg(&pcid->dev,
1694 "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n",
1695 priv->memaddr, priv->ioaddr, priv->io_size);
1696 {
1697 int i;
1698 u32 bar, len;
1699 u32 address[] = {
1700 PCI_BASE_ADDRESS_0,
1701 PCI_BASE_ADDRESS_1,
1702 PCI_BASE_ADDRESS_2,
1703 PCI_BASE_ADDRESS_3,
1704 PCI_BASE_ADDRESS_4,
1705 PCI_BASE_ADDRESS_5,
1706 0};
1707 for (i = 0; address[i]; i++) {
1708 pci_read_config_dword(pcid, address[i], &bar);
1709
1710 dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar);
1711
1712 if (!bar) {
1713 dev_dbg(&pcid->dev,
1714 "bar %d not implemented\n", i);
1715 continue;
1716 }
1717
1718 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
1719 /* This is IO */
1720
1721 len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
1722 len = len & ~(len - 1);
1723
1724 dev_dbg(&pcid->dev,
1725 "IO space: len in IO %x, BAR %d\n",
1726 len, i);
1727 } else {
1728 len = bar & 0xfffffff0;
1729 len = ~len + 1;
1730
1731 dev_dbg(&pcid->dev,
1732 "len in MEM %x, BAR %d\n", len, i);
1733 }
1734 }
1735 }
1736 #endif
1737
1738 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1739 priv->io_size);
1740 if (!priv->PortOffset) {
1741 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1742 device_free_info(priv);
1743 return -ENODEV;
1744 }
1745
1746 rc = pci_request_regions(pcid, DEVICE_NAME);
1747 if (rc) {
1748 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1749 device_free_info(priv);
1750 return -ENODEV;
1751 }
1752
1753 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1754 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1755 device_free_info(priv);
1756 return -ENODEV;
1757 }
1758
1759 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1760
1761 /* do reset */
1762 if (!MACbSoftwareReset(priv->PortOffset)) {
1763 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1764 device_free_info(priv);
1765 return -ENODEV;
1766 }
1767 /* initial to reload eeprom */
1768 MACvInitialize(priv->PortOffset);
1769 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1770
1771 /* Get RFType */
1772 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1773 priv->byRFType &= RF_MASK;
1774
1775 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1776
1777 device_get_options(priv);
1778 device_set_options(priv);
1779 /* Mask out the options cannot be set to the chip */
1780 priv->sOpts.flags &= pChip_info->flags;
1781
1782 /* Enable the chip specified capabilities */
1783 priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL);
1784
1785 wiphy = priv->hw->wiphy;
1786
1787 wiphy->frag_threshold = FRAG_THRESH_DEF;
1788 wiphy->rts_threshold = RTS_THRESH_DEF;
1789 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1790 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1791
1792 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1793 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1794 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1795 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1796 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1797
1798 priv->hw->max_signal = 100;
1799
1800 if (vnt_init(priv))
1801 return -ENODEV;
1802
1803 device_print_info(priv);
1804 pci_set_drvdata(pcid, priv);
1805
1806 return 0;
1807 }
1808
1809 /*------------------------------------------------------------------*/
1810
1811 #ifdef CONFIG_PM
1812 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1813 {
1814 struct vnt_private *priv = pci_get_drvdata(pcid);
1815 unsigned long flags;
1816
1817 spin_lock_irqsave(&priv->lock, flags);
1818
1819 pci_save_state(pcid);
1820
1821 MACbShutdown(priv->PortOffset);
1822
1823 pci_disable_device(pcid);
1824 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1825
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827
1828 return 0;
1829 }
1830
1831 static int vt6655_resume(struct pci_dev *pcid)
1832 {
1833
1834 pci_set_power_state(pcid, PCI_D0);
1835 pci_enable_wake(pcid, PCI_D0, 0);
1836 pci_restore_state(pcid);
1837
1838 return 0;
1839 }
1840 #endif
1841
1842 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1843
1844 static struct pci_driver device_driver = {
1845 .name = DEVICE_NAME,
1846 .id_table = vt6655_pci_id_table,
1847 .probe = vt6655_probe,
1848 .remove = vt6655_remove,
1849 #ifdef CONFIG_PM
1850 .suspend = vt6655_suspend,
1851 .resume = vt6655_resume,
1852 #endif
1853 };
1854
1855 module_pci_driver(device_driver);
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