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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma
[mirror_ubuntu-artful-kernel.git] / drivers / staging / vt6655 / device_main.c
1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * File: device_main.c
16 *
17 * Purpose: driver entry for initial, open, close, tx and rx.
18 *
19 * Author: Lyndon Chen
20 *
21 * Date: Jan 8, 2003
22 *
23 * Functions:
24 *
25 * vt6655_probe - module initial (insmod) driver entry
26 * vt6655_remove - module remove entry
27 * device_free_info - device structure resource free function
28 * device_print_info - print out resource
29 * device_rx_srv - rx service function
30 * device_alloc_rx_buf - rx buffer pre-allocated function
31 * device_free_tx_buf - free tx buffer function
32 * device_init_rd0_ring- initial rd dma0 ring
33 * device_init_rd1_ring- initial rd dma1 ring
34 * device_init_td0_ring- initial tx dma0 ring buffer
35 * device_init_td1_ring- initial tx dma1 ring buffer
36 * device_init_registers- initial MAC & BBP & RF internal registers.
37 * device_init_rings- initial tx/rx ring buffer
38 * device_free_rings- free all allocated ring buffer
39 * device_tx_srv- tx interrupt service function
40 *
41 * Revision History:
42 */
43 #undef __NO_VERSION__
44
45 #include <linux/file.h>
46 #include "device.h"
47 #include "card.h"
48 #include "channel.h"
49 #include "baseband.h"
50 #include "mac.h"
51 #include "power.h"
52 #include "rxtx.h"
53 #include "dpc.h"
54 #include "rf.h"
55 #include <linux/delay.h>
56 #include <linux/kthread.h>
57 #include <linux/slab.h>
58
59 /*--------------------- Static Definitions -------------------------*/
60 /*
61 * Define module options
62 */
63 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
64 MODULE_LICENSE("GPL");
65 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
66
67 #define DEVICE_PARAM(N, D)
68
69 #define RX_DESC_MIN0 16
70 #define RX_DESC_MAX0 128
71 #define RX_DESC_DEF0 32
72 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
73
74 #define RX_DESC_MIN1 16
75 #define RX_DESC_MAX1 128
76 #define RX_DESC_DEF1 32
77 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
78
79 #define TX_DESC_MIN0 16
80 #define TX_DESC_MAX0 128
81 #define TX_DESC_DEF0 32
82 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
83
84 #define TX_DESC_MIN1 16
85 #define TX_DESC_MAX1 128
86 #define TX_DESC_DEF1 64
87 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
88
89 #define INT_WORKS_DEF 20
90 #define INT_WORKS_MIN 10
91 #define INT_WORKS_MAX 64
92
93 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
94
95 #define RTS_THRESH_DEF 2347
96
97 #define FRAG_THRESH_DEF 2346
98
99 #define SHORT_RETRY_MIN 0
100 #define SHORT_RETRY_MAX 31
101 #define SHORT_RETRY_DEF 8
102
103 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
104
105 #define LONG_RETRY_MIN 0
106 #define LONG_RETRY_MAX 15
107 #define LONG_RETRY_DEF 4
108
109 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
110
111 /* BasebandType[] baseband type selected
112 * 0: indicate 802.11a type
113 * 1: indicate 802.11b type
114 * 2: indicate 802.11g type
115 */
116 #define BBP_TYPE_MIN 0
117 #define BBP_TYPE_MAX 2
118 #define BBP_TYPE_DEF 2
119
120 DEVICE_PARAM(BasebandType, "baseband type");
121
122 /*
123 * Static vars definitions
124 */
125 static const struct pci_device_id vt6655_pci_id_table[] = {
126 { PCI_VDEVICE(VIA, 0x3253) },
127 { 0, }
128 };
129
130 /*--------------------- Static Functions --------------------------*/
131
132 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
133 static void device_free_info(struct vnt_private *priv);
134 static void device_print_info(struct vnt_private *priv);
135
136 static void device_init_rd0_ring(struct vnt_private *priv);
137 static void device_init_rd1_ring(struct vnt_private *priv);
138 static void device_init_td0_ring(struct vnt_private *priv);
139 static void device_init_td1_ring(struct vnt_private *priv);
140
141 static int device_rx_srv(struct vnt_private *priv, unsigned int idx);
142 static int device_tx_srv(struct vnt_private *priv, unsigned int idx);
143 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
144 static void device_init_registers(struct vnt_private *priv);
145 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
146 static void device_free_td0_ring(struct vnt_private *priv);
147 static void device_free_td1_ring(struct vnt_private *priv);
148 static void device_free_rd0_ring(struct vnt_private *priv);
149 static void device_free_rd1_ring(struct vnt_private *priv);
150 static void device_free_rings(struct vnt_private *priv);
151
152 /*--------------------- Export Variables --------------------------*/
153
154 /*--------------------- Export Functions --------------------------*/
155
156 static void vt6655_remove(struct pci_dev *pcid)
157 {
158 struct vnt_private *priv = pci_get_drvdata(pcid);
159
160 if (priv == NULL)
161 return;
162 device_free_info(priv);
163 }
164
165 static void device_get_options(struct vnt_private *priv)
166 {
167 struct vnt_options *opts = &priv->opts;
168
169 opts->rx_descs0 = RX_DESC_DEF0;
170 opts->rx_descs1 = RX_DESC_DEF1;
171 opts->tx_descs[0] = TX_DESC_DEF0;
172 opts->tx_descs[1] = TX_DESC_DEF1;
173 opts->int_works = INT_WORKS_DEF;
174
175 opts->short_retry = SHORT_RETRY_DEF;
176 opts->long_retry = LONG_RETRY_DEF;
177 opts->bbp_type = BBP_TYPE_DEF;
178 }
179
180 static void
181 device_set_options(struct vnt_private *priv)
182 {
183 priv->byShortRetryLimit = priv->opts.short_retry;
184 priv->byLongRetryLimit = priv->opts.long_retry;
185 priv->byBBType = priv->opts.bbp_type;
186 priv->byPacketType = priv->byBBType;
187 priv->byAutoFBCtrl = AUTO_FB_0;
188 priv->bUpdateBBVGA = true;
189 priv->byPreambleType = 0;
190
191 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
192 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
193 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType);
194 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
195 pr_debug(" byBBType= %d\n", (int)priv->byBBType);
196 }
197
198 /*
199 * Initialisation of MAC & BBP registers
200 */
201
202 static void device_init_registers(struct vnt_private *priv)
203 {
204 unsigned long flags;
205 unsigned int ii;
206 unsigned char byValue;
207 unsigned char byCCKPwrdBm = 0;
208 unsigned char byOFDMPwrdBm = 0;
209
210 MACbShutdown(priv);
211 BBvSoftwareReset(priv);
212
213 /* Do MACbSoftwareReset in MACvInitialize */
214 MACbSoftwareReset(priv);
215
216 priv->bAES = false;
217
218 /* Only used in 11g type, sync with ERP IE */
219 priv->bProtectMode = false;
220
221 priv->bNonERPPresent = false;
222 priv->bBarkerPreambleMd = false;
223 priv->wCurrentRate = RATE_1M;
224 priv->byTopOFDMBasicRate = RATE_24M;
225 priv->byTopCCKBasicRate = RATE_1M;
226
227 /* init MAC */
228 MACvInitialize(priv);
229
230 /* Get Local ID */
231 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID);
232
233 spin_lock_irqsave(&priv->lock, flags);
234
235 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM);
236
237 spin_unlock_irqrestore(&priv->lock, flags);
238
239 /* Get Channel range */
240 priv->byMinChannel = 1;
241 priv->byMaxChannel = CB_MAX_CHANNEL;
242
243 /* Get Antena */
244 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA);
245 if (byValue & EEP_ANTINV)
246 priv->bTxRxAntInv = true;
247 else
248 priv->bTxRxAntInv = false;
249
250 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
251 /* if not set default is All */
252 if (byValue == 0)
253 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
254
255 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
256 priv->byAntennaCount = 2;
257 priv->byTxAntennaMode = ANT_B;
258 priv->dwTxAntennaSel = 1;
259 priv->dwRxAntennaSel = 1;
260
261 if (priv->bTxRxAntInv)
262 priv->byRxAntennaMode = ANT_A;
263 else
264 priv->byRxAntennaMode = ANT_B;
265 } else {
266 priv->byAntennaCount = 1;
267 priv->dwTxAntennaSel = 0;
268 priv->dwRxAntennaSel = 0;
269
270 if (byValue & EEP_ANTENNA_AUX) {
271 priv->byTxAntennaMode = ANT_A;
272
273 if (priv->bTxRxAntInv)
274 priv->byRxAntennaMode = ANT_B;
275 else
276 priv->byRxAntennaMode = ANT_A;
277 } else {
278 priv->byTxAntennaMode = ANT_B;
279
280 if (priv->bTxRxAntInv)
281 priv->byRxAntennaMode = ANT_A;
282 else
283 priv->byRxAntennaMode = ANT_B;
284 }
285 }
286
287 /* Set initial antenna mode */
288 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
289 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
290
291 /* zonetype initial */
292 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
293
294 if (!priv->bZoneRegExist)
295 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
296
297 pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
298
299 /* Init RF module */
300 RFbInit(priv);
301
302 /* Get Desire Power Value */
303 priv->byCurPwr = 0xFF;
304 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK);
305 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_OFDMG);
306
307 /* Load power Table */
308 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
309 priv->abyCCKPwrTbl[ii + 1] =
310 SROMbyReadEmbedded(priv->PortOffset,
311 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
312 if (priv->abyCCKPwrTbl[ii + 1] == 0)
313 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
314
315 priv->abyOFDMPwrTbl[ii + 1] =
316 SROMbyReadEmbedded(priv->PortOffset,
317 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
318 if (priv->abyOFDMPwrTbl[ii + 1] == 0)
319 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
320
321 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
322 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
323 }
324
325 /* recover 12,13 ,14channel for EUROPE by 11 channel */
326 for (ii = 11; ii < 14; ii++) {
327 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
328 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
329 }
330
331 /* Load OFDM A Power Table */
332 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
333 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
334 SROMbyReadEmbedded(priv->PortOffset,
335 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
336
337 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
338 SROMbyReadEmbedded(priv->PortOffset,
339 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
340 }
341
342 if (priv->byLocalID > REV_ID_VT3253_B1) {
343 MACvSelectPage1(priv->PortOffset);
344
345 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1,
346 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
347
348 MACvSelectPage0(priv->PortOffset);
349 }
350
351 /* use relative tx timeout and 802.11i D4 */
352 MACvWordRegBitsOn(priv->PortOffset,
353 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
354
355 /* set performance parameter by registry */
356 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
357 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
358
359 /* reset TSF counter */
360 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
361 /* enable TSF counter */
362 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
363
364 /* initialize BBP registers */
365 BBbVT3253Init(priv);
366
367 if (priv->bUpdateBBVGA) {
368 priv->byBBVGACurrent = priv->abyBBVGA[0];
369 priv->byBBVGANew = priv->byBBVGACurrent;
370 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
371 }
372
373 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
374 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
375
376 /* Set BB and packet type at the same time. */
377 /* Set Short Slot Time, xIFS, and RSPINF. */
378 priv->wCurrentRate = RATE_54M;
379
380 priv->bRadioOff = false;
381
382 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset,
383 EEP_OFS_RADIOCTL);
384 priv->bHWRadioOff = false;
385
386 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
387 /* Get GPIO */
388 MACvGPIOIn(priv->PortOffset, &priv->byGPIO);
389
390 if (((priv->byGPIO & GPIO0_DATA) &&
391 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
392 (!(priv->byGPIO & GPIO0_DATA) &&
393 (priv->byRadioCtl & EEP_RADIOCTL_INV)))
394 priv->bHWRadioOff = true;
395 }
396
397 if (priv->bHWRadioOff || priv->bRadioControlOff)
398 CARDbRadioPowerOff(priv);
399
400 /* get Permanent network address */
401 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
402 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
403
404 /* reset Tx pointer */
405 CARDvSafeResetRx(priv);
406 /* reset Rx pointer */
407 CARDvSafeResetTx(priv);
408
409 if (priv->byLocalID <= REV_ID_VT3253_A1)
410 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR);
411
412 /* Turn On Rx DMA */
413 MACvReceive0(priv->PortOffset);
414 MACvReceive1(priv->PortOffset);
415
416 /* start the adapter */
417 MACvStart(priv->PortOffset);
418 }
419
420 static void device_print_info(struct vnt_private *priv)
421 {
422 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
423 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
424 (unsigned long)priv->PortOffset, priv->pcid->irq);
425 }
426
427 static void device_free_info(struct vnt_private *priv)
428 {
429 if (!priv)
430 return;
431
432 if (priv->mac_hw)
433 ieee80211_unregister_hw(priv->hw);
434
435 if (priv->PortOffset)
436 iounmap(priv->PortOffset);
437
438 if (priv->pcid)
439 pci_release_regions(priv->pcid);
440
441 if (priv->hw)
442 ieee80211_free_hw(priv->hw);
443 }
444
445 static bool device_init_rings(struct vnt_private *priv)
446 {
447 void *vir_pool;
448
449 /*allocate all RD/TD rings a single pool*/
450 vir_pool = dma_zalloc_coherent(&priv->pcid->dev,
451 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
452 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
453 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
454 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
455 &priv->pool_dma, GFP_ATOMIC);
456 if (vir_pool == NULL) {
457 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
458 return false;
459 }
460
461 priv->aRD0Ring = vir_pool;
462 priv->aRD1Ring = vir_pool +
463 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
464
465 priv->rd0_pool_dma = priv->pool_dma;
466 priv->rd1_pool_dma = priv->rd0_pool_dma +
467 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
468
469 priv->tx0_bufs = dma_zalloc_coherent(&priv->pcid->dev,
470 priv->opts.tx_descs[0] * PKT_BUF_SZ +
471 priv->opts.tx_descs[1] * PKT_BUF_SZ +
472 CB_BEACON_BUF_SIZE +
473 CB_MAX_BUF_SIZE,
474 &priv->tx_bufs_dma0,
475 GFP_ATOMIC);
476 if (!priv->tx0_bufs) {
477 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
478
479 dma_free_coherent(&priv->pcid->dev,
480 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
481 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
482 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
483 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
484 vir_pool, priv->pool_dma);
485 return false;
486 }
487
488 priv->td0_pool_dma = priv->rd1_pool_dma +
489 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
490
491 priv->td1_pool_dma = priv->td0_pool_dma +
492 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
493
494 /* vir_pool: pvoid type */
495 priv->apTD0Rings = vir_pool
496 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
497 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
498
499 priv->apTD1Rings = vir_pool
500 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
501 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
502 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
503
504 priv->tx1_bufs = priv->tx0_bufs +
505 priv->opts.tx_descs[0] * PKT_BUF_SZ;
506
507 priv->tx_beacon_bufs = priv->tx1_bufs +
508 priv->opts.tx_descs[1] * PKT_BUF_SZ;
509
510 priv->pbyTmpBuff = priv->tx_beacon_bufs +
511 CB_BEACON_BUF_SIZE;
512
513 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
514 priv->opts.tx_descs[0] * PKT_BUF_SZ;
515
516 priv->tx_beacon_dma = priv->tx_bufs_dma1 +
517 priv->opts.tx_descs[1] * PKT_BUF_SZ;
518
519 return true;
520 }
521
522 static void device_free_rings(struct vnt_private *priv)
523 {
524 dma_free_coherent(&priv->pcid->dev,
525 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
526 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
527 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
528 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
529 priv->aRD0Ring, priv->pool_dma);
530
531 if (priv->tx0_bufs)
532 dma_free_coherent(&priv->pcid->dev,
533 priv->opts.tx_descs[0] * PKT_BUF_SZ +
534 priv->opts.tx_descs[1] * PKT_BUF_SZ +
535 CB_BEACON_BUF_SIZE +
536 CB_MAX_BUF_SIZE,
537 priv->tx0_bufs, priv->tx_bufs_dma0);
538 }
539
540 static void device_init_rd0_ring(struct vnt_private *priv)
541 {
542 int i;
543 dma_addr_t curr = priv->rd0_pool_dma;
544 struct vnt_rx_desc *desc;
545
546 /* Init the RD0 ring entries */
547 for (i = 0; i < priv->opts.rx_descs0;
548 i ++, curr += sizeof(struct vnt_rx_desc)) {
549 desc = &priv->aRD0Ring[i];
550 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_ATOMIC);
551
552 if (!device_alloc_rx_buf(priv, desc))
553 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
554
555 desc->next = &(priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0]);
556 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
557 }
558
559 if (i > 0)
560 priv->aRD0Ring[i-1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
561 priv->pCurrRD[0] = &priv->aRD0Ring[0];
562 }
563
564 static void device_init_rd1_ring(struct vnt_private *priv)
565 {
566 int i;
567 dma_addr_t curr = priv->rd1_pool_dma;
568 struct vnt_rx_desc *desc;
569
570 /* Init the RD1 ring entries */
571 for (i = 0; i < priv->opts.rx_descs1;
572 i ++, curr += sizeof(struct vnt_rx_desc)) {
573 desc = &priv->aRD1Ring[i];
574 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_ATOMIC);
575
576 if (!device_alloc_rx_buf(priv, desc))
577 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
578
579 desc->next = &(priv->aRD1Ring[(i+1) % priv->opts.rx_descs1]);
580 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
581 }
582
583 if (i > 0)
584 priv->aRD1Ring[i-1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
585 priv->pCurrRD[1] = &priv->aRD1Ring[0];
586 }
587
588 static void device_free_rd0_ring(struct vnt_private *priv)
589 {
590 int i;
591
592 for (i = 0; i < priv->opts.rx_descs0; i++) {
593 struct vnt_rx_desc *desc = &(priv->aRD0Ring[i]);
594 struct vnt_rd_info *rd_info = desc->rd_info;
595
596 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
597 priv->rx_buf_sz, DMA_FROM_DEVICE);
598
599 dev_kfree_skb(rd_info->skb);
600
601 kfree(desc->rd_info);
602 }
603 }
604
605 static void device_free_rd1_ring(struct vnt_private *priv)
606 {
607 int i;
608
609 for (i = 0; i < priv->opts.rx_descs1; i++) {
610 struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
611 struct vnt_rd_info *rd_info = desc->rd_info;
612
613 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
614 priv->rx_buf_sz, DMA_FROM_DEVICE);
615
616 dev_kfree_skb(rd_info->skb);
617
618 kfree(desc->rd_info);
619 }
620 }
621
622 static void device_init_td0_ring(struct vnt_private *priv)
623 {
624 int i;
625 dma_addr_t curr;
626 struct vnt_tx_desc *desc;
627
628 curr = priv->td0_pool_dma;
629 for (i = 0; i < priv->opts.tx_descs[0];
630 i++, curr += sizeof(struct vnt_tx_desc)) {
631 desc = &priv->apTD0Rings[i];
632 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_ATOMIC);
633
634 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
635 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
636
637 desc->next = &(priv->apTD0Rings[(i+1) % priv->opts.tx_descs[0]]);
638 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
639 }
640
641 if (i > 0)
642 priv->apTD0Rings[i-1].next_desc = cpu_to_le32(priv->td0_pool_dma);
643 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
644 }
645
646 static void device_init_td1_ring(struct vnt_private *priv)
647 {
648 int i;
649 dma_addr_t curr;
650 struct vnt_tx_desc *desc;
651
652 /* Init the TD ring entries */
653 curr = priv->td1_pool_dma;
654 for (i = 0; i < priv->opts.tx_descs[1];
655 i++, curr += sizeof(struct vnt_tx_desc)) {
656 desc = &priv->apTD1Rings[i];
657 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_ATOMIC);
658
659 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
660 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
661
662 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
663 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
664 }
665
666 if (i > 0)
667 priv->apTD1Rings[i-1].next_desc = cpu_to_le32(priv->td1_pool_dma);
668 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
669 }
670
671 static void device_free_td0_ring(struct vnt_private *priv)
672 {
673 int i;
674
675 for (i = 0; i < priv->opts.tx_descs[0]; i++) {
676 struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
677 struct vnt_td_info *td_info = desc->td_info;
678
679 dev_kfree_skb(td_info->skb);
680 kfree(desc->td_info);
681 }
682 }
683
684 static void device_free_td1_ring(struct vnt_private *priv)
685 {
686 int i;
687
688 for (i = 0; i < priv->opts.tx_descs[1]; i++) {
689 struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
690 struct vnt_td_info *td_info = desc->td_info;
691
692 dev_kfree_skb(td_info->skb);
693 kfree(desc->td_info);
694 }
695 }
696
697 /*-----------------------------------------------------------------*/
698
699 static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
700 {
701 struct vnt_rx_desc *rd;
702 int works = 0;
703
704 for (rd = priv->pCurrRD[idx];
705 rd->rd0.owner == OWNED_BY_HOST;
706 rd = rd->next) {
707 if (works++ > 15)
708 break;
709
710 if (!rd->rd_info->skb)
711 break;
712
713 if (vnt_receive_frame(priv, rd)) {
714 if (!device_alloc_rx_buf(priv, rd)) {
715 dev_err(&priv->pcid->dev,
716 "can not allocate rx buf\n");
717 break;
718 }
719 }
720 rd->rd0.owner = OWNED_BY_NIC;
721 }
722
723 priv->pCurrRD[idx] = rd;
724
725 return works;
726 }
727
728 static bool device_alloc_rx_buf(struct vnt_private *priv,
729 struct vnt_rx_desc *rd)
730 {
731 struct vnt_rd_info *rd_info = rd->rd_info;
732
733 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
734 if (!rd_info->skb)
735 return false;
736
737 rd_info->skb_dma =
738 dma_map_single(&priv->pcid->dev,
739 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
740 priv->rx_buf_sz, DMA_FROM_DEVICE);
741 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
742 dev_kfree_skb(rd_info->skb);
743 rd_info->skb = NULL;
744 return false;
745 }
746
747 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */
748
749 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
750 rd->rd0.owner = OWNED_BY_NIC;
751 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
752 rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
753
754 return true;
755 }
756
757 static const u8 fallback_rate0[5][5] = {
758 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
759 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
760 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
761 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
762 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
763 };
764
765 static const u8 fallback_rate1[5][5] = {
766 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
767 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
768 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
769 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
770 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
771 };
772
773 static int vnt_int_report_rate(struct vnt_private *priv,
774 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
775 {
776 struct vnt_tx_fifo_head *fifo_head;
777 struct ieee80211_tx_info *info;
778 struct ieee80211_rate *rate;
779 u16 fb_option;
780 u8 tx_retry = (tsr0 & TSR0_NCR);
781 s8 idx;
782
783 if (!context)
784 return -ENOMEM;
785
786 if (!context->skb)
787 return -EINVAL;
788
789 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
790 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
791 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
792
793 info = IEEE80211_SKB_CB(context->skb);
794 idx = info->control.rates[0].idx;
795
796 if (fb_option && !(tsr1 & TSR1_TERR)) {
797 u8 tx_rate;
798 u8 retry = tx_retry;
799
800 rate = ieee80211_get_tx_rate(priv->hw, info);
801 tx_rate = rate->hw_value - RATE_18M;
802
803 if (retry > 4)
804 retry = 4;
805
806 if (fb_option & FIFOCTL_AUTO_FB_0)
807 tx_rate = fallback_rate0[tx_rate][retry];
808 else if (fb_option & FIFOCTL_AUTO_FB_1)
809 tx_rate = fallback_rate1[tx_rate][retry];
810
811 if (info->band == NL80211_BAND_5GHZ)
812 idx = tx_rate - RATE_6M;
813 else
814 idx = tx_rate;
815 }
816
817 ieee80211_tx_info_clear_status(info);
818
819 info->status.rates[0].count = tx_retry;
820
821 if (!(tsr1 & TSR1_TERR)) {
822 info->status.rates[0].idx = idx;
823
824 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
825 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
826 else
827 info->flags |= IEEE80211_TX_STAT_ACK;
828 }
829
830 return 0;
831 }
832
833 static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
834 {
835 struct vnt_tx_desc *desc;
836 int works = 0;
837 unsigned char byTsr0;
838 unsigned char byTsr1;
839
840 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
841 if (desc->td0.owner == OWNED_BY_NIC)
842 break;
843 if (works++ > 15)
844 break;
845
846 byTsr0 = desc->td0.tsr0;
847 byTsr1 = desc->td0.tsr1;
848
849 /* Only the status of first TD in the chain is correct */
850 if (desc->td1.tcr & TCR_STP) {
851 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
852 if (!(byTsr1 & TSR1_TERR)) {
853 if (byTsr0 != 0) {
854 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
855 (int)idx, byTsr1,
856 byTsr0);
857 }
858 } else {
859 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
860 (int)idx, byTsr1, byTsr0);
861 }
862 }
863
864 if (byTsr1 & TSR1_TERR) {
865 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
866 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
867 (int)idx, byTsr1, byTsr0);
868 }
869 }
870
871 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
872
873 device_free_tx_buf(priv, desc);
874 priv->iTDUsed[idx]--;
875 }
876 }
877
878 priv->apTailTD[idx] = desc;
879
880 return works;
881 }
882
883 static void device_error(struct vnt_private *priv, unsigned short status)
884 {
885 if (status & ISR_FETALERR) {
886 dev_err(&priv->pcid->dev, "Hardware fatal error\n");
887
888 MACbShutdown(priv);
889 return;
890 }
891 }
892
893 static void device_free_tx_buf(struct vnt_private *priv,
894 struct vnt_tx_desc *desc)
895 {
896 struct vnt_td_info *td_info = desc->td_info;
897 struct sk_buff *skb = td_info->skb;
898
899 if (skb)
900 ieee80211_tx_status_irqsafe(priv->hw, skb);
901
902 td_info->skb = NULL;
903 td_info->flags = 0;
904 }
905
906 static void vnt_check_bb_vga(struct vnt_private *priv)
907 {
908 long dbm;
909 int i;
910
911 if (!priv->bUpdateBBVGA)
912 return;
913
914 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
915 return;
916
917 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
918 return;
919
920 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
921
922 for (i = 0; i < BB_VGA_LEVEL; i++) {
923 if (dbm < priv->ldBmThreshold[i]) {
924 priv->byBBVGANew = priv->abyBBVGA[i];
925 break;
926 }
927 }
928
929 if (priv->byBBVGANew == priv->byBBVGACurrent) {
930 priv->uBBVGADiffCount = 1;
931 return;
932 }
933
934 priv->uBBVGADiffCount++;
935
936 if (priv->uBBVGADiffCount == 1) {
937 /* first VGA diff gain */
938 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
939
940 dev_dbg(&priv->pcid->dev,
941 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
942 (int)dbm, priv->byBBVGANew,
943 priv->byBBVGACurrent,
944 (int)priv->uBBVGADiffCount);
945 }
946
947 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
948 dev_dbg(&priv->pcid->dev,
949 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
950 (int)dbm, priv->byBBVGANew,
951 priv->byBBVGACurrent,
952 (int)priv->uBBVGADiffCount);
953
954 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
955 }
956 }
957
958 static void vnt_interrupt_process(struct vnt_private *priv)
959 {
960 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
961 int max_count = 0;
962 u32 mib_counter;
963 u32 isr;
964 unsigned long flags;
965
966 MACvReadISR(priv->PortOffset, &isr);
967
968 if (isr == 0)
969 return;
970
971 if (isr == 0xffffffff) {
972 pr_debug("isr = 0xffff\n");
973 return;
974 }
975
976 MACvIntDisable(priv->PortOffset);
977
978 spin_lock_irqsave(&priv->lock, flags);
979
980 /* Read low level stats */
981 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
982
983 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
984 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
985 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
986 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
987
988 /*
989 * TBD....
990 * Must do this after doing rx/tx, cause ISR bit is slow
991 * than RD/TD write back
992 * update ISR counter
993 */
994 while (isr && priv->vif) {
995 MACvWriteISR(priv->PortOffset, isr);
996
997 if (isr & ISR_FETALERR) {
998 pr_debug(" ISR_FETALERR\n");
999 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1000 VNSvOutPortW(priv->PortOffset +
1001 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1002 device_error(priv, isr);
1003 }
1004
1005 if (isr & ISR_TBTT) {
1006 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1007 vnt_check_bb_vga(priv);
1008
1009 priv->bBeaconSent = false;
1010 if (priv->bEnablePSMode)
1011 PSbIsNextTBTTWakeUp((void *)priv);
1012
1013 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1014 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1015 priv->vif->bss_conf.enable_beacon) {
1016 MACvOneShotTimer1MicroSec(priv,
1017 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1018 }
1019
1020 /* TODO: adhoc PS mode */
1021
1022 }
1023
1024 if (isr & ISR_BNTX) {
1025 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1026 priv->bIsBeaconBufReadySet = false;
1027 priv->cbBeaconBufReadySetCnt = 0;
1028 }
1029
1030 priv->bBeaconSent = true;
1031 }
1032
1033 if (isr & ISR_RXDMA0)
1034 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1035
1036 if (isr & ISR_RXDMA1)
1037 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1038
1039 if (isr & ISR_TXDMA0)
1040 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1041
1042 if (isr & ISR_AC0DMA)
1043 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1044
1045 if (isr & ISR_SOFTTIMER1) {
1046 if (priv->vif->bss_conf.enable_beacon)
1047 vnt_beacon_make(priv, priv->vif);
1048 }
1049
1050 /* If both buffers available wake the queue */
1051 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1052 AVAIL_TD(priv, TYPE_AC0DMA) &&
1053 ieee80211_queue_stopped(priv->hw, 0))
1054 ieee80211_wake_queues(priv->hw);
1055
1056 MACvReadISR(priv->PortOffset, &isr);
1057
1058 MACvReceive0(priv->PortOffset);
1059 MACvReceive1(priv->PortOffset);
1060
1061 if (max_count > priv->opts.int_works)
1062 break;
1063 }
1064
1065 spin_unlock_irqrestore(&priv->lock, flags);
1066
1067 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1068 }
1069
1070 static void vnt_interrupt_work(struct work_struct *work)
1071 {
1072 struct vnt_private *priv =
1073 container_of(work, struct vnt_private, interrupt_work);
1074
1075 if (priv->vif)
1076 vnt_interrupt_process(priv);
1077 }
1078
1079 static irqreturn_t vnt_interrupt(int irq, void *arg)
1080 {
1081 struct vnt_private *priv = arg;
1082
1083 if (priv->vif)
1084 schedule_work(&priv->interrupt_work);
1085
1086 return IRQ_HANDLED;
1087 }
1088
1089 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1090 {
1091 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1092 struct vnt_tx_desc *head_td;
1093 u32 dma_idx;
1094 unsigned long flags;
1095
1096 spin_lock_irqsave(&priv->lock, flags);
1097
1098 if (ieee80211_is_data(hdr->frame_control))
1099 dma_idx = TYPE_AC0DMA;
1100 else
1101 dma_idx = TYPE_TXDMA0;
1102
1103 if (AVAIL_TD(priv, dma_idx) < 1) {
1104 spin_unlock_irqrestore(&priv->lock, flags);
1105 ieee80211_stop_queues(priv->hw);
1106 return -ENOMEM;
1107 }
1108
1109 head_td = priv->apCurrTD[dma_idx];
1110
1111 head_td->td1.tcr = 0;
1112
1113 head_td->td_info->skb = skb;
1114
1115 if (dma_idx == TYPE_AC0DMA)
1116 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1117
1118 priv->apCurrTD[dma_idx] = head_td->next;
1119
1120 spin_unlock_irqrestore(&priv->lock, flags);
1121
1122 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1123
1124 spin_lock_irqsave(&priv->lock, flags);
1125
1126 priv->bPWBitOn = false;
1127
1128 /* Set TSR1 & ReqCount in TxDescHead */
1129 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1130 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1131
1132 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1133
1134 /* Poll Transmit the adapter */
1135 wmb();
1136 head_td->td0.owner = OWNED_BY_NIC;
1137 wmb(); /* second memory barrier */
1138
1139 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1140 MACvTransmitAC0(priv->PortOffset);
1141 else
1142 MACvTransmit0(priv->PortOffset);
1143
1144 priv->iTDUsed[dma_idx]++;
1145
1146 spin_unlock_irqrestore(&priv->lock, flags);
1147
1148 return 0;
1149 }
1150
1151 static void vnt_tx_80211(struct ieee80211_hw *hw,
1152 struct ieee80211_tx_control *control,
1153 struct sk_buff *skb)
1154 {
1155 struct vnt_private *priv = hw->priv;
1156
1157 if (vnt_tx_packet(priv, skb))
1158 ieee80211_free_txskb(hw, skb);
1159 }
1160
1161 static int vnt_start(struct ieee80211_hw *hw)
1162 {
1163 struct vnt_private *priv = hw->priv;
1164 int ret;
1165
1166 priv->rx_buf_sz = PKT_BUF_SZ;
1167 if (!device_init_rings(priv))
1168 return -ENOMEM;
1169
1170 ret = request_irq(priv->pcid->irq, vnt_interrupt,
1171 IRQF_SHARED, "vt6655", priv);
1172 if (ret) {
1173 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1174 return ret;
1175 }
1176
1177 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1178 device_init_rd0_ring(priv);
1179 device_init_rd1_ring(priv);
1180 device_init_td0_ring(priv);
1181 device_init_td1_ring(priv);
1182
1183 device_init_registers(priv);
1184
1185 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1186 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1187
1188 ieee80211_wake_queues(hw);
1189
1190 return 0;
1191 }
1192
1193 static void vnt_stop(struct ieee80211_hw *hw)
1194 {
1195 struct vnt_private *priv = hw->priv;
1196
1197 ieee80211_stop_queues(hw);
1198
1199 cancel_work_sync(&priv->interrupt_work);
1200
1201 MACbShutdown(priv);
1202 MACbSoftwareReset(priv);
1203 CARDbRadioPowerOff(priv);
1204
1205 device_free_td0_ring(priv);
1206 device_free_td1_ring(priv);
1207 device_free_rd0_ring(priv);
1208 device_free_rd1_ring(priv);
1209 device_free_rings(priv);
1210
1211 free_irq(priv->pcid->irq, priv);
1212 }
1213
1214 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1215 {
1216 struct vnt_private *priv = hw->priv;
1217
1218 priv->vif = vif;
1219
1220 switch (vif->type) {
1221 case NL80211_IFTYPE_STATION:
1222 break;
1223 case NL80211_IFTYPE_ADHOC:
1224 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1225
1226 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1227
1228 break;
1229 case NL80211_IFTYPE_AP:
1230 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1231
1232 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1233
1234 break;
1235 default:
1236 return -EOPNOTSUPP;
1237 }
1238
1239 priv->op_mode = vif->type;
1240
1241 return 0;
1242 }
1243
1244 static void vnt_remove_interface(struct ieee80211_hw *hw,
1245 struct ieee80211_vif *vif)
1246 {
1247 struct vnt_private *priv = hw->priv;
1248
1249 switch (vif->type) {
1250 case NL80211_IFTYPE_STATION:
1251 break;
1252 case NL80211_IFTYPE_ADHOC:
1253 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1254 MACvRegBitsOff(priv->PortOffset,
1255 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1256 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1257 break;
1258 case NL80211_IFTYPE_AP:
1259 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1260 MACvRegBitsOff(priv->PortOffset,
1261 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1262 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1263 break;
1264 default:
1265 break;
1266 }
1267
1268 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1269 }
1270
1271 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1272 {
1273 struct vnt_private *priv = hw->priv;
1274 struct ieee80211_conf *conf = &hw->conf;
1275 u8 bb_type;
1276
1277 if (changed & IEEE80211_CONF_CHANGE_PS) {
1278 if (conf->flags & IEEE80211_CONF_PS)
1279 PSvEnablePowerSaving(priv, conf->listen_interval);
1280 else
1281 PSvDisablePowerSaving(priv);
1282 }
1283
1284 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1285 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1286 set_channel(priv, conf->chandef.chan);
1287
1288 if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
1289 bb_type = BB_TYPE_11A;
1290 else
1291 bb_type = BB_TYPE_11G;
1292
1293 if (priv->byBBType != bb_type) {
1294 priv->byBBType = bb_type;
1295
1296 CARDbSetPhyParameter(priv, priv->byBBType);
1297 }
1298 }
1299
1300 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1301 if (priv->byBBType == BB_TYPE_11B)
1302 priv->wCurrentRate = RATE_1M;
1303 else
1304 priv->wCurrentRate = RATE_54M;
1305
1306 RFbSetPower(priv, priv->wCurrentRate,
1307 conf->chandef.chan->hw_value);
1308 }
1309
1310 return 0;
1311 }
1312
1313 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1314 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1315 u32 changed)
1316 {
1317 struct vnt_private *priv = hw->priv;
1318
1319 priv->current_aid = conf->aid;
1320
1321 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1322 unsigned long flags;
1323
1324 spin_lock_irqsave(&priv->lock, flags);
1325
1326 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1327
1328 spin_unlock_irqrestore(&priv->lock, flags);
1329 }
1330
1331 if (changed & BSS_CHANGED_BASIC_RATES) {
1332 priv->basic_rates = conf->basic_rates;
1333
1334 CARDvUpdateBasicTopRate(priv);
1335
1336 dev_dbg(&priv->pcid->dev,
1337 "basic rates %x\n", conf->basic_rates);
1338 }
1339
1340 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1341 if (conf->use_short_preamble) {
1342 MACvEnableBarkerPreambleMd(priv->PortOffset);
1343 priv->byPreambleType = true;
1344 } else {
1345 MACvDisableBarkerPreambleMd(priv->PortOffset);
1346 priv->byPreambleType = false;
1347 }
1348 }
1349
1350 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1351 if (conf->use_cts_prot)
1352 MACvEnableProtectMD(priv->PortOffset);
1353 else
1354 MACvDisableProtectMD(priv->PortOffset);
1355 }
1356
1357 if (changed & BSS_CHANGED_ERP_SLOT) {
1358 if (conf->use_short_slot)
1359 priv->bShortSlotTime = true;
1360 else
1361 priv->bShortSlotTime = false;
1362
1363 CARDbSetPhyParameter(priv, priv->byBBType);
1364 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1365 }
1366
1367 if (changed & BSS_CHANGED_TXPOWER)
1368 RFbSetPower(priv, priv->wCurrentRate,
1369 conf->chandef.chan->hw_value);
1370
1371 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1372 dev_dbg(&priv->pcid->dev,
1373 "Beacon enable %d\n", conf->enable_beacon);
1374
1375 if (conf->enable_beacon) {
1376 vnt_beacon_enable(priv, vif, conf);
1377
1378 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1379 TCR_AUTOBCNTX);
1380 } else {
1381 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1382 TCR_AUTOBCNTX);
1383 }
1384 }
1385
1386 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1387 priv->op_mode != NL80211_IFTYPE_AP) {
1388 if (conf->assoc && conf->beacon_rate) {
1389 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1390 conf->sync_tsf);
1391
1392 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1393
1394 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1395 } else {
1396 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1397 TFTCTL_TSFCNTRST);
1398 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1399 TFTCTL_TSFCNTREN);
1400 }
1401 }
1402 }
1403
1404 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1405 struct netdev_hw_addr_list *mc_list)
1406 {
1407 struct vnt_private *priv = hw->priv;
1408 struct netdev_hw_addr *ha;
1409 u64 mc_filter = 0;
1410 u32 bit_nr = 0;
1411
1412 netdev_hw_addr_list_for_each(ha, mc_list) {
1413 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1414
1415 mc_filter |= 1ULL << (bit_nr & 0x3f);
1416 }
1417
1418 priv->mc_list_count = mc_list->count;
1419
1420 return mc_filter;
1421 }
1422
1423 static void vnt_configure(struct ieee80211_hw *hw,
1424 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1425 {
1426 struct vnt_private *priv = hw->priv;
1427 u8 rx_mode = 0;
1428
1429 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1430
1431 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1432
1433 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1434
1435 if (changed_flags & FIF_ALLMULTI) {
1436 if (*total_flags & FIF_ALLMULTI) {
1437 unsigned long flags;
1438
1439 spin_lock_irqsave(&priv->lock, flags);
1440
1441 if (priv->mc_list_count > 2) {
1442 MACvSelectPage1(priv->PortOffset);
1443
1444 VNSvOutPortD(priv->PortOffset +
1445 MAC_REG_MAR0, 0xffffffff);
1446 VNSvOutPortD(priv->PortOffset +
1447 MAC_REG_MAR0 + 4, 0xffffffff);
1448
1449 MACvSelectPage0(priv->PortOffset);
1450 } else {
1451 MACvSelectPage1(priv->PortOffset);
1452
1453 VNSvOutPortD(priv->PortOffset +
1454 MAC_REG_MAR0, (u32)multicast);
1455 VNSvOutPortD(priv->PortOffset +
1456 MAC_REG_MAR0 + 4,
1457 (u32)(multicast >> 32));
1458
1459 MACvSelectPage0(priv->PortOffset);
1460 }
1461
1462 spin_unlock_irqrestore(&priv->lock, flags);
1463
1464 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1465 } else {
1466 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1467 }
1468 }
1469
1470 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1471 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1472
1473 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1474 rx_mode &= ~RCR_BSSID;
1475 else
1476 rx_mode |= RCR_BSSID;
1477 }
1478
1479 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1480
1481 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1482 }
1483
1484 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1485 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1486 struct ieee80211_key_conf *key)
1487 {
1488 struct vnt_private *priv = hw->priv;
1489
1490 switch (cmd) {
1491 case SET_KEY:
1492 if (vnt_set_keys(hw, sta, vif, key))
1493 return -EOPNOTSUPP;
1494 break;
1495 case DISABLE_KEY:
1496 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1497 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1498 default:
1499 break;
1500 }
1501
1502 return 0;
1503 }
1504
1505 static int vnt_get_stats(struct ieee80211_hw *hw,
1506 struct ieee80211_low_level_stats *stats)
1507 {
1508 struct vnt_private *priv = hw->priv;
1509
1510 memcpy(stats, &priv->low_stats, sizeof(*stats));
1511
1512 return 0;
1513 }
1514
1515 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1516 {
1517 struct vnt_private *priv = hw->priv;
1518 u64 tsf;
1519
1520 CARDbGetCurrentTSF(priv, &tsf);
1521
1522 return tsf;
1523 }
1524
1525 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1526 u64 tsf)
1527 {
1528 struct vnt_private *priv = hw->priv;
1529
1530 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1531 }
1532
1533 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1534 {
1535 struct vnt_private *priv = hw->priv;
1536
1537 /* reset TSF counter */
1538 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1539 }
1540
1541 static const struct ieee80211_ops vnt_mac_ops = {
1542 .tx = vnt_tx_80211,
1543 .start = vnt_start,
1544 .stop = vnt_stop,
1545 .add_interface = vnt_add_interface,
1546 .remove_interface = vnt_remove_interface,
1547 .config = vnt_config,
1548 .bss_info_changed = vnt_bss_info_changed,
1549 .prepare_multicast = vnt_prepare_multicast,
1550 .configure_filter = vnt_configure,
1551 .set_key = vnt_set_key,
1552 .get_stats = vnt_get_stats,
1553 .get_tsf = vnt_get_tsf,
1554 .set_tsf = vnt_set_tsf,
1555 .reset_tsf = vnt_reset_tsf,
1556 };
1557
1558 static int vnt_init(struct vnt_private *priv)
1559 {
1560 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1561
1562 vnt_init_bands(priv);
1563
1564 if (ieee80211_register_hw(priv->hw))
1565 return -ENODEV;
1566
1567 priv->mac_hw = true;
1568
1569 CARDbRadioPowerOff(priv);
1570
1571 return 0;
1572 }
1573
1574 static int
1575 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1576 {
1577 struct vnt_private *priv;
1578 struct ieee80211_hw *hw;
1579 struct wiphy *wiphy;
1580 int rc;
1581
1582 dev_notice(&pcid->dev,
1583 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1584
1585 dev_notice(&pcid->dev,
1586 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1587
1588 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1589 if (!hw) {
1590 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1591 return -ENOMEM;
1592 }
1593
1594 priv = hw->priv;
1595 priv->pcid = pcid;
1596
1597 spin_lock_init(&priv->lock);
1598
1599 priv->hw = hw;
1600
1601 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1602
1603 if (pci_enable_device(pcid)) {
1604 device_free_info(priv);
1605 return -ENODEV;
1606 }
1607
1608 dev_dbg(&pcid->dev,
1609 "Before get pci_info memaddr is %x\n", priv->memaddr);
1610
1611 pci_set_master(pcid);
1612
1613 priv->memaddr = pci_resource_start(pcid, 0);
1614 priv->ioaddr = pci_resource_start(pcid, 1);
1615 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1616 256);
1617 if (!priv->PortOffset) {
1618 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1619 device_free_info(priv);
1620 return -ENODEV;
1621 }
1622
1623 rc = pci_request_regions(pcid, DEVICE_NAME);
1624 if (rc) {
1625 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1626 device_free_info(priv);
1627 return -ENODEV;
1628 }
1629
1630 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1631 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1632 device_free_info(priv);
1633 return -ENODEV;
1634 }
1635
1636 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1637
1638 /* do reset */
1639 if (!MACbSoftwareReset(priv)) {
1640 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1641 device_free_info(priv);
1642 return -ENODEV;
1643 }
1644 /* initial to reload eeprom */
1645 MACvInitialize(priv);
1646 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1647
1648 /* Get RFType */
1649 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1650 priv->byRFType &= RF_MASK;
1651
1652 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1653
1654 device_get_options(priv);
1655 device_set_options(priv);
1656
1657 wiphy = priv->hw->wiphy;
1658
1659 wiphy->frag_threshold = FRAG_THRESH_DEF;
1660 wiphy->rts_threshold = RTS_THRESH_DEF;
1661 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1662 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1663
1664 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1665 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1666 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1667 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1668 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1669
1670 priv->hw->max_signal = 100;
1671
1672 if (vnt_init(priv))
1673 return -ENODEV;
1674
1675 device_print_info(priv);
1676 pci_set_drvdata(pcid, priv);
1677
1678 return 0;
1679 }
1680
1681 /*------------------------------------------------------------------*/
1682
1683 #ifdef CONFIG_PM
1684 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1685 {
1686 struct vnt_private *priv = pci_get_drvdata(pcid);
1687 unsigned long flags;
1688
1689 spin_lock_irqsave(&priv->lock, flags);
1690
1691 pci_save_state(pcid);
1692
1693 MACbShutdown(priv);
1694
1695 pci_disable_device(pcid);
1696 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1697
1698 spin_unlock_irqrestore(&priv->lock, flags);
1699
1700 return 0;
1701 }
1702
1703 static int vt6655_resume(struct pci_dev *pcid)
1704 {
1705
1706 pci_set_power_state(pcid, PCI_D0);
1707 pci_enable_wake(pcid, PCI_D0, 0);
1708 pci_restore_state(pcid);
1709
1710 return 0;
1711 }
1712 #endif
1713
1714 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1715
1716 static struct pci_driver device_driver = {
1717 .name = DEVICE_NAME,
1718 .id_table = vt6655_pci_id_table,
1719 .probe = vt6655_probe,
1720 .remove = vt6655_remove,
1721 #ifdef CONFIG_PM
1722 .suspend = vt6655_suspend,
1723 .resume = vt6655_resume,
1724 #endif
1725 };
1726
1727 module_pci_driver(device_driver);
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